1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Author: Cerf Yu <cerf.yu@rock-chips.com>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #define pr_fmt(fmt) "rga_mm: " fmt
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include "rga.h"
11*4882a593Smuzhiyun #include "rga_job.h"
12*4882a593Smuzhiyun #include "rga_mm.h"
13*4882a593Smuzhiyun #include "rga_dma_buf.h"
14*4882a593Smuzhiyun #include "rga_common.h"
15*4882a593Smuzhiyun #include "rga_iommu.h"
16*4882a593Smuzhiyun #include "rga_hw_config.h"
17*4882a593Smuzhiyun #include "rga_debugger.h"
18*4882a593Smuzhiyun
rga_current_mm_read_lock(struct mm_struct * mm)19*4882a593Smuzhiyun static void rga_current_mm_read_lock(struct mm_struct *mm)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 10, 0)
22*4882a593Smuzhiyun mmap_read_lock(mm);
23*4882a593Smuzhiyun #else
24*4882a593Smuzhiyun down_read(&mm->mmap_sem);
25*4882a593Smuzhiyun #endif
26*4882a593Smuzhiyun }
27*4882a593Smuzhiyun
rga_current_mm_read_unlock(struct mm_struct * mm)28*4882a593Smuzhiyun static void rga_current_mm_read_unlock(struct mm_struct *mm)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 10, 0)
31*4882a593Smuzhiyun mmap_read_unlock(mm);
32*4882a593Smuzhiyun #else
33*4882a593Smuzhiyun up_read(&mm->mmap_sem);
34*4882a593Smuzhiyun #endif
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
rga_get_user_pages_from_vma(struct page ** pages,unsigned long Memory,uint32_t pageCount,struct mm_struct * current_mm)37*4882a593Smuzhiyun static int rga_get_user_pages_from_vma(struct page **pages, unsigned long Memory,
38*4882a593Smuzhiyun uint32_t pageCount, struct mm_struct *current_mm)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun int ret = 0;
41*4882a593Smuzhiyun int i;
42*4882a593Smuzhiyun struct vm_area_struct *vma;
43*4882a593Smuzhiyun spinlock_t *ptl;
44*4882a593Smuzhiyun pte_t *pte;
45*4882a593Smuzhiyun pgd_t *pgd;
46*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 10, 0)
47*4882a593Smuzhiyun p4d_t *p4d;
48*4882a593Smuzhiyun #endif
49*4882a593Smuzhiyun pud_t *pud;
50*4882a593Smuzhiyun pmd_t *pmd;
51*4882a593Smuzhiyun unsigned long pfn;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun for (i = 0; i < pageCount; i++) {
54*4882a593Smuzhiyun vma = find_vma(current_mm, (Memory + i) << PAGE_SHIFT);
55*4882a593Smuzhiyun if (!vma) {
56*4882a593Smuzhiyun pr_err("page[%d] failed to get vma\n", i);
57*4882a593Smuzhiyun ret = RGA_OUT_OF_RESOURCES;
58*4882a593Smuzhiyun break;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun pgd = pgd_offset(current_mm, (Memory + i) << PAGE_SHIFT);
62*4882a593Smuzhiyun if (pgd_none(*pgd) || unlikely(pgd_bad(*pgd))) {
63*4882a593Smuzhiyun pr_err("page[%d] failed to get pgd\n", i);
64*4882a593Smuzhiyun ret = RGA_OUT_OF_RESOURCES;
65*4882a593Smuzhiyun break;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 10, 0)
68*4882a593Smuzhiyun /*
69*4882a593Smuzhiyun * In the four-level page table,
70*4882a593Smuzhiyun * it will do nothing and return pgd.
71*4882a593Smuzhiyun */
72*4882a593Smuzhiyun p4d = p4d_offset(pgd, (Memory + i) << PAGE_SHIFT);
73*4882a593Smuzhiyun if (p4d_none(*p4d) || unlikely(p4d_bad(*p4d))) {
74*4882a593Smuzhiyun pr_err("page[%d] failed to get p4d\n", i);
75*4882a593Smuzhiyun ret = RGA_OUT_OF_RESOURCES;
76*4882a593Smuzhiyun break;
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun pud = pud_offset(p4d, (Memory + i) << PAGE_SHIFT);
80*4882a593Smuzhiyun #else
81*4882a593Smuzhiyun pud = pud_offset(pgd, (Memory + i) << PAGE_SHIFT);
82*4882a593Smuzhiyun #endif
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun if (pud_none(*pud) || unlikely(pud_bad(*pud))) {
85*4882a593Smuzhiyun pr_err("page[%d] failed to get pud\n", i);
86*4882a593Smuzhiyun ret = RGA_OUT_OF_RESOURCES;
87*4882a593Smuzhiyun break;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun pmd = pmd_offset(pud, (Memory + i) << PAGE_SHIFT);
90*4882a593Smuzhiyun if (pmd_none(*pmd) || unlikely(pmd_bad(*pmd))) {
91*4882a593Smuzhiyun pr_err("page[%d] failed to get pmd\n", i);
92*4882a593Smuzhiyun ret = RGA_OUT_OF_RESOURCES;
93*4882a593Smuzhiyun break;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun pte = pte_offset_map_lock(current_mm, pmd,
96*4882a593Smuzhiyun (Memory + i) << PAGE_SHIFT, &ptl);
97*4882a593Smuzhiyun if (pte_none(*pte)) {
98*4882a593Smuzhiyun pr_err("page[%d] failed to get pte\n", i);
99*4882a593Smuzhiyun pte_unmap_unlock(pte, ptl);
100*4882a593Smuzhiyun ret = RGA_OUT_OF_RESOURCES;
101*4882a593Smuzhiyun break;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun pfn = pte_pfn(*pte);
105*4882a593Smuzhiyun pages[i] = pfn_to_page(pfn);
106*4882a593Smuzhiyun pte_unmap_unlock(pte, ptl);
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun if (ret == RGA_OUT_OF_RESOURCES && i > 0)
110*4882a593Smuzhiyun pr_err("Only get buffer %d byte from vma, but current image required %d byte",
111*4882a593Smuzhiyun (int)(i * PAGE_SIZE), (int)(pageCount * PAGE_SIZE));
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun return ret;
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun
rga_get_user_pages(struct page ** pages,unsigned long Memory,uint32_t pageCount,int writeFlag,struct mm_struct * current_mm)116*4882a593Smuzhiyun static int rga_get_user_pages(struct page **pages, unsigned long Memory,
117*4882a593Smuzhiyun uint32_t pageCount, int writeFlag,
118*4882a593Smuzhiyun struct mm_struct *current_mm)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun uint32_t i;
121*4882a593Smuzhiyun int32_t ret = 0;
122*4882a593Smuzhiyun int32_t result;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun rga_current_mm_read_lock(current_mm);
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 168) && \
127*4882a593Smuzhiyun LINUX_VERSION_CODE < KERNEL_VERSION(4, 5, 0)
128*4882a593Smuzhiyun result = get_user_pages(current, current_mm, Memory << PAGE_SHIFT,
129*4882a593Smuzhiyun pageCount, writeFlag ? FOLL_WRITE : 0,
130*4882a593Smuzhiyun pages, NULL);
131*4882a593Smuzhiyun #elif LINUX_VERSION_CODE < KERNEL_VERSION(4, 6, 0)
132*4882a593Smuzhiyun result = get_user_pages(current, current_mm, Memory << PAGE_SHIFT,
133*4882a593Smuzhiyun pageCount, writeFlag ? FOLL_WRITE : 0, 0, pages, NULL);
134*4882a593Smuzhiyun #elif LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
135*4882a593Smuzhiyun result = get_user_pages_remote(current, current_mm,
136*4882a593Smuzhiyun Memory << PAGE_SHIFT,
137*4882a593Smuzhiyun pageCount, writeFlag ? FOLL_WRITE : 0, pages, NULL, NULL);
138*4882a593Smuzhiyun #else
139*4882a593Smuzhiyun result = get_user_pages_remote(current_mm, Memory << PAGE_SHIFT,
140*4882a593Smuzhiyun pageCount, writeFlag ? FOLL_WRITE : 0, pages, NULL, NULL);
141*4882a593Smuzhiyun #endif
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun if (result > 0 && result >= pageCount) {
144*4882a593Smuzhiyun ret = result;
145*4882a593Smuzhiyun } else {
146*4882a593Smuzhiyun if (result > 0)
147*4882a593Smuzhiyun for (i = 0; i < result; i++)
148*4882a593Smuzhiyun put_page(pages[i]);
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun ret = rga_get_user_pages_from_vma(pages, Memory, pageCount, current_mm);
151*4882a593Smuzhiyun if (ret < 0 && result > 0) {
152*4882a593Smuzhiyun pr_err("Only get buffer %d byte from user pages, but current image required %d byte\n",
153*4882a593Smuzhiyun (int)(result * PAGE_SIZE), (int)(pageCount * PAGE_SIZE));
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun rga_current_mm_read_unlock(current_mm);
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun return ret;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
rga_free_sgt(struct sg_table ** sgt_ptr)162*4882a593Smuzhiyun static void rga_free_sgt(struct sg_table **sgt_ptr)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun if (sgt_ptr == NULL || *sgt_ptr == NULL)
165*4882a593Smuzhiyun return;
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun sg_free_table(*sgt_ptr);
168*4882a593Smuzhiyun kfree(*sgt_ptr);
169*4882a593Smuzhiyun *sgt_ptr = NULL;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
rga_alloc_sgt(struct rga_virt_addr * virt_addr)172*4882a593Smuzhiyun static struct sg_table *rga_alloc_sgt(struct rga_virt_addr *virt_addr)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun int ret;
175*4882a593Smuzhiyun struct sg_table *sgt = NULL;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun sgt = kzalloc(sizeof(*sgt), GFP_KERNEL);
178*4882a593Smuzhiyun if (sgt == NULL) {
179*4882a593Smuzhiyun pr_err("%s alloc sgt error!\n", __func__);
180*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun /* get sg form pages. */
184*4882a593Smuzhiyun /* iova requires minimum page alignment, so sgt cannot have offset */
185*4882a593Smuzhiyun ret = sg_alloc_table_from_pages(sgt,
186*4882a593Smuzhiyun virt_addr->pages,
187*4882a593Smuzhiyun virt_addr->page_count,
188*4882a593Smuzhiyun 0,
189*4882a593Smuzhiyun virt_addr->size,
190*4882a593Smuzhiyun GFP_KERNEL);
191*4882a593Smuzhiyun if (ret) {
192*4882a593Smuzhiyun pr_err("sg_alloc_table_from_pages failed");
193*4882a593Smuzhiyun goto out_free_sgt;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun return sgt;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun out_free_sgt:
199*4882a593Smuzhiyun kfree(sgt);
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun return ERR_PTR(ret);
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun
rga_free_virt_addr(struct rga_virt_addr ** virt_addr_p)204*4882a593Smuzhiyun static void rga_free_virt_addr(struct rga_virt_addr **virt_addr_p)
205*4882a593Smuzhiyun {
206*4882a593Smuzhiyun int i;
207*4882a593Smuzhiyun struct rga_virt_addr *virt_addr = NULL;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun if (virt_addr_p == NULL)
210*4882a593Smuzhiyun return;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun virt_addr = *virt_addr_p;
213*4882a593Smuzhiyun if (virt_addr == NULL)
214*4882a593Smuzhiyun return;
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun for (i = 0; i < virt_addr->result; i++)
217*4882a593Smuzhiyun put_page(virt_addr->pages[i]);
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun free_pages((unsigned long)virt_addr->pages, virt_addr->pages_order);
220*4882a593Smuzhiyun kfree(virt_addr);
221*4882a593Smuzhiyun *virt_addr_p = NULL;
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun
rga_alloc_virt_addr(struct rga_virt_addr ** virt_addr_p,uint64_t viraddr,struct rga_memory_parm * memory_parm,int writeFlag,struct mm_struct * mm)224*4882a593Smuzhiyun static int rga_alloc_virt_addr(struct rga_virt_addr **virt_addr_p,
225*4882a593Smuzhiyun uint64_t viraddr,
226*4882a593Smuzhiyun struct rga_memory_parm *memory_parm,
227*4882a593Smuzhiyun int writeFlag,
228*4882a593Smuzhiyun struct mm_struct *mm)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun int i;
231*4882a593Smuzhiyun int ret;
232*4882a593Smuzhiyun int result = 0;
233*4882a593Smuzhiyun int order;
234*4882a593Smuzhiyun unsigned int count;
235*4882a593Smuzhiyun int img_size;
236*4882a593Smuzhiyun size_t offset;
237*4882a593Smuzhiyun unsigned long size;
238*4882a593Smuzhiyun struct page **pages = NULL;
239*4882a593Smuzhiyun struct rga_virt_addr *virt_addr = NULL;
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun if (memory_parm->size)
242*4882a593Smuzhiyun img_size = memory_parm->size;
243*4882a593Smuzhiyun else
244*4882a593Smuzhiyun img_size = rga_image_size_cal(memory_parm->width,
245*4882a593Smuzhiyun memory_parm->height,
246*4882a593Smuzhiyun memory_parm->format,
247*4882a593Smuzhiyun NULL, NULL, NULL);
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun offset = viraddr & (~PAGE_MASK);
250*4882a593Smuzhiyun count = RGA_GET_PAGE_COUNT(img_size + offset);
251*4882a593Smuzhiyun size = count * PAGE_SIZE;
252*4882a593Smuzhiyun if (!size) {
253*4882a593Smuzhiyun pr_err("failed to calculating buffer size! size = %ld, count = %d, offset = %ld\n",
254*4882a593Smuzhiyun size, count, (unsigned long)offset);
255*4882a593Smuzhiyun rga_dump_memory_parm(memory_parm);
256*4882a593Smuzhiyun return -EFAULT;
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun /* alloc pages and page_table */
260*4882a593Smuzhiyun order = get_order(count * sizeof(struct page *));
261*4882a593Smuzhiyun if (order >= MAX_ORDER) {
262*4882a593Smuzhiyun pr_err("Can not alloc pages with order[%d] for viraddr pages, max_order = %d\n",
263*4882a593Smuzhiyun order, MAX_ORDER);
264*4882a593Smuzhiyun return -ENOMEM;
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun pages = (struct page **)__get_free_pages(GFP_KERNEL, order);
268*4882a593Smuzhiyun if (pages == NULL) {
269*4882a593Smuzhiyun pr_err("%s can not alloc pages for viraddr pages\n", __func__);
270*4882a593Smuzhiyun return -ENOMEM;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun /* get pages from virtual address. */
274*4882a593Smuzhiyun ret = rga_get_user_pages(pages, viraddr >> PAGE_SHIFT, count, writeFlag, mm);
275*4882a593Smuzhiyun if (ret < 0) {
276*4882a593Smuzhiyun pr_err("failed to get pages from virtual adrees: 0x%lx\n",
277*4882a593Smuzhiyun (unsigned long)viraddr);
278*4882a593Smuzhiyun ret = -EINVAL;
279*4882a593Smuzhiyun goto out_free_pages;
280*4882a593Smuzhiyun } else if (ret > 0) {
281*4882a593Smuzhiyun /* For put pages */
282*4882a593Smuzhiyun result = ret;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun *virt_addr_p = kzalloc(sizeof(struct rga_virt_addr), GFP_KERNEL);
286*4882a593Smuzhiyun if (*virt_addr_p == NULL) {
287*4882a593Smuzhiyun pr_err("%s alloc virt_addr error!\n", __func__);
288*4882a593Smuzhiyun ret = -ENOMEM;
289*4882a593Smuzhiyun goto out_put_and_free_pages;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun virt_addr = *virt_addr_p;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun virt_addr->addr = viraddr;
294*4882a593Smuzhiyun virt_addr->pages = pages;
295*4882a593Smuzhiyun virt_addr->pages_order = order;
296*4882a593Smuzhiyun virt_addr->page_count = count;
297*4882a593Smuzhiyun virt_addr->size = size;
298*4882a593Smuzhiyun virt_addr->offset = offset;
299*4882a593Smuzhiyun virt_addr->result = result;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun return 0;
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun out_put_and_free_pages:
304*4882a593Smuzhiyun for (i = 0; i < result; i++)
305*4882a593Smuzhiyun put_page(pages[i]);
306*4882a593Smuzhiyun out_free_pages:
307*4882a593Smuzhiyun free_pages((unsigned long)pages, order);
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun return ret;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun
rga_mm_check_memory_limit(struct rga_scheduler_t * scheduler,int mm_flag)312*4882a593Smuzhiyun static inline bool rga_mm_check_memory_limit(struct rga_scheduler_t *scheduler, int mm_flag)
313*4882a593Smuzhiyun {
314*4882a593Smuzhiyun if (!scheduler)
315*4882a593Smuzhiyun return false;
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun if (scheduler->data->mmu == RGA_MMU &&
318*4882a593Smuzhiyun !(mm_flag & RGA_MEM_UNDER_4G)) {
319*4882a593Smuzhiyun pr_err("%s unsupported memory larger than 4G!\n",
320*4882a593Smuzhiyun rga_get_mmu_type_str(scheduler->data->mmu));
321*4882a593Smuzhiyun return false;
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun return true;
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun /* If it is within 0~4G, return 1 (true). */
rga_mm_check_range_sgt(struct sg_table * sgt)328*4882a593Smuzhiyun static int rga_mm_check_range_sgt(struct sg_table *sgt)
329*4882a593Smuzhiyun {
330*4882a593Smuzhiyun int i;
331*4882a593Smuzhiyun struct scatterlist *sg;
332*4882a593Smuzhiyun phys_addr_t s_phys = 0;
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun for_each_sg(sgt->sgl, sg, sgt->orig_nents, i) {
335*4882a593Smuzhiyun s_phys = sg_phys(sg);
336*4882a593Smuzhiyun if ((s_phys > 0xffffffff) || (s_phys + sg->length > 0xffffffff))
337*4882a593Smuzhiyun return 0;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun return 1;
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun
rga_mm_check_range_phys_addr(phys_addr_t paddr,size_t size)343*4882a593Smuzhiyun static inline int rga_mm_check_range_phys_addr(phys_addr_t paddr, size_t size)
344*4882a593Smuzhiyun {
345*4882a593Smuzhiyun return ((paddr + size) <= 0xffffffff);
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun
rga_mm_check_contiguous_sgt(struct sg_table * sgt)348*4882a593Smuzhiyun static inline bool rga_mm_check_contiguous_sgt(struct sg_table *sgt)
349*4882a593Smuzhiyun {
350*4882a593Smuzhiyun if (sgt->orig_nents == 1)
351*4882a593Smuzhiyun return true;
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun return false;
354*4882a593Smuzhiyun }
355*4882a593Smuzhiyun
rga_mm_unmap_dma_buffer(struct rga_internal_buffer * internal_buffer)356*4882a593Smuzhiyun static void rga_mm_unmap_dma_buffer(struct rga_internal_buffer *internal_buffer)
357*4882a593Smuzhiyun {
358*4882a593Smuzhiyun if (rga_mm_is_invalid_dma_buffer(internal_buffer->dma_buffer))
359*4882a593Smuzhiyun return;
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun rga_dma_unmap_buf(internal_buffer->dma_buffer);
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun if (internal_buffer->mm_flag & RGA_MEM_PHYSICAL_CONTIGUOUS &&
364*4882a593Smuzhiyun internal_buffer->phys_addr > 0)
365*4882a593Smuzhiyun internal_buffer->phys_addr = 0;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun kfree(internal_buffer->dma_buffer);
368*4882a593Smuzhiyun internal_buffer->dma_buffer = NULL;
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun
rga_mm_map_dma_buffer(struct rga_external_buffer * external_buffer,struct rga_internal_buffer * internal_buffer,struct rga_job * job)371*4882a593Smuzhiyun static int rga_mm_map_dma_buffer(struct rga_external_buffer *external_buffer,
372*4882a593Smuzhiyun struct rga_internal_buffer *internal_buffer,
373*4882a593Smuzhiyun struct rga_job *job)
374*4882a593Smuzhiyun {
375*4882a593Smuzhiyun int ret;
376*4882a593Smuzhiyun int ex_buffer_size;
377*4882a593Smuzhiyun uint32_t mm_flag = 0;
378*4882a593Smuzhiyun phys_addr_t phys_addr = 0;
379*4882a593Smuzhiyun struct rga_dma_buffer *buffer;
380*4882a593Smuzhiyun struct device *map_dev;
381*4882a593Smuzhiyun struct rga_scheduler_t *scheduler;
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun scheduler = job ? job->scheduler :
384*4882a593Smuzhiyun rga_drvdata->scheduler[rga_drvdata->map_scheduler_index];
385*4882a593Smuzhiyun if (scheduler == NULL) {
386*4882a593Smuzhiyun pr_err("Invalid scheduler device!\n");
387*4882a593Smuzhiyun return -EINVAL;
388*4882a593Smuzhiyun }
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun if (external_buffer->memory_parm.size)
391*4882a593Smuzhiyun ex_buffer_size = external_buffer->memory_parm.size;
392*4882a593Smuzhiyun else
393*4882a593Smuzhiyun ex_buffer_size = rga_image_size_cal(external_buffer->memory_parm.width,
394*4882a593Smuzhiyun external_buffer->memory_parm.height,
395*4882a593Smuzhiyun external_buffer->memory_parm.format,
396*4882a593Smuzhiyun NULL, NULL, NULL);
397*4882a593Smuzhiyun if (ex_buffer_size <= 0) {
398*4882a593Smuzhiyun pr_err("failed to calculating buffer size!\n");
399*4882a593Smuzhiyun rga_dump_memory_parm(&external_buffer->memory_parm);
400*4882a593Smuzhiyun return ex_buffer_size == 0 ? -EINVAL : ex_buffer_size;
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun /*
404*4882a593Smuzhiyun * dma-buf api needs to use default_domain of main dev,
405*4882a593Smuzhiyun * and not IOMMU for devices without iommu_info ptr.
406*4882a593Smuzhiyun */
407*4882a593Smuzhiyun map_dev = scheduler->iommu_info ? scheduler->iommu_info->default_dev : scheduler->dev;
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
410*4882a593Smuzhiyun if (buffer == NULL) {
411*4882a593Smuzhiyun pr_err("%s alloc internal_buffer error!\n", __func__);
412*4882a593Smuzhiyun return -ENOMEM;
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun switch (external_buffer->type) {
416*4882a593Smuzhiyun case RGA_DMA_BUFFER:
417*4882a593Smuzhiyun ret = rga_dma_map_fd((int)external_buffer->memory,
418*4882a593Smuzhiyun buffer, DMA_BIDIRECTIONAL,
419*4882a593Smuzhiyun map_dev);
420*4882a593Smuzhiyun break;
421*4882a593Smuzhiyun case RGA_DMA_BUFFER_PTR:
422*4882a593Smuzhiyun ret = rga_dma_map_buf((struct dma_buf *)u64_to_user_ptr(external_buffer->memory),
423*4882a593Smuzhiyun buffer, DMA_BIDIRECTIONAL,
424*4882a593Smuzhiyun map_dev);
425*4882a593Smuzhiyun break;
426*4882a593Smuzhiyun default:
427*4882a593Smuzhiyun ret = -EFAULT;
428*4882a593Smuzhiyun break;
429*4882a593Smuzhiyun }
430*4882a593Smuzhiyun if (ret < 0) {
431*4882a593Smuzhiyun pr_err("%s core[%d] map dma buffer error!\n",
432*4882a593Smuzhiyun __func__, scheduler->core);
433*4882a593Smuzhiyun goto free_buffer;
434*4882a593Smuzhiyun }
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun if (buffer->size < ex_buffer_size) {
437*4882a593Smuzhiyun pr_err("Only get buffer %ld byte from %s = 0x%lx, but current image required %d byte\n",
438*4882a593Smuzhiyun buffer->size, rga_get_memory_type_str(external_buffer->type),
439*4882a593Smuzhiyun (unsigned long)external_buffer->memory, ex_buffer_size);
440*4882a593Smuzhiyun rga_dump_memory_parm(&external_buffer->memory_parm);
441*4882a593Smuzhiyun ret = -EINVAL;
442*4882a593Smuzhiyun goto unmap_buffer;
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun buffer->scheduler = scheduler;
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun if (rga_mm_check_range_sgt(buffer->sgt))
448*4882a593Smuzhiyun mm_flag |= RGA_MEM_UNDER_4G;
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun /*
451*4882a593Smuzhiyun * If it's physically contiguous, then the RGA_MMU can
452*4882a593Smuzhiyun * directly use the physical address.
453*4882a593Smuzhiyun */
454*4882a593Smuzhiyun if (rga_mm_check_contiguous_sgt(buffer->sgt)) {
455*4882a593Smuzhiyun phys_addr = sg_phys(buffer->sgt->sgl);
456*4882a593Smuzhiyun if (phys_addr == 0) {
457*4882a593Smuzhiyun pr_err("%s get physical address error!", __func__);
458*4882a593Smuzhiyun goto unmap_buffer;
459*4882a593Smuzhiyun }
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun mm_flag |= RGA_MEM_PHYSICAL_CONTIGUOUS;
462*4882a593Smuzhiyun }
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun if (!rga_mm_check_memory_limit(scheduler, mm_flag)) {
465*4882a593Smuzhiyun pr_err("scheduler core[%d] unsupported mm_flag[0x%x]!\n",
466*4882a593Smuzhiyun scheduler->core, mm_flag);
467*4882a593Smuzhiyun ret = -EINVAL;
468*4882a593Smuzhiyun goto unmap_buffer;
469*4882a593Smuzhiyun }
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun internal_buffer->dma_buffer = buffer;
472*4882a593Smuzhiyun internal_buffer->mm_flag = mm_flag;
473*4882a593Smuzhiyun internal_buffer->phys_addr = phys_addr ? phys_addr : 0;
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun return 0;
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun unmap_buffer:
478*4882a593Smuzhiyun rga_dma_unmap_buf(buffer);
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun free_buffer:
481*4882a593Smuzhiyun kfree(buffer);
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun return ret;
484*4882a593Smuzhiyun }
485*4882a593Smuzhiyun
rga_mm_unmap_virt_addr(struct rga_internal_buffer * internal_buffer)486*4882a593Smuzhiyun static void rga_mm_unmap_virt_addr(struct rga_internal_buffer *internal_buffer)
487*4882a593Smuzhiyun {
488*4882a593Smuzhiyun WARN_ON(internal_buffer->dma_buffer == NULL || internal_buffer->virt_addr == NULL);
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun if (rga_mm_is_invalid_dma_buffer(internal_buffer->dma_buffer))
491*4882a593Smuzhiyun return;
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun switch (internal_buffer->dma_buffer->scheduler->data->mmu) {
494*4882a593Smuzhiyun case RGA_IOMMU:
495*4882a593Smuzhiyun rga_iommu_unmap(internal_buffer->dma_buffer);
496*4882a593Smuzhiyun break;
497*4882a593Smuzhiyun case RGA_MMU:
498*4882a593Smuzhiyun dma_unmap_sg(internal_buffer->dma_buffer->scheduler->dev,
499*4882a593Smuzhiyun internal_buffer->dma_buffer->sgt->sgl,
500*4882a593Smuzhiyun internal_buffer->dma_buffer->sgt->orig_nents,
501*4882a593Smuzhiyun DMA_BIDIRECTIONAL);
502*4882a593Smuzhiyun break;
503*4882a593Smuzhiyun default:
504*4882a593Smuzhiyun break;
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun if (internal_buffer->mm_flag & RGA_MEM_PHYSICAL_CONTIGUOUS &&
508*4882a593Smuzhiyun internal_buffer->phys_addr > 0)
509*4882a593Smuzhiyun internal_buffer->phys_addr = 0;
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun rga_free_sgt(&internal_buffer->dma_buffer->sgt);
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun kfree(internal_buffer->dma_buffer);
514*4882a593Smuzhiyun internal_buffer->dma_buffer = NULL;
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun rga_free_virt_addr(&internal_buffer->virt_addr);
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun mmput(internal_buffer->current_mm);
519*4882a593Smuzhiyun mmdrop(internal_buffer->current_mm);
520*4882a593Smuzhiyun internal_buffer->current_mm = NULL;
521*4882a593Smuzhiyun }
522*4882a593Smuzhiyun
rga_mm_map_virt_addr(struct rga_external_buffer * external_buffer,struct rga_internal_buffer * internal_buffer,struct rga_job * job,int write_flag)523*4882a593Smuzhiyun static int rga_mm_map_virt_addr(struct rga_external_buffer *external_buffer,
524*4882a593Smuzhiyun struct rga_internal_buffer *internal_buffer,
525*4882a593Smuzhiyun struct rga_job *job, int write_flag)
526*4882a593Smuzhiyun {
527*4882a593Smuzhiyun int ret;
528*4882a593Smuzhiyun uint32_t mm_flag = 0;
529*4882a593Smuzhiyun phys_addr_t phys_addr = 0;
530*4882a593Smuzhiyun struct sg_table *sgt;
531*4882a593Smuzhiyun struct rga_virt_addr *virt_addr;
532*4882a593Smuzhiyun struct rga_dma_buffer *buffer;
533*4882a593Smuzhiyun struct rga_scheduler_t *scheduler;
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun scheduler = job ? job->scheduler :
536*4882a593Smuzhiyun rga_drvdata->scheduler[rga_drvdata->map_scheduler_index];
537*4882a593Smuzhiyun if (scheduler == NULL) {
538*4882a593Smuzhiyun pr_err("Invalid scheduler device!\n");
539*4882a593Smuzhiyun return -EINVAL;
540*4882a593Smuzhiyun }
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun internal_buffer->current_mm = job ? job->mm : current->mm;
543*4882a593Smuzhiyun if (internal_buffer->current_mm == NULL) {
544*4882a593Smuzhiyun pr_err("%s, cannot get current mm!\n", __func__);
545*4882a593Smuzhiyun return -EFAULT;
546*4882a593Smuzhiyun }
547*4882a593Smuzhiyun mmgrab(internal_buffer->current_mm);
548*4882a593Smuzhiyun mmget(internal_buffer->current_mm);
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun ret = rga_alloc_virt_addr(&virt_addr,
551*4882a593Smuzhiyun external_buffer->memory,
552*4882a593Smuzhiyun &internal_buffer->memory_parm,
553*4882a593Smuzhiyun write_flag, internal_buffer->current_mm);
554*4882a593Smuzhiyun if (ret < 0) {
555*4882a593Smuzhiyun pr_err("Can not alloc rga_virt_addr from 0x%lx\n",
556*4882a593Smuzhiyun (unsigned long)external_buffer->memory);
557*4882a593Smuzhiyun goto put_current_mm;
558*4882a593Smuzhiyun }
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun sgt = rga_alloc_sgt(virt_addr);
561*4882a593Smuzhiyun if (IS_ERR(sgt)) {
562*4882a593Smuzhiyun pr_err("alloc sgt error!\n");
563*4882a593Smuzhiyun ret = PTR_ERR(sgt);
564*4882a593Smuzhiyun goto free_virt_addr;
565*4882a593Smuzhiyun }
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun if (rga_mm_check_range_sgt(sgt))
568*4882a593Smuzhiyun mm_flag |= RGA_MEM_UNDER_4G;
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun if (rga_mm_check_contiguous_sgt(sgt)) {
571*4882a593Smuzhiyun phys_addr = sg_phys(sgt->sgl);
572*4882a593Smuzhiyun if (phys_addr == 0) {
573*4882a593Smuzhiyun pr_err("%s get physical address error!", __func__);
574*4882a593Smuzhiyun goto free_sgt;
575*4882a593Smuzhiyun }
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun mm_flag |= RGA_MEM_PHYSICAL_CONTIGUOUS;
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun /*
581*4882a593Smuzhiyun * Some userspace virtual addresses do not have an
582*4882a593Smuzhiyun * interface for flushing the cache, so it is mandatory
583*4882a593Smuzhiyun * to flush the cache when the virtual address is used.
584*4882a593Smuzhiyun */
585*4882a593Smuzhiyun mm_flag |= RGA_MEM_FORCE_FLUSH_CACHE;
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun if (!rga_mm_check_memory_limit(scheduler, mm_flag)) {
588*4882a593Smuzhiyun pr_err("scheduler core[%d] unsupported mm_flag[0x%x]!\n",
589*4882a593Smuzhiyun scheduler->core, mm_flag);
590*4882a593Smuzhiyun ret = -EINVAL;
591*4882a593Smuzhiyun goto free_sgt;
592*4882a593Smuzhiyun }
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
595*4882a593Smuzhiyun if (buffer == NULL) {
596*4882a593Smuzhiyun pr_err("%s alloc internal dma_buffer error!\n", __func__);
597*4882a593Smuzhiyun ret = -ENOMEM;
598*4882a593Smuzhiyun goto free_sgt;
599*4882a593Smuzhiyun }
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun switch (scheduler->data->mmu) {
602*4882a593Smuzhiyun case RGA_IOMMU:
603*4882a593Smuzhiyun ret = rga_iommu_map_sgt(sgt, virt_addr->size, buffer, scheduler->dev);
604*4882a593Smuzhiyun if (ret < 0) {
605*4882a593Smuzhiyun pr_err("%s core[%d] iommu_map virtual address error!\n",
606*4882a593Smuzhiyun __func__, scheduler->core);
607*4882a593Smuzhiyun goto free_dma_buffer;
608*4882a593Smuzhiyun }
609*4882a593Smuzhiyun break;
610*4882a593Smuzhiyun case RGA_MMU:
611*4882a593Smuzhiyun ret = dma_map_sg(scheduler->dev, sgt->sgl, sgt->orig_nents, DMA_BIDIRECTIONAL);
612*4882a593Smuzhiyun if (ret == 0) {
613*4882a593Smuzhiyun pr_err("%s core[%d] dma_map_sgt error! va = 0x%lx, nents = %d\n",
614*4882a593Smuzhiyun __func__, scheduler->core,
615*4882a593Smuzhiyun (unsigned long)virt_addr->addr, sgt->orig_nents);
616*4882a593Smuzhiyun ret = -EINVAL;
617*4882a593Smuzhiyun goto free_dma_buffer;
618*4882a593Smuzhiyun }
619*4882a593Smuzhiyun break;
620*4882a593Smuzhiyun default:
621*4882a593Smuzhiyun if (mm_flag & RGA_MEM_PHYSICAL_CONTIGUOUS)
622*4882a593Smuzhiyun break;
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun pr_err("Current %s[%d] cannot support virtual address!\n",
625*4882a593Smuzhiyun rga_get_mmu_type_str(scheduler->data->mmu), scheduler->data->mmu);
626*4882a593Smuzhiyun goto free_dma_buffer;
627*4882a593Smuzhiyun }
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun buffer->sgt = sgt;
630*4882a593Smuzhiyun buffer->offset = virt_addr->offset;
631*4882a593Smuzhiyun buffer->size = virt_addr->size;
632*4882a593Smuzhiyun buffer->scheduler = scheduler;
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun internal_buffer->virt_addr = virt_addr;
635*4882a593Smuzhiyun internal_buffer->dma_buffer = buffer;
636*4882a593Smuzhiyun internal_buffer->mm_flag = mm_flag;
637*4882a593Smuzhiyun internal_buffer->phys_addr = phys_addr ? phys_addr + virt_addr->offset : 0;
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun return 0;
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun free_dma_buffer:
642*4882a593Smuzhiyun kfree(buffer);
643*4882a593Smuzhiyun free_sgt:
644*4882a593Smuzhiyun rga_free_sgt(&sgt);
645*4882a593Smuzhiyun free_virt_addr:
646*4882a593Smuzhiyun rga_free_virt_addr(&virt_addr);
647*4882a593Smuzhiyun put_current_mm:
648*4882a593Smuzhiyun mmput(internal_buffer->current_mm);
649*4882a593Smuzhiyun mmdrop(internal_buffer->current_mm);
650*4882a593Smuzhiyun internal_buffer->current_mm = NULL;
651*4882a593Smuzhiyun
652*4882a593Smuzhiyun return ret;
653*4882a593Smuzhiyun }
654*4882a593Smuzhiyun
rga_mm_unmap_phys_addr(struct rga_internal_buffer * internal_buffer)655*4882a593Smuzhiyun static void rga_mm_unmap_phys_addr(struct rga_internal_buffer *internal_buffer)
656*4882a593Smuzhiyun {
657*4882a593Smuzhiyun WARN_ON(internal_buffer->dma_buffer == NULL);
658*4882a593Smuzhiyun
659*4882a593Smuzhiyun if (rga_mm_is_invalid_dma_buffer(internal_buffer->dma_buffer))
660*4882a593Smuzhiyun return;
661*4882a593Smuzhiyun
662*4882a593Smuzhiyun if (internal_buffer->dma_buffer->scheduler->data->mmu == RGA_IOMMU)
663*4882a593Smuzhiyun rga_iommu_unmap(internal_buffer->dma_buffer);
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun kfree(internal_buffer->dma_buffer);
666*4882a593Smuzhiyun internal_buffer->dma_buffer = NULL;
667*4882a593Smuzhiyun internal_buffer->phys_addr = 0;
668*4882a593Smuzhiyun internal_buffer->size = 0;
669*4882a593Smuzhiyun }
670*4882a593Smuzhiyun
rga_mm_map_phys_addr(struct rga_external_buffer * external_buffer,struct rga_internal_buffer * internal_buffer,struct rga_job * job)671*4882a593Smuzhiyun static int rga_mm_map_phys_addr(struct rga_external_buffer *external_buffer,
672*4882a593Smuzhiyun struct rga_internal_buffer *internal_buffer,
673*4882a593Smuzhiyun struct rga_job *job)
674*4882a593Smuzhiyun {
675*4882a593Smuzhiyun int ret;
676*4882a593Smuzhiyun phys_addr_t phys_addr;
677*4882a593Smuzhiyun int buffer_size;
678*4882a593Smuzhiyun uint32_t mm_flag = 0;
679*4882a593Smuzhiyun struct rga_dma_buffer *buffer;
680*4882a593Smuzhiyun struct rga_scheduler_t *scheduler;
681*4882a593Smuzhiyun
682*4882a593Smuzhiyun scheduler = job ? job->scheduler :
683*4882a593Smuzhiyun rga_drvdata->scheduler[rga_drvdata->map_scheduler_index];
684*4882a593Smuzhiyun if (scheduler == NULL) {
685*4882a593Smuzhiyun pr_err("Invalid scheduler device!\n");
686*4882a593Smuzhiyun return -EINVAL;
687*4882a593Smuzhiyun }
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun if (internal_buffer->memory_parm.size)
690*4882a593Smuzhiyun buffer_size = internal_buffer->memory_parm.size;
691*4882a593Smuzhiyun else
692*4882a593Smuzhiyun buffer_size = rga_image_size_cal(internal_buffer->memory_parm.width,
693*4882a593Smuzhiyun internal_buffer->memory_parm.height,
694*4882a593Smuzhiyun internal_buffer->memory_parm.format,
695*4882a593Smuzhiyun NULL, NULL, NULL);
696*4882a593Smuzhiyun if (buffer_size <= 0) {
697*4882a593Smuzhiyun pr_err("Failed to get phys addr size!\n");
698*4882a593Smuzhiyun rga_dump_memory_parm(&internal_buffer->memory_parm);
699*4882a593Smuzhiyun return buffer_size == 0 ? -EINVAL : buffer_size;
700*4882a593Smuzhiyun }
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun phys_addr = external_buffer->memory;
703*4882a593Smuzhiyun mm_flag |= RGA_MEM_PHYSICAL_CONTIGUOUS;
704*4882a593Smuzhiyun if (rga_mm_check_range_phys_addr(phys_addr, buffer_size))
705*4882a593Smuzhiyun mm_flag |= RGA_MEM_UNDER_4G;
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun if (!rga_mm_check_memory_limit(scheduler, mm_flag)) {
708*4882a593Smuzhiyun pr_err("scheduler core[%d] unsupported mm_flag[0x%x]!\n",
709*4882a593Smuzhiyun scheduler->core, mm_flag);
710*4882a593Smuzhiyun return -EINVAL;
711*4882a593Smuzhiyun }
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
714*4882a593Smuzhiyun if (buffer == NULL) {
715*4882a593Smuzhiyun pr_err("%s alloc internal dma buffer error!\n", __func__);
716*4882a593Smuzhiyun return -ENOMEM;
717*4882a593Smuzhiyun }
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun if (scheduler->data->mmu == RGA_IOMMU) {
720*4882a593Smuzhiyun ret = rga_iommu_map(phys_addr, buffer_size, buffer, scheduler->dev);
721*4882a593Smuzhiyun if (ret < 0) {
722*4882a593Smuzhiyun pr_err("%s core[%d] map phys_addr error!\n", __func__, scheduler->core);
723*4882a593Smuzhiyun goto free_dma_buffer;
724*4882a593Smuzhiyun }
725*4882a593Smuzhiyun }
726*4882a593Smuzhiyun
727*4882a593Smuzhiyun buffer->scheduler = scheduler;
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun internal_buffer->phys_addr = phys_addr;
730*4882a593Smuzhiyun internal_buffer->size = buffer_size;
731*4882a593Smuzhiyun internal_buffer->mm_flag = mm_flag;
732*4882a593Smuzhiyun internal_buffer->dma_buffer = buffer;
733*4882a593Smuzhiyun
734*4882a593Smuzhiyun return 0;
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun free_dma_buffer:
737*4882a593Smuzhiyun kfree(buffer);
738*4882a593Smuzhiyun
739*4882a593Smuzhiyun return ret;
740*4882a593Smuzhiyun }
741*4882a593Smuzhiyun
rga_mm_unmap_buffer(struct rga_internal_buffer * internal_buffer)742*4882a593Smuzhiyun static int rga_mm_unmap_buffer(struct rga_internal_buffer *internal_buffer)
743*4882a593Smuzhiyun {
744*4882a593Smuzhiyun switch (internal_buffer->type) {
745*4882a593Smuzhiyun case RGA_DMA_BUFFER:
746*4882a593Smuzhiyun case RGA_DMA_BUFFER_PTR:
747*4882a593Smuzhiyun rga_mm_unmap_dma_buffer(internal_buffer);
748*4882a593Smuzhiyun break;
749*4882a593Smuzhiyun case RGA_VIRTUAL_ADDRESS:
750*4882a593Smuzhiyun rga_mm_unmap_virt_addr(internal_buffer);
751*4882a593Smuzhiyun break;
752*4882a593Smuzhiyun case RGA_PHYSICAL_ADDRESS:
753*4882a593Smuzhiyun rga_mm_unmap_phys_addr(internal_buffer);
754*4882a593Smuzhiyun break;
755*4882a593Smuzhiyun default:
756*4882a593Smuzhiyun pr_err("Illegal external buffer!\n");
757*4882a593Smuzhiyun return -EFAULT;
758*4882a593Smuzhiyun }
759*4882a593Smuzhiyun
760*4882a593Smuzhiyun return 0;
761*4882a593Smuzhiyun }
762*4882a593Smuzhiyun
rga_mm_map_buffer(struct rga_external_buffer * external_buffer,struct rga_internal_buffer * internal_buffer,struct rga_job * job,int write_flag)763*4882a593Smuzhiyun static int rga_mm_map_buffer(struct rga_external_buffer *external_buffer,
764*4882a593Smuzhiyun struct rga_internal_buffer *internal_buffer,
765*4882a593Smuzhiyun struct rga_job *job, int write_flag)
766*4882a593Smuzhiyun {
767*4882a593Smuzhiyun int ret;
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun memcpy(&internal_buffer->memory_parm, &external_buffer->memory_parm,
770*4882a593Smuzhiyun sizeof(internal_buffer->memory_parm));
771*4882a593Smuzhiyun
772*4882a593Smuzhiyun switch (external_buffer->type) {
773*4882a593Smuzhiyun case RGA_DMA_BUFFER:
774*4882a593Smuzhiyun case RGA_DMA_BUFFER_PTR:
775*4882a593Smuzhiyun internal_buffer->type = external_buffer->type;
776*4882a593Smuzhiyun
777*4882a593Smuzhiyun ret = rga_mm_map_dma_buffer(external_buffer, internal_buffer, job);
778*4882a593Smuzhiyun if (ret < 0) {
779*4882a593Smuzhiyun pr_err("%s map dma_buf error!\n", __func__);
780*4882a593Smuzhiyun return ret;
781*4882a593Smuzhiyun }
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun internal_buffer->size = internal_buffer->dma_buffer->size -
784*4882a593Smuzhiyun internal_buffer->dma_buffer->offset;
785*4882a593Smuzhiyun internal_buffer->mm_flag |= RGA_MEM_NEED_USE_IOMMU;
786*4882a593Smuzhiyun break;
787*4882a593Smuzhiyun case RGA_VIRTUAL_ADDRESS:
788*4882a593Smuzhiyun internal_buffer->type = RGA_VIRTUAL_ADDRESS;
789*4882a593Smuzhiyun
790*4882a593Smuzhiyun ret = rga_mm_map_virt_addr(external_buffer, internal_buffer, job, write_flag);
791*4882a593Smuzhiyun if (ret < 0) {
792*4882a593Smuzhiyun pr_err("%s map virtual address error!\n", __func__);
793*4882a593Smuzhiyun return ret;
794*4882a593Smuzhiyun }
795*4882a593Smuzhiyun
796*4882a593Smuzhiyun internal_buffer->size = internal_buffer->virt_addr->size -
797*4882a593Smuzhiyun internal_buffer->virt_addr->offset;
798*4882a593Smuzhiyun internal_buffer->mm_flag |= RGA_MEM_NEED_USE_IOMMU;
799*4882a593Smuzhiyun break;
800*4882a593Smuzhiyun case RGA_PHYSICAL_ADDRESS:
801*4882a593Smuzhiyun internal_buffer->type = RGA_PHYSICAL_ADDRESS;
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun ret = rga_mm_map_phys_addr(external_buffer, internal_buffer, job);
804*4882a593Smuzhiyun if (ret < 0) {
805*4882a593Smuzhiyun pr_err("%s map physical address error!\n", __func__);
806*4882a593Smuzhiyun return ret;
807*4882a593Smuzhiyun }
808*4882a593Smuzhiyun
809*4882a593Smuzhiyun internal_buffer->mm_flag |= RGA_MEM_NEED_USE_IOMMU;
810*4882a593Smuzhiyun break;
811*4882a593Smuzhiyun default:
812*4882a593Smuzhiyun pr_err("Illegal external buffer!\n");
813*4882a593Smuzhiyun return -EFAULT;
814*4882a593Smuzhiyun }
815*4882a593Smuzhiyun
816*4882a593Smuzhiyun return 0;
817*4882a593Smuzhiyun }
818*4882a593Smuzhiyun
rga_mm_kref_release_buffer(struct kref * ref)819*4882a593Smuzhiyun static void rga_mm_kref_release_buffer(struct kref *ref)
820*4882a593Smuzhiyun {
821*4882a593Smuzhiyun struct rga_internal_buffer *internal_buffer;
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun internal_buffer = container_of(ref, struct rga_internal_buffer, refcount);
824*4882a593Smuzhiyun rga_mm_unmap_buffer(internal_buffer);
825*4882a593Smuzhiyun
826*4882a593Smuzhiyun idr_remove(&rga_drvdata->mm->memory_idr, internal_buffer->handle);
827*4882a593Smuzhiyun kfree(internal_buffer);
828*4882a593Smuzhiyun rga_drvdata->mm->buffer_count--;
829*4882a593Smuzhiyun }
830*4882a593Smuzhiyun
831*4882a593Smuzhiyun /*
832*4882a593Smuzhiyun * Called at driver close to release the memory's handle references.
833*4882a593Smuzhiyun */
rga_mm_handle_remove(int id,void * ptr,void * data)834*4882a593Smuzhiyun static int rga_mm_handle_remove(int id, void *ptr, void *data)
835*4882a593Smuzhiyun {
836*4882a593Smuzhiyun struct rga_internal_buffer *internal_buffer = ptr;
837*4882a593Smuzhiyun
838*4882a593Smuzhiyun rga_mm_kref_release_buffer(&internal_buffer->refcount);
839*4882a593Smuzhiyun
840*4882a593Smuzhiyun return 0;
841*4882a593Smuzhiyun }
842*4882a593Smuzhiyun
843*4882a593Smuzhiyun static struct rga_internal_buffer *
rga_mm_lookup_external(struct rga_mm * mm_session,struct rga_external_buffer * external_buffer)844*4882a593Smuzhiyun rga_mm_lookup_external(struct rga_mm *mm_session,
845*4882a593Smuzhiyun struct rga_external_buffer *external_buffer)
846*4882a593Smuzhiyun {
847*4882a593Smuzhiyun int id;
848*4882a593Smuzhiyun struct dma_buf *dma_buf = NULL;
849*4882a593Smuzhiyun struct rga_internal_buffer *temp_buffer = NULL;
850*4882a593Smuzhiyun struct rga_internal_buffer *output_buffer = NULL;
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun WARN_ON(!mutex_is_locked(&mm_session->lock));
853*4882a593Smuzhiyun
854*4882a593Smuzhiyun switch (external_buffer->type) {
855*4882a593Smuzhiyun case RGA_DMA_BUFFER:
856*4882a593Smuzhiyun dma_buf = dma_buf_get((int)external_buffer->memory);
857*4882a593Smuzhiyun if (IS_ERR(dma_buf))
858*4882a593Smuzhiyun return (struct rga_internal_buffer *)dma_buf;
859*4882a593Smuzhiyun
860*4882a593Smuzhiyun idr_for_each_entry(&mm_session->memory_idr, temp_buffer, id) {
861*4882a593Smuzhiyun if (temp_buffer->dma_buffer == NULL)
862*4882a593Smuzhiyun continue;
863*4882a593Smuzhiyun
864*4882a593Smuzhiyun if (temp_buffer->dma_buffer[0].dma_buf == dma_buf) {
865*4882a593Smuzhiyun output_buffer = temp_buffer;
866*4882a593Smuzhiyun break;
867*4882a593Smuzhiyun }
868*4882a593Smuzhiyun }
869*4882a593Smuzhiyun
870*4882a593Smuzhiyun dma_buf_put(dma_buf);
871*4882a593Smuzhiyun break;
872*4882a593Smuzhiyun case RGA_VIRTUAL_ADDRESS:
873*4882a593Smuzhiyun idr_for_each_entry(&mm_session->memory_idr, temp_buffer, id) {
874*4882a593Smuzhiyun if (temp_buffer->virt_addr == NULL)
875*4882a593Smuzhiyun continue;
876*4882a593Smuzhiyun
877*4882a593Smuzhiyun if (temp_buffer->virt_addr->addr == external_buffer->memory) {
878*4882a593Smuzhiyun output_buffer = temp_buffer;
879*4882a593Smuzhiyun break;
880*4882a593Smuzhiyun }
881*4882a593Smuzhiyun }
882*4882a593Smuzhiyun
883*4882a593Smuzhiyun break;
884*4882a593Smuzhiyun case RGA_PHYSICAL_ADDRESS:
885*4882a593Smuzhiyun idr_for_each_entry(&mm_session->memory_idr, temp_buffer, id) {
886*4882a593Smuzhiyun if (temp_buffer->phys_addr == external_buffer->memory) {
887*4882a593Smuzhiyun output_buffer = temp_buffer;
888*4882a593Smuzhiyun break;
889*4882a593Smuzhiyun }
890*4882a593Smuzhiyun }
891*4882a593Smuzhiyun
892*4882a593Smuzhiyun break;
893*4882a593Smuzhiyun case RGA_DMA_BUFFER_PTR:
894*4882a593Smuzhiyun idr_for_each_entry(&mm_session->memory_idr, temp_buffer, id) {
895*4882a593Smuzhiyun if (temp_buffer->dma_buffer == NULL)
896*4882a593Smuzhiyun continue;
897*4882a593Smuzhiyun
898*4882a593Smuzhiyun if ((unsigned long)temp_buffer->dma_buffer[0].dma_buf ==
899*4882a593Smuzhiyun external_buffer->memory) {
900*4882a593Smuzhiyun output_buffer = temp_buffer;
901*4882a593Smuzhiyun break;
902*4882a593Smuzhiyun }
903*4882a593Smuzhiyun }
904*4882a593Smuzhiyun
905*4882a593Smuzhiyun break;
906*4882a593Smuzhiyun
907*4882a593Smuzhiyun default:
908*4882a593Smuzhiyun pr_err("Illegal external buffer!\n");
909*4882a593Smuzhiyun return NULL;
910*4882a593Smuzhiyun }
911*4882a593Smuzhiyun
912*4882a593Smuzhiyun return output_buffer;
913*4882a593Smuzhiyun }
914*4882a593Smuzhiyun
rga_mm_lookup_handle(struct rga_mm * mm_session,uint32_t handle)915*4882a593Smuzhiyun struct rga_internal_buffer *rga_mm_lookup_handle(struct rga_mm *mm_session, uint32_t handle)
916*4882a593Smuzhiyun {
917*4882a593Smuzhiyun struct rga_internal_buffer *output_buffer;
918*4882a593Smuzhiyun
919*4882a593Smuzhiyun WARN_ON(!mutex_is_locked(&mm_session->lock));
920*4882a593Smuzhiyun
921*4882a593Smuzhiyun output_buffer = idr_find(&mm_session->memory_idr, handle);
922*4882a593Smuzhiyun
923*4882a593Smuzhiyun return output_buffer;
924*4882a593Smuzhiyun }
925*4882a593Smuzhiyun
rga_mm_lookup_flag(struct rga_mm * mm_session,uint64_t handle)926*4882a593Smuzhiyun int rga_mm_lookup_flag(struct rga_mm *mm_session, uint64_t handle)
927*4882a593Smuzhiyun {
928*4882a593Smuzhiyun struct rga_internal_buffer *output_buffer;
929*4882a593Smuzhiyun
930*4882a593Smuzhiyun output_buffer = rga_mm_lookup_handle(mm_session, handle);
931*4882a593Smuzhiyun if (output_buffer == NULL) {
932*4882a593Smuzhiyun pr_err("This handle[%ld] is illegal.\n", (unsigned long)handle);
933*4882a593Smuzhiyun return -EINVAL;
934*4882a593Smuzhiyun }
935*4882a593Smuzhiyun
936*4882a593Smuzhiyun return output_buffer->mm_flag;
937*4882a593Smuzhiyun }
938*4882a593Smuzhiyun
rga_mm_lookup_iova(struct rga_internal_buffer * buffer)939*4882a593Smuzhiyun dma_addr_t rga_mm_lookup_iova(struct rga_internal_buffer *buffer)
940*4882a593Smuzhiyun {
941*4882a593Smuzhiyun if (rga_mm_is_invalid_dma_buffer(buffer->dma_buffer))
942*4882a593Smuzhiyun return 0;
943*4882a593Smuzhiyun
944*4882a593Smuzhiyun return buffer->dma_buffer->iova + buffer->dma_buffer->offset;
945*4882a593Smuzhiyun }
946*4882a593Smuzhiyun
rga_mm_lookup_sgt(struct rga_internal_buffer * buffer)947*4882a593Smuzhiyun struct sg_table *rga_mm_lookup_sgt(struct rga_internal_buffer *buffer)
948*4882a593Smuzhiyun {
949*4882a593Smuzhiyun if (rga_mm_is_invalid_dma_buffer(buffer->dma_buffer))
950*4882a593Smuzhiyun return NULL;
951*4882a593Smuzhiyun
952*4882a593Smuzhiyun return buffer->dma_buffer->sgt;
953*4882a593Smuzhiyun }
954*4882a593Smuzhiyun
rga_mm_dump_buffer(struct rga_internal_buffer * dump_buffer)955*4882a593Smuzhiyun void rga_mm_dump_buffer(struct rga_internal_buffer *dump_buffer)
956*4882a593Smuzhiyun {
957*4882a593Smuzhiyun pr_info("handle = %d refcount = %d mm_flag = 0x%x\n",
958*4882a593Smuzhiyun dump_buffer->handle, kref_read(&dump_buffer->refcount),
959*4882a593Smuzhiyun dump_buffer->mm_flag);
960*4882a593Smuzhiyun
961*4882a593Smuzhiyun switch (dump_buffer->type) {
962*4882a593Smuzhiyun case RGA_DMA_BUFFER:
963*4882a593Smuzhiyun case RGA_DMA_BUFFER_PTR:
964*4882a593Smuzhiyun if (rga_mm_is_invalid_dma_buffer(dump_buffer->dma_buffer))
965*4882a593Smuzhiyun break;
966*4882a593Smuzhiyun
967*4882a593Smuzhiyun pr_info("dma_buffer:\n");
968*4882a593Smuzhiyun pr_info("dma_buf = %p, iova = 0x%lx, sgt = %p, size = %ld, map_core = 0x%x\n",
969*4882a593Smuzhiyun dump_buffer->dma_buffer->dma_buf,
970*4882a593Smuzhiyun (unsigned long)dump_buffer->dma_buffer->iova,
971*4882a593Smuzhiyun dump_buffer->dma_buffer->sgt,
972*4882a593Smuzhiyun dump_buffer->dma_buffer->size,
973*4882a593Smuzhiyun dump_buffer->dma_buffer->scheduler->core);
974*4882a593Smuzhiyun
975*4882a593Smuzhiyun if (dump_buffer->mm_flag & RGA_MEM_PHYSICAL_CONTIGUOUS)
976*4882a593Smuzhiyun pr_info("is contiguous, pa = 0x%lx\n",
977*4882a593Smuzhiyun (unsigned long)dump_buffer->phys_addr);
978*4882a593Smuzhiyun break;
979*4882a593Smuzhiyun case RGA_VIRTUAL_ADDRESS:
980*4882a593Smuzhiyun if (dump_buffer->virt_addr == NULL)
981*4882a593Smuzhiyun break;
982*4882a593Smuzhiyun
983*4882a593Smuzhiyun pr_info("virtual address:\n");
984*4882a593Smuzhiyun pr_info("va = 0x%lx, pages = %p, size = %ld\n",
985*4882a593Smuzhiyun (unsigned long)dump_buffer->virt_addr->addr,
986*4882a593Smuzhiyun dump_buffer->virt_addr->pages,
987*4882a593Smuzhiyun dump_buffer->virt_addr->size);
988*4882a593Smuzhiyun
989*4882a593Smuzhiyun if (rga_mm_is_invalid_dma_buffer(dump_buffer->dma_buffer))
990*4882a593Smuzhiyun break;
991*4882a593Smuzhiyun
992*4882a593Smuzhiyun pr_info("iova = 0x%lx, offset = 0x%lx, sgt = %p, size = %ld, map_core = 0x%x\n",
993*4882a593Smuzhiyun (unsigned long)dump_buffer->dma_buffer->iova,
994*4882a593Smuzhiyun (unsigned long)dump_buffer->dma_buffer->offset,
995*4882a593Smuzhiyun dump_buffer->dma_buffer->sgt,
996*4882a593Smuzhiyun dump_buffer->dma_buffer->size,
997*4882a593Smuzhiyun dump_buffer->dma_buffer->scheduler->core);
998*4882a593Smuzhiyun
999*4882a593Smuzhiyun if (dump_buffer->mm_flag & RGA_MEM_PHYSICAL_CONTIGUOUS)
1000*4882a593Smuzhiyun pr_info("is contiguous, pa = 0x%lx\n",
1001*4882a593Smuzhiyun (unsigned long)dump_buffer->phys_addr);
1002*4882a593Smuzhiyun break;
1003*4882a593Smuzhiyun case RGA_PHYSICAL_ADDRESS:
1004*4882a593Smuzhiyun pr_info("physical address: pa = 0x%lx\n", (unsigned long)dump_buffer->phys_addr);
1005*4882a593Smuzhiyun break;
1006*4882a593Smuzhiyun default:
1007*4882a593Smuzhiyun pr_err("Illegal external buffer!\n");
1008*4882a593Smuzhiyun break;
1009*4882a593Smuzhiyun }
1010*4882a593Smuzhiyun }
1011*4882a593Smuzhiyun
rga_mm_dump_info(struct rga_mm * mm_session)1012*4882a593Smuzhiyun void rga_mm_dump_info(struct rga_mm *mm_session)
1013*4882a593Smuzhiyun {
1014*4882a593Smuzhiyun int id;
1015*4882a593Smuzhiyun struct rga_internal_buffer *dump_buffer;
1016*4882a593Smuzhiyun
1017*4882a593Smuzhiyun WARN_ON(!mutex_is_locked(&mm_session->lock));
1018*4882a593Smuzhiyun
1019*4882a593Smuzhiyun pr_info("rga mm info:\n");
1020*4882a593Smuzhiyun
1021*4882a593Smuzhiyun pr_info("buffer count = %d\n", mm_session->buffer_count);
1022*4882a593Smuzhiyun pr_info("===============================================================\n");
1023*4882a593Smuzhiyun
1024*4882a593Smuzhiyun idr_for_each_entry(&mm_session->memory_idr, dump_buffer, id) {
1025*4882a593Smuzhiyun rga_mm_dump_buffer(dump_buffer);
1026*4882a593Smuzhiyun
1027*4882a593Smuzhiyun pr_info("---------------------------------------------------------------\n");
1028*4882a593Smuzhiyun }
1029*4882a593Smuzhiyun }
1030*4882a593Smuzhiyun
rga_mm_is_need_mmu(struct rga_job * job,struct rga_internal_buffer * buffer)1031*4882a593Smuzhiyun static bool rga_mm_is_need_mmu(struct rga_job *job, struct rga_internal_buffer *buffer)
1032*4882a593Smuzhiyun {
1033*4882a593Smuzhiyun if (buffer == NULL || job == NULL || job->scheduler == NULL)
1034*4882a593Smuzhiyun return false;
1035*4882a593Smuzhiyun
1036*4882a593Smuzhiyun /* RK_IOMMU no need to configure enable or not in the driver. */
1037*4882a593Smuzhiyun if (job->scheduler->data->mmu == RGA_IOMMU)
1038*4882a593Smuzhiyun return false;
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun /* RK_MMU need to configure enable or not in the driver. */
1041*4882a593Smuzhiyun if (buffer->mm_flag & RGA_MEM_PHYSICAL_CONTIGUOUS)
1042*4882a593Smuzhiyun return false;
1043*4882a593Smuzhiyun else if (buffer->mm_flag & RGA_MEM_NEED_USE_IOMMU)
1044*4882a593Smuzhiyun return true;
1045*4882a593Smuzhiyun
1046*4882a593Smuzhiyun return false;
1047*4882a593Smuzhiyun }
1048*4882a593Smuzhiyun
rga_mm_set_mmu_flag(struct rga_job * job)1049*4882a593Smuzhiyun static int rga_mm_set_mmu_flag(struct rga_job *job)
1050*4882a593Smuzhiyun {
1051*4882a593Smuzhiyun struct rga_mmu_t *mmu_info;
1052*4882a593Smuzhiyun int src_mmu_en;
1053*4882a593Smuzhiyun int src1_mmu_en;
1054*4882a593Smuzhiyun int dst_mmu_en;
1055*4882a593Smuzhiyun int els_mmu_en;
1056*4882a593Smuzhiyun
1057*4882a593Smuzhiyun src_mmu_en = rga_mm_is_need_mmu(job, job->src_buffer.addr);
1058*4882a593Smuzhiyun src1_mmu_en = rga_mm_is_need_mmu(job, job->src1_buffer.addr);
1059*4882a593Smuzhiyun dst_mmu_en = rga_mm_is_need_mmu(job, job->dst_buffer.addr);
1060*4882a593Smuzhiyun els_mmu_en = rga_mm_is_need_mmu(job, job->els_buffer.addr);
1061*4882a593Smuzhiyun
1062*4882a593Smuzhiyun mmu_info = &job->rga_command_base.mmu_info;
1063*4882a593Smuzhiyun memset(mmu_info, 0x0, sizeof(*mmu_info));
1064*4882a593Smuzhiyun if (src_mmu_en)
1065*4882a593Smuzhiyun mmu_info->mmu_flag |= (0x1 << 8);
1066*4882a593Smuzhiyun if (src1_mmu_en)
1067*4882a593Smuzhiyun mmu_info->mmu_flag |= (0x1 << 9);
1068*4882a593Smuzhiyun if (dst_mmu_en)
1069*4882a593Smuzhiyun mmu_info->mmu_flag |= (0x1 << 10);
1070*4882a593Smuzhiyun if (els_mmu_en)
1071*4882a593Smuzhiyun mmu_info->mmu_flag |= (0x1 << 11);
1072*4882a593Smuzhiyun
1073*4882a593Smuzhiyun if (mmu_info->mmu_flag & (0xf << 8)) {
1074*4882a593Smuzhiyun mmu_info->mmu_flag |= 1;
1075*4882a593Smuzhiyun mmu_info->mmu_flag |= 1 << 31;
1076*4882a593Smuzhiyun mmu_info->mmu_en = 1;
1077*4882a593Smuzhiyun }
1078*4882a593Smuzhiyun
1079*4882a593Smuzhiyun return 0;
1080*4882a593Smuzhiyun }
1081*4882a593Smuzhiyun
rga_mm_sgt_to_page_table(struct sg_table * sg,uint32_t * page_table,int32_t pageCount,int32_t use_dma_address)1082*4882a593Smuzhiyun static int rga_mm_sgt_to_page_table(struct sg_table *sg,
1083*4882a593Smuzhiyun uint32_t *page_table,
1084*4882a593Smuzhiyun int32_t pageCount,
1085*4882a593Smuzhiyun int32_t use_dma_address)
1086*4882a593Smuzhiyun {
1087*4882a593Smuzhiyun uint32_t i;
1088*4882a593Smuzhiyun unsigned long Address;
1089*4882a593Smuzhiyun uint32_t mapped_size = 0;
1090*4882a593Smuzhiyun uint32_t len;
1091*4882a593Smuzhiyun struct scatterlist *sgl = sg->sgl;
1092*4882a593Smuzhiyun uint32_t sg_num = 0;
1093*4882a593Smuzhiyun uint32_t break_flag = 0;
1094*4882a593Smuzhiyun
1095*4882a593Smuzhiyun do {
1096*4882a593Smuzhiyun /*
1097*4882a593Smuzhiyun * The length of each sgl is expected to be obtained here, not
1098*4882a593Smuzhiyun * the length of the entire dma_buf, so sg_dma_len() is not used.
1099*4882a593Smuzhiyun */
1100*4882a593Smuzhiyun len = sgl->length >> PAGE_SHIFT;
1101*4882a593Smuzhiyun
1102*4882a593Smuzhiyun if (use_dma_address)
1103*4882a593Smuzhiyun /*
1104*4882a593Smuzhiyun * The fd passed by user space gets sg through
1105*4882a593Smuzhiyun * dma_buf_map_attachment, so dma_address can
1106*4882a593Smuzhiyun * be use here.
1107*4882a593Smuzhiyun * When the mapped device does not have iommu, it will
1108*4882a593Smuzhiyun * return the first address of the real physical page
1109*4882a593Smuzhiyun * when it meets the requirements of the current device,
1110*4882a593Smuzhiyun * and will trigger swiotlb when it does not meet the
1111*4882a593Smuzhiyun * requirements to obtain a software-mapped physical
1112*4882a593Smuzhiyun * address that is mapped to meet the device address
1113*4882a593Smuzhiyun * requirements.
1114*4882a593Smuzhiyun */
1115*4882a593Smuzhiyun Address = sg_dma_address(sgl);
1116*4882a593Smuzhiyun else
1117*4882a593Smuzhiyun Address = sg_phys(sgl);
1118*4882a593Smuzhiyun
1119*4882a593Smuzhiyun for (i = 0; i < len; i++) {
1120*4882a593Smuzhiyun if (mapped_size + i >= pageCount) {
1121*4882a593Smuzhiyun break_flag = 1;
1122*4882a593Smuzhiyun break;
1123*4882a593Smuzhiyun }
1124*4882a593Smuzhiyun page_table[mapped_size + i] = (uint32_t)(Address + (i << PAGE_SHIFT));
1125*4882a593Smuzhiyun }
1126*4882a593Smuzhiyun if (break_flag)
1127*4882a593Smuzhiyun break;
1128*4882a593Smuzhiyun mapped_size += len;
1129*4882a593Smuzhiyun sg_num += 1;
1130*4882a593Smuzhiyun } while ((sgl = sg_next(sgl)) && (mapped_size < pageCount) && (sg_num < sg->orig_nents));
1131*4882a593Smuzhiyun
1132*4882a593Smuzhiyun return 0;
1133*4882a593Smuzhiyun }
1134*4882a593Smuzhiyun
rga_mm_set_mmu_base(struct rga_job * job,struct rga_img_info_t * img,struct rga_job_buffer * job_buf)1135*4882a593Smuzhiyun static int rga_mm_set_mmu_base(struct rga_job *job,
1136*4882a593Smuzhiyun struct rga_img_info_t *img,
1137*4882a593Smuzhiyun struct rga_job_buffer *job_buf)
1138*4882a593Smuzhiyun {
1139*4882a593Smuzhiyun int ret;
1140*4882a593Smuzhiyun int yrgb_count = 0;
1141*4882a593Smuzhiyun int uv_count = 0;
1142*4882a593Smuzhiyun int v_count = 0;
1143*4882a593Smuzhiyun int page_count = 0;
1144*4882a593Smuzhiyun int order = 0;
1145*4882a593Smuzhiyun uint32_t *page_table = NULL;
1146*4882a593Smuzhiyun struct sg_table *sgt = NULL;
1147*4882a593Smuzhiyun
1148*4882a593Smuzhiyun int img_size, yrgb_size, uv_size, v_size;
1149*4882a593Smuzhiyun int img_offset = 0;
1150*4882a593Smuzhiyun int yrgb_offset = 0;
1151*4882a593Smuzhiyun int uv_offset = 0;
1152*4882a593Smuzhiyun int v_offset = 0;
1153*4882a593Smuzhiyun
1154*4882a593Smuzhiyun img_size = rga_image_size_cal(img->vir_w, img->vir_h, img->format,
1155*4882a593Smuzhiyun &yrgb_size, &uv_size, &v_size);
1156*4882a593Smuzhiyun if (img_size <= 0) {
1157*4882a593Smuzhiyun pr_err("Image size cal error! width = %d, height = %d, format = %s\n",
1158*4882a593Smuzhiyun img->vir_w, img->vir_h, rga_get_format_name(img->format));
1159*4882a593Smuzhiyun return -EINVAL;
1160*4882a593Smuzhiyun }
1161*4882a593Smuzhiyun
1162*4882a593Smuzhiyun /* using third-address */
1163*4882a593Smuzhiyun if (job_buf->uv_addr) {
1164*4882a593Smuzhiyun if (job_buf->y_addr->virt_addr != NULL)
1165*4882a593Smuzhiyun yrgb_offset = job_buf->y_addr->virt_addr->offset;
1166*4882a593Smuzhiyun if (job_buf->uv_addr->virt_addr != NULL)
1167*4882a593Smuzhiyun uv_offset = job_buf->uv_addr->virt_addr->offset;
1168*4882a593Smuzhiyun if (job_buf->v_addr->virt_addr != NULL)
1169*4882a593Smuzhiyun v_offset = job_buf->v_addr->virt_addr->offset;
1170*4882a593Smuzhiyun
1171*4882a593Smuzhiyun yrgb_count = RGA_GET_PAGE_COUNT(yrgb_size + yrgb_offset);
1172*4882a593Smuzhiyun uv_count = RGA_GET_PAGE_COUNT(uv_size + uv_offset);
1173*4882a593Smuzhiyun v_count = RGA_GET_PAGE_COUNT(v_size + v_offset);
1174*4882a593Smuzhiyun page_count = yrgb_count + uv_count + v_count;
1175*4882a593Smuzhiyun
1176*4882a593Smuzhiyun if (page_count <= 0) {
1177*4882a593Smuzhiyun pr_err("page count cal error! yrba = %d, uv = %d, v = %d\n",
1178*4882a593Smuzhiyun yrgb_count, uv_count, v_count);
1179*4882a593Smuzhiyun return -EFAULT;
1180*4882a593Smuzhiyun }
1181*4882a593Smuzhiyun
1182*4882a593Smuzhiyun if (job->flags & RGA_JOB_USE_HANDLE) {
1183*4882a593Smuzhiyun order = get_order(page_count * sizeof(uint32_t *));
1184*4882a593Smuzhiyun if (order >= MAX_ORDER) {
1185*4882a593Smuzhiyun pr_err("Can not alloc pages with order[%d] for page_table, max_order = %d\n",
1186*4882a593Smuzhiyun order, MAX_ORDER);
1187*4882a593Smuzhiyun return -ENOMEM;
1188*4882a593Smuzhiyun }
1189*4882a593Smuzhiyun
1190*4882a593Smuzhiyun page_table = (uint32_t *)__get_free_pages(GFP_KERNEL | GFP_DMA32, order);
1191*4882a593Smuzhiyun if (page_table == NULL) {
1192*4882a593Smuzhiyun pr_err("%s can not alloc pages for page_table, order = %d\n",
1193*4882a593Smuzhiyun __func__, order);
1194*4882a593Smuzhiyun return -ENOMEM;
1195*4882a593Smuzhiyun }
1196*4882a593Smuzhiyun } else {
1197*4882a593Smuzhiyun mutex_lock(&rga_drvdata->lock);
1198*4882a593Smuzhiyun
1199*4882a593Smuzhiyun page_table = rga_mmu_buf_get(rga_drvdata->mmu_base, page_count);
1200*4882a593Smuzhiyun if (page_table == NULL) {
1201*4882a593Smuzhiyun pr_err("mmu_buf get error!\n");
1202*4882a593Smuzhiyun mutex_unlock(&rga_drvdata->lock);
1203*4882a593Smuzhiyun return -EFAULT;
1204*4882a593Smuzhiyun }
1205*4882a593Smuzhiyun
1206*4882a593Smuzhiyun mutex_unlock(&rga_drvdata->lock);
1207*4882a593Smuzhiyun }
1208*4882a593Smuzhiyun
1209*4882a593Smuzhiyun sgt = rga_mm_lookup_sgt(job_buf->y_addr);
1210*4882a593Smuzhiyun if (sgt == NULL) {
1211*4882a593Smuzhiyun pr_err("rga2 cannot get sgt from internal buffer!\n");
1212*4882a593Smuzhiyun ret = -EINVAL;
1213*4882a593Smuzhiyun goto err_free_page_table;
1214*4882a593Smuzhiyun }
1215*4882a593Smuzhiyun rga_mm_sgt_to_page_table(sgt, page_table, yrgb_count, false);
1216*4882a593Smuzhiyun
1217*4882a593Smuzhiyun sgt = rga_mm_lookup_sgt(job_buf->uv_addr);
1218*4882a593Smuzhiyun if (sgt == NULL) {
1219*4882a593Smuzhiyun pr_err("rga2 cannot get sgt from internal buffer!\n");
1220*4882a593Smuzhiyun ret = -EINVAL;
1221*4882a593Smuzhiyun goto err_free_page_table;
1222*4882a593Smuzhiyun }
1223*4882a593Smuzhiyun rga_mm_sgt_to_page_table(sgt, page_table + yrgb_count, uv_count, false);
1224*4882a593Smuzhiyun
1225*4882a593Smuzhiyun sgt = rga_mm_lookup_sgt(job_buf->v_addr);
1226*4882a593Smuzhiyun if (sgt == NULL) {
1227*4882a593Smuzhiyun pr_err("rga2 cannot get sgt from internal buffer!\n");
1228*4882a593Smuzhiyun ret = -EINVAL;
1229*4882a593Smuzhiyun goto err_free_page_table;
1230*4882a593Smuzhiyun }
1231*4882a593Smuzhiyun rga_mm_sgt_to_page_table(sgt, page_table + yrgb_count + uv_count, v_count, false);
1232*4882a593Smuzhiyun
1233*4882a593Smuzhiyun img->yrgb_addr = yrgb_offset;
1234*4882a593Smuzhiyun img->uv_addr = (yrgb_count << PAGE_SHIFT) + uv_offset;
1235*4882a593Smuzhiyun img->v_addr = ((yrgb_count + uv_count) << PAGE_SHIFT) + v_offset;
1236*4882a593Smuzhiyun } else {
1237*4882a593Smuzhiyun if (job_buf->addr->virt_addr != NULL)
1238*4882a593Smuzhiyun img_offset = job_buf->addr->virt_addr->offset;
1239*4882a593Smuzhiyun
1240*4882a593Smuzhiyun page_count = RGA_GET_PAGE_COUNT(img_size + img_offset);
1241*4882a593Smuzhiyun if (page_count < 0) {
1242*4882a593Smuzhiyun pr_err("page count cal error! yrba = %d, uv = %d, v = %d\n",
1243*4882a593Smuzhiyun yrgb_count, uv_count, v_count);
1244*4882a593Smuzhiyun return -EFAULT;
1245*4882a593Smuzhiyun }
1246*4882a593Smuzhiyun
1247*4882a593Smuzhiyun if (job->flags & RGA_JOB_USE_HANDLE) {
1248*4882a593Smuzhiyun order = get_order(page_count * sizeof(uint32_t *));
1249*4882a593Smuzhiyun if (order >= MAX_ORDER) {
1250*4882a593Smuzhiyun pr_err("Can not alloc pages with order[%d] for page_table, max_order = %d\n",
1251*4882a593Smuzhiyun order, MAX_ORDER);
1252*4882a593Smuzhiyun return -ENOMEM;
1253*4882a593Smuzhiyun }
1254*4882a593Smuzhiyun
1255*4882a593Smuzhiyun page_table = (uint32_t *)__get_free_pages(GFP_KERNEL | GFP_DMA32, order);
1256*4882a593Smuzhiyun if (page_table == NULL) {
1257*4882a593Smuzhiyun pr_err("%s can not alloc pages for page_table, order = %d\n",
1258*4882a593Smuzhiyun __func__, order);
1259*4882a593Smuzhiyun return -ENOMEM;
1260*4882a593Smuzhiyun }
1261*4882a593Smuzhiyun } else {
1262*4882a593Smuzhiyun mutex_lock(&rga_drvdata->lock);
1263*4882a593Smuzhiyun
1264*4882a593Smuzhiyun page_table = rga_mmu_buf_get(rga_drvdata->mmu_base, page_count);
1265*4882a593Smuzhiyun if (page_table == NULL) {
1266*4882a593Smuzhiyun pr_err("mmu_buf get error!\n");
1267*4882a593Smuzhiyun mutex_unlock(&rga_drvdata->lock);
1268*4882a593Smuzhiyun return -EFAULT;
1269*4882a593Smuzhiyun }
1270*4882a593Smuzhiyun
1271*4882a593Smuzhiyun mutex_unlock(&rga_drvdata->lock);
1272*4882a593Smuzhiyun }
1273*4882a593Smuzhiyun
1274*4882a593Smuzhiyun sgt = rga_mm_lookup_sgt(job_buf->addr);
1275*4882a593Smuzhiyun if (sgt == NULL) {
1276*4882a593Smuzhiyun pr_err("rga2 cannot get sgt from internal buffer!\n");
1277*4882a593Smuzhiyun ret = -EINVAL;
1278*4882a593Smuzhiyun goto err_free_page_table;
1279*4882a593Smuzhiyun }
1280*4882a593Smuzhiyun rga_mm_sgt_to_page_table(sgt, page_table, page_count, false);
1281*4882a593Smuzhiyun
1282*4882a593Smuzhiyun img->yrgb_addr = img_offset;
1283*4882a593Smuzhiyun rga_convert_addr(img, false);
1284*4882a593Smuzhiyun }
1285*4882a593Smuzhiyun
1286*4882a593Smuzhiyun job_buf->page_table = page_table;
1287*4882a593Smuzhiyun job_buf->order = order;
1288*4882a593Smuzhiyun job_buf->page_count = page_count;
1289*4882a593Smuzhiyun
1290*4882a593Smuzhiyun return 0;
1291*4882a593Smuzhiyun
1292*4882a593Smuzhiyun err_free_page_table:
1293*4882a593Smuzhiyun if (job->flags & RGA_JOB_USE_HANDLE)
1294*4882a593Smuzhiyun free_pages((unsigned long)page_table, order);
1295*4882a593Smuzhiyun return ret;
1296*4882a593Smuzhiyun }
1297*4882a593Smuzhiyun
rga_mm_sync_dma_sg_for_device(struct rga_internal_buffer * buffer,struct rga_job * job,enum dma_data_direction dir)1298*4882a593Smuzhiyun static int rga_mm_sync_dma_sg_for_device(struct rga_internal_buffer *buffer,
1299*4882a593Smuzhiyun struct rga_job *job,
1300*4882a593Smuzhiyun enum dma_data_direction dir)
1301*4882a593Smuzhiyun {
1302*4882a593Smuzhiyun struct sg_table *sgt;
1303*4882a593Smuzhiyun struct rga_scheduler_t *scheduler;
1304*4882a593Smuzhiyun
1305*4882a593Smuzhiyun sgt = rga_mm_lookup_sgt(buffer);
1306*4882a593Smuzhiyun if (sgt == NULL) {
1307*4882a593Smuzhiyun pr_err("%s(%d), failed to get sgt, core = 0x%x\n",
1308*4882a593Smuzhiyun __func__, __LINE__, job->core);
1309*4882a593Smuzhiyun return -EINVAL;
1310*4882a593Smuzhiyun }
1311*4882a593Smuzhiyun
1312*4882a593Smuzhiyun scheduler = buffer->dma_buffer->scheduler;
1313*4882a593Smuzhiyun if (scheduler == NULL) {
1314*4882a593Smuzhiyun pr_err("%s(%d), failed to get scheduler, core = 0x%x\n",
1315*4882a593Smuzhiyun __func__, __LINE__, job->core);
1316*4882a593Smuzhiyun return -EFAULT;
1317*4882a593Smuzhiyun }
1318*4882a593Smuzhiyun
1319*4882a593Smuzhiyun dma_sync_sg_for_device(scheduler->dev, sgt->sgl, sgt->orig_nents, dir);
1320*4882a593Smuzhiyun
1321*4882a593Smuzhiyun return 0;
1322*4882a593Smuzhiyun }
1323*4882a593Smuzhiyun
rga_mm_sync_dma_sg_for_cpu(struct rga_internal_buffer * buffer,struct rga_job * job,enum dma_data_direction dir)1324*4882a593Smuzhiyun static int rga_mm_sync_dma_sg_for_cpu(struct rga_internal_buffer *buffer,
1325*4882a593Smuzhiyun struct rga_job *job,
1326*4882a593Smuzhiyun enum dma_data_direction dir)
1327*4882a593Smuzhiyun {
1328*4882a593Smuzhiyun struct sg_table *sgt;
1329*4882a593Smuzhiyun struct rga_scheduler_t *scheduler;
1330*4882a593Smuzhiyun
1331*4882a593Smuzhiyun sgt = rga_mm_lookup_sgt(buffer);
1332*4882a593Smuzhiyun if (sgt == NULL) {
1333*4882a593Smuzhiyun pr_err("%s(%d), failed to get sgt, core = 0x%x\n",
1334*4882a593Smuzhiyun __func__, __LINE__, job->core);
1335*4882a593Smuzhiyun return -EINVAL;
1336*4882a593Smuzhiyun }
1337*4882a593Smuzhiyun
1338*4882a593Smuzhiyun scheduler = buffer->dma_buffer->scheduler;
1339*4882a593Smuzhiyun if (scheduler == NULL) {
1340*4882a593Smuzhiyun pr_err("%s(%d), failed to get scheduler, core = 0x%x\n",
1341*4882a593Smuzhiyun __func__, __LINE__, job->core);
1342*4882a593Smuzhiyun return -EFAULT;
1343*4882a593Smuzhiyun }
1344*4882a593Smuzhiyun
1345*4882a593Smuzhiyun dma_sync_sg_for_cpu(scheduler->dev, sgt->sgl, sgt->orig_nents, dir);
1346*4882a593Smuzhiyun
1347*4882a593Smuzhiyun return 0;
1348*4882a593Smuzhiyun }
1349*4882a593Smuzhiyun
rga_mm_get_buffer_info(struct rga_job * job,struct rga_internal_buffer * internal_buffer,uint64_t * channel_addr)1350*4882a593Smuzhiyun static int rga_mm_get_buffer_info(struct rga_job *job,
1351*4882a593Smuzhiyun struct rga_internal_buffer *internal_buffer,
1352*4882a593Smuzhiyun uint64_t *channel_addr)
1353*4882a593Smuzhiyun {
1354*4882a593Smuzhiyun uint64_t addr;
1355*4882a593Smuzhiyun
1356*4882a593Smuzhiyun switch (job->scheduler->data->mmu) {
1357*4882a593Smuzhiyun case RGA_IOMMU:
1358*4882a593Smuzhiyun addr = rga_mm_lookup_iova(internal_buffer);
1359*4882a593Smuzhiyun if (addr == 0) {
1360*4882a593Smuzhiyun pr_err("core[%d] lookup buffer_type[0x%x] iova error!\n",
1361*4882a593Smuzhiyun job->core, internal_buffer->type);
1362*4882a593Smuzhiyun return -EINVAL;
1363*4882a593Smuzhiyun }
1364*4882a593Smuzhiyun break;
1365*4882a593Smuzhiyun case RGA_MMU:
1366*4882a593Smuzhiyun default:
1367*4882a593Smuzhiyun if (internal_buffer->mm_flag & RGA_MEM_PHYSICAL_CONTIGUOUS) {
1368*4882a593Smuzhiyun addr = internal_buffer->phys_addr;
1369*4882a593Smuzhiyun break;
1370*4882a593Smuzhiyun }
1371*4882a593Smuzhiyun
1372*4882a593Smuzhiyun switch (internal_buffer->type) {
1373*4882a593Smuzhiyun case RGA_DMA_BUFFER:
1374*4882a593Smuzhiyun case RGA_DMA_BUFFER_PTR:
1375*4882a593Smuzhiyun addr = 0;
1376*4882a593Smuzhiyun break;
1377*4882a593Smuzhiyun case RGA_VIRTUAL_ADDRESS:
1378*4882a593Smuzhiyun addr = internal_buffer->virt_addr->addr;
1379*4882a593Smuzhiyun break;
1380*4882a593Smuzhiyun case RGA_PHYSICAL_ADDRESS:
1381*4882a593Smuzhiyun addr = internal_buffer->phys_addr;
1382*4882a593Smuzhiyun break;
1383*4882a593Smuzhiyun default:
1384*4882a593Smuzhiyun pr_err("Illegal external buffer!\n");
1385*4882a593Smuzhiyun return -EFAULT;
1386*4882a593Smuzhiyun }
1387*4882a593Smuzhiyun break;
1388*4882a593Smuzhiyun }
1389*4882a593Smuzhiyun
1390*4882a593Smuzhiyun *channel_addr = addr;
1391*4882a593Smuzhiyun
1392*4882a593Smuzhiyun return 0;
1393*4882a593Smuzhiyun }
1394*4882a593Smuzhiyun
rga_mm_get_buffer(struct rga_mm * mm,struct rga_job * job,uint64_t handle,uint64_t * channel_addr,struct rga_internal_buffer ** buf,int require_size,enum dma_data_direction dir)1395*4882a593Smuzhiyun static int rga_mm_get_buffer(struct rga_mm *mm,
1396*4882a593Smuzhiyun struct rga_job *job,
1397*4882a593Smuzhiyun uint64_t handle,
1398*4882a593Smuzhiyun uint64_t *channel_addr,
1399*4882a593Smuzhiyun struct rga_internal_buffer **buf,
1400*4882a593Smuzhiyun int require_size,
1401*4882a593Smuzhiyun enum dma_data_direction dir)
1402*4882a593Smuzhiyun {
1403*4882a593Smuzhiyun int ret = 0;
1404*4882a593Smuzhiyun struct rga_internal_buffer *internal_buffer = NULL;
1405*4882a593Smuzhiyun
1406*4882a593Smuzhiyun if (handle == 0) {
1407*4882a593Smuzhiyun pr_err("No buffer handle can be used!\n");
1408*4882a593Smuzhiyun return -EFAULT;
1409*4882a593Smuzhiyun }
1410*4882a593Smuzhiyun
1411*4882a593Smuzhiyun mutex_lock(&mm->lock);
1412*4882a593Smuzhiyun *buf = rga_mm_lookup_handle(mm, handle);
1413*4882a593Smuzhiyun if (*buf == NULL) {
1414*4882a593Smuzhiyun pr_err("This handle[%ld] is illegal.\n", (unsigned long)handle);
1415*4882a593Smuzhiyun
1416*4882a593Smuzhiyun mutex_unlock(&mm->lock);
1417*4882a593Smuzhiyun return -EFAULT;
1418*4882a593Smuzhiyun }
1419*4882a593Smuzhiyun
1420*4882a593Smuzhiyun internal_buffer = *buf;
1421*4882a593Smuzhiyun kref_get(&internal_buffer->refcount);
1422*4882a593Smuzhiyun
1423*4882a593Smuzhiyun if (DEBUGGER_EN(MM)) {
1424*4882a593Smuzhiyun pr_info("handle[%d] get info:\n", (int)handle);
1425*4882a593Smuzhiyun rga_mm_dump_buffer(internal_buffer);
1426*4882a593Smuzhiyun }
1427*4882a593Smuzhiyun
1428*4882a593Smuzhiyun mutex_unlock(&mm->lock);
1429*4882a593Smuzhiyun
1430*4882a593Smuzhiyun ret = rga_mm_get_buffer_info(job, internal_buffer, channel_addr);
1431*4882a593Smuzhiyun if (ret < 0) {
1432*4882a593Smuzhiyun pr_err("handle[%ld] failed to get internal buffer info!\n", (unsigned long)handle);
1433*4882a593Smuzhiyun return ret;
1434*4882a593Smuzhiyun }
1435*4882a593Smuzhiyun
1436*4882a593Smuzhiyun if (internal_buffer->size < require_size) {
1437*4882a593Smuzhiyun ret = -EINVAL;
1438*4882a593Smuzhiyun pr_err("Only get buffer %ld byte from handle[%ld], but current required %d byte\n",
1439*4882a593Smuzhiyun internal_buffer->size, (unsigned long)handle, require_size);
1440*4882a593Smuzhiyun
1441*4882a593Smuzhiyun goto put_internal_buffer;
1442*4882a593Smuzhiyun }
1443*4882a593Smuzhiyun
1444*4882a593Smuzhiyun if (internal_buffer->mm_flag & RGA_MEM_FORCE_FLUSH_CACHE) {
1445*4882a593Smuzhiyun /*
1446*4882a593Smuzhiyun * Some userspace virtual addresses do not have an
1447*4882a593Smuzhiyun * interface for flushing the cache, so it is mandatory
1448*4882a593Smuzhiyun * to flush the cache when the virtual address is used.
1449*4882a593Smuzhiyun */
1450*4882a593Smuzhiyun ret = rga_mm_sync_dma_sg_for_device(internal_buffer, job, dir);
1451*4882a593Smuzhiyun if (ret < 0) {
1452*4882a593Smuzhiyun pr_err("sync sgt for device error!\n");
1453*4882a593Smuzhiyun goto put_internal_buffer;
1454*4882a593Smuzhiyun }
1455*4882a593Smuzhiyun }
1456*4882a593Smuzhiyun
1457*4882a593Smuzhiyun return 0;
1458*4882a593Smuzhiyun
1459*4882a593Smuzhiyun put_internal_buffer:
1460*4882a593Smuzhiyun mutex_lock(&mm->lock);
1461*4882a593Smuzhiyun kref_put(&internal_buffer->refcount, rga_mm_kref_release_buffer);
1462*4882a593Smuzhiyun mutex_unlock(&mm->lock);
1463*4882a593Smuzhiyun
1464*4882a593Smuzhiyun return ret;
1465*4882a593Smuzhiyun
1466*4882a593Smuzhiyun }
1467*4882a593Smuzhiyun
rga_mm_put_buffer(struct rga_mm * mm,struct rga_job * job,struct rga_internal_buffer * internal_buffer,enum dma_data_direction dir)1468*4882a593Smuzhiyun static void rga_mm_put_buffer(struct rga_mm *mm,
1469*4882a593Smuzhiyun struct rga_job *job,
1470*4882a593Smuzhiyun struct rga_internal_buffer *internal_buffer,
1471*4882a593Smuzhiyun enum dma_data_direction dir)
1472*4882a593Smuzhiyun {
1473*4882a593Smuzhiyun if (internal_buffer->mm_flag & RGA_MEM_FORCE_FLUSH_CACHE && dir != DMA_NONE)
1474*4882a593Smuzhiyun if (rga_mm_sync_dma_sg_for_cpu(internal_buffer, job, dir))
1475*4882a593Smuzhiyun pr_err("sync sgt for cpu error!\n");
1476*4882a593Smuzhiyun
1477*4882a593Smuzhiyun mutex_lock(&mm->lock);
1478*4882a593Smuzhiyun kref_put(&internal_buffer->refcount, rga_mm_kref_release_buffer);
1479*4882a593Smuzhiyun mutex_unlock(&mm->lock);
1480*4882a593Smuzhiyun }
1481*4882a593Smuzhiyun
rga_mm_put_channel_handle_info(struct rga_mm * mm,struct rga_job * job,struct rga_job_buffer * job_buf,enum dma_data_direction dir)1482*4882a593Smuzhiyun static void rga_mm_put_channel_handle_info(struct rga_mm *mm,
1483*4882a593Smuzhiyun struct rga_job *job,
1484*4882a593Smuzhiyun struct rga_job_buffer *job_buf,
1485*4882a593Smuzhiyun enum dma_data_direction dir)
1486*4882a593Smuzhiyun {
1487*4882a593Smuzhiyun if (job_buf->y_addr)
1488*4882a593Smuzhiyun rga_mm_put_buffer(mm, job, job_buf->y_addr, dir);
1489*4882a593Smuzhiyun if (job_buf->uv_addr)
1490*4882a593Smuzhiyun rga_mm_put_buffer(mm, job, job_buf->uv_addr, dir);
1491*4882a593Smuzhiyun if (job_buf->v_addr)
1492*4882a593Smuzhiyun rga_mm_put_buffer(mm, job, job_buf->v_addr, dir);
1493*4882a593Smuzhiyun
1494*4882a593Smuzhiyun if (job_buf->page_table)
1495*4882a593Smuzhiyun free_pages((unsigned long)job_buf->page_table, job_buf->order);
1496*4882a593Smuzhiyun }
1497*4882a593Smuzhiyun
rga_mm_get_channel_handle_info(struct rga_mm * mm,struct rga_job * job,struct rga_img_info_t * img,struct rga_job_buffer * job_buf,enum dma_data_direction dir)1498*4882a593Smuzhiyun static int rga_mm_get_channel_handle_info(struct rga_mm *mm,
1499*4882a593Smuzhiyun struct rga_job *job,
1500*4882a593Smuzhiyun struct rga_img_info_t *img,
1501*4882a593Smuzhiyun struct rga_job_buffer *job_buf,
1502*4882a593Smuzhiyun enum dma_data_direction dir)
1503*4882a593Smuzhiyun {
1504*4882a593Smuzhiyun int ret = 0;
1505*4882a593Smuzhiyun int handle = 0;
1506*4882a593Smuzhiyun int img_size, yrgb_size, uv_size, v_size;
1507*4882a593Smuzhiyun
1508*4882a593Smuzhiyun img_size = rga_image_size_cal(img->vir_w, img->vir_h, img->format,
1509*4882a593Smuzhiyun &yrgb_size, &uv_size, &v_size);
1510*4882a593Smuzhiyun if (img_size <= 0) {
1511*4882a593Smuzhiyun pr_err("Image size cal error! width = %d, height = %d, format = %s\n",
1512*4882a593Smuzhiyun img->vir_w, img->vir_h, rga_get_format_name(img->format));
1513*4882a593Smuzhiyun return -EINVAL;
1514*4882a593Smuzhiyun }
1515*4882a593Smuzhiyun
1516*4882a593Smuzhiyun /* using third-address */
1517*4882a593Smuzhiyun if (img->uv_addr > 0) {
1518*4882a593Smuzhiyun handle = img->yrgb_addr;
1519*4882a593Smuzhiyun if (handle > 0) {
1520*4882a593Smuzhiyun ret = rga_mm_get_buffer(mm, job, handle, &img->yrgb_addr,
1521*4882a593Smuzhiyun &job_buf->y_addr, yrgb_size, dir);
1522*4882a593Smuzhiyun if (ret < 0) {
1523*4882a593Smuzhiyun pr_err("handle[%d] Can't get y/rgb address info!\n", handle);
1524*4882a593Smuzhiyun return ret;
1525*4882a593Smuzhiyun }
1526*4882a593Smuzhiyun }
1527*4882a593Smuzhiyun
1528*4882a593Smuzhiyun handle = img->uv_addr;
1529*4882a593Smuzhiyun if (handle > 0) {
1530*4882a593Smuzhiyun ret = rga_mm_get_buffer(mm, job, handle, &img->uv_addr,
1531*4882a593Smuzhiyun &job_buf->uv_addr, uv_size, dir);
1532*4882a593Smuzhiyun if (ret < 0) {
1533*4882a593Smuzhiyun pr_err("handle[%d] Can't get uv address info!\n", handle);
1534*4882a593Smuzhiyun return ret;
1535*4882a593Smuzhiyun }
1536*4882a593Smuzhiyun }
1537*4882a593Smuzhiyun
1538*4882a593Smuzhiyun handle = img->v_addr;
1539*4882a593Smuzhiyun if (handle > 0) {
1540*4882a593Smuzhiyun ret = rga_mm_get_buffer(mm, job, handle, &img->v_addr,
1541*4882a593Smuzhiyun &job_buf->v_addr, v_size, dir);
1542*4882a593Smuzhiyun if (ret < 0) {
1543*4882a593Smuzhiyun pr_err("handle[%d] Can't get uv address info!\n", handle);
1544*4882a593Smuzhiyun return ret;
1545*4882a593Smuzhiyun }
1546*4882a593Smuzhiyun }
1547*4882a593Smuzhiyun } else {
1548*4882a593Smuzhiyun handle = img->yrgb_addr;
1549*4882a593Smuzhiyun if (handle > 0) {
1550*4882a593Smuzhiyun ret = rga_mm_get_buffer(mm, job, handle, &img->yrgb_addr,
1551*4882a593Smuzhiyun &job_buf->addr, img_size, dir);
1552*4882a593Smuzhiyun if (ret < 0) {
1553*4882a593Smuzhiyun pr_err("handle[%d] Can't get y/rgb address info!\n", handle);
1554*4882a593Smuzhiyun return ret;
1555*4882a593Smuzhiyun }
1556*4882a593Smuzhiyun }
1557*4882a593Smuzhiyun
1558*4882a593Smuzhiyun rga_convert_addr(img, false);
1559*4882a593Smuzhiyun }
1560*4882a593Smuzhiyun
1561*4882a593Smuzhiyun if (job->scheduler->data->mmu == RGA_MMU &&
1562*4882a593Smuzhiyun rga_mm_is_need_mmu(job, job_buf->addr)) {
1563*4882a593Smuzhiyun ret = rga_mm_set_mmu_base(job, img, job_buf);
1564*4882a593Smuzhiyun if (ret < 0) {
1565*4882a593Smuzhiyun pr_err("Can't set RGA2 MMU_BASE from handle!\n");
1566*4882a593Smuzhiyun
1567*4882a593Smuzhiyun rga_mm_put_channel_handle_info(mm, job, job_buf, dir);
1568*4882a593Smuzhiyun return ret;
1569*4882a593Smuzhiyun }
1570*4882a593Smuzhiyun }
1571*4882a593Smuzhiyun
1572*4882a593Smuzhiyun return 0;
1573*4882a593Smuzhiyun }
1574*4882a593Smuzhiyun
rga_mm_get_handle_info(struct rga_job * job)1575*4882a593Smuzhiyun static int rga_mm_get_handle_info(struct rga_job *job)
1576*4882a593Smuzhiyun {
1577*4882a593Smuzhiyun int ret = 0;
1578*4882a593Smuzhiyun struct rga_req *req = NULL;
1579*4882a593Smuzhiyun struct rga_mm *mm = NULL;
1580*4882a593Smuzhiyun enum dma_data_direction dir;
1581*4882a593Smuzhiyun
1582*4882a593Smuzhiyun req = &job->rga_command_base;
1583*4882a593Smuzhiyun mm = rga_drvdata->mm;
1584*4882a593Smuzhiyun
1585*4882a593Smuzhiyun if (likely(req->src.yrgb_addr > 0)) {
1586*4882a593Smuzhiyun ret = rga_mm_get_channel_handle_info(mm, job, &req->src,
1587*4882a593Smuzhiyun &job->src_buffer,
1588*4882a593Smuzhiyun DMA_TO_DEVICE);
1589*4882a593Smuzhiyun if (ret < 0) {
1590*4882a593Smuzhiyun pr_err("Can't get src buffer info from handle!\n");
1591*4882a593Smuzhiyun return ret;
1592*4882a593Smuzhiyun }
1593*4882a593Smuzhiyun }
1594*4882a593Smuzhiyun
1595*4882a593Smuzhiyun if (likely(req->dst.yrgb_addr > 0)) {
1596*4882a593Smuzhiyun ret = rga_mm_get_channel_handle_info(mm, job, &req->dst,
1597*4882a593Smuzhiyun &job->dst_buffer,
1598*4882a593Smuzhiyun DMA_TO_DEVICE);
1599*4882a593Smuzhiyun if (ret < 0) {
1600*4882a593Smuzhiyun pr_err("Can't get dst buffer info from handle!\n");
1601*4882a593Smuzhiyun return ret;
1602*4882a593Smuzhiyun }
1603*4882a593Smuzhiyun }
1604*4882a593Smuzhiyun
1605*4882a593Smuzhiyun if (likely(req->pat.yrgb_addr > 0)) {
1606*4882a593Smuzhiyun
1607*4882a593Smuzhiyun if (req->render_mode != UPDATE_PALETTE_TABLE_MODE) {
1608*4882a593Smuzhiyun if (req->bsfilter_flag)
1609*4882a593Smuzhiyun dir = DMA_BIDIRECTIONAL;
1610*4882a593Smuzhiyun else
1611*4882a593Smuzhiyun dir = DMA_TO_DEVICE;
1612*4882a593Smuzhiyun
1613*4882a593Smuzhiyun ret = rga_mm_get_channel_handle_info(mm, job, &req->pat,
1614*4882a593Smuzhiyun &job->src1_buffer,
1615*4882a593Smuzhiyun dir);
1616*4882a593Smuzhiyun } else {
1617*4882a593Smuzhiyun ret = rga_mm_get_channel_handle_info(mm, job, &req->pat,
1618*4882a593Smuzhiyun &job->els_buffer,
1619*4882a593Smuzhiyun DMA_BIDIRECTIONAL);
1620*4882a593Smuzhiyun }
1621*4882a593Smuzhiyun if (ret < 0) {
1622*4882a593Smuzhiyun pr_err("Can't get pat buffer info from handle!\n");
1623*4882a593Smuzhiyun return ret;
1624*4882a593Smuzhiyun }
1625*4882a593Smuzhiyun }
1626*4882a593Smuzhiyun
1627*4882a593Smuzhiyun rga_mm_set_mmu_flag(job);
1628*4882a593Smuzhiyun
1629*4882a593Smuzhiyun return 0;
1630*4882a593Smuzhiyun }
1631*4882a593Smuzhiyun
rga_mm_put_handle_info(struct rga_job * job)1632*4882a593Smuzhiyun static void rga_mm_put_handle_info(struct rga_job *job)
1633*4882a593Smuzhiyun {
1634*4882a593Smuzhiyun struct rga_mm *mm = rga_drvdata->mm;
1635*4882a593Smuzhiyun
1636*4882a593Smuzhiyun rga_mm_put_channel_handle_info(mm, job, &job->src_buffer, DMA_NONE);
1637*4882a593Smuzhiyun rga_mm_put_channel_handle_info(mm, job, &job->dst_buffer, DMA_FROM_DEVICE);
1638*4882a593Smuzhiyun rga_mm_put_channel_handle_info(mm, job, &job->src1_buffer, DMA_NONE);
1639*4882a593Smuzhiyun rga_mm_put_channel_handle_info(mm, job, &job->els_buffer, DMA_NONE);
1640*4882a593Smuzhiyun }
1641*4882a593Smuzhiyun
rga_mm_put_channel_external_buffer(struct rga_job_buffer * job_buffer)1642*4882a593Smuzhiyun static void rga_mm_put_channel_external_buffer(struct rga_job_buffer *job_buffer)
1643*4882a593Smuzhiyun {
1644*4882a593Smuzhiyun if (job_buffer->ex_addr->type == RGA_DMA_BUFFER_PTR)
1645*4882a593Smuzhiyun dma_buf_put((struct dma_buf *)(unsigned long)job_buffer->ex_addr->memory);
1646*4882a593Smuzhiyun
1647*4882a593Smuzhiyun kfree(job_buffer->ex_addr);
1648*4882a593Smuzhiyun job_buffer->ex_addr = NULL;
1649*4882a593Smuzhiyun }
1650*4882a593Smuzhiyun
rga_mm_get_channel_external_buffer(int mmu_flag,struct rga_img_info_t * img_info,struct rga_job_buffer * job_buffer)1651*4882a593Smuzhiyun static int rga_mm_get_channel_external_buffer(int mmu_flag,
1652*4882a593Smuzhiyun struct rga_img_info_t *img_info,
1653*4882a593Smuzhiyun struct rga_job_buffer *job_buffer)
1654*4882a593Smuzhiyun {
1655*4882a593Smuzhiyun struct dma_buf *dma_buf = NULL;
1656*4882a593Smuzhiyun struct rga_external_buffer *external_buffer = NULL;
1657*4882a593Smuzhiyun
1658*4882a593Smuzhiyun /* Default unsupported multi-planar format */
1659*4882a593Smuzhiyun external_buffer = kzalloc(sizeof(*external_buffer), GFP_KERNEL);
1660*4882a593Smuzhiyun if (external_buffer == NULL) {
1661*4882a593Smuzhiyun pr_err("Cannot alloc job_buffer!\n");
1662*4882a593Smuzhiyun return -ENOMEM;
1663*4882a593Smuzhiyun }
1664*4882a593Smuzhiyun
1665*4882a593Smuzhiyun if (img_info->yrgb_addr) {
1666*4882a593Smuzhiyun dma_buf = dma_buf_get(img_info->yrgb_addr);
1667*4882a593Smuzhiyun if (IS_ERR(dma_buf)) {
1668*4882a593Smuzhiyun pr_err("%s dma_buf_get fail fd[%lu]\n",
1669*4882a593Smuzhiyun __func__, (unsigned long)img_info->yrgb_addr);
1670*4882a593Smuzhiyun kfree(external_buffer);
1671*4882a593Smuzhiyun return -EINVAL;
1672*4882a593Smuzhiyun }
1673*4882a593Smuzhiyun
1674*4882a593Smuzhiyun external_buffer->memory = (unsigned long)dma_buf;
1675*4882a593Smuzhiyun external_buffer->type = RGA_DMA_BUFFER_PTR;
1676*4882a593Smuzhiyun } else if (mmu_flag && img_info->uv_addr) {
1677*4882a593Smuzhiyun external_buffer->memory = (uint64_t)img_info->uv_addr;
1678*4882a593Smuzhiyun external_buffer->type = RGA_VIRTUAL_ADDRESS;
1679*4882a593Smuzhiyun } else if (img_info->uv_addr) {
1680*4882a593Smuzhiyun external_buffer->memory = (uint64_t)img_info->uv_addr;
1681*4882a593Smuzhiyun external_buffer->type = RGA_PHYSICAL_ADDRESS;
1682*4882a593Smuzhiyun } else {
1683*4882a593Smuzhiyun kfree(external_buffer);
1684*4882a593Smuzhiyun return -EINVAL;
1685*4882a593Smuzhiyun }
1686*4882a593Smuzhiyun
1687*4882a593Smuzhiyun external_buffer->memory_parm.width = img_info->vir_w;
1688*4882a593Smuzhiyun external_buffer->memory_parm.height = img_info->vir_h;
1689*4882a593Smuzhiyun external_buffer->memory_parm.format = img_info->format;
1690*4882a593Smuzhiyun
1691*4882a593Smuzhiyun job_buffer->ex_addr = external_buffer;
1692*4882a593Smuzhiyun
1693*4882a593Smuzhiyun return 0;
1694*4882a593Smuzhiyun }
1695*4882a593Smuzhiyun
rga_mm_put_external_buffer(struct rga_job * job)1696*4882a593Smuzhiyun static void rga_mm_put_external_buffer(struct rga_job *job)
1697*4882a593Smuzhiyun {
1698*4882a593Smuzhiyun if (job->src_buffer.ex_addr)
1699*4882a593Smuzhiyun rga_mm_put_channel_external_buffer(&job->src_buffer);
1700*4882a593Smuzhiyun if (job->src1_buffer.ex_addr)
1701*4882a593Smuzhiyun rga_mm_put_channel_external_buffer(&job->src1_buffer);
1702*4882a593Smuzhiyun if (job->dst_buffer.ex_addr)
1703*4882a593Smuzhiyun rga_mm_put_channel_external_buffer(&job->dst_buffer);
1704*4882a593Smuzhiyun if (job->els_buffer.ex_addr)
1705*4882a593Smuzhiyun rga_mm_put_channel_external_buffer(&job->els_buffer);
1706*4882a593Smuzhiyun }
1707*4882a593Smuzhiyun
rga_mm_get_external_buffer(struct rga_job * job)1708*4882a593Smuzhiyun static int rga_mm_get_external_buffer(struct rga_job *job)
1709*4882a593Smuzhiyun {
1710*4882a593Smuzhiyun int ret = -EINVAL;
1711*4882a593Smuzhiyun int mmu_flag;
1712*4882a593Smuzhiyun
1713*4882a593Smuzhiyun struct rga_img_info_t *src0 = NULL;
1714*4882a593Smuzhiyun struct rga_img_info_t *src1 = NULL;
1715*4882a593Smuzhiyun struct rga_img_info_t *dst = NULL;
1716*4882a593Smuzhiyun struct rga_img_info_t *els = NULL;
1717*4882a593Smuzhiyun
1718*4882a593Smuzhiyun if (job->rga_command_base.render_mode != COLOR_FILL_MODE)
1719*4882a593Smuzhiyun src0 = &job->rga_command_base.src;
1720*4882a593Smuzhiyun
1721*4882a593Smuzhiyun if (job->rga_command_base.render_mode != UPDATE_PALETTE_TABLE_MODE)
1722*4882a593Smuzhiyun src1 = job->rga_command_base.bsfilter_flag ?
1723*4882a593Smuzhiyun &job->rga_command_base.pat : NULL;
1724*4882a593Smuzhiyun else
1725*4882a593Smuzhiyun els = &job->rga_command_base.pat;
1726*4882a593Smuzhiyun
1727*4882a593Smuzhiyun dst = &job->rga_command_base.dst;
1728*4882a593Smuzhiyun
1729*4882a593Smuzhiyun if (likely(src0)) {
1730*4882a593Smuzhiyun mmu_flag = ((job->rga_command_base.mmu_info.mmu_flag >> 8) & 1);
1731*4882a593Smuzhiyun ret = rga_mm_get_channel_external_buffer(mmu_flag, src0, &job->src_buffer);
1732*4882a593Smuzhiyun if (ret < 0) {
1733*4882a593Smuzhiyun pr_err("Cannot get src0 channel buffer!\n");
1734*4882a593Smuzhiyun return ret;
1735*4882a593Smuzhiyun }
1736*4882a593Smuzhiyun }
1737*4882a593Smuzhiyun
1738*4882a593Smuzhiyun if (likely(dst)) {
1739*4882a593Smuzhiyun mmu_flag = ((job->rga_command_base.mmu_info.mmu_flag >> 10) & 1);
1740*4882a593Smuzhiyun ret = rga_mm_get_channel_external_buffer(mmu_flag, dst, &job->dst_buffer);
1741*4882a593Smuzhiyun if (ret < 0) {
1742*4882a593Smuzhiyun pr_err("Cannot get dst channel buffer!\n");
1743*4882a593Smuzhiyun goto error_put_buffer;
1744*4882a593Smuzhiyun }
1745*4882a593Smuzhiyun }
1746*4882a593Smuzhiyun
1747*4882a593Smuzhiyun if (src1) {
1748*4882a593Smuzhiyun mmu_flag = ((job->rga_command_base.mmu_info.mmu_flag >> 9) & 1);
1749*4882a593Smuzhiyun ret = rga_mm_get_channel_external_buffer(mmu_flag, src1, &job->src1_buffer);
1750*4882a593Smuzhiyun if (ret < 0) {
1751*4882a593Smuzhiyun pr_err("Cannot get src1 channel buffer!\n");
1752*4882a593Smuzhiyun goto error_put_buffer;
1753*4882a593Smuzhiyun }
1754*4882a593Smuzhiyun }
1755*4882a593Smuzhiyun
1756*4882a593Smuzhiyun if (els) {
1757*4882a593Smuzhiyun mmu_flag = ((job->rga_command_base.mmu_info.mmu_flag >> 11) & 1);
1758*4882a593Smuzhiyun ret = rga_mm_get_channel_external_buffer(mmu_flag, els, &job->els_buffer);
1759*4882a593Smuzhiyun if (ret < 0) {
1760*4882a593Smuzhiyun pr_err("Cannot get els channel buffer!\n");
1761*4882a593Smuzhiyun goto error_put_buffer;
1762*4882a593Smuzhiyun }
1763*4882a593Smuzhiyun }
1764*4882a593Smuzhiyun
1765*4882a593Smuzhiyun return 0;
1766*4882a593Smuzhiyun error_put_buffer:
1767*4882a593Smuzhiyun rga_mm_put_external_buffer(job);
1768*4882a593Smuzhiyun return ret;
1769*4882a593Smuzhiyun }
1770*4882a593Smuzhiyun
rga_mm_unmap_channel_job_buffer(struct rga_job * job,struct rga_job_buffer * job_buffer,enum dma_data_direction dir)1771*4882a593Smuzhiyun static void rga_mm_unmap_channel_job_buffer(struct rga_job *job,
1772*4882a593Smuzhiyun struct rga_job_buffer *job_buffer,
1773*4882a593Smuzhiyun enum dma_data_direction dir)
1774*4882a593Smuzhiyun {
1775*4882a593Smuzhiyun if (job_buffer->addr->mm_flag & RGA_MEM_FORCE_FLUSH_CACHE && dir != DMA_NONE)
1776*4882a593Smuzhiyun if (rga_mm_sync_dma_sg_for_cpu(job_buffer->addr, job, dir))
1777*4882a593Smuzhiyun pr_err("sync sgt for cpu error!\n");
1778*4882a593Smuzhiyun
1779*4882a593Smuzhiyun rga_mm_unmap_buffer(job_buffer->addr);
1780*4882a593Smuzhiyun kfree(job_buffer->addr);
1781*4882a593Smuzhiyun
1782*4882a593Smuzhiyun job_buffer->page_table = NULL;
1783*4882a593Smuzhiyun }
1784*4882a593Smuzhiyun
rga_mm_map_channel_job_buffer(struct rga_job * job,struct rga_img_info_t * img,struct rga_job_buffer * job_buffer,enum dma_data_direction dir,int write_flag)1785*4882a593Smuzhiyun static int rga_mm_map_channel_job_buffer(struct rga_job *job,
1786*4882a593Smuzhiyun struct rga_img_info_t *img,
1787*4882a593Smuzhiyun struct rga_job_buffer *job_buffer,
1788*4882a593Smuzhiyun enum dma_data_direction dir,
1789*4882a593Smuzhiyun int write_flag)
1790*4882a593Smuzhiyun {
1791*4882a593Smuzhiyun int ret;
1792*4882a593Smuzhiyun struct rga_internal_buffer *buffer = NULL;
1793*4882a593Smuzhiyun
1794*4882a593Smuzhiyun buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
1795*4882a593Smuzhiyun if (buffer == NULL) {
1796*4882a593Smuzhiyun pr_err("%s alloc internal_buffer error!\n", __func__);
1797*4882a593Smuzhiyun return -ENOMEM;
1798*4882a593Smuzhiyun }
1799*4882a593Smuzhiyun
1800*4882a593Smuzhiyun ret = rga_mm_map_buffer(job_buffer->ex_addr, buffer, job, write_flag);
1801*4882a593Smuzhiyun if (ret < 0) {
1802*4882a593Smuzhiyun pr_err("job buffer map failed!\n");
1803*4882a593Smuzhiyun goto error_free_buffer;
1804*4882a593Smuzhiyun }
1805*4882a593Smuzhiyun
1806*4882a593Smuzhiyun ret = rga_mm_get_buffer_info(job, buffer, &img->yrgb_addr);
1807*4882a593Smuzhiyun if (ret < 0) {
1808*4882a593Smuzhiyun pr_err("Failed to get internal buffer info!\n");
1809*4882a593Smuzhiyun goto error_unmap_buffer;
1810*4882a593Smuzhiyun }
1811*4882a593Smuzhiyun
1812*4882a593Smuzhiyun if (buffer->mm_flag & RGA_MEM_FORCE_FLUSH_CACHE) {
1813*4882a593Smuzhiyun ret = rga_mm_sync_dma_sg_for_device(buffer, job, dir);
1814*4882a593Smuzhiyun if (ret < 0) {
1815*4882a593Smuzhiyun pr_err("sync sgt for device error!\n");
1816*4882a593Smuzhiyun goto error_unmap_buffer;
1817*4882a593Smuzhiyun }
1818*4882a593Smuzhiyun }
1819*4882a593Smuzhiyun
1820*4882a593Smuzhiyun rga_convert_addr(img, false);
1821*4882a593Smuzhiyun
1822*4882a593Smuzhiyun job_buffer->addr = buffer;
1823*4882a593Smuzhiyun
1824*4882a593Smuzhiyun if (job->scheduler->data->mmu == RGA_MMU &&
1825*4882a593Smuzhiyun rga_mm_is_need_mmu(job, job_buffer->addr)) {
1826*4882a593Smuzhiyun ret = rga_mm_set_mmu_base(job, img, job_buffer);
1827*4882a593Smuzhiyun if (ret < 0) {
1828*4882a593Smuzhiyun pr_err("Can't set RGA2 MMU_BASE!\n");
1829*4882a593Smuzhiyun job_buffer->addr = NULL;
1830*4882a593Smuzhiyun goto error_unmap_buffer;
1831*4882a593Smuzhiyun }
1832*4882a593Smuzhiyun }
1833*4882a593Smuzhiyun
1834*4882a593Smuzhiyun return 0;
1835*4882a593Smuzhiyun
1836*4882a593Smuzhiyun error_unmap_buffer:
1837*4882a593Smuzhiyun rga_mm_unmap_buffer(buffer);
1838*4882a593Smuzhiyun error_free_buffer:
1839*4882a593Smuzhiyun kfree(buffer);
1840*4882a593Smuzhiyun
1841*4882a593Smuzhiyun return ret;
1842*4882a593Smuzhiyun }
1843*4882a593Smuzhiyun
rga_mm_unmap_buffer_info(struct rga_job * job)1844*4882a593Smuzhiyun static void rga_mm_unmap_buffer_info(struct rga_job *job)
1845*4882a593Smuzhiyun {
1846*4882a593Smuzhiyun if (job->src_buffer.addr)
1847*4882a593Smuzhiyun rga_mm_unmap_channel_job_buffer(job, &job->src_buffer, DMA_NONE);
1848*4882a593Smuzhiyun if (job->dst_buffer.addr)
1849*4882a593Smuzhiyun rga_mm_unmap_channel_job_buffer(job, &job->dst_buffer, DMA_FROM_DEVICE);
1850*4882a593Smuzhiyun if (job->src1_buffer.addr)
1851*4882a593Smuzhiyun rga_mm_unmap_channel_job_buffer(job, &job->src1_buffer, DMA_NONE);
1852*4882a593Smuzhiyun if (job->els_buffer.addr)
1853*4882a593Smuzhiyun rga_mm_unmap_channel_job_buffer(job, &job->els_buffer, DMA_NONE);
1854*4882a593Smuzhiyun
1855*4882a593Smuzhiyun rga_mm_put_external_buffer(job);
1856*4882a593Smuzhiyun }
1857*4882a593Smuzhiyun
rga_mm_map_buffer_info(struct rga_job * job)1858*4882a593Smuzhiyun static int rga_mm_map_buffer_info(struct rga_job *job)
1859*4882a593Smuzhiyun {
1860*4882a593Smuzhiyun int ret = 0;
1861*4882a593Smuzhiyun struct rga_req *req = NULL;
1862*4882a593Smuzhiyun enum dma_data_direction dir;
1863*4882a593Smuzhiyun
1864*4882a593Smuzhiyun ret = rga_mm_get_external_buffer(job);
1865*4882a593Smuzhiyun if (ret < 0) {
1866*4882a593Smuzhiyun pr_err("failed to get external buffer from job_cmd!\n");
1867*4882a593Smuzhiyun return ret;
1868*4882a593Smuzhiyun }
1869*4882a593Smuzhiyun
1870*4882a593Smuzhiyun req = &job->rga_command_base;
1871*4882a593Smuzhiyun
1872*4882a593Smuzhiyun if (likely(job->src_buffer.ex_addr)) {
1873*4882a593Smuzhiyun ret = rga_mm_map_channel_job_buffer(job, &req->src,
1874*4882a593Smuzhiyun &job->src_buffer,
1875*4882a593Smuzhiyun DMA_TO_DEVICE, false);
1876*4882a593Smuzhiyun if (ret < 0) {
1877*4882a593Smuzhiyun pr_err("src channel map job buffer failed!");
1878*4882a593Smuzhiyun goto error_unmap_buffer;
1879*4882a593Smuzhiyun }
1880*4882a593Smuzhiyun }
1881*4882a593Smuzhiyun
1882*4882a593Smuzhiyun if (likely(job->dst_buffer.ex_addr)) {
1883*4882a593Smuzhiyun ret = rga_mm_map_channel_job_buffer(job, &req->dst,
1884*4882a593Smuzhiyun &job->dst_buffer,
1885*4882a593Smuzhiyun DMA_TO_DEVICE, true);
1886*4882a593Smuzhiyun if (ret < 0) {
1887*4882a593Smuzhiyun pr_err("dst channel map job buffer failed!");
1888*4882a593Smuzhiyun goto error_unmap_buffer;
1889*4882a593Smuzhiyun }
1890*4882a593Smuzhiyun }
1891*4882a593Smuzhiyun
1892*4882a593Smuzhiyun if (job->src1_buffer.ex_addr) {
1893*4882a593Smuzhiyun if (req->bsfilter_flag)
1894*4882a593Smuzhiyun dir = DMA_BIDIRECTIONAL;
1895*4882a593Smuzhiyun else
1896*4882a593Smuzhiyun dir = DMA_TO_DEVICE;
1897*4882a593Smuzhiyun
1898*4882a593Smuzhiyun ret = rga_mm_map_channel_job_buffer(job, &req->pat,
1899*4882a593Smuzhiyun &job->src1_buffer,
1900*4882a593Smuzhiyun dir, false);
1901*4882a593Smuzhiyun if (ret < 0) {
1902*4882a593Smuzhiyun pr_err("src1 channel map job buffer failed!");
1903*4882a593Smuzhiyun goto error_unmap_buffer;
1904*4882a593Smuzhiyun }
1905*4882a593Smuzhiyun }
1906*4882a593Smuzhiyun
1907*4882a593Smuzhiyun if (job->els_buffer.ex_addr) {
1908*4882a593Smuzhiyun ret = rga_mm_map_channel_job_buffer(job, &req->pat,
1909*4882a593Smuzhiyun &job->els_buffer,
1910*4882a593Smuzhiyun DMA_BIDIRECTIONAL, false);
1911*4882a593Smuzhiyun if (ret < 0) {
1912*4882a593Smuzhiyun pr_err("els channel map job buffer failed!");
1913*4882a593Smuzhiyun goto error_unmap_buffer;
1914*4882a593Smuzhiyun }
1915*4882a593Smuzhiyun }
1916*4882a593Smuzhiyun
1917*4882a593Smuzhiyun rga_mm_set_mmu_flag(job);
1918*4882a593Smuzhiyun return 0;
1919*4882a593Smuzhiyun
1920*4882a593Smuzhiyun error_unmap_buffer:
1921*4882a593Smuzhiyun rga_mm_unmap_buffer_info(job);
1922*4882a593Smuzhiyun
1923*4882a593Smuzhiyun return ret;
1924*4882a593Smuzhiyun }
1925*4882a593Smuzhiyun
rga_mm_map_job_info(struct rga_job * job)1926*4882a593Smuzhiyun int rga_mm_map_job_info(struct rga_job *job)
1927*4882a593Smuzhiyun {
1928*4882a593Smuzhiyun int ret;
1929*4882a593Smuzhiyun
1930*4882a593Smuzhiyun if (job->flags & RGA_JOB_USE_HANDLE) {
1931*4882a593Smuzhiyun ret = rga_mm_get_handle_info(job);
1932*4882a593Smuzhiyun if (ret < 0) {
1933*4882a593Smuzhiyun pr_err("failed to get buffer from handle\n");
1934*4882a593Smuzhiyun return ret;
1935*4882a593Smuzhiyun }
1936*4882a593Smuzhiyun } else {
1937*4882a593Smuzhiyun ret = rga_mm_map_buffer_info(job);
1938*4882a593Smuzhiyun if (ret < 0) {
1939*4882a593Smuzhiyun pr_err("failed to map buffer\n");
1940*4882a593Smuzhiyun return ret;
1941*4882a593Smuzhiyun }
1942*4882a593Smuzhiyun }
1943*4882a593Smuzhiyun
1944*4882a593Smuzhiyun return 0;
1945*4882a593Smuzhiyun }
1946*4882a593Smuzhiyun
rga_mm_unmap_job_info(struct rga_job * job)1947*4882a593Smuzhiyun void rga_mm_unmap_job_info(struct rga_job *job)
1948*4882a593Smuzhiyun {
1949*4882a593Smuzhiyun if (job->flags & RGA_JOB_USE_HANDLE)
1950*4882a593Smuzhiyun rga_mm_put_handle_info(job);
1951*4882a593Smuzhiyun else
1952*4882a593Smuzhiyun rga_mm_unmap_buffer_info(job);
1953*4882a593Smuzhiyun }
1954*4882a593Smuzhiyun
rga_mm_import_buffer(struct rga_external_buffer * external_buffer,struct rga_session * session)1955*4882a593Smuzhiyun uint32_t rga_mm_import_buffer(struct rga_external_buffer *external_buffer,
1956*4882a593Smuzhiyun struct rga_session *session)
1957*4882a593Smuzhiyun {
1958*4882a593Smuzhiyun int ret = 0, new_id;
1959*4882a593Smuzhiyun struct rga_mm *mm;
1960*4882a593Smuzhiyun struct rga_internal_buffer *internal_buffer;
1961*4882a593Smuzhiyun
1962*4882a593Smuzhiyun mm = rga_drvdata->mm;
1963*4882a593Smuzhiyun if (mm == NULL) {
1964*4882a593Smuzhiyun pr_err("rga mm is null!\n");
1965*4882a593Smuzhiyun return 0;
1966*4882a593Smuzhiyun }
1967*4882a593Smuzhiyun
1968*4882a593Smuzhiyun mutex_lock(&mm->lock);
1969*4882a593Smuzhiyun
1970*4882a593Smuzhiyun /* first, Check whether to rga_mm */
1971*4882a593Smuzhiyun internal_buffer = rga_mm_lookup_external(mm, external_buffer);
1972*4882a593Smuzhiyun if (!IS_ERR_OR_NULL(internal_buffer)) {
1973*4882a593Smuzhiyun kref_get(&internal_buffer->refcount);
1974*4882a593Smuzhiyun
1975*4882a593Smuzhiyun mutex_unlock(&mm->lock);
1976*4882a593Smuzhiyun return internal_buffer->handle;
1977*4882a593Smuzhiyun }
1978*4882a593Smuzhiyun
1979*4882a593Smuzhiyun /* finally, map and cached external_buffer in rga_mm */
1980*4882a593Smuzhiyun internal_buffer = kzalloc(sizeof(struct rga_internal_buffer), GFP_KERNEL);
1981*4882a593Smuzhiyun if (internal_buffer == NULL) {
1982*4882a593Smuzhiyun pr_err("%s alloc internal_buffer error!\n", __func__);
1983*4882a593Smuzhiyun
1984*4882a593Smuzhiyun mutex_unlock(&mm->lock);
1985*4882a593Smuzhiyun return 0;
1986*4882a593Smuzhiyun }
1987*4882a593Smuzhiyun
1988*4882a593Smuzhiyun ret = rga_mm_map_buffer(external_buffer, internal_buffer, NULL, true);
1989*4882a593Smuzhiyun if (ret < 0)
1990*4882a593Smuzhiyun goto FREE_INTERNAL_BUFFER;
1991*4882a593Smuzhiyun
1992*4882a593Smuzhiyun kref_init(&internal_buffer->refcount);
1993*4882a593Smuzhiyun internal_buffer->session = session;
1994*4882a593Smuzhiyun
1995*4882a593Smuzhiyun /*
1996*4882a593Smuzhiyun * Get the user-visible handle using idr. Preload and perform
1997*4882a593Smuzhiyun * allocation under our spinlock.
1998*4882a593Smuzhiyun */
1999*4882a593Smuzhiyun idr_preload(GFP_KERNEL);
2000*4882a593Smuzhiyun new_id = idr_alloc_cyclic(&mm->memory_idr, internal_buffer, 1, 0, GFP_NOWAIT);
2001*4882a593Smuzhiyun idr_preload_end();
2002*4882a593Smuzhiyun if (new_id < 0) {
2003*4882a593Smuzhiyun pr_err("internal_buffer alloc id failed!\n");
2004*4882a593Smuzhiyun goto FREE_INTERNAL_BUFFER;
2005*4882a593Smuzhiyun }
2006*4882a593Smuzhiyun
2007*4882a593Smuzhiyun internal_buffer->handle = new_id;
2008*4882a593Smuzhiyun mm->buffer_count++;
2009*4882a593Smuzhiyun
2010*4882a593Smuzhiyun if (DEBUGGER_EN(MM)) {
2011*4882a593Smuzhiyun pr_info("import buffer:\n");
2012*4882a593Smuzhiyun rga_mm_dump_buffer(internal_buffer);
2013*4882a593Smuzhiyun }
2014*4882a593Smuzhiyun
2015*4882a593Smuzhiyun mutex_unlock(&mm->lock);
2016*4882a593Smuzhiyun return internal_buffer->handle;
2017*4882a593Smuzhiyun
2018*4882a593Smuzhiyun FREE_INTERNAL_BUFFER:
2019*4882a593Smuzhiyun mutex_unlock(&mm->lock);
2020*4882a593Smuzhiyun kfree(internal_buffer);
2021*4882a593Smuzhiyun
2022*4882a593Smuzhiyun return 0;
2023*4882a593Smuzhiyun }
2024*4882a593Smuzhiyun
rga_mm_release_buffer(uint32_t handle)2025*4882a593Smuzhiyun int rga_mm_release_buffer(uint32_t handle)
2026*4882a593Smuzhiyun {
2027*4882a593Smuzhiyun struct rga_mm *mm;
2028*4882a593Smuzhiyun struct rga_internal_buffer *internal_buffer;
2029*4882a593Smuzhiyun
2030*4882a593Smuzhiyun mm = rga_drvdata->mm;
2031*4882a593Smuzhiyun if (mm == NULL) {
2032*4882a593Smuzhiyun pr_err("rga mm is null!\n");
2033*4882a593Smuzhiyun return -EFAULT;
2034*4882a593Smuzhiyun }
2035*4882a593Smuzhiyun
2036*4882a593Smuzhiyun mutex_lock(&mm->lock);
2037*4882a593Smuzhiyun
2038*4882a593Smuzhiyun /* Find the buffer that has been imported */
2039*4882a593Smuzhiyun internal_buffer = rga_mm_lookup_handle(mm, handle);
2040*4882a593Smuzhiyun if (IS_ERR_OR_NULL(internal_buffer)) {
2041*4882a593Smuzhiyun pr_err("This is not a buffer that has been imported, handle = %d\n", (int)handle);
2042*4882a593Smuzhiyun
2043*4882a593Smuzhiyun mutex_unlock(&mm->lock);
2044*4882a593Smuzhiyun return -ENOENT;
2045*4882a593Smuzhiyun }
2046*4882a593Smuzhiyun
2047*4882a593Smuzhiyun if (DEBUGGER_EN(MM)) {
2048*4882a593Smuzhiyun pr_info("release buffer:\n");
2049*4882a593Smuzhiyun rga_mm_dump_buffer(internal_buffer);
2050*4882a593Smuzhiyun }
2051*4882a593Smuzhiyun
2052*4882a593Smuzhiyun kref_put(&internal_buffer->refcount, rga_mm_kref_release_buffer);
2053*4882a593Smuzhiyun
2054*4882a593Smuzhiyun mutex_unlock(&mm->lock);
2055*4882a593Smuzhiyun return 0;
2056*4882a593Smuzhiyun }
2057*4882a593Smuzhiyun
rga_mm_session_release_buffer(struct rga_session * session)2058*4882a593Smuzhiyun int rga_mm_session_release_buffer(struct rga_session *session)
2059*4882a593Smuzhiyun {
2060*4882a593Smuzhiyun int i;
2061*4882a593Smuzhiyun struct rga_mm *mm;
2062*4882a593Smuzhiyun struct rga_internal_buffer *buffer;
2063*4882a593Smuzhiyun
2064*4882a593Smuzhiyun mm = rga_drvdata->mm;
2065*4882a593Smuzhiyun if (mm == NULL) {
2066*4882a593Smuzhiyun pr_err("rga mm is null!\n");
2067*4882a593Smuzhiyun return -EFAULT;
2068*4882a593Smuzhiyun }
2069*4882a593Smuzhiyun
2070*4882a593Smuzhiyun mutex_lock(&mm->lock);
2071*4882a593Smuzhiyun
2072*4882a593Smuzhiyun idr_for_each_entry(&mm->memory_idr, buffer, i) {
2073*4882a593Smuzhiyun if (session == buffer->session) {
2074*4882a593Smuzhiyun pr_err("[tgid:%d] Decrement the reference of handle[%d] when the user exits\n",
2075*4882a593Smuzhiyun session->tgid, buffer->handle);
2076*4882a593Smuzhiyun kref_put(&buffer->refcount, rga_mm_kref_release_buffer);
2077*4882a593Smuzhiyun }
2078*4882a593Smuzhiyun }
2079*4882a593Smuzhiyun
2080*4882a593Smuzhiyun mutex_unlock(&mm->lock);
2081*4882a593Smuzhiyun return 0;
2082*4882a593Smuzhiyun }
2083*4882a593Smuzhiyun
rga_mm_init(struct rga_mm ** mm_session)2084*4882a593Smuzhiyun int rga_mm_init(struct rga_mm **mm_session)
2085*4882a593Smuzhiyun {
2086*4882a593Smuzhiyun struct rga_mm *mm = NULL;
2087*4882a593Smuzhiyun
2088*4882a593Smuzhiyun *mm_session = kzalloc(sizeof(struct rga_mm), GFP_KERNEL);
2089*4882a593Smuzhiyun if (*mm_session == NULL) {
2090*4882a593Smuzhiyun pr_err("can not kzalloc for rga buffer mm_session\n");
2091*4882a593Smuzhiyun return -ENOMEM;
2092*4882a593Smuzhiyun }
2093*4882a593Smuzhiyun
2094*4882a593Smuzhiyun mm = *mm_session;
2095*4882a593Smuzhiyun
2096*4882a593Smuzhiyun mutex_init(&mm->lock);
2097*4882a593Smuzhiyun idr_init_base(&mm->memory_idr, 1);
2098*4882a593Smuzhiyun
2099*4882a593Smuzhiyun return 0;
2100*4882a593Smuzhiyun }
2101*4882a593Smuzhiyun
rga_mm_remove(struct rga_mm ** mm_session)2102*4882a593Smuzhiyun int rga_mm_remove(struct rga_mm **mm_session)
2103*4882a593Smuzhiyun {
2104*4882a593Smuzhiyun struct rga_mm *mm = *mm_session;
2105*4882a593Smuzhiyun
2106*4882a593Smuzhiyun mutex_lock(&mm->lock);
2107*4882a593Smuzhiyun
2108*4882a593Smuzhiyun idr_for_each(&mm->memory_idr, &rga_mm_handle_remove, mm);
2109*4882a593Smuzhiyun idr_destroy(&mm->memory_idr);
2110*4882a593Smuzhiyun
2111*4882a593Smuzhiyun mutex_unlock(&mm->lock);
2112*4882a593Smuzhiyun
2113*4882a593Smuzhiyun kfree(*mm_session);
2114*4882a593Smuzhiyun *mm_session = NULL;
2115*4882a593Smuzhiyun
2116*4882a593Smuzhiyun return 0;
2117*4882a593Smuzhiyun }
2118