xref: /OK3568_Linux_fs/kernel/drivers/video/rockchip/rga/rga_reg_info.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun 
3*4882a593Smuzhiyun //#include <linux/kernel.h>
4*4882a593Smuzhiyun #include <linux/memory.h>
5*4882a593Smuzhiyun #include <linux/kernel.h>
6*4882a593Smuzhiyun #include <linux/init.h>
7*4882a593Smuzhiyun #include <linux/module.h>
8*4882a593Smuzhiyun #include <linux/platform_device.h>
9*4882a593Smuzhiyun #include <linux/sched.h>
10*4882a593Smuzhiyun #include <linux/mutex.h>
11*4882a593Smuzhiyun #include <linux/err.h>
12*4882a593Smuzhiyun #include <linux/clk.h>
13*4882a593Smuzhiyun #include <asm/delay.h>
14*4882a593Smuzhiyun #include <linux/dma-mapping.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <asm/io.h>
17*4882a593Smuzhiyun #include <linux/irq.h>
18*4882a593Smuzhiyun #include <linux/interrupt.h>
19*4882a593Smuzhiyun //#include <mach/io.h>
20*4882a593Smuzhiyun //#include <mach/irqs.h>
21*4882a593Smuzhiyun #include <linux/fs.h>
22*4882a593Smuzhiyun #include <linux/uaccess.h>
23*4882a593Smuzhiyun #include <linux/miscdevice.h>
24*4882a593Smuzhiyun #include <linux/poll.h>
25*4882a593Smuzhiyun #include <linux/delay.h>
26*4882a593Smuzhiyun #include <linux/wait.h>
27*4882a593Smuzhiyun #include <linux/syscalls.h>
28*4882a593Smuzhiyun #include <linux/timer.h>
29*4882a593Smuzhiyun #include <linux/time.h>
30*4882a593Smuzhiyun #include <asm/cacheflush.h>
31*4882a593Smuzhiyun #include <linux/slab.h>
32*4882a593Smuzhiyun #include <linux/fb.h>
33*4882a593Smuzhiyun #include <linux/wakelock.h>
34*4882a593Smuzhiyun #include <linux/version.h>
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #include "rga_reg_info.h"
37*4882a593Smuzhiyun #include "rga_rop.h"
38*4882a593Smuzhiyun #include "rga.h"
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /*************************************************************
42*4882a593Smuzhiyun Func:
43*4882a593Smuzhiyun     RGA_pixel_width_init
44*4882a593Smuzhiyun Description:
45*4882a593Smuzhiyun     select pixel_width form data format
46*4882a593Smuzhiyun Author:
47*4882a593Smuzhiyun     ZhangShengqin
48*4882a593Smuzhiyun Date:
49*4882a593Smuzhiyun     20012-2-2 10:59:25
50*4882a593Smuzhiyun **************************************************************/
51*4882a593Smuzhiyun unsigned char
RGA_pixel_width_init(unsigned int format)52*4882a593Smuzhiyun RGA_pixel_width_init(unsigned int format)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun     unsigned char pixel_width;
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun     pixel_width = 0;
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun     switch(format)
59*4882a593Smuzhiyun     {
60*4882a593Smuzhiyun         /* RGB FORMAT */
61*4882a593Smuzhiyun         case RK_FORMAT_RGBA_8888 :   pixel_width = 4;   break;
62*4882a593Smuzhiyun         case RK_FORMAT_RGBX_8888 :   pixel_width = 4;   break;
63*4882a593Smuzhiyun         case RK_FORMAT_RGB_888   :   pixel_width = 3;   break;
64*4882a593Smuzhiyun         case RK_FORMAT_BGRA_8888 :   pixel_width = 4;   break;
65*4882a593Smuzhiyun         case RK_FORMAT_RGB_565   :   pixel_width = 2;   break;
66*4882a593Smuzhiyun         case RK_FORMAT_RGBA_5551 :   pixel_width = 2;   break;
67*4882a593Smuzhiyun         case RK_FORMAT_RGBA_4444 :   pixel_width = 2;   break;
68*4882a593Smuzhiyun         case RK_FORMAT_BGR_888   :   pixel_width = 3;   break;
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun         /* YUV FORMAT */
71*4882a593Smuzhiyun         case RK_FORMAT_YCbCr_422_SP :   pixel_width = 1;  break;
72*4882a593Smuzhiyun         case RK_FORMAT_YCbCr_422_P  :   pixel_width = 1;  break;
73*4882a593Smuzhiyun         case RK_FORMAT_YCbCr_420_SP :   pixel_width = 1;  break;
74*4882a593Smuzhiyun         case RK_FORMAT_YCbCr_420_P  :   pixel_width = 1;  break;
75*4882a593Smuzhiyun         case RK_FORMAT_YCrCb_422_SP :   pixel_width = 1;  break;
76*4882a593Smuzhiyun         case RK_FORMAT_YCrCb_422_P  :   pixel_width = 1;  break;
77*4882a593Smuzhiyun         case RK_FORMAT_YCrCb_420_SP :   pixel_width = 1;  break;
78*4882a593Smuzhiyun         case RK_FORMAT_YCrCb_420_P :    pixel_width = 1;  break;
79*4882a593Smuzhiyun         //case default :                  pixel_width = 0;  break;
80*4882a593Smuzhiyun     }
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun     return pixel_width;
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun /*************************************************************
86*4882a593Smuzhiyun Func:
87*4882a593Smuzhiyun     dst_ctrl_cal
88*4882a593Smuzhiyun Description:
89*4882a593Smuzhiyun     calculate dst act window position / width / height
90*4882a593Smuzhiyun     and set the tile struct
91*4882a593Smuzhiyun Author:
92*4882a593Smuzhiyun     ZhangShengqin
93*4882a593Smuzhiyun Date:
94*4882a593Smuzhiyun     20012-2-2 10:59:25
95*4882a593Smuzhiyun **************************************************************/
96*4882a593Smuzhiyun static void
dst_ctrl_cal(const struct rga_req * msg,TILE_INFO * tile)97*4882a593Smuzhiyun dst_ctrl_cal(const struct rga_req *msg, TILE_INFO *tile)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun     u32 width   = msg->dst.act_w;
100*4882a593Smuzhiyun     u32 height  = msg->dst.act_h;
101*4882a593Smuzhiyun     s32 xoff    = msg->dst.x_offset;
102*4882a593Smuzhiyun     s32 yoff    = msg->dst.y_offset;
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun     s32 x0, y0, x1, y1, x2, y2;
105*4882a593Smuzhiyun     s32 x00,y00,x10,y10,x20,y20;
106*4882a593Smuzhiyun     s32 xx, xy, yx, yy;
107*4882a593Smuzhiyun     s32 pos[8];
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun     s32 xmax, xmin, ymax, ymin;
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun     s32 sina = msg->sina; /* 16.16 */
112*4882a593Smuzhiyun     s32 cosa = msg->cosa; /* 16.16 */
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun     xmax = xmin = ymax = ymin = 0;
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun     if((msg->rotate_mode == 0)||(msg->rotate_mode == 2)||(msg->rotate_mode == 3))
117*4882a593Smuzhiyun     {
118*4882a593Smuzhiyun         pos[0] = xoff;
119*4882a593Smuzhiyun         pos[1] = yoff;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun         pos[2] = xoff;
122*4882a593Smuzhiyun         pos[3] = yoff + height - 1;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun         pos[4] = xoff + width - 1;
125*4882a593Smuzhiyun         pos[5] = yoff + height - 1;
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun         pos[6] = xoff + width - 1;
128*4882a593Smuzhiyun         pos[7] = yoff;
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun         xmax = MIN(MAX(MAX(MAX(pos[0], pos[2]), pos[4]), pos[6]), msg->clip.xmax);
131*4882a593Smuzhiyun         xmin = MAX(MIN(MIN(MIN(pos[0], pos[2]), pos[4]), pos[6]), msg->clip.xmin);
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun         ymax = MIN(MAX(MAX(MAX(pos[1], pos[3]), pos[5]), pos[7]), msg->clip.ymax);
134*4882a593Smuzhiyun         ymin = MAX(MIN(MIN(MIN(pos[1], pos[3]), pos[5]), pos[7]), msg->clip.ymin);
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun         //printk("xmax = %d, xmin = %d, ymin = %d, ymax = %d\n", xmax, xmin, ymin, ymax);
137*4882a593Smuzhiyun     }
138*4882a593Smuzhiyun     else if(msg->rotate_mode == 1)
139*4882a593Smuzhiyun     {
140*4882a593Smuzhiyun         if((sina == 0) || (cosa == 0))
141*4882a593Smuzhiyun         {
142*4882a593Smuzhiyun             if((sina == 0) && (cosa == -65536))
143*4882a593Smuzhiyun             {
144*4882a593Smuzhiyun                 /* 180 */
145*4882a593Smuzhiyun                 pos[0] = xoff - width + 1;
146*4882a593Smuzhiyun                 pos[1] = yoff - height + 1;
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun                 pos[2] = xoff - width  + 1;
149*4882a593Smuzhiyun                 pos[3] = yoff;
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun                 pos[4] = xoff;
152*4882a593Smuzhiyun                 pos[5] = yoff;
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun                 pos[6] = xoff;
155*4882a593Smuzhiyun                 pos[7] = yoff - height + 1;
156*4882a593Smuzhiyun             }
157*4882a593Smuzhiyun             else if((cosa == 0)&&(sina == 65536))
158*4882a593Smuzhiyun             {
159*4882a593Smuzhiyun                 /* 90 */
160*4882a593Smuzhiyun                 pos[0] = xoff - height + 1;
161*4882a593Smuzhiyun                 pos[1] = yoff;
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun                 pos[2] = xoff - height + 1;
164*4882a593Smuzhiyun                 pos[3] = yoff + width - 1;
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun                 pos[4] = xoff;
167*4882a593Smuzhiyun                 pos[5] = yoff + width - 1;
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun                 pos[6] = xoff;
170*4882a593Smuzhiyun                 pos[7] = yoff;
171*4882a593Smuzhiyun             }
172*4882a593Smuzhiyun             else if((cosa == 0)&&(sina == -65536))
173*4882a593Smuzhiyun             {
174*4882a593Smuzhiyun                 /* 270 */
175*4882a593Smuzhiyun                 pos[0] = xoff;
176*4882a593Smuzhiyun                 pos[1] = yoff - width + 1;
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun                 pos[2] = xoff;
179*4882a593Smuzhiyun                 pos[3] = yoff;
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun                 pos[4] = xoff + height - 1;
182*4882a593Smuzhiyun                 pos[5] = yoff;
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun                 pos[6] = xoff + height - 1;
185*4882a593Smuzhiyun                 pos[7] = yoff - width + 1;
186*4882a593Smuzhiyun             }
187*4882a593Smuzhiyun             else
188*4882a593Smuzhiyun             {
189*4882a593Smuzhiyun                 /* 0 */
190*4882a593Smuzhiyun                 pos[0] = xoff;
191*4882a593Smuzhiyun                 pos[1] = yoff;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun                 pos[2] = xoff;
194*4882a593Smuzhiyun                 pos[3] = yoff + height - 1;
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun                 pos[4] = xoff + width - 1;
197*4882a593Smuzhiyun                 pos[5] = yoff + height - 1;
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun                 pos[6] = xoff + width - 1;
200*4882a593Smuzhiyun                 pos[7] = yoff;
201*4882a593Smuzhiyun             }
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun             xmax = MIN(MAX(MAX(MAX(pos[0], pos[2]), pos[4]), pos[6]), msg->clip.xmax);
204*4882a593Smuzhiyun             xmin = MAX(MIN(MIN(MIN(pos[0], pos[2]), pos[4]), pos[6]), msg->clip.xmin);
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun             ymax = MIN(MAX(MAX(MAX(pos[1], pos[3]), pos[5]), pos[7]), msg->clip.ymax);
207*4882a593Smuzhiyun             ymin = MAX(MIN(MIN(MIN(pos[1], pos[3]), pos[5]), pos[7]), msg->clip.ymin);
208*4882a593Smuzhiyun         }
209*4882a593Smuzhiyun         else
210*4882a593Smuzhiyun         {
211*4882a593Smuzhiyun             xx = msg->cosa;
212*4882a593Smuzhiyun             xy = msg->sina;
213*4882a593Smuzhiyun             yx = xy;
214*4882a593Smuzhiyun             yy = xx;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun             x0 = width + xoff;
217*4882a593Smuzhiyun             y0 = yoff;
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun             x1 = xoff;
220*4882a593Smuzhiyun             y1 = height + yoff;
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun             x2 = width + xoff;
223*4882a593Smuzhiyun             y2 = height + yoff;
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun             pos[0] = xoff;
226*4882a593Smuzhiyun             pos[1] = yoff;
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun             pos[2] = x00 = (((x0 - xoff)*xx - (y0 - yoff)*xy)>>16) + xoff;
229*4882a593Smuzhiyun             pos[3] = y00 = (((x0 - xoff)*yx + (y0 - yoff)*yy)>>16) + yoff;
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun             pos[4] = x10 = (((x1 - xoff)*xx - (y1 - yoff)*xy)>>16) + xoff;
232*4882a593Smuzhiyun             pos[5] = y10 = (((x1 - xoff)*yx + (y1 - yoff)*yy)>>16) + yoff;
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun             pos[6] = x20 = (((x2 - xoff)*xx - (y2 - yoff)*xy)>>16) + xoff;
235*4882a593Smuzhiyun             pos[7] = y20 = (((x2 - xoff)*yx + (y2 - yoff)*yy)>>16) + yoff;
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun             xmax = MAX(MAX(MAX(x00, xoff), x10), x20) + 2;
238*4882a593Smuzhiyun             xmin = MIN(MIN(MIN(x00, xoff), x10), x20) - 1;
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun             ymax = MAX(MAX(MAX(y00, yoff), y10), y20) + 2;
241*4882a593Smuzhiyun             ymin = MIN(MIN(MIN(y00, yoff), y10), y20) - 1;
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun             xmax = MIN(xmax, msg->clip.xmax);
244*4882a593Smuzhiyun             xmin = MAX(xmin, msg->clip.xmin);
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun             ymax = MIN(ymax, msg->clip.ymax);
247*4882a593Smuzhiyun             ymin = MAX(ymin, msg->clip.ymin);
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun             //printk("xmin = %d, xmax = %d, ymin = %d, ymax = %d\n", xmin, xmax, ymin, ymax);
250*4882a593Smuzhiyun         }
251*4882a593Smuzhiyun     }
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun     if ((xmax < xmin) || (ymax < ymin)) {
254*4882a593Smuzhiyun         xmin = xmax;
255*4882a593Smuzhiyun         ymin = ymax;
256*4882a593Smuzhiyun     }
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun     if ((xmin >= msg->dst.vir_w)||(xmax < 0)||(ymin >= msg->dst.vir_h)||(ymax < 0)) {
259*4882a593Smuzhiyun         xmin = xmax = ymin = ymax = 0;
260*4882a593Smuzhiyun     }
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun     //printk("xmin = %d, xmax = %d, ymin = %d, ymax = %d\n", xmin, xmax, ymin, ymax);
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun     tile->dst_ctrl.w = (xmax - xmin);
265*4882a593Smuzhiyun     tile->dst_ctrl.h = (ymax - ymin);
266*4882a593Smuzhiyun     tile->dst_ctrl.x_off = xmin;
267*4882a593Smuzhiyun     tile->dst_ctrl.y_off = ymin;
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun     //printk("tile->dst_ctrl.w = %x, tile->dst_ctrl.h = %x\n", tile->dst_ctrl.w, tile->dst_ctrl.h);
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun     tile->tile_x_num = (xmax - xmin + 1 + 7)>>3;
272*4882a593Smuzhiyun     tile->tile_y_num = (ymax - ymin + 1 + 7)>>3;
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun     tile->dst_x_tmp = xmin - msg->dst.x_offset;
275*4882a593Smuzhiyun     tile->dst_y_tmp = ymin - msg->dst.y_offset;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun /*************************************************************
279*4882a593Smuzhiyun Func:
280*4882a593Smuzhiyun     src_tile_info_cal
281*4882a593Smuzhiyun Description:
282*4882a593Smuzhiyun     calculate src remap window position / width / height
283*4882a593Smuzhiyun     and set the tile struct
284*4882a593Smuzhiyun Author:
285*4882a593Smuzhiyun     ZhangShengqin
286*4882a593Smuzhiyun Date:
287*4882a593Smuzhiyun     20012-2-2 10:59:25
288*4882a593Smuzhiyun **************************************************************/
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun static void
src_tile_info_cal(const struct rga_req * msg,TILE_INFO * tile)291*4882a593Smuzhiyun src_tile_info_cal(const struct rga_req *msg, TILE_INFO *tile)
292*4882a593Smuzhiyun {
293*4882a593Smuzhiyun     s32 x0, x1, x2, x3, y0, y1, y2, y3;
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun     int64_t xx, xy, yx, yy;
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun     int64_t pos[8];
298*4882a593Smuzhiyun     int64_t epos[8];
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun     int64_t x_dx, x_dy, y_dx, y_dy;
301*4882a593Smuzhiyun     int64_t x_temp_start, y_temp_start;
302*4882a593Smuzhiyun     int64_t xmax, xmin, ymax, ymin;
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun     int64_t t_xoff, t_yoff;
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun     xx = tile->matrix[0]; /* 32.32 */
307*4882a593Smuzhiyun     xy = tile->matrix[1]; /* 32.32 */
308*4882a593Smuzhiyun     yx = tile->matrix[2]; /* 32.32 */
309*4882a593Smuzhiyun     yy = tile->matrix[3]; /* 32.32 */
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun     if(msg->rotate_mode == 1)
312*4882a593Smuzhiyun     {
313*4882a593Smuzhiyun         x0 = tile->dst_x_tmp;
314*4882a593Smuzhiyun         y0 = tile->dst_y_tmp;
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun         x1 = x0;
317*4882a593Smuzhiyun         y1 = y0 + 8;
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun         x2 = x0 + 8;
320*4882a593Smuzhiyun         y2 = y0 + 8;
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun         x3 = x0 + 8;
323*4882a593Smuzhiyun         y3 = y0;
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun         pos[0] = (x0*xx + y0*yx);
326*4882a593Smuzhiyun         pos[1] = (x0*xy + y0*yy);
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun         pos[2] = (x1*xx + y1*yx);
329*4882a593Smuzhiyun         pos[3] = (x1*xy + y1*yy);
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun         pos[4] = (x2*xx + y2*yx);
332*4882a593Smuzhiyun         pos[5] = (x2*xy + y2*yy);
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun         pos[6] = (x3*xx + y3*yx);
335*4882a593Smuzhiyun         pos[7] = (x3*xy + y3*yy);
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun         y1 = y0 + 7;
338*4882a593Smuzhiyun         x2 = x0 + 7;
339*4882a593Smuzhiyun         y2 = y0 + 7;
340*4882a593Smuzhiyun         x3 = x0 + 7;
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun         epos[0] = pos[0];
343*4882a593Smuzhiyun         epos[1] = pos[1];
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun         epos[2] = (x1*xx + y1*yx);
346*4882a593Smuzhiyun         epos[3] = (x1*xy + y1*yy);
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun         epos[4] = (x2*xx + y2*yx);
349*4882a593Smuzhiyun         epos[5] = (x2*xy + y2*yy);
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun         epos[6] = (x3*xx + y3*yx);
352*4882a593Smuzhiyun         epos[7] = (x3*xy + y3*yy);
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun         x_dx = pos[6] - pos[0];
355*4882a593Smuzhiyun         x_dy = pos[7] - pos[1];
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun         y_dx = pos[2] - pos[0];
358*4882a593Smuzhiyun         y_dy = pos[3] - pos[1];
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun         tile->x_dx = (s32)(x_dx >> 22 );
361*4882a593Smuzhiyun         tile->x_dy = (s32)(x_dy >> 22 );
362*4882a593Smuzhiyun         tile->y_dx = (s32)(y_dx >> 22 );
363*4882a593Smuzhiyun         tile->y_dy = (s32)(y_dy >> 22 );
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun         x_temp_start = x0*xx + y0*yx;
366*4882a593Smuzhiyun         y_temp_start = x0*xy + y0*yy;
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun         xmax = (MAX(MAX(MAX(epos[0], epos[2]), epos[4]), epos[6]));
369*4882a593Smuzhiyun         xmin = (MIN(MIN(MIN(epos[0], epos[2]), epos[4]), epos[6]));
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun         ymax = (MAX(MAX(MAX(epos[1], epos[3]), epos[5]), epos[7]));
372*4882a593Smuzhiyun         ymin = (MIN(MIN(MIN(epos[1], epos[3]), epos[5]), epos[7]));
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun         t_xoff = (x_temp_start - xmin)>>18;
375*4882a593Smuzhiyun         t_yoff = (y_temp_start - ymin)>>18;
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun         tile->tile_xoff = (s32)t_xoff;
378*4882a593Smuzhiyun         tile->tile_yoff = (s32)t_yoff;
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun         tile->tile_w = (u16)((xmax - xmin)>>21); //.11
381*4882a593Smuzhiyun         tile->tile_h = (u16)((ymax - ymin)>>21); //.11
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun         tile->tile_start_x_coor = (s16)(xmin>>29); //.3
384*4882a593Smuzhiyun         tile->tile_start_y_coor = (s16)(ymin>>29); //.3
385*4882a593Smuzhiyun     }
386*4882a593Smuzhiyun     else if (msg->rotate_mode == 2)
387*4882a593Smuzhiyun     {
388*4882a593Smuzhiyun         tile->x_dx = (s32)((8*xx)>>22);
389*4882a593Smuzhiyun         tile->x_dy = 0;
390*4882a593Smuzhiyun         tile->y_dx = 0;
391*4882a593Smuzhiyun         tile->y_dy = (s32)((8*yy)>>22);
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun         tile->tile_w = ABS((s32)((7*xx)>>21));
394*4882a593Smuzhiyun         tile->tile_h = ABS((s32)((7*yy)>>21));
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun         tile->tile_xoff = ABS((s32)((7*xx)>>18));
397*4882a593Smuzhiyun         tile->tile_yoff = 0;
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun         tile->tile_start_x_coor = (((msg->src.act_w - 1)<<11) - (tile->tile_w))>>8;
400*4882a593Smuzhiyun         tile->tile_start_y_coor = 0;
401*4882a593Smuzhiyun     }
402*4882a593Smuzhiyun     else if (msg->rotate_mode == 3)
403*4882a593Smuzhiyun     {
404*4882a593Smuzhiyun         tile->x_dx = (s32)((8*xx)>>22);
405*4882a593Smuzhiyun         tile->x_dy = 0;
406*4882a593Smuzhiyun         tile->y_dx = 0;
407*4882a593Smuzhiyun         tile->y_dy = (s32)((8*yy)>>22);
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun         tile->tile_w = ABS((s32)((7*xx)>>21));
410*4882a593Smuzhiyun         tile->tile_h = ABS((s32)((7*yy)>>21));
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun         tile->tile_xoff = 0;
413*4882a593Smuzhiyun         tile->tile_yoff = ABS((s32)((7*yy)>>18));
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun         tile->tile_start_x_coor = 0;
416*4882a593Smuzhiyun         tile->tile_start_y_coor = (((msg->src.act_h - 1)<<11) - (tile->tile_h))>>8;
417*4882a593Smuzhiyun     }
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun     if ((msg->scale_mode == 2)||(msg->alpha_rop_flag >> 7))
420*4882a593Smuzhiyun     {
421*4882a593Smuzhiyun         tile->tile_start_x_coor -= (1<<3);
422*4882a593Smuzhiyun         tile->tile_start_y_coor -= (1<<3);
423*4882a593Smuzhiyun         tile->tile_w += (2 << 11);
424*4882a593Smuzhiyun         tile->tile_h += (2 << 11);
425*4882a593Smuzhiyun         tile->tile_xoff += (1<<14);
426*4882a593Smuzhiyun         tile->tile_yoff += (1<<14);
427*4882a593Smuzhiyun     }
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun /*************************************************************
432*4882a593Smuzhiyun Func:
433*4882a593Smuzhiyun     RGA_set_mode_ctrl
434*4882a593Smuzhiyun Description:
435*4882a593Smuzhiyun     fill mode ctrl reg info
436*4882a593Smuzhiyun Author:
437*4882a593Smuzhiyun     ZhangShengqin
438*4882a593Smuzhiyun Date:
439*4882a593Smuzhiyun     20012-2-2 10:59:25
440*4882a593Smuzhiyun **************************************************************/
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun static void
RGA_set_mode_ctrl(u8 * base,const struct rga_req * msg)443*4882a593Smuzhiyun RGA_set_mode_ctrl(u8 *base, const struct rga_req *msg)
444*4882a593Smuzhiyun {
445*4882a593Smuzhiyun     u32 *bRGA_MODE_CTL;
446*4882a593Smuzhiyun     u32 reg = 0;
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun     u8 src_rgb_pack = 0;
449*4882a593Smuzhiyun     u8 src_format = 0;
450*4882a593Smuzhiyun     u8 src_rb_swp = 0;
451*4882a593Smuzhiyun     u8 src_a_swp = 0;
452*4882a593Smuzhiyun     u8 src_cbcr_swp = 0;
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun     u8 dst_rgb_pack = 0;
455*4882a593Smuzhiyun     u8 dst_format = 0;
456*4882a593Smuzhiyun     u8 dst_rb_swp = 0;
457*4882a593Smuzhiyun     u8 dst_a_swp = 0;
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun     bRGA_MODE_CTL = (u32 *)(base + RGA_MODE_CTRL_OFFSET);
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MODE_CTRL_2D_RENDER_MODE)) | (s_RGA_MODE_CTRL_2D_RENDER_MODE(msg->render_mode)));
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun     /* src info set */
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun     if (msg->render_mode == color_palette_mode || msg->render_mode == update_palette_table_mode)
466*4882a593Smuzhiyun     {
467*4882a593Smuzhiyun         src_format = 0x10 | (msg->palette_mode & 3);
468*4882a593Smuzhiyun     }
469*4882a593Smuzhiyun     else
470*4882a593Smuzhiyun     {
471*4882a593Smuzhiyun         switch (msg->src.format)
472*4882a593Smuzhiyun         {
473*4882a593Smuzhiyun             case RK_FORMAT_RGBA_8888    : src_format = 0x0; break;
474*4882a593Smuzhiyun             case RK_FORMAT_RGBA_4444    : src_format = 0x3; break;
475*4882a593Smuzhiyun             case RK_FORMAT_RGBA_5551    : src_format = 0x2; break;
476*4882a593Smuzhiyun             case RK_FORMAT_BGRA_8888    : src_format = 0x0; src_rb_swp = 0x1; break;
477*4882a593Smuzhiyun             case RK_FORMAT_RGBX_8888    : src_format = 0x0; break;
478*4882a593Smuzhiyun             case RK_FORMAT_RGB_565      : src_format = 0x1; break;
479*4882a593Smuzhiyun             case RK_FORMAT_RGB_888      : src_format = 0x0; src_rgb_pack = 1; break;
480*4882a593Smuzhiyun             case RK_FORMAT_BGR_888      : src_format = 0x0; src_rgb_pack = 1; src_rb_swp = 1; break;
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun             case RK_FORMAT_YCbCr_422_SP : src_format = 0x4; break;
483*4882a593Smuzhiyun             case RK_FORMAT_YCbCr_422_P  : src_format = 0x5; break;
484*4882a593Smuzhiyun             case RK_FORMAT_YCbCr_420_SP : src_format = 0x6; break;
485*4882a593Smuzhiyun             case RK_FORMAT_YCbCr_420_P  : src_format = 0x7; break;
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun             case RK_FORMAT_YCrCb_422_SP : src_format = 0x4; src_cbcr_swp = 1; break;
488*4882a593Smuzhiyun             case RK_FORMAT_YCrCb_422_P  : src_format = 0x5; src_cbcr_swp = 1; break;
489*4882a593Smuzhiyun             case RK_FORMAT_YCrCb_420_SP : src_format = 0x6; src_cbcr_swp = 1; break;
490*4882a593Smuzhiyun             case RK_FORMAT_YCrCb_420_P  : src_format = 0x7; src_cbcr_swp = 1; break;
491*4882a593Smuzhiyun         }
492*4882a593Smuzhiyun     }
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun     src_a_swp = msg->src.alpha_swap & 1;
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MODE_CTRL_SRC_RGB_PACK))      | (s_RGA_MODE_CTRL_SRC_RGB_PACK(src_rgb_pack)));
497*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MODE_CTRL_SRC_FORMAT))        | (s_RGA_MODE_CTRL_SRC_FORMAT(src_format)));
498*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MODE_CTRL_SRC_RB_SWAP))       | (s_RGA_MODE_CTRL_SRC_RB_SWAP(src_rb_swp)));
499*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MODE_CTRL_SRC_ALPHA_SWAP))    | (s_RGA_MODE_CTRL_SRC_ALPHA_SWAP(src_a_swp)));
500*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MODE_CTRL_SRC_UV_SWAP_MODE )) | (s_RGA_MODE_CTRL_SRC_UV_SWAP_MODE (src_cbcr_swp)));
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun     /* YUV2RGB MODE */
504*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MODE_CTRL_YUV2RGB_CON_MODE)) | (s_RGA_MODE_CTRL_YUV2RGB_CON_MODE(msg->yuv2rgb_mode)));
505*4882a593Smuzhiyun 
506*4882a593Smuzhiyun     /* ROTATE MODE */
507*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MODE_CTRL_ROTATE_MODE)) | (s_RGA_MODE_CTRL_ROTATE_MODE(msg->rotate_mode)));
508*4882a593Smuzhiyun 
509*4882a593Smuzhiyun     /* SCALE MODE */
510*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MODE_CTRL_SCALE_MODE)) | (s_RGA_MODE_CTRL_SCALE_MODE(msg->scale_mode)));
511*4882a593Smuzhiyun 
512*4882a593Smuzhiyun     /* COLOR FILL MODE */
513*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MODE_CTRL_PAT_SEL)) | (s_RGA_MODE_CTRL_PAT_SEL(msg->color_fill_mode)));
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun     if ((msg->render_mode == update_palette_table_mode)||(msg->render_mode == update_patten_buff_mode))
517*4882a593Smuzhiyun     {
518*4882a593Smuzhiyun         dst_format = msg->pat.format;
519*4882a593Smuzhiyun     }
520*4882a593Smuzhiyun     else
521*4882a593Smuzhiyun     {
522*4882a593Smuzhiyun         dst_format = (u8)msg->dst.format;
523*4882a593Smuzhiyun     }
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun     /* dst info set */
526*4882a593Smuzhiyun     switch (dst_format)
527*4882a593Smuzhiyun     {
528*4882a593Smuzhiyun         case RK_FORMAT_BGRA_8888 : dst_format = 0x0; dst_rb_swp = 0x1; break;
529*4882a593Smuzhiyun         case RK_FORMAT_RGBA_4444 : dst_format = 0x3; break;
530*4882a593Smuzhiyun         case RK_FORMAT_RGBA_5551 : dst_format = 0x2; break;
531*4882a593Smuzhiyun         case RK_FORMAT_RGBA_8888 : dst_format = 0x0; break;
532*4882a593Smuzhiyun         case RK_FORMAT_RGB_565   : dst_format = 0x1; break;
533*4882a593Smuzhiyun         case RK_FORMAT_RGB_888   : dst_format = 0x0; dst_rgb_pack = 0x1; break;
534*4882a593Smuzhiyun         case RK_FORMAT_BGR_888   : dst_format = 0x0; dst_rgb_pack = 0x1; dst_rb_swp = 1; break;
535*4882a593Smuzhiyun         case RK_FORMAT_RGBX_8888 : dst_format = 0x0; break;
536*4882a593Smuzhiyun     }
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun     dst_a_swp = msg->dst.alpha_swap & 1;
539*4882a593Smuzhiyun 
540*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MODE_CTRL_DST_FORMAT))       | (s_RGA_MODE_CTRL_DST_FORMAT(dst_format)));
541*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MODE_CTRL_DST_RGB_PACK))     | (s_RGA_MODE_CTRL_DST_RGB_PACK(dst_rgb_pack)));
542*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MODE_CTRL_DST_RB_SWAP))      | (s_RGA_MODE_CTRL_DST_RB_SWAP(dst_rb_swp)));
543*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MODE_CTRL_DST_ALPHA_SWAP))   | (s_RGA_MODE_CTRL_DST_ALPHA_SWAP(dst_a_swp)));
544*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MODE_CTRL_LUT_ENDIAN_MODE))  | (s_RGA_MODE_CTRL_LUT_ENDIAN_MODE(msg->endian_mode & 1)));
545*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MODE_CTRL_SRC_TRANS_MODE))   | (s_RGA_MODE_CTRL_SRC_TRANS_MODE(msg->src_trans_mode)));
546*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MODE_CTRL_ZERO_MODE_ENABLE)) | (s_RGA_MODE_CTRL_ZERO_MODE_ENABLE(msg->alpha_rop_mode >> 4)));
547*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MODE_CTRL_DST_ALPHA_ENABLE)) | (s_RGA_MODE_CTRL_DST_ALPHA_ENABLE(msg->alpha_rop_mode >> 5)));
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun     *bRGA_MODE_CTL = reg;
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun 
554*4882a593Smuzhiyun 
555*4882a593Smuzhiyun /*************************************************************
556*4882a593Smuzhiyun Func:
557*4882a593Smuzhiyun     RGA_set_src
558*4882a593Smuzhiyun Description:
559*4882a593Smuzhiyun     fill src relate reg info
560*4882a593Smuzhiyun Author:
561*4882a593Smuzhiyun     ZhangShengqin
562*4882a593Smuzhiyun Date:
563*4882a593Smuzhiyun     20012-2-2 10:59:25
564*4882a593Smuzhiyun **************************************************************/
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun static void
RGA_set_src(u8 * base,const struct rga_req * msg)567*4882a593Smuzhiyun RGA_set_src(u8 *base, const struct rga_req *msg)
568*4882a593Smuzhiyun {
569*4882a593Smuzhiyun     u32 *bRGA_SRC_VIR_INFO;
570*4882a593Smuzhiyun     u32 *bRGA_SRC_ACT_INFO;
571*4882a593Smuzhiyun     u32 *bRGA_SRC_Y_MST;
572*4882a593Smuzhiyun     u32 *bRGA_SRC_CB_MST;
573*4882a593Smuzhiyun     u32 *bRGA_SRC_CR_MST;
574*4882a593Smuzhiyun 
575*4882a593Smuzhiyun     s16 x_off, y_off, stride;
576*4882a593Smuzhiyun     s16 uv_x_off, uv_y_off, uv_stride;
577*4882a593Smuzhiyun     u32 pixel_width;
578*4882a593Smuzhiyun 
579*4882a593Smuzhiyun     uv_x_off = uv_y_off = uv_stride = 0;
580*4882a593Smuzhiyun 
581*4882a593Smuzhiyun     bRGA_SRC_Y_MST = (u32 *)(base + RGA_SRC_Y_MST_OFFSET);
582*4882a593Smuzhiyun     bRGA_SRC_CB_MST = (u32 *)(base + RGA_SRC_CB_MST_OFFSET);
583*4882a593Smuzhiyun     bRGA_SRC_CR_MST = (u32 *)(base + RGA_SRC_CR_MST_OFFSET);
584*4882a593Smuzhiyun     bRGA_SRC_VIR_INFO = (u32 *)(base + RGA_SRC_VIR_INFO_OFFSET);
585*4882a593Smuzhiyun     bRGA_SRC_ACT_INFO = (u32 *)(base + RGA_SRC_ACT_INFO_OFFSET);
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun     x_off  = msg->src.x_offset;
588*4882a593Smuzhiyun     y_off  = msg->src.y_offset;
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun     pixel_width = RGA_pixel_width_init(msg->src.format);
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun     stride = ((msg->src.vir_w * pixel_width) + 3) & (~3);
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun     switch(msg->src.format)
595*4882a593Smuzhiyun     {
596*4882a593Smuzhiyun         case RK_FORMAT_YCbCr_422_SP :
597*4882a593Smuzhiyun             uv_stride = stride;
598*4882a593Smuzhiyun             uv_x_off = x_off;
599*4882a593Smuzhiyun             uv_y_off = y_off;
600*4882a593Smuzhiyun             break;
601*4882a593Smuzhiyun         case RK_FORMAT_YCbCr_422_P  :
602*4882a593Smuzhiyun             uv_stride = stride >> 1;
603*4882a593Smuzhiyun             uv_x_off = x_off >> 1;
604*4882a593Smuzhiyun             uv_y_off = y_off;
605*4882a593Smuzhiyun             break;
606*4882a593Smuzhiyun         case RK_FORMAT_YCbCr_420_SP :
607*4882a593Smuzhiyun             uv_stride = stride;
608*4882a593Smuzhiyun             uv_x_off = x_off;
609*4882a593Smuzhiyun             uv_y_off = y_off >> 1;
610*4882a593Smuzhiyun             break;
611*4882a593Smuzhiyun         case RK_FORMAT_YCbCr_420_P :
612*4882a593Smuzhiyun             uv_stride = stride >> 1;
613*4882a593Smuzhiyun             uv_x_off = x_off >> 1;
614*4882a593Smuzhiyun             uv_y_off = y_off >> 1;
615*4882a593Smuzhiyun             break;
616*4882a593Smuzhiyun         case RK_FORMAT_YCrCb_422_SP :
617*4882a593Smuzhiyun             uv_stride = stride;
618*4882a593Smuzhiyun             uv_x_off = x_off;
619*4882a593Smuzhiyun             uv_y_off = y_off;
620*4882a593Smuzhiyun             break;
621*4882a593Smuzhiyun         case RK_FORMAT_YCrCb_422_P  :
622*4882a593Smuzhiyun             uv_stride = stride >> 1;
623*4882a593Smuzhiyun             uv_x_off = x_off >> 1;
624*4882a593Smuzhiyun             uv_y_off = y_off;
625*4882a593Smuzhiyun             break;
626*4882a593Smuzhiyun         case RK_FORMAT_YCrCb_420_SP :
627*4882a593Smuzhiyun             uv_stride = stride;
628*4882a593Smuzhiyun             uv_x_off = x_off;
629*4882a593Smuzhiyun             uv_y_off = y_off >> 1;
630*4882a593Smuzhiyun             break;
631*4882a593Smuzhiyun         case RK_FORMAT_YCrCb_420_P :
632*4882a593Smuzhiyun             uv_stride = stride >> 1;
633*4882a593Smuzhiyun             uv_x_off = x_off >> 1;
634*4882a593Smuzhiyun             uv_y_off = y_off >> 1;
635*4882a593Smuzhiyun             break;
636*4882a593Smuzhiyun     }
637*4882a593Smuzhiyun 
638*4882a593Smuzhiyun 
639*4882a593Smuzhiyun     /* src addr set */
640*4882a593Smuzhiyun     *bRGA_SRC_Y_MST = msg->src.yrgb_addr + (y_off * stride) + (x_off * pixel_width);
641*4882a593Smuzhiyun     *bRGA_SRC_CB_MST = msg->src.uv_addr + uv_y_off * uv_stride + uv_x_off;
642*4882a593Smuzhiyun     *bRGA_SRC_CR_MST = msg->src.v_addr + uv_y_off * uv_stride + uv_x_off;
643*4882a593Smuzhiyun 
644*4882a593Smuzhiyun     if((msg->alpha_rop_flag >> 1) & 1)
645*4882a593Smuzhiyun         *bRGA_SRC_CB_MST = (u32)msg->rop_mask_addr;
646*4882a593Smuzhiyun 
647*4882a593Smuzhiyun     if (msg->render_mode == color_palette_mode)
648*4882a593Smuzhiyun     {
649*4882a593Smuzhiyun         u8 shift;
650*4882a593Smuzhiyun         u16 sw, byte_num;
651*4882a593Smuzhiyun         shift = 3 - (msg->palette_mode & 3);
652*4882a593Smuzhiyun         sw = msg->src.vir_w;
653*4882a593Smuzhiyun 
654*4882a593Smuzhiyun         byte_num = sw >> shift;
655*4882a593Smuzhiyun         stride = (byte_num + 3) & (~3);
656*4882a593Smuzhiyun     }
657*4882a593Smuzhiyun 
658*4882a593Smuzhiyun     /* src act window / vir window set */
659*4882a593Smuzhiyun     *bRGA_SRC_VIR_INFO = ((stride >> 2) | (msg->src.vir_h)<<16);
660*4882a593Smuzhiyun     *bRGA_SRC_ACT_INFO = ((msg->src.act_w-1) | (msg->src.act_h-1)<<16);
661*4882a593Smuzhiyun }
662*4882a593Smuzhiyun 
663*4882a593Smuzhiyun 
664*4882a593Smuzhiyun /*************************************************************
665*4882a593Smuzhiyun Func:
666*4882a593Smuzhiyun     RGA_set_dst
667*4882a593Smuzhiyun Description:
668*4882a593Smuzhiyun     fill dst relate reg info
669*4882a593Smuzhiyun Author:
670*4882a593Smuzhiyun     ZhangShengqin
671*4882a593Smuzhiyun Date:
672*4882a593Smuzhiyun     20012-2-2 10:59:25
673*4882a593Smuzhiyun **************************************************************/
674*4882a593Smuzhiyun 
RGA_set_dst(u8 * base,const struct rga_req * msg)675*4882a593Smuzhiyun static s32 RGA_set_dst(u8 *base, const struct rga_req *msg)
676*4882a593Smuzhiyun {
677*4882a593Smuzhiyun     u32 *bRGA_DST_MST;
678*4882a593Smuzhiyun     u32 *bRGA_DST_UV_MST;
679*4882a593Smuzhiyun     u32 *bRGA_DST_VIR_INFO;
680*4882a593Smuzhiyun     u32 *bRGA_DST_CTR_INFO;
681*4882a593Smuzhiyun     u32 *bRGA_PRESCL_CB_MST;
682*4882a593Smuzhiyun     u32 *bRGA_PRESCL_CR_MST;
683*4882a593Smuzhiyun     u32 *bRGA_YUV_OUT_CFG;
684*4882a593Smuzhiyun 
685*4882a593Smuzhiyun     u32 reg = 0;
686*4882a593Smuzhiyun 
687*4882a593Smuzhiyun     u8 pw;
688*4882a593Smuzhiyun     s16 x_off = msg->dst.x_offset;
689*4882a593Smuzhiyun     s16 y_off = msg->dst.y_offset;
690*4882a593Smuzhiyun     u16 stride, rop_mask_stride;
691*4882a593Smuzhiyun 
692*4882a593Smuzhiyun     bRGA_DST_MST = (u32 *)(base + RGA_DST_MST_OFFSET);
693*4882a593Smuzhiyun     bRGA_DST_UV_MST = (u32 *)(base + RGA_DST_UV_MST_OFFSET);
694*4882a593Smuzhiyun     bRGA_DST_VIR_INFO = (u32 *)(base + RGA_DST_VIR_INFO_OFFSET);
695*4882a593Smuzhiyun     bRGA_DST_CTR_INFO = (u32 *)(base + RGA_DST_CTR_INFO_OFFSET);
696*4882a593Smuzhiyun     bRGA_PRESCL_CB_MST = (u32 *)(base + RGA_PRESCL_CB_MST_OFFSET);
697*4882a593Smuzhiyun     bRGA_PRESCL_CR_MST = (u32 *)(base + RGA_PRESCL_CR_MST_OFFSET);
698*4882a593Smuzhiyun     bRGA_YUV_OUT_CFG = (u32 *)(base + RGA_YUV_OUT_CFG_OFFSET);
699*4882a593Smuzhiyun 
700*4882a593Smuzhiyun     pw = RGA_pixel_width_init(msg->dst.format);
701*4882a593Smuzhiyun 
702*4882a593Smuzhiyun     stride = (msg->dst.vir_w * pw + 3) & (~3);
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun     *bRGA_DST_MST = (u32)msg->dst.yrgb_addr + (y_off * stride) + (x_off * pw);
705*4882a593Smuzhiyun 
706*4882a593Smuzhiyun     *bRGA_DST_UV_MST = 0;
707*4882a593Smuzhiyun     *bRGA_YUV_OUT_CFG = 0;
708*4882a593Smuzhiyun 	if (msg->rotate_mode == 1) {
709*4882a593Smuzhiyun 		if (msg->sina == 65536 && msg->cosa == 0) {
710*4882a593Smuzhiyun 			/* rotate 90 */
711*4882a593Smuzhiyun 			x_off = msg->dst.x_offset - msg->dst.act_h + 1;
712*4882a593Smuzhiyun 		} else if (msg->sina == 0 && msg->cosa == -65536) {
713*4882a593Smuzhiyun 			/* rotate 180 */
714*4882a593Smuzhiyun 			x_off = msg->dst.x_offset - msg->dst.act_w + 1;
715*4882a593Smuzhiyun 			y_off = msg->dst.y_offset - msg->dst.act_h + 1;
716*4882a593Smuzhiyun 		} else if (msg->sina == -65536 && msg->cosa == 0) {
717*4882a593Smuzhiyun 			/* totate 270 */
718*4882a593Smuzhiyun 			y_off = msg->dst.y_offset - msg->dst.act_w + 1;
719*4882a593Smuzhiyun 		}
720*4882a593Smuzhiyun 	}
721*4882a593Smuzhiyun 
722*4882a593Smuzhiyun     switch(msg->dst.format)
723*4882a593Smuzhiyun     {
724*4882a593Smuzhiyun         case RK_FORMAT_YCbCr_422_SP :
725*4882a593Smuzhiyun             *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off) * stride) + ((x_off) * pw);
726*4882a593Smuzhiyun 			*bRGA_DST_UV_MST = (u32)msg->dst.uv_addr + (y_off * stride) + x_off;
727*4882a593Smuzhiyun 			*bRGA_YUV_OUT_CFG |= (((msg->yuv2rgb_mode >> 2) & 3) << 4) | (0 << 3) | (0 << 1) | 1;
728*4882a593Smuzhiyun             break;
729*4882a593Smuzhiyun         case RK_FORMAT_YCbCr_422_P  :
730*4882a593Smuzhiyun             *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off) * stride) + ((x_off>>1) * pw);
731*4882a593Smuzhiyun             *bRGA_PRESCL_CR_MST = (u32)msg->dst.v_addr  + ((y_off) * stride) + ((x_off>>1) * pw);
732*4882a593Smuzhiyun             break;
733*4882a593Smuzhiyun         case RK_FORMAT_YCbCr_420_SP :
734*4882a593Smuzhiyun             *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + ((x_off) * pw);
735*4882a593Smuzhiyun 			*bRGA_DST_UV_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + x_off;
736*4882a593Smuzhiyun 			*bRGA_YUV_OUT_CFG |= (((msg->yuv2rgb_mode >> 2) & 3) << 4) | (0 << 3) | (1 << 1) | 1;
737*4882a593Smuzhiyun             break;
738*4882a593Smuzhiyun         case RK_FORMAT_YCbCr_420_P :
739*4882a593Smuzhiyun             *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + ((x_off>>1) * pw);
740*4882a593Smuzhiyun             *bRGA_PRESCL_CR_MST = (u32)msg->dst.v_addr  + ((y_off>>1) * stride) + ((x_off>>1) * pw);
741*4882a593Smuzhiyun             break;
742*4882a593Smuzhiyun         case RK_FORMAT_YCrCb_422_SP :
743*4882a593Smuzhiyun             *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off) * stride) + ((x_off) * pw);
744*4882a593Smuzhiyun 			*bRGA_DST_UV_MST = (u32)msg->dst.uv_addr + (y_off * stride) + x_off;
745*4882a593Smuzhiyun 			*bRGA_YUV_OUT_CFG |= (((msg->yuv2rgb_mode >> 2) & 3) << 4) | (1 << 3) | (0 << 1) | 1;
746*4882a593Smuzhiyun             break;
747*4882a593Smuzhiyun         case RK_FORMAT_YCrCb_422_P  :
748*4882a593Smuzhiyun             *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off) * stride) + ((x_off>>1) * pw);
749*4882a593Smuzhiyun             *bRGA_PRESCL_CR_MST = (u32)msg->dst.v_addr  + ((y_off) * stride) + ((x_off>>1) * pw);
750*4882a593Smuzhiyun             break;
751*4882a593Smuzhiyun         case RK_FORMAT_YCrCb_420_SP :
752*4882a593Smuzhiyun             *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + ((x_off) * pw);
753*4882a593Smuzhiyun 			*bRGA_DST_UV_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + x_off;
754*4882a593Smuzhiyun 			*bRGA_YUV_OUT_CFG |= (((msg->yuv2rgb_mode >> 2) & 3) << 4) | (1 << 3) | (1 << 1) | 1;
755*4882a593Smuzhiyun             break;
756*4882a593Smuzhiyun         case RK_FORMAT_YCrCb_420_P :
757*4882a593Smuzhiyun             *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + ((x_off>>1) * pw);
758*4882a593Smuzhiyun             *bRGA_PRESCL_CR_MST = (u32)msg->dst.v_addr  + ((y_off>>1) * stride) + ((x_off>>1) * pw);
759*4882a593Smuzhiyun             break;
760*4882a593Smuzhiyun     }
761*4882a593Smuzhiyun 
762*4882a593Smuzhiyun     rop_mask_stride = (((msg->src.vir_w + 7)>>3) + 3) & (~3);//not dst_vir.w,hxx,2011.7.21
763*4882a593Smuzhiyun 
764*4882a593Smuzhiyun     reg = (stride >> 2) & 0xffff;
765*4882a593Smuzhiyun     reg = reg | ((rop_mask_stride>>2) << 16);
766*4882a593Smuzhiyun 
767*4882a593Smuzhiyun     #if defined(CONFIG_ARCH_RK2928) || defined(CONFIG_ARCH_RK3188)
768*4882a593Smuzhiyun     //reg = reg | ((msg->alpha_rop_mode & 3) << 28);
769*4882a593Smuzhiyun     reg = reg | (1 << 28);
770*4882a593Smuzhiyun     #endif
771*4882a593Smuzhiyun 
772*4882a593Smuzhiyun     if (msg->render_mode == line_point_drawing_mode)
773*4882a593Smuzhiyun     {
774*4882a593Smuzhiyun         reg &= 0xffff;
775*4882a593Smuzhiyun         reg = reg | (msg->dst.vir_h << 16);
776*4882a593Smuzhiyun     }
777*4882a593Smuzhiyun 
778*4882a593Smuzhiyun     *bRGA_DST_VIR_INFO = reg;
779*4882a593Smuzhiyun     *bRGA_DST_CTR_INFO = (msg->dst.act_w - 1) | ((msg->dst.act_h - 1) << 16);
780*4882a593Smuzhiyun #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 1, 0))
781*4882a593Smuzhiyun     if (msg->render_mode == pre_scaling_mode) {
782*4882a593Smuzhiyun         *bRGA_YUV_OUT_CFG &= 0xfffffffe;
783*4882a593Smuzhiyun     }
784*4882a593Smuzhiyun #endif
785*4882a593Smuzhiyun     return 0;
786*4882a593Smuzhiyun }
787*4882a593Smuzhiyun 
788*4882a593Smuzhiyun 
789*4882a593Smuzhiyun /*************************************************************
790*4882a593Smuzhiyun Func:
791*4882a593Smuzhiyun     RGA_set_alpha_rop
792*4882a593Smuzhiyun Description:
793*4882a593Smuzhiyun     fill alpha rop some relate reg bit
794*4882a593Smuzhiyun Author:
795*4882a593Smuzhiyun     ZhangShengqin
796*4882a593Smuzhiyun Date:
797*4882a593Smuzhiyun     20012-2-2 10:59:25
798*4882a593Smuzhiyun **************************************************************/
799*4882a593Smuzhiyun static void
RGA_set_alpha_rop(u8 * base,const struct rga_req * msg)800*4882a593Smuzhiyun RGA_set_alpha_rop(u8 *base, const struct rga_req *msg)
801*4882a593Smuzhiyun {
802*4882a593Smuzhiyun     u32 *bRGA_ALPHA_CON;
803*4882a593Smuzhiyun     u32 *bRGA_ROP_CON0;
804*4882a593Smuzhiyun     u32 *bRGA_ROP_CON1;
805*4882a593Smuzhiyun     u32 reg = 0;
806*4882a593Smuzhiyun     u32 rop_con0, rop_con1;
807*4882a593Smuzhiyun 
808*4882a593Smuzhiyun     u8 rop_mode = (msg->alpha_rop_mode) & 3;
809*4882a593Smuzhiyun     u8 alpha_mode = msg->alpha_rop_mode & 3;
810*4882a593Smuzhiyun 
811*4882a593Smuzhiyun     rop_con0 = rop_con1 = 0;
812*4882a593Smuzhiyun 
813*4882a593Smuzhiyun     bRGA_ALPHA_CON = (u32 *)(base + RGA_ALPHA_CON_OFFSET);
814*4882a593Smuzhiyun 
815*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_ALPHA_CON_ENABLE) )| (s_RGA_ALPHA_CON_ENABLE(msg->alpha_rop_flag & 1)));
816*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_ALPHA_CON_A_OR_R_SEL)) | (s_RGA_ALPHA_CON_A_OR_R_SEL((msg->alpha_rop_flag >> 1) & 1)));
817*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_ALPHA_CON_ALPHA_MODE)) | (s_RGA_ALPHA_CON_ALPHA_MODE(alpha_mode)));
818*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_ALPHA_CON_PD_MODE)) | (s_RGA_ALPHA_CON_PD_MODE(msg->PD_mode)));
819*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_ALPHA_CON_SET_CONSTANT_VALUE)) | (s_RGA_ALPHA_CON_SET_CONSTANT_VALUE(msg->alpha_global_value)));
820*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_ALPHA_CON_PD_M_SEL)) | (s_RGA_ALPHA_CON_PD_M_SEL(msg->alpha_rop_flag >> 3)));
821*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_ALPHA_CON_FADING_ENABLE)) | (s_RGA_ALPHA_CON_FADING_ENABLE(msg->alpha_rop_flag >> 2)));
822*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_ALPHA_CON_ROP_MODE_SEL)) | (s_RGA_ALPHA_CON_ROP_MODE_SEL(rop_mode)));
823*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_ALPHA_CON_CAL_MODE_SEL)) | (s_RGA_ALPHA_CON_CAL_MODE_SEL(msg->alpha_rop_flag >> 4)));
824*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_ALPHA_CON_DITHER_ENABLE)) | (s_RGA_ALPHA_CON_DITHER_ENABLE(msg->alpha_rop_flag >> 5)));
825*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_ALPHA_CON_GRADIENT_CAL_MODE)) | (s_RGA_ALPHA_CON_GRADIENT_CAL_MODE(msg->alpha_rop_flag >> 6)));
826*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_ALPHA_CON_AA_SEL)) | (s_RGA_ALPHA_CON_AA_SEL(msg->alpha_rop_flag >> 7)));
827*4882a593Smuzhiyun 
828*4882a593Smuzhiyun     *bRGA_ALPHA_CON = reg;
829*4882a593Smuzhiyun 
830*4882a593Smuzhiyun     if(rop_mode == 0) {
831*4882a593Smuzhiyun         rop_con0 =  ROP3_code[(msg->rop_code & 0xff)];
832*4882a593Smuzhiyun     }
833*4882a593Smuzhiyun     else if(rop_mode == 1) {
834*4882a593Smuzhiyun         rop_con0 =  ROP3_code[(msg->rop_code & 0xff)];
835*4882a593Smuzhiyun     }
836*4882a593Smuzhiyun     else if(rop_mode == 2) {
837*4882a593Smuzhiyun         rop_con0 =  ROP3_code[(msg->rop_code & 0xff)];
838*4882a593Smuzhiyun         rop_con1 =  ROP3_code[(msg->rop_code & 0xff00)>>8];
839*4882a593Smuzhiyun     }
840*4882a593Smuzhiyun 
841*4882a593Smuzhiyun     bRGA_ROP_CON0 = (u32 *)(base + RGA_ROP_CON0_OFFSET);
842*4882a593Smuzhiyun     bRGA_ROP_CON1 = (u32 *)(base + RGA_ROP_CON1_OFFSET);
843*4882a593Smuzhiyun 
844*4882a593Smuzhiyun     *bRGA_ROP_CON0 = (u32)rop_con0;
845*4882a593Smuzhiyun     *bRGA_ROP_CON1 = (u32)rop_con1;
846*4882a593Smuzhiyun }
847*4882a593Smuzhiyun 
848*4882a593Smuzhiyun 
849*4882a593Smuzhiyun /*************************************************************
850*4882a593Smuzhiyun Func:
851*4882a593Smuzhiyun     RGA_set_color
852*4882a593Smuzhiyun Description:
853*4882a593Smuzhiyun     fill color some relate reg bit
854*4882a593Smuzhiyun     bg_color/fg_color
855*4882a593Smuzhiyun Author:
856*4882a593Smuzhiyun     ZhangShengqin
857*4882a593Smuzhiyun Date:
858*4882a593Smuzhiyun     20012-2-2 10:59:25
859*4882a593Smuzhiyun **************************************************************/
860*4882a593Smuzhiyun 
861*4882a593Smuzhiyun static void
RGA_set_color(u8 * base,const struct rga_req * msg)862*4882a593Smuzhiyun RGA_set_color(u8 *base, const struct rga_req *msg)
863*4882a593Smuzhiyun {
864*4882a593Smuzhiyun     u32 *bRGA_SRC_TR_COLOR0;
865*4882a593Smuzhiyun     u32 *bRGA_SRC_TR_COLOR1;
866*4882a593Smuzhiyun     u32 *bRGA_SRC_BG_COLOR;
867*4882a593Smuzhiyun     u32 *bRGA_SRC_FG_COLOR;
868*4882a593Smuzhiyun 
869*4882a593Smuzhiyun 
870*4882a593Smuzhiyun     bRGA_SRC_BG_COLOR  = (u32 *)(base + RGA_SRC_BG_COLOR_OFFSET);
871*4882a593Smuzhiyun     bRGA_SRC_FG_COLOR  = (u32 *)(base + RGA_SRC_FG_COLOR_OFFSET);
872*4882a593Smuzhiyun 
873*4882a593Smuzhiyun     *bRGA_SRC_BG_COLOR = msg->bg_color;    /* 1bpp 0 */
874*4882a593Smuzhiyun     *bRGA_SRC_FG_COLOR = msg->fg_color;    /* 1bpp 1 */
875*4882a593Smuzhiyun 
876*4882a593Smuzhiyun     bRGA_SRC_TR_COLOR0 = (u32 *)(base + RGA_SRC_TR_COLOR0_OFFSET);
877*4882a593Smuzhiyun     bRGA_SRC_TR_COLOR1 = (u32 *)(base + RGA_SRC_TR_COLOR1_OFFSET);
878*4882a593Smuzhiyun 
879*4882a593Smuzhiyun     *bRGA_SRC_TR_COLOR0 = msg->color_key_min;
880*4882a593Smuzhiyun     *bRGA_SRC_TR_COLOR1 = msg->color_key_max;
881*4882a593Smuzhiyun }
882*4882a593Smuzhiyun 
883*4882a593Smuzhiyun 
884*4882a593Smuzhiyun /*************************************************************
885*4882a593Smuzhiyun Func:
886*4882a593Smuzhiyun     RGA_set_fading
887*4882a593Smuzhiyun Description:
888*4882a593Smuzhiyun     fill fading some relate reg bit
889*4882a593Smuzhiyun Author:
890*4882a593Smuzhiyun     ZhangShengqin
891*4882a593Smuzhiyun Date:
892*4882a593Smuzhiyun     20012-2-2 10:59:25
893*4882a593Smuzhiyun **************************************************************/
894*4882a593Smuzhiyun 
895*4882a593Smuzhiyun static s32
RGA_set_fading(u8 * base,const struct rga_req * msg)896*4882a593Smuzhiyun RGA_set_fading(u8 *base, const struct rga_req *msg)
897*4882a593Smuzhiyun {
898*4882a593Smuzhiyun     u32 *bRGA_FADING_CON;
899*4882a593Smuzhiyun     u8 r, g, b;
900*4882a593Smuzhiyun     u32 reg = 0;
901*4882a593Smuzhiyun 
902*4882a593Smuzhiyun     bRGA_FADING_CON = (u32 *)(base + RGA_FADING_CON_OFFSET);
903*4882a593Smuzhiyun 
904*4882a593Smuzhiyun     b = msg->fading.b;
905*4882a593Smuzhiyun     g = msg->fading.g;
906*4882a593Smuzhiyun     r = msg->fading.r;
907*4882a593Smuzhiyun 
908*4882a593Smuzhiyun     reg = (r<<8) | (g<<16) | (b<<24) | reg;
909*4882a593Smuzhiyun 
910*4882a593Smuzhiyun     *bRGA_FADING_CON = reg;
911*4882a593Smuzhiyun 
912*4882a593Smuzhiyun     return 0;
913*4882a593Smuzhiyun }
914*4882a593Smuzhiyun 
915*4882a593Smuzhiyun 
916*4882a593Smuzhiyun /*************************************************************
917*4882a593Smuzhiyun Func:
918*4882a593Smuzhiyun     RGA_set_pat
919*4882a593Smuzhiyun Description:
920*4882a593Smuzhiyun     fill patten some relate reg bit
921*4882a593Smuzhiyun Author:
922*4882a593Smuzhiyun     ZhangShengqin
923*4882a593Smuzhiyun Date:
924*4882a593Smuzhiyun     20012-2-2 10:59:25
925*4882a593Smuzhiyun **************************************************************/
926*4882a593Smuzhiyun 
927*4882a593Smuzhiyun static s32
RGA_set_pat(u8 * base,const struct rga_req * msg)928*4882a593Smuzhiyun RGA_set_pat(u8 *base, const struct rga_req *msg)
929*4882a593Smuzhiyun {
930*4882a593Smuzhiyun     u32 *bRGA_PAT_CON;
931*4882a593Smuzhiyun     u32 *bRGA_PAT_START_POINT;
932*4882a593Smuzhiyun     u32 reg = 0;
933*4882a593Smuzhiyun 
934*4882a593Smuzhiyun     bRGA_PAT_START_POINT = (u32 *)(base + RGA_PAT_START_POINT_OFFSET);
935*4882a593Smuzhiyun 
936*4882a593Smuzhiyun     bRGA_PAT_CON = (u32 *)(base + RGA_PAT_CON_OFFSET);
937*4882a593Smuzhiyun 
938*4882a593Smuzhiyun     *bRGA_PAT_START_POINT = (msg->pat.act_w * msg->pat.y_offset) + msg->pat.x_offset;
939*4882a593Smuzhiyun 
940*4882a593Smuzhiyun     reg = (msg->pat.act_w - 1) | ((msg->pat.act_h - 1) << 8) | (msg->pat.x_offset << 16) | (msg->pat.y_offset << 24);
941*4882a593Smuzhiyun     *bRGA_PAT_CON = reg;
942*4882a593Smuzhiyun 
943*4882a593Smuzhiyun     return 0;
944*4882a593Smuzhiyun }
945*4882a593Smuzhiyun 
946*4882a593Smuzhiyun 
947*4882a593Smuzhiyun 
948*4882a593Smuzhiyun 
949*4882a593Smuzhiyun /*************************************************************
950*4882a593Smuzhiyun Func:
951*4882a593Smuzhiyun     RGA_set_bitblt_reg_info
952*4882a593Smuzhiyun Description:
953*4882a593Smuzhiyun     fill bitblt mode relate ren info
954*4882a593Smuzhiyun Author:
955*4882a593Smuzhiyun     ZhangShengqin
956*4882a593Smuzhiyun Date:
957*4882a593Smuzhiyun     20012-2-2 10:59:25
958*4882a593Smuzhiyun **************************************************************/
959*4882a593Smuzhiyun 
960*4882a593Smuzhiyun static void
RGA_set_bitblt_reg_info(u8 * base,const struct rga_req * msg,TILE_INFO * tile)961*4882a593Smuzhiyun RGA_set_bitblt_reg_info(u8 *base, const struct rga_req * msg, TILE_INFO *tile)
962*4882a593Smuzhiyun {
963*4882a593Smuzhiyun     u32 *bRGA_SRC_Y_MST;
964*4882a593Smuzhiyun     u32 *bRGA_SRC_CB_MST;
965*4882a593Smuzhiyun     u32 *bRGA_SRC_CR_MST;
966*4882a593Smuzhiyun     u32 *bRGA_SRC_X_PARA;
967*4882a593Smuzhiyun     u32 *bRGA_SRC_Y_PARA;
968*4882a593Smuzhiyun     u32 *bRGA_SRC_TILE_XINFO;
969*4882a593Smuzhiyun     u32 *bRGA_SRC_TILE_YINFO;
970*4882a593Smuzhiyun     u32 *bRGA_SRC_TILE_H_INCR;
971*4882a593Smuzhiyun     u32 *bRGA_SRC_TILE_V_INCR;
972*4882a593Smuzhiyun     u32 *bRGA_SRC_TILE_OFFSETX;
973*4882a593Smuzhiyun     u32 *bRGA_SRC_TILE_OFFSETY;
974*4882a593Smuzhiyun 
975*4882a593Smuzhiyun     u32 *bRGA_DST_MST;
976*4882a593Smuzhiyun     u32 *bRGA_DST_CTR_INFO;
977*4882a593Smuzhiyun 
978*4882a593Smuzhiyun     s32 m0, m1, m2, m3;
979*4882a593Smuzhiyun     s32 pos[8];
980*4882a593Smuzhiyun     //s32 x_dx, x_dy, y_dx, y_dy;
981*4882a593Smuzhiyun     s32 xmin, xmax, ymin, ymax;
982*4882a593Smuzhiyun     s32 xp, yp;
983*4882a593Smuzhiyun     u32 y_addr, u_addr, v_addr;
984*4882a593Smuzhiyun     u32 pixel_width, stride;
985*4882a593Smuzhiyun 
986*4882a593Smuzhiyun     u_addr = v_addr = 0;
987*4882a593Smuzhiyun 
988*4882a593Smuzhiyun     /* src info */
989*4882a593Smuzhiyun 
990*4882a593Smuzhiyun     bRGA_SRC_Y_MST = (u32 *)(base + RGA_SRC_Y_MST_OFFSET);
991*4882a593Smuzhiyun     bRGA_SRC_CB_MST = (u32 *)(base + RGA_SRC_CB_MST_OFFSET);
992*4882a593Smuzhiyun     bRGA_SRC_CR_MST = (u32 *)(base + RGA_SRC_CR_MST_OFFSET);
993*4882a593Smuzhiyun 
994*4882a593Smuzhiyun     bRGA_SRC_X_PARA = (u32 *)(base + RGA_SRC_X_PARA_OFFSET);
995*4882a593Smuzhiyun     bRGA_SRC_Y_PARA = (u32 *)(base + RGA_SRC_Y_PARA_OFFSET);
996*4882a593Smuzhiyun 
997*4882a593Smuzhiyun     bRGA_SRC_TILE_XINFO = (u32 *)(base + RGA_SRC_TILE_XINFO_OFFSET);
998*4882a593Smuzhiyun     bRGA_SRC_TILE_YINFO = (u32 *)(base + RGA_SRC_TILE_YINFO_OFFSET);
999*4882a593Smuzhiyun     bRGA_SRC_TILE_H_INCR = (u32 *)(base + RGA_SRC_TILE_H_INCR_OFFSET);
1000*4882a593Smuzhiyun     bRGA_SRC_TILE_V_INCR = (u32 *)(base + RGA_SRC_TILE_V_INCR_OFFSET);
1001*4882a593Smuzhiyun     bRGA_SRC_TILE_OFFSETX = (u32 *)(base + RGA_SRC_TILE_OFFSETX_OFFSET);
1002*4882a593Smuzhiyun     bRGA_SRC_TILE_OFFSETY = (u32 *)(base + RGA_SRC_TILE_OFFSETY_OFFSET);
1003*4882a593Smuzhiyun 
1004*4882a593Smuzhiyun     bRGA_DST_MST = (u32 *)(base + RGA_DST_MST_OFFSET);
1005*4882a593Smuzhiyun     bRGA_DST_CTR_INFO = (u32 *)(base + RGA_DST_CTR_INFO_OFFSET);
1006*4882a593Smuzhiyun 
1007*4882a593Smuzhiyun     /* Matrix reg fill */
1008*4882a593Smuzhiyun     m0 = (s32)(tile->matrix[0] >> 18);
1009*4882a593Smuzhiyun     m1 = (s32)(tile->matrix[1] >> 18);
1010*4882a593Smuzhiyun     m2 = (s32)(tile->matrix[2] >> 18);
1011*4882a593Smuzhiyun     m3 = (s32)(tile->matrix[3] >> 18);
1012*4882a593Smuzhiyun 
1013*4882a593Smuzhiyun     *bRGA_SRC_X_PARA = (m0 & 0xffff) | (m2 << 16);
1014*4882a593Smuzhiyun     *bRGA_SRC_Y_PARA = (m1 & 0xffff) | (m3 << 16);
1015*4882a593Smuzhiyun 
1016*4882a593Smuzhiyun     /* src tile information setting */
1017*4882a593Smuzhiyun     if(msg->rotate_mode != 0)//add by hxx,2011.7.12,for rtl0707,when line scanning ,do not calc src tile info
1018*4882a593Smuzhiyun     {
1019*4882a593Smuzhiyun         *bRGA_SRC_TILE_XINFO = (tile->tile_start_x_coor & 0xffff) | (tile->tile_w << 16);
1020*4882a593Smuzhiyun         *bRGA_SRC_TILE_YINFO = (tile->tile_start_y_coor & 0xffff) | (tile->tile_h << 16);
1021*4882a593Smuzhiyun 
1022*4882a593Smuzhiyun         *bRGA_SRC_TILE_H_INCR = ((tile->x_dx) & 0xffff) | ((tile->x_dy) << 16);
1023*4882a593Smuzhiyun         *bRGA_SRC_TILE_V_INCR = ((tile->y_dx) & 0xffff) | ((tile->y_dy) << 16);
1024*4882a593Smuzhiyun 
1025*4882a593Smuzhiyun         *bRGA_SRC_TILE_OFFSETX = tile->tile_xoff;
1026*4882a593Smuzhiyun         *bRGA_SRC_TILE_OFFSETY = tile->tile_yoff;
1027*4882a593Smuzhiyun     }
1028*4882a593Smuzhiyun 
1029*4882a593Smuzhiyun     pixel_width = RGA_pixel_width_init(msg->src.format);
1030*4882a593Smuzhiyun 
1031*4882a593Smuzhiyun     stride = ((msg->src.vir_w * pixel_width) + 3) & (~3);
1032*4882a593Smuzhiyun 
1033*4882a593Smuzhiyun     if ((msg->rotate_mode == 1)||(msg->rotate_mode == 2)||(msg->rotate_mode == 3))
1034*4882a593Smuzhiyun     {
1035*4882a593Smuzhiyun         pos[0] = tile->tile_start_x_coor<<8;
1036*4882a593Smuzhiyun         pos[1] = tile->tile_start_y_coor<<8;
1037*4882a593Smuzhiyun 
1038*4882a593Smuzhiyun         pos[2] = pos[0];
1039*4882a593Smuzhiyun         pos[3] = pos[1] + tile->tile_h;
1040*4882a593Smuzhiyun 
1041*4882a593Smuzhiyun         pos[4] = pos[0] + tile->tile_w;
1042*4882a593Smuzhiyun         pos[5] = pos[1] + tile->tile_h;
1043*4882a593Smuzhiyun 
1044*4882a593Smuzhiyun         pos[6] = pos[0] + tile->tile_w;
1045*4882a593Smuzhiyun         pos[7] = pos[1];
1046*4882a593Smuzhiyun 
1047*4882a593Smuzhiyun         pos[0] >>= 11;
1048*4882a593Smuzhiyun         pos[1] >>= 11;
1049*4882a593Smuzhiyun 
1050*4882a593Smuzhiyun         pos[2] >>= 11;
1051*4882a593Smuzhiyun         pos[3] >>= 11;
1052*4882a593Smuzhiyun 
1053*4882a593Smuzhiyun         pos[4] >>= 11;
1054*4882a593Smuzhiyun         pos[5] >>= 11;
1055*4882a593Smuzhiyun 
1056*4882a593Smuzhiyun         pos[6] >>= 11;
1057*4882a593Smuzhiyun         pos[7] >>= 11;
1058*4882a593Smuzhiyun 
1059*4882a593Smuzhiyun         xmax = (MAX(MAX(MAX(pos[0], pos[2]), pos[4]), pos[6]) + 1);
1060*4882a593Smuzhiyun         xmin = (MIN(MIN(MIN(pos[0], pos[2]), pos[4]), pos[6]));
1061*4882a593Smuzhiyun 
1062*4882a593Smuzhiyun         ymax = (MAX(MAX(MAX(pos[1], pos[3]), pos[5]), pos[7]) + 1);
1063*4882a593Smuzhiyun         ymin = (MIN(MIN(MIN(pos[1], pos[3]), pos[5]), pos[7]));
1064*4882a593Smuzhiyun 
1065*4882a593Smuzhiyun         xp = xmin + msg->src.x_offset;
1066*4882a593Smuzhiyun         yp = ymin + msg->src.y_offset;
1067*4882a593Smuzhiyun 
1068*4882a593Smuzhiyun         if (!((xmax < 0)||(xmin > msg->src.act_w - 1)||(ymax < 0)||(ymin > msg->src.act_h - 1)))
1069*4882a593Smuzhiyun         {
1070*4882a593Smuzhiyun             xp = CLIP(xp, msg->src.x_offset, msg->src.x_offset + msg->src.act_w - 1);
1071*4882a593Smuzhiyun             yp = CLIP(yp, msg->src.y_offset, msg->src.y_offset + msg->src.act_h - 1);
1072*4882a593Smuzhiyun         }
1073*4882a593Smuzhiyun 
1074*4882a593Smuzhiyun         switch(msg->src.format)
1075*4882a593Smuzhiyun         {
1076*4882a593Smuzhiyun             case RK_FORMAT_YCbCr_420_P :
1077*4882a593Smuzhiyun                 y_addr = msg->src.yrgb_addr + yp*stride + xp;
1078*4882a593Smuzhiyun                 u_addr = msg->src.uv_addr + (yp>>1)*(stride>>1) + (xp>>1);
1079*4882a593Smuzhiyun                 v_addr = msg->src.v_addr  + (yp>>1)*(stride>>1) + (xp>>1);
1080*4882a593Smuzhiyun                 break;
1081*4882a593Smuzhiyun             case RK_FORMAT_YCbCr_420_SP :
1082*4882a593Smuzhiyun                 y_addr = msg->src.yrgb_addr + yp*stride + xp;
1083*4882a593Smuzhiyun                 u_addr = msg->src.uv_addr + (yp>>1)*stride + ((xp>>1)<<1);
1084*4882a593Smuzhiyun                 break;
1085*4882a593Smuzhiyun             case RK_FORMAT_YCbCr_422_P :
1086*4882a593Smuzhiyun                 y_addr = msg->src.yrgb_addr + yp*stride + xp;
1087*4882a593Smuzhiyun                 u_addr = msg->src.uv_addr + (yp)*(stride>>1) + (xp>>1);
1088*4882a593Smuzhiyun                 v_addr = msg->src.v_addr  + (yp)*(stride>>1) + (xp>>1);
1089*4882a593Smuzhiyun                 break;
1090*4882a593Smuzhiyun             case RK_FORMAT_YCbCr_422_SP:
1091*4882a593Smuzhiyun                 y_addr = msg->src.yrgb_addr + yp*stride + xp;
1092*4882a593Smuzhiyun                 u_addr = msg->src.uv_addr  + yp*stride + ((xp>>1)<<1);
1093*4882a593Smuzhiyun                 break;
1094*4882a593Smuzhiyun             case RK_FORMAT_YCrCb_420_P :
1095*4882a593Smuzhiyun                 y_addr = msg->src.yrgb_addr + yp*stride + xp;
1096*4882a593Smuzhiyun                 u_addr = msg->src.uv_addr + (yp>>1)*(stride>>1) + (xp>>1);
1097*4882a593Smuzhiyun                 v_addr = msg->src.v_addr  + (yp>>1)*(stride>>1) + (xp>>1);
1098*4882a593Smuzhiyun                 break;
1099*4882a593Smuzhiyun             case RK_FORMAT_YCrCb_420_SP :
1100*4882a593Smuzhiyun                 y_addr = msg->src.yrgb_addr + yp*stride + xp;
1101*4882a593Smuzhiyun                 u_addr = msg->src.uv_addr + (yp>>1)*stride + ((xp>>1)<<1);
1102*4882a593Smuzhiyun                 break;
1103*4882a593Smuzhiyun             case RK_FORMAT_YCrCb_422_P :
1104*4882a593Smuzhiyun                 y_addr = msg->src.yrgb_addr + yp*stride + xp;
1105*4882a593Smuzhiyun                 u_addr = msg->src.uv_addr + (yp)*(stride>>1) + (xp>>1);
1106*4882a593Smuzhiyun                 v_addr = msg->src.v_addr  + (yp)*(stride>>1) + (xp>>1);
1107*4882a593Smuzhiyun                 break;
1108*4882a593Smuzhiyun             case RK_FORMAT_YCrCb_422_SP:
1109*4882a593Smuzhiyun                 y_addr = msg->src.yrgb_addr + yp*stride + xp;
1110*4882a593Smuzhiyun                 u_addr = msg->src.uv_addr  + yp*stride + ((xp>>1)<<1);
1111*4882a593Smuzhiyun                 break;
1112*4882a593Smuzhiyun             default :
1113*4882a593Smuzhiyun                 y_addr = msg->src.yrgb_addr + yp*stride + xp*pixel_width;
1114*4882a593Smuzhiyun                 break;
1115*4882a593Smuzhiyun         }
1116*4882a593Smuzhiyun 
1117*4882a593Smuzhiyun         *bRGA_SRC_Y_MST = y_addr;
1118*4882a593Smuzhiyun         *bRGA_SRC_CB_MST = u_addr;
1119*4882a593Smuzhiyun         *bRGA_SRC_CR_MST = v_addr;
1120*4882a593Smuzhiyun     }
1121*4882a593Smuzhiyun 
1122*4882a593Smuzhiyun     /*dst info*/
1123*4882a593Smuzhiyun     pixel_width = RGA_pixel_width_init(msg->dst.format);
1124*4882a593Smuzhiyun     stride = (msg->dst.vir_w * pixel_width + 3) & (~3);
1125*4882a593Smuzhiyun     *bRGA_DST_MST = (u32)msg->dst.yrgb_addr + (tile->dst_ctrl.y_off * stride) + (tile->dst_ctrl.x_off * pixel_width);
1126*4882a593Smuzhiyun     *bRGA_DST_CTR_INFO = (tile->dst_ctrl.w) | ((tile->dst_ctrl.h) << 16);
1127*4882a593Smuzhiyun 
1128*4882a593Smuzhiyun     *bRGA_DST_CTR_INFO |= ((1<<29) | (1<<28));
1129*4882a593Smuzhiyun }
1130*4882a593Smuzhiyun 
1131*4882a593Smuzhiyun 
1132*4882a593Smuzhiyun 
1133*4882a593Smuzhiyun 
1134*4882a593Smuzhiyun /*************************************************************
1135*4882a593Smuzhiyun Func:
1136*4882a593Smuzhiyun     RGA_set_color_palette_reg_info
1137*4882a593Smuzhiyun Description:
1138*4882a593Smuzhiyun     fill color palette process some relate reg bit
1139*4882a593Smuzhiyun Author:
1140*4882a593Smuzhiyun     ZhangShengqin
1141*4882a593Smuzhiyun Date:
1142*4882a593Smuzhiyun     20012-2-2 10:59:25
1143*4882a593Smuzhiyun **************************************************************/
1144*4882a593Smuzhiyun 
1145*4882a593Smuzhiyun static void
RGA_set_color_palette_reg_info(u8 * base,const struct rga_req * msg)1146*4882a593Smuzhiyun RGA_set_color_palette_reg_info(u8 *base, const struct rga_req *msg)
1147*4882a593Smuzhiyun {
1148*4882a593Smuzhiyun     u32 *bRGA_SRC_Y_MST;
1149*4882a593Smuzhiyun     u32 p;
1150*4882a593Smuzhiyun     s16 x_off, y_off;
1151*4882a593Smuzhiyun     u16 src_stride;
1152*4882a593Smuzhiyun     u8  shift;
1153*4882a593Smuzhiyun     u16 sw, byte_num;
1154*4882a593Smuzhiyun 
1155*4882a593Smuzhiyun     x_off = msg->src.x_offset;
1156*4882a593Smuzhiyun     y_off = msg->src.y_offset;
1157*4882a593Smuzhiyun 
1158*4882a593Smuzhiyun     sw = msg->src.vir_w;
1159*4882a593Smuzhiyun     shift = 3 - (msg->palette_mode & 3);
1160*4882a593Smuzhiyun     byte_num = sw >> shift;
1161*4882a593Smuzhiyun     src_stride = (byte_num + 3) & (~3);
1162*4882a593Smuzhiyun 
1163*4882a593Smuzhiyun     p = msg->src.yrgb_addr;
1164*4882a593Smuzhiyun     p = p + (x_off>>shift) + y_off*src_stride;
1165*4882a593Smuzhiyun 
1166*4882a593Smuzhiyun     bRGA_SRC_Y_MST = (u32 *)(base + RGA_SRC_Y_MST_OFFSET);
1167*4882a593Smuzhiyun     *bRGA_SRC_Y_MST = (u32)p;
1168*4882a593Smuzhiyun }
1169*4882a593Smuzhiyun 
1170*4882a593Smuzhiyun 
1171*4882a593Smuzhiyun /*************************************************************
1172*4882a593Smuzhiyun Func:
1173*4882a593Smuzhiyun     RGA_set_color_fill_reg_info
1174*4882a593Smuzhiyun Description:
1175*4882a593Smuzhiyun     fill color fill process some relate reg bit
1176*4882a593Smuzhiyun Author:
1177*4882a593Smuzhiyun     ZhangShengqin
1178*4882a593Smuzhiyun Date:
1179*4882a593Smuzhiyun     20012-2-2 10:59:25
1180*4882a593Smuzhiyun **************************************************************/
1181*4882a593Smuzhiyun static void
RGA_set_color_fill_reg_info(u8 * base,const struct rga_req * msg)1182*4882a593Smuzhiyun RGA_set_color_fill_reg_info(u8 *base, const struct rga_req *msg)
1183*4882a593Smuzhiyun {
1184*4882a593Smuzhiyun 
1185*4882a593Smuzhiyun     u32 *bRGA_CP_GR_A;
1186*4882a593Smuzhiyun     u32 *bRGA_CP_GR_B;
1187*4882a593Smuzhiyun     u32 *bRGA_CP_GR_G;
1188*4882a593Smuzhiyun     u32 *bRGA_CP_GR_R;
1189*4882a593Smuzhiyun 
1190*4882a593Smuzhiyun     u32 *bRGA_PAT_CON;
1191*4882a593Smuzhiyun 
1192*4882a593Smuzhiyun     bRGA_CP_GR_A = (u32 *)(base + RGA_CP_GR_A_OFFSET);
1193*4882a593Smuzhiyun     bRGA_CP_GR_B = (u32 *)(base + RGA_CP_GR_B_OFFSET);
1194*4882a593Smuzhiyun     bRGA_CP_GR_G = (u32 *)(base + RGA_CP_GR_G_OFFSET);
1195*4882a593Smuzhiyun     bRGA_CP_GR_R = (u32 *)(base + RGA_CP_GR_R_OFFSET);
1196*4882a593Smuzhiyun 
1197*4882a593Smuzhiyun     bRGA_PAT_CON = (u32 *)(base + RGA_PAT_CON_OFFSET);
1198*4882a593Smuzhiyun 
1199*4882a593Smuzhiyun     *bRGA_CP_GR_A = (msg->gr_color.gr_x_a & 0xffff) | (msg->gr_color.gr_y_a << 16);
1200*4882a593Smuzhiyun     *bRGA_CP_GR_B = (msg->gr_color.gr_x_b & 0xffff) | (msg->gr_color.gr_y_b << 16);
1201*4882a593Smuzhiyun     *bRGA_CP_GR_G = (msg->gr_color.gr_x_g & 0xffff) | (msg->gr_color.gr_y_g << 16);
1202*4882a593Smuzhiyun     *bRGA_CP_GR_R = (msg->gr_color.gr_x_r & 0xffff) | (msg->gr_color.gr_y_r << 16);
1203*4882a593Smuzhiyun 
1204*4882a593Smuzhiyun     *bRGA_PAT_CON = (msg->pat.vir_w-1) | ((msg->pat.vir_h-1) << 8) | (msg->pat.x_offset << 16) | (msg->pat.y_offset << 24);
1205*4882a593Smuzhiyun 
1206*4882a593Smuzhiyun }
1207*4882a593Smuzhiyun 
1208*4882a593Smuzhiyun 
1209*4882a593Smuzhiyun /*************************************************************
1210*4882a593Smuzhiyun Func:
1211*4882a593Smuzhiyun     RGA_set_line_drawing_reg_info
1212*4882a593Smuzhiyun Description:
1213*4882a593Smuzhiyun     fill line drawing process some relate reg bit
1214*4882a593Smuzhiyun Author:
1215*4882a593Smuzhiyun     ZhangShengqin
1216*4882a593Smuzhiyun Date:
1217*4882a593Smuzhiyun     20012-2-2 10:59:25
1218*4882a593Smuzhiyun **************************************************************/
1219*4882a593Smuzhiyun 
RGA_set_line_drawing_reg_info(u8 * base,const struct rga_req * msg)1220*4882a593Smuzhiyun static s32 RGA_set_line_drawing_reg_info(u8 *base, const struct rga_req *msg)
1221*4882a593Smuzhiyun {
1222*4882a593Smuzhiyun     u32 *bRGA_LINE_DRAW;
1223*4882a593Smuzhiyun     u32 *bRGA_DST_VIR_INFO;
1224*4882a593Smuzhiyun     u32 *bRGA_LINE_DRAW_XY_INFO;
1225*4882a593Smuzhiyun     u32 *bRGA_LINE_DRAW_WIDTH;
1226*4882a593Smuzhiyun     u32 *bRGA_LINE_DRAWING_COLOR;
1227*4882a593Smuzhiyun     u32 *bRGA_LINE_DRAWING_MST;
1228*4882a593Smuzhiyun 
1229*4882a593Smuzhiyun     u32  reg = 0;
1230*4882a593Smuzhiyun 
1231*4882a593Smuzhiyun     s16 x_width, y_width;
1232*4882a593Smuzhiyun     u16 abs_x, abs_y, delta;
1233*4882a593Smuzhiyun     u16 stride;
1234*4882a593Smuzhiyun     u8 pw;
1235*4882a593Smuzhiyun     u32 start_addr;
1236*4882a593Smuzhiyun     u8 line_dir, dir_major, dir_semi_major;
1237*4882a593Smuzhiyun     u16 major_width;
1238*4882a593Smuzhiyun 
1239*4882a593Smuzhiyun     bRGA_LINE_DRAW = (u32 *)(base + RGA_LINE_DRAW_OFFSET);
1240*4882a593Smuzhiyun     bRGA_DST_VIR_INFO = (u32 *)(base + RGA_DST_VIR_INFO_OFFSET);
1241*4882a593Smuzhiyun     bRGA_LINE_DRAW_XY_INFO = (u32 *)(base + RGA_LINE_DRAW_XY_INFO_OFFSET);
1242*4882a593Smuzhiyun     bRGA_LINE_DRAW_WIDTH = (u32 *)(base + RGA_LINE_DRAWING_WIDTH_OFFSET);
1243*4882a593Smuzhiyun     bRGA_LINE_DRAWING_COLOR = (u32 *)(base + RGA_LINE_DRAWING_COLOR_OFFSET);
1244*4882a593Smuzhiyun     bRGA_LINE_DRAWING_MST = (u32 *)(base + RGA_LINE_DRAWING_MST_OFFSET);
1245*4882a593Smuzhiyun 
1246*4882a593Smuzhiyun     pw = RGA_pixel_width_init(msg->dst.format);
1247*4882a593Smuzhiyun 
1248*4882a593Smuzhiyun     stride = (msg->dst.vir_w * pw + 3) & (~3);
1249*4882a593Smuzhiyun 
1250*4882a593Smuzhiyun     start_addr = msg->dst.yrgb_addr
1251*4882a593Smuzhiyun                 + (msg->line_draw_info.start_point.y * stride)
1252*4882a593Smuzhiyun                 + (msg->line_draw_info.start_point.x * pw);
1253*4882a593Smuzhiyun 
1254*4882a593Smuzhiyun     x_width = msg->line_draw_info.start_point.x - msg->line_draw_info.end_point.x;
1255*4882a593Smuzhiyun     y_width = msg->line_draw_info.start_point.y - msg->line_draw_info.end_point.y;
1256*4882a593Smuzhiyun 
1257*4882a593Smuzhiyun     abs_x = abs(x_width);
1258*4882a593Smuzhiyun     abs_y = abs(y_width);
1259*4882a593Smuzhiyun 
1260*4882a593Smuzhiyun     if (abs_x >= abs_y)
1261*4882a593Smuzhiyun     {
1262*4882a593Smuzhiyun         if (y_width > 0)
1263*4882a593Smuzhiyun             dir_semi_major = 1;
1264*4882a593Smuzhiyun         else
1265*4882a593Smuzhiyun             dir_semi_major = 0;
1266*4882a593Smuzhiyun 
1267*4882a593Smuzhiyun         if (x_width > 0)
1268*4882a593Smuzhiyun             dir_major = 1;
1269*4882a593Smuzhiyun         else
1270*4882a593Smuzhiyun             dir_major = 0;
1271*4882a593Smuzhiyun 
1272*4882a593Smuzhiyun         if((abs_x == 0)||(abs_y == 0))
1273*4882a593Smuzhiyun             delta = 0;
1274*4882a593Smuzhiyun         else
1275*4882a593Smuzhiyun             delta = (abs_y<<12)/abs_x;
1276*4882a593Smuzhiyun 
1277*4882a593Smuzhiyun         if (delta >> 12)
1278*4882a593Smuzhiyun             delta -= 1;
1279*4882a593Smuzhiyun 
1280*4882a593Smuzhiyun         major_width = abs_x;
1281*4882a593Smuzhiyun         line_dir = 0;
1282*4882a593Smuzhiyun     }
1283*4882a593Smuzhiyun     else
1284*4882a593Smuzhiyun     {
1285*4882a593Smuzhiyun         if (x_width > 0)
1286*4882a593Smuzhiyun             dir_semi_major = 1;
1287*4882a593Smuzhiyun         else
1288*4882a593Smuzhiyun             dir_semi_major = 0;
1289*4882a593Smuzhiyun 
1290*4882a593Smuzhiyun         if (y_width > 0)
1291*4882a593Smuzhiyun             dir_major = 1;
1292*4882a593Smuzhiyun         else
1293*4882a593Smuzhiyun             dir_major = 0;
1294*4882a593Smuzhiyun 
1295*4882a593Smuzhiyun         delta = (abs_x<<12)/abs_y;
1296*4882a593Smuzhiyun         major_width = abs_y;
1297*4882a593Smuzhiyun         line_dir = 1;
1298*4882a593Smuzhiyun     }
1299*4882a593Smuzhiyun 
1300*4882a593Smuzhiyun     reg = (reg & (~m_RGA_LINE_DRAW_MAJOR_WIDTH))     | (s_RGA_LINE_DRAW_MAJOR_WIDTH(major_width));
1301*4882a593Smuzhiyun     reg = (reg & (~m_RGA_LINE_DRAW_LINE_DIRECTION))  | (s_RGA_LINE_DRAW_LINE_DIRECTION(line_dir));
1302*4882a593Smuzhiyun     reg = (reg & (~m_RGA_LINE_DRAW_LINE_WIDTH))      | (s_RGA_LINE_DRAW_LINE_WIDTH(msg->line_draw_info.line_width - 1));
1303*4882a593Smuzhiyun     reg = (reg & (~m_RGA_LINE_DRAW_INCR_VALUE))      | (s_RGA_LINE_DRAW_INCR_VALUE(delta));
1304*4882a593Smuzhiyun     reg = (reg & (~m_RGA_LINE_DRAW_DIR_SEMI_MAJOR))  | (s_RGA_LINE_DRAW_DIR_SEMI_MAJOR(dir_semi_major));
1305*4882a593Smuzhiyun     reg = (reg & (~m_RGA_LINE_DRAW_DIR_MAJOR))       | (s_RGA_LINE_DRAW_DIR_MAJOR(dir_major));
1306*4882a593Smuzhiyun     reg = (reg & (~m_RGA_LINE_DRAW_LAST_POINT))      | (s_RGA_LINE_DRAW_LAST_POINT(msg->line_draw_info.flag >> 1));
1307*4882a593Smuzhiyun     reg = (reg & (~m_RGA_LINE_DRAW_ANTI_ALISING))    | (s_RGA_LINE_DRAW_ANTI_ALISING(msg->line_draw_info.flag));
1308*4882a593Smuzhiyun 
1309*4882a593Smuzhiyun     *bRGA_LINE_DRAW = reg;
1310*4882a593Smuzhiyun 
1311*4882a593Smuzhiyun     reg = (msg->line_draw_info.start_point.x & 0xfff) | ((msg->line_draw_info.start_point.y & 0xfff) << 16);
1312*4882a593Smuzhiyun     *bRGA_LINE_DRAW_XY_INFO = reg;
1313*4882a593Smuzhiyun 
1314*4882a593Smuzhiyun     *bRGA_LINE_DRAW_WIDTH = msg->dst.vir_w;
1315*4882a593Smuzhiyun 
1316*4882a593Smuzhiyun     *bRGA_LINE_DRAWING_COLOR = msg->line_draw_info.color;
1317*4882a593Smuzhiyun 
1318*4882a593Smuzhiyun     *bRGA_LINE_DRAWING_MST = (u32)start_addr;
1319*4882a593Smuzhiyun 
1320*4882a593Smuzhiyun     return 0;
1321*4882a593Smuzhiyun }
1322*4882a593Smuzhiyun 
1323*4882a593Smuzhiyun 
1324*4882a593Smuzhiyun /*full*/
1325*4882a593Smuzhiyun static s32
RGA_set_filter_reg_info(u8 * base,const struct rga_req * msg)1326*4882a593Smuzhiyun RGA_set_filter_reg_info(u8 *base, const struct rga_req *msg)
1327*4882a593Smuzhiyun {
1328*4882a593Smuzhiyun     u32 *bRGA_BLUR_SHARP_INFO;
1329*4882a593Smuzhiyun     u32  reg = 0;
1330*4882a593Smuzhiyun 
1331*4882a593Smuzhiyun     bRGA_BLUR_SHARP_INFO = (u32 *)(base + RGA_ALPHA_CON_OFFSET);
1332*4882a593Smuzhiyun 
1333*4882a593Smuzhiyun     reg = *bRGA_BLUR_SHARP_INFO;
1334*4882a593Smuzhiyun 
1335*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_BLUR_SHARP_FILTER_TYPE)) | (s_RGA_BLUR_SHARP_FILTER_TYPE(msg->bsfilter_flag & 3)));
1336*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_BLUR_SHARP_FILTER_MODE)) | (s_RGA_BLUR_SHARP_FILTER_MODE(msg->bsfilter_flag >>2)));
1337*4882a593Smuzhiyun 
1338*4882a593Smuzhiyun     *bRGA_BLUR_SHARP_INFO = reg;
1339*4882a593Smuzhiyun 
1340*4882a593Smuzhiyun     return 0;
1341*4882a593Smuzhiyun }
1342*4882a593Smuzhiyun 
1343*4882a593Smuzhiyun 
1344*4882a593Smuzhiyun /*full*/
1345*4882a593Smuzhiyun static s32
RGA_set_pre_scale_reg_info(u8 * base,const struct rga_req * msg)1346*4882a593Smuzhiyun RGA_set_pre_scale_reg_info(u8 *base, const struct rga_req *msg)
1347*4882a593Smuzhiyun {
1348*4882a593Smuzhiyun    u32 *bRGA_PRE_SCALE_INFO;
1349*4882a593Smuzhiyun    u32 reg = 0;
1350*4882a593Smuzhiyun    u32 h_ratio = 0;
1351*4882a593Smuzhiyun    u32 v_ratio = 0;
1352*4882a593Smuzhiyun    u32 ps_yuv_flag = 0;
1353*4882a593Smuzhiyun    u32 src_width, src_height;
1354*4882a593Smuzhiyun    u32 dst_width, dst_height;
1355*4882a593Smuzhiyun 
1356*4882a593Smuzhiyun    src_width = msg->src.act_w;
1357*4882a593Smuzhiyun    src_height = msg->src.act_h;
1358*4882a593Smuzhiyun 
1359*4882a593Smuzhiyun    dst_width = msg->dst.act_w;
1360*4882a593Smuzhiyun    dst_height = msg->dst.act_h;
1361*4882a593Smuzhiyun 
1362*4882a593Smuzhiyun    if((dst_width == 0) || (dst_height == 0))
1363*4882a593Smuzhiyun    {
1364*4882a593Smuzhiyun         printk("pre scale reg info error ratio is divide zero\n");
1365*4882a593Smuzhiyun         return -EINVAL;
1366*4882a593Smuzhiyun    }
1367*4882a593Smuzhiyun 
1368*4882a593Smuzhiyun    h_ratio = (src_width <<16) / dst_width;
1369*4882a593Smuzhiyun    v_ratio = (src_height<<16) / dst_height;
1370*4882a593Smuzhiyun 
1371*4882a593Smuzhiyun    if (h_ratio <= (1<<16))
1372*4882a593Smuzhiyun        h_ratio = 0;
1373*4882a593Smuzhiyun    else if (h_ratio <= (2<<16))
1374*4882a593Smuzhiyun        h_ratio = 1;
1375*4882a593Smuzhiyun    else if (h_ratio <= (4<<16))
1376*4882a593Smuzhiyun        h_ratio = 2;
1377*4882a593Smuzhiyun    else if (h_ratio <= (8<<16))
1378*4882a593Smuzhiyun        h_ratio = 3;
1379*4882a593Smuzhiyun 
1380*4882a593Smuzhiyun    if (v_ratio <= (1<<16))
1381*4882a593Smuzhiyun        v_ratio = 0;
1382*4882a593Smuzhiyun    else if (v_ratio <= (2<<16))
1383*4882a593Smuzhiyun        v_ratio = 1;
1384*4882a593Smuzhiyun    else if (v_ratio <= (4<<16))
1385*4882a593Smuzhiyun        v_ratio = 2;
1386*4882a593Smuzhiyun    else if (v_ratio <= (8<<16))
1387*4882a593Smuzhiyun        v_ratio = 3;
1388*4882a593Smuzhiyun 
1389*4882a593Smuzhiyun    if(msg->src.format == msg->dst.format)
1390*4882a593Smuzhiyun         ps_yuv_flag = 0;
1391*4882a593Smuzhiyun     else
1392*4882a593Smuzhiyun         ps_yuv_flag = 1;
1393*4882a593Smuzhiyun 
1394*4882a593Smuzhiyun    bRGA_PRE_SCALE_INFO = (u32 *)(base + RGA_ALPHA_CON_OFFSET);
1395*4882a593Smuzhiyun 
1396*4882a593Smuzhiyun    reg = *bRGA_PRE_SCALE_INFO;
1397*4882a593Smuzhiyun    reg = ((reg & (~m_RGA_PRE_SCALE_HOR_RATIO)) | (s_RGA_PRE_SCALE_HOR_RATIO((u8)h_ratio)));
1398*4882a593Smuzhiyun    reg = ((reg & (~m_RGA_PRE_SCALE_VER_RATIO)) | (s_RGA_PRE_SCALE_VER_RATIO((u8)v_ratio)));
1399*4882a593Smuzhiyun    reg = ((reg & (~m_RGA_PRE_SCALE_OUTPUT_FORMAT)) | (s_RGA_PRE_SCALE_OUTPUT_FORMAT(ps_yuv_flag)));
1400*4882a593Smuzhiyun 
1401*4882a593Smuzhiyun    *bRGA_PRE_SCALE_INFO = reg;
1402*4882a593Smuzhiyun 
1403*4882a593Smuzhiyun    return 0;
1404*4882a593Smuzhiyun }
1405*4882a593Smuzhiyun 
1406*4882a593Smuzhiyun 
1407*4882a593Smuzhiyun 
1408*4882a593Smuzhiyun /*full*/
1409*4882a593Smuzhiyun static int
RGA_set_update_palette_table_reg_info(u8 * base,const struct rga_req * msg)1410*4882a593Smuzhiyun RGA_set_update_palette_table_reg_info(u8 *base, const struct rga_req *msg)
1411*4882a593Smuzhiyun {
1412*4882a593Smuzhiyun     u32 *bRGA_LUT_MST;
1413*4882a593Smuzhiyun 
1414*4882a593Smuzhiyun     if (!msg->LUT_addr) {
1415*4882a593Smuzhiyun         return -1;
1416*4882a593Smuzhiyun     }
1417*4882a593Smuzhiyun 
1418*4882a593Smuzhiyun     bRGA_LUT_MST  = (u32 *)(base + RGA_LUT_MST_OFFSET);
1419*4882a593Smuzhiyun 
1420*4882a593Smuzhiyun     *bRGA_LUT_MST = (u32)msg->LUT_addr;
1421*4882a593Smuzhiyun 
1422*4882a593Smuzhiyun     return 0;
1423*4882a593Smuzhiyun }
1424*4882a593Smuzhiyun 
1425*4882a593Smuzhiyun 
1426*4882a593Smuzhiyun 
1427*4882a593Smuzhiyun /*full*/
1428*4882a593Smuzhiyun static int
RGA_set_update_patten_buff_reg_info(u8 * base,const struct rga_req * msg)1429*4882a593Smuzhiyun RGA_set_update_patten_buff_reg_info(u8 *base, const struct rga_req *msg)
1430*4882a593Smuzhiyun {
1431*4882a593Smuzhiyun     u32 *bRGA_PAT_MST;
1432*4882a593Smuzhiyun     u32 *bRGA_PAT_CON;
1433*4882a593Smuzhiyun     u32 *bRGA_PAT_START_POINT;
1434*4882a593Smuzhiyun     u32 reg = 0;
1435*4882a593Smuzhiyun     rga_img_info_t *pat;
1436*4882a593Smuzhiyun 
1437*4882a593Smuzhiyun     pat = (rga_img_info_t *)&msg->pat;
1438*4882a593Smuzhiyun 
1439*4882a593Smuzhiyun     bRGA_PAT_START_POINT = (u32 *)(base + RGA_PAT_START_POINT_OFFSET);
1440*4882a593Smuzhiyun     bRGA_PAT_MST = (u32 *)(base + RGA_PAT_MST_OFFSET);
1441*4882a593Smuzhiyun     bRGA_PAT_CON = (u32 *)(base + RGA_PAT_CON_OFFSET);
1442*4882a593Smuzhiyun 
1443*4882a593Smuzhiyun     if ( !pat->yrgb_addr ) {
1444*4882a593Smuzhiyun         return -1;
1445*4882a593Smuzhiyun     }
1446*4882a593Smuzhiyun     *bRGA_PAT_MST = (u32)pat->yrgb_addr;
1447*4882a593Smuzhiyun 
1448*4882a593Smuzhiyun     if ((pat->vir_w > 256)||(pat->x_offset > 256)||(pat->y_offset > 256)) {
1449*4882a593Smuzhiyun         return -1;
1450*4882a593Smuzhiyun     }
1451*4882a593Smuzhiyun     *bRGA_PAT_START_POINT = (pat->vir_w * pat->y_offset) + pat->x_offset;
1452*4882a593Smuzhiyun 
1453*4882a593Smuzhiyun     reg = (pat->vir_w-1) | ((pat->vir_h-1) << 8) | (pat->x_offset << 16) | (pat->y_offset << 24);
1454*4882a593Smuzhiyun     *bRGA_PAT_CON = reg;
1455*4882a593Smuzhiyun 
1456*4882a593Smuzhiyun     return 0;
1457*4882a593Smuzhiyun }
1458*4882a593Smuzhiyun 
1459*4882a593Smuzhiyun 
1460*4882a593Smuzhiyun /*************************************************************
1461*4882a593Smuzhiyun Func:
1462*4882a593Smuzhiyun     RGA_set_mmu_ctrl_reg_info
1463*4882a593Smuzhiyun Description:
1464*4882a593Smuzhiyun     fill mmu relate some reg info
1465*4882a593Smuzhiyun Author:
1466*4882a593Smuzhiyun     ZhangShengqin
1467*4882a593Smuzhiyun Date:
1468*4882a593Smuzhiyun     20012-2-2 10:59:25
1469*4882a593Smuzhiyun **************************************************************/
1470*4882a593Smuzhiyun 
1471*4882a593Smuzhiyun static s32
RGA_set_mmu_ctrl_reg_info(u8 * base,const struct rga_req * msg)1472*4882a593Smuzhiyun RGA_set_mmu_ctrl_reg_info(u8 *base, const struct rga_req *msg)
1473*4882a593Smuzhiyun {
1474*4882a593Smuzhiyun     u32 *RGA_MMU_TLB, *RGA_MMU_CTRL_ADDR;
1475*4882a593Smuzhiyun     u32  mmu_addr;
1476*4882a593Smuzhiyun     u8   TLB_size, mmu_enable, src_flag, dst_flag, CMD_flag;
1477*4882a593Smuzhiyun     u32  reg = 0;
1478*4882a593Smuzhiyun 
1479*4882a593Smuzhiyun     mmu_addr = (u32)msg->mmu_info.base_addr;
1480*4882a593Smuzhiyun     TLB_size = (msg->mmu_info.mmu_flag >> 4) & 0x3;
1481*4882a593Smuzhiyun     mmu_enable = msg->mmu_info.mmu_flag & 0x1;
1482*4882a593Smuzhiyun 
1483*4882a593Smuzhiyun     src_flag = (msg->mmu_info.mmu_flag >> 1) & 0x1;
1484*4882a593Smuzhiyun     dst_flag = (msg->mmu_info.mmu_flag >> 2) & 0x1;
1485*4882a593Smuzhiyun     CMD_flag = (msg->mmu_info.mmu_flag >> 3) & 0x1;
1486*4882a593Smuzhiyun 
1487*4882a593Smuzhiyun     RGA_MMU_TLB = (u32 *)(base + RGA_MMU_TLB_OFFSET);
1488*4882a593Smuzhiyun     RGA_MMU_CTRL_ADDR = (u32 *)(base + RGA_FADING_CON_OFFSET);
1489*4882a593Smuzhiyun 
1490*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MMU_CTRL_TLB_ADDR)) | s_RGA_MMU_CTRL_TLB_ADDR(mmu_addr));
1491*4882a593Smuzhiyun     *RGA_MMU_TLB = reg;
1492*4882a593Smuzhiyun 
1493*4882a593Smuzhiyun     reg = *RGA_MMU_CTRL_ADDR;
1494*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MMU_CTRL_PAGE_TABLE_SIZE)) | s_RGA_MMU_CTRL_PAGE_TABLE_SIZE(TLB_size));
1495*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MMU_CTRL_MMU_ENABLE)) | s_RGA_MMU_CTRL_MMU_ENABLE(mmu_enable));
1496*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MMU_CTRL_SRC_FLUSH)) | s_RGA_MMU_CTRL_SRC_FLUSH(1));
1497*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MMU_CTRL_DST_FLUSH)) | s_RGA_MMU_CTRL_DST_FLUSH(1));
1498*4882a593Smuzhiyun     reg = ((reg & (~m_RGA_MMU_CTRL_CMD_CHAN_FLUSH)) | s_RGA_MMU_CTRL_CMD_CHAN_FLUSH(1));
1499*4882a593Smuzhiyun     *RGA_MMU_CTRL_ADDR = reg;
1500*4882a593Smuzhiyun 
1501*4882a593Smuzhiyun     return 0;
1502*4882a593Smuzhiyun }
1503*4882a593Smuzhiyun 
1504*4882a593Smuzhiyun 
1505*4882a593Smuzhiyun 
1506*4882a593Smuzhiyun /*************************************************************
1507*4882a593Smuzhiyun Func:
1508*4882a593Smuzhiyun     RGA_gen_reg_info
1509*4882a593Smuzhiyun Description:
1510*4882a593Smuzhiyun     Generate RGA command reg list from rga_req struct.
1511*4882a593Smuzhiyun Author:
1512*4882a593Smuzhiyun     ZhangShengqin
1513*4882a593Smuzhiyun Date:
1514*4882a593Smuzhiyun     20012-2-2 10:59:25
1515*4882a593Smuzhiyun **************************************************************/
1516*4882a593Smuzhiyun int
RGA_gen_reg_info(const struct rga_req * msg,unsigned char * base)1517*4882a593Smuzhiyun RGA_gen_reg_info(const struct rga_req *msg, unsigned char *base)
1518*4882a593Smuzhiyun {
1519*4882a593Smuzhiyun     TILE_INFO tile;
1520*4882a593Smuzhiyun 
1521*4882a593Smuzhiyun     memset(base, 0x0, 28*4);
1522*4882a593Smuzhiyun     RGA_set_mode_ctrl(base, msg);
1523*4882a593Smuzhiyun 
1524*4882a593Smuzhiyun     switch(msg->render_mode)
1525*4882a593Smuzhiyun     {
1526*4882a593Smuzhiyun         case bitblt_mode :
1527*4882a593Smuzhiyun             RGA_set_alpha_rop(base, msg);
1528*4882a593Smuzhiyun             RGA_set_src(base, msg);
1529*4882a593Smuzhiyun             RGA_set_dst(base, msg);
1530*4882a593Smuzhiyun             RGA_set_color(base, msg);
1531*4882a593Smuzhiyun             RGA_set_fading(base, msg);
1532*4882a593Smuzhiyun             RGA_set_pat(base, msg);
1533*4882a593Smuzhiyun             matrix_cal(msg, &tile);
1534*4882a593Smuzhiyun             dst_ctrl_cal(msg, &tile);
1535*4882a593Smuzhiyun             src_tile_info_cal(msg, &tile);
1536*4882a593Smuzhiyun             RGA_set_bitblt_reg_info(base, msg, &tile);
1537*4882a593Smuzhiyun             break;
1538*4882a593Smuzhiyun         case color_palette_mode :
1539*4882a593Smuzhiyun             RGA_set_src(base, msg);
1540*4882a593Smuzhiyun             RGA_set_dst(base, msg);
1541*4882a593Smuzhiyun             RGA_set_color(base, msg);
1542*4882a593Smuzhiyun             RGA_set_color_palette_reg_info(base, msg);
1543*4882a593Smuzhiyun             break;
1544*4882a593Smuzhiyun         case color_fill_mode :
1545*4882a593Smuzhiyun             RGA_set_alpha_rop(base, msg);
1546*4882a593Smuzhiyun             RGA_set_dst(base, msg);
1547*4882a593Smuzhiyun             RGA_set_color(base, msg);
1548*4882a593Smuzhiyun             RGA_set_pat(base, msg);
1549*4882a593Smuzhiyun             RGA_set_color_fill_reg_info(base, msg);
1550*4882a593Smuzhiyun             break;
1551*4882a593Smuzhiyun         case line_point_drawing_mode :
1552*4882a593Smuzhiyun             RGA_set_alpha_rop(base, msg);
1553*4882a593Smuzhiyun             RGA_set_dst(base, msg);
1554*4882a593Smuzhiyun             RGA_set_color(base, msg);
1555*4882a593Smuzhiyun             RGA_set_line_drawing_reg_info(base, msg);
1556*4882a593Smuzhiyun             break;
1557*4882a593Smuzhiyun         case blur_sharp_filter_mode :
1558*4882a593Smuzhiyun             RGA_set_src(base, msg);
1559*4882a593Smuzhiyun             RGA_set_dst(base, msg);
1560*4882a593Smuzhiyun             RGA_set_filter_reg_info(base, msg);
1561*4882a593Smuzhiyun             break;
1562*4882a593Smuzhiyun         case pre_scaling_mode :
1563*4882a593Smuzhiyun             RGA_set_src(base, msg);
1564*4882a593Smuzhiyun             RGA_set_dst(base, msg);
1565*4882a593Smuzhiyun             if(RGA_set_pre_scale_reg_info(base, msg) == -EINVAL)
1566*4882a593Smuzhiyun                 return -1;
1567*4882a593Smuzhiyun             break;
1568*4882a593Smuzhiyun         case update_palette_table_mode :
1569*4882a593Smuzhiyun             if (RGA_set_update_palette_table_reg_info(base, msg)) {
1570*4882a593Smuzhiyun                 return -1;
1571*4882a593Smuzhiyun             }
1572*4882a593Smuzhiyun 			break;
1573*4882a593Smuzhiyun         case update_patten_buff_mode:
1574*4882a593Smuzhiyun             if (RGA_set_update_patten_buff_reg_info(base, msg)){
1575*4882a593Smuzhiyun                 return -1;
1576*4882a593Smuzhiyun             }
1577*4882a593Smuzhiyun 
1578*4882a593Smuzhiyun             break;
1579*4882a593Smuzhiyun     }
1580*4882a593Smuzhiyun 
1581*4882a593Smuzhiyun     RGA_set_mmu_ctrl_reg_info(base, msg);
1582*4882a593Smuzhiyun 
1583*4882a593Smuzhiyun     return 0;
1584*4882a593Smuzhiyun }
1585*4882a593Smuzhiyun 
1586*4882a593Smuzhiyun 
1587*4882a593Smuzhiyun 
1588