1*4882a593Smuzhiyun // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2020 Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * author:
6*4882a593Smuzhiyun * Alpha Lin, alpha.lin@rock-chips.com
7*4882a593Smuzhiyun * Ding Wei, leo.ding@rock-chips.com
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun #include <linux/pm_runtime.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include "mpp_debug.h"
13*4882a593Smuzhiyun #include "mpp_common.h"
14*4882a593Smuzhiyun #include "mpp_iommu.h"
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include "mpp_rkvdec2_link.h"
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include "hack/mpp_rkvdec2_hack_rk3568.c"
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include <linux/devfreq_cooling.h>
21*4882a593Smuzhiyun #include <soc/rockchip/rockchip_ipa.h>
22*4882a593Smuzhiyun #include <soc/rockchip/rockchip_dmc.h>
23*4882a593Smuzhiyun #include <soc/rockchip/rockchip_opp_select.h>
24*4882a593Smuzhiyun #include <soc/rockchip/rockchip_system_monitor.h>
25*4882a593Smuzhiyun #include <soc/rockchip/rockchip_iommu.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #ifdef CONFIG_PM_DEVFREQ
28*4882a593Smuzhiyun #include "../drivers/devfreq/governor.h"
29*4882a593Smuzhiyun #endif
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /*
32*4882a593Smuzhiyun * hardware information
33*4882a593Smuzhiyun */
34*4882a593Smuzhiyun static struct mpp_hw_info rkvdec_v2_hw_info = {
35*4882a593Smuzhiyun .reg_num = RKVDEC_REG_NUM,
36*4882a593Smuzhiyun .reg_id = RKVDEC_REG_HW_ID_INDEX,
37*4882a593Smuzhiyun .reg_start = RKVDEC_REG_START_INDEX,
38*4882a593Smuzhiyun .reg_end = RKVDEC_REG_END_INDEX,
39*4882a593Smuzhiyun .reg_en = RKVDEC_REG_START_EN_INDEX,
40*4882a593Smuzhiyun .link_info = &rkvdec_link_v2_hw_info,
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun static struct mpp_hw_info rkvdec_rk356x_hw_info = {
44*4882a593Smuzhiyun .reg_num = RKVDEC_REG_NUM,
45*4882a593Smuzhiyun .reg_id = RKVDEC_REG_HW_ID_INDEX,
46*4882a593Smuzhiyun .reg_start = RKVDEC_REG_START_INDEX,
47*4882a593Smuzhiyun .reg_end = RKVDEC_REG_END_INDEX,
48*4882a593Smuzhiyun .reg_en = RKVDEC_REG_START_EN_INDEX,
49*4882a593Smuzhiyun .link_info = &rkvdec_link_rk356x_hw_info,
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun static struct mpp_hw_info rkvdec_vdpu382_hw_info = {
53*4882a593Smuzhiyun .reg_num = RKVDEC_REG_NUM,
54*4882a593Smuzhiyun .reg_id = RKVDEC_REG_HW_ID_INDEX,
55*4882a593Smuzhiyun .reg_start = RKVDEC_REG_START_INDEX,
56*4882a593Smuzhiyun .reg_end = RKVDEC_REG_END_INDEX,
57*4882a593Smuzhiyun .reg_en = RKVDEC_REG_START_EN_INDEX,
58*4882a593Smuzhiyun .link_info = &rkvdec_link_vdpu382_hw_info,
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun /*
62*4882a593Smuzhiyun * file handle translate information
63*4882a593Smuzhiyun */
64*4882a593Smuzhiyun static const u16 trans_tbl_h264d[] = {
65*4882a593Smuzhiyun 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142,
66*4882a593Smuzhiyun 161, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176,
67*4882a593Smuzhiyun 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191,
68*4882a593Smuzhiyun 192, 193, 194, 195, 196, 197, 198, 199
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun static const u16 trans_tbl_h265d[] = {
72*4882a593Smuzhiyun 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142,
73*4882a593Smuzhiyun 161, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176,
74*4882a593Smuzhiyun 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191,
75*4882a593Smuzhiyun 192, 193, 194, 195, 196, 197, 198, 199
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun static const u16 trans_tbl_vp9d[] = {
79*4882a593Smuzhiyun 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142,
80*4882a593Smuzhiyun 160, 162, 164, 165, 166, 167, 168, 169, 170, 171, 172, 180, 181, 182, 183,
81*4882a593Smuzhiyun 184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 194, 195, 196, 197, 198, 199
82*4882a593Smuzhiyun };
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun static const u16 trans_tbl_avs2d[] = {
85*4882a593Smuzhiyun 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142,
86*4882a593Smuzhiyun 161, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176,
87*4882a593Smuzhiyun 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191,
88*4882a593Smuzhiyun 192, 193, 194, 195, 196, 197, 198, 199
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun static struct mpp_trans_info rkvdec_v2_trans[] = {
92*4882a593Smuzhiyun [RKVDEC_FMT_H265D] = {
93*4882a593Smuzhiyun .count = ARRAY_SIZE(trans_tbl_h265d),
94*4882a593Smuzhiyun .table = trans_tbl_h265d,
95*4882a593Smuzhiyun },
96*4882a593Smuzhiyun [RKVDEC_FMT_H264D] = {
97*4882a593Smuzhiyun .count = ARRAY_SIZE(trans_tbl_h264d),
98*4882a593Smuzhiyun .table = trans_tbl_h264d,
99*4882a593Smuzhiyun },
100*4882a593Smuzhiyun [RKVDEC_FMT_VP9D] = {
101*4882a593Smuzhiyun .count = ARRAY_SIZE(trans_tbl_vp9d),
102*4882a593Smuzhiyun .table = trans_tbl_vp9d,
103*4882a593Smuzhiyun },
104*4882a593Smuzhiyun [RKVDEC_FMT_AVS2] = {
105*4882a593Smuzhiyun .count = ARRAY_SIZE(trans_tbl_avs2d),
106*4882a593Smuzhiyun .table = trans_tbl_avs2d,
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun
mpp_extract_rcb_info(struct rkvdec2_rcb_info * rcb_inf,struct mpp_request * req)110*4882a593Smuzhiyun static int mpp_extract_rcb_info(struct rkvdec2_rcb_info *rcb_inf,
111*4882a593Smuzhiyun struct mpp_request *req)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun int max_size = ARRAY_SIZE(rcb_inf->elem);
114*4882a593Smuzhiyun int cnt = req->size / sizeof(rcb_inf->elem[0]);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun if (req->size > sizeof(rcb_inf->elem)) {
117*4882a593Smuzhiyun mpp_err("count %d,max_size %d\n", cnt, max_size);
118*4882a593Smuzhiyun return -EINVAL;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun if (copy_from_user(rcb_inf->elem, req->data, req->size)) {
121*4882a593Smuzhiyun mpp_err("copy_from_user failed\n");
122*4882a593Smuzhiyun return -EINVAL;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun rcb_inf->cnt = cnt;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun return 0;
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun
rkvdec2_extract_task_msg(struct mpp_session * session,struct rkvdec2_task * task,struct mpp_task_msgs * msgs)129*4882a593Smuzhiyun static int rkvdec2_extract_task_msg(struct mpp_session *session,
130*4882a593Smuzhiyun struct rkvdec2_task *task,
131*4882a593Smuzhiyun struct mpp_task_msgs *msgs)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun u32 i;
134*4882a593Smuzhiyun int ret;
135*4882a593Smuzhiyun struct mpp_request *req;
136*4882a593Smuzhiyun struct mpp_hw_info *hw_info = task->mpp_task.hw_info;
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun for (i = 0; i < msgs->req_cnt; i++) {
139*4882a593Smuzhiyun u32 off_s, off_e;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun req = &msgs->reqs[i];
142*4882a593Smuzhiyun if (!req->size)
143*4882a593Smuzhiyun continue;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun switch (req->cmd) {
146*4882a593Smuzhiyun case MPP_CMD_SET_REG_WRITE: {
147*4882a593Smuzhiyun off_s = hw_info->reg_start * sizeof(u32);
148*4882a593Smuzhiyun off_e = hw_info->reg_end * sizeof(u32);
149*4882a593Smuzhiyun ret = mpp_check_req(req, 0, sizeof(task->reg), off_s, off_e);
150*4882a593Smuzhiyun if (ret)
151*4882a593Smuzhiyun continue;
152*4882a593Smuzhiyun if (copy_from_user((u8 *)task->reg + req->offset,
153*4882a593Smuzhiyun req->data, req->size)) {
154*4882a593Smuzhiyun mpp_err("copy_from_user reg failed\n");
155*4882a593Smuzhiyun return -EIO;
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun memcpy(&task->w_reqs[task->w_req_cnt++], req, sizeof(*req));
158*4882a593Smuzhiyun } break;
159*4882a593Smuzhiyun case MPP_CMD_SET_REG_READ: {
160*4882a593Smuzhiyun int req_base;
161*4882a593Smuzhiyun int max_size;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun if (req->offset >= RKVDEC_PERF_SEL_OFFSET) {
164*4882a593Smuzhiyun req_base = RKVDEC_PERF_SEL_OFFSET;
165*4882a593Smuzhiyun max_size = sizeof(task->reg_sel);
166*4882a593Smuzhiyun } else {
167*4882a593Smuzhiyun req_base = 0;
168*4882a593Smuzhiyun max_size = sizeof(task->reg);
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun ret = mpp_check_req(req, req_base, max_size, 0, max_size);
172*4882a593Smuzhiyun if (ret)
173*4882a593Smuzhiyun continue;
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun memcpy(&task->r_reqs[task->r_req_cnt++], req, sizeof(*req));
176*4882a593Smuzhiyun } break;
177*4882a593Smuzhiyun case MPP_CMD_SET_REG_ADDR_OFFSET: {
178*4882a593Smuzhiyun mpp_extract_reg_offset_info(&task->off_inf, req);
179*4882a593Smuzhiyun } break;
180*4882a593Smuzhiyun case MPP_CMD_SET_RCB_INFO: {
181*4882a593Smuzhiyun struct rkvdec2_session_priv *priv = session->priv;
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun if (priv)
184*4882a593Smuzhiyun mpp_extract_rcb_info(&priv->rcb_inf, req);
185*4882a593Smuzhiyun } break;
186*4882a593Smuzhiyun default:
187*4882a593Smuzhiyun break;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun mpp_debug(DEBUG_TASK_INFO, "w_req_cnt %d, r_req_cnt %d\n",
191*4882a593Smuzhiyun task->w_req_cnt, task->r_req_cnt);
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun return 0;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
mpp_set_rcbbuf(struct mpp_dev * mpp,struct mpp_session * session,struct mpp_task * task)196*4882a593Smuzhiyun int mpp_set_rcbbuf(struct mpp_dev *mpp, struct mpp_session *session,
197*4882a593Smuzhiyun struct mpp_task *task)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun struct rkvdec2_dev *dec = to_rkvdec2_dev(mpp);
200*4882a593Smuzhiyun struct rkvdec2_session_priv *priv = session->priv;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun mpp_debug_enter();
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun if (priv && dec->rcb_iova) {
205*4882a593Smuzhiyun int i;
206*4882a593Smuzhiyun u32 reg_idx, rcb_size, rcb_offset;
207*4882a593Smuzhiyun struct rkvdec2_rcb_info *rcb_inf = &priv->rcb_inf;
208*4882a593Smuzhiyun u32 width = priv->codec_info[DEC_INFO_WIDTH].val;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun if (width < dec->rcb_min_width)
211*4882a593Smuzhiyun goto done;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun rcb_offset = 0;
214*4882a593Smuzhiyun for (i = 0; i < rcb_inf->cnt; i++) {
215*4882a593Smuzhiyun reg_idx = rcb_inf->elem[i].index;
216*4882a593Smuzhiyun rcb_size = rcb_inf->elem[i].size;
217*4882a593Smuzhiyun if ((rcb_offset + rcb_size) > dec->rcb_size) {
218*4882a593Smuzhiyun mpp_debug(DEBUG_SRAM_INFO,
219*4882a593Smuzhiyun "rcb: reg %d use original buffer\n", reg_idx);
220*4882a593Smuzhiyun continue;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun mpp_debug(DEBUG_SRAM_INFO, "rcb: reg %d offset %d, size %d\n",
223*4882a593Smuzhiyun reg_idx, rcb_offset, rcb_size);
224*4882a593Smuzhiyun task->reg[reg_idx] = dec->rcb_iova + rcb_offset;
225*4882a593Smuzhiyun rcb_offset += rcb_size;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun done:
229*4882a593Smuzhiyun mpp_debug_leave();
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun return 0;
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun
rkvdec2_task_init(struct mpp_dev * mpp,struct mpp_session * session,struct rkvdec2_task * task,struct mpp_task_msgs * msgs)234*4882a593Smuzhiyun int rkvdec2_task_init(struct mpp_dev *mpp, struct mpp_session *session,
235*4882a593Smuzhiyun struct rkvdec2_task *task, struct mpp_task_msgs *msgs)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun int ret;
238*4882a593Smuzhiyun struct mpp_task *mpp_task = &task->mpp_task;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun mpp_debug_enter();
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun mpp_task_init(session, mpp_task);
243*4882a593Smuzhiyun mpp_task->hw_info = mpp->var->hw_info;
244*4882a593Smuzhiyun mpp_task->reg = task->reg;
245*4882a593Smuzhiyun /* extract reqs for current task */
246*4882a593Smuzhiyun ret = rkvdec2_extract_task_msg(session, task, msgs);
247*4882a593Smuzhiyun if (ret)
248*4882a593Smuzhiyun return ret;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun /* process fd in register */
251*4882a593Smuzhiyun if (!(msgs->flags & MPP_FLAGS_REG_FD_NO_TRANS)) {
252*4882a593Smuzhiyun u32 fmt = RKVDEC_GET_FORMAT(task->reg[RKVDEC_REG_FORMAT_INDEX]);
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun ret = mpp_translate_reg_address(session, mpp_task,
255*4882a593Smuzhiyun fmt, task->reg, &task->off_inf);
256*4882a593Smuzhiyun if (ret)
257*4882a593Smuzhiyun goto fail;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun mpp_translate_reg_offset_info(mpp_task, &task->off_inf, task->reg);
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun task->strm_addr = task->reg[RKVDEC_REG_RLC_BASE_INDEX];
263*4882a593Smuzhiyun task->clk_mode = CLK_MODE_NORMAL;
264*4882a593Smuzhiyun task->slot_idx = -1;
265*4882a593Smuzhiyun init_waitqueue_head(&mpp_task->wait);
266*4882a593Smuzhiyun /* get resolution info */
267*4882a593Smuzhiyun if (session->priv) {
268*4882a593Smuzhiyun struct rkvdec2_session_priv *priv = session->priv;
269*4882a593Smuzhiyun u32 width = priv->codec_info[DEC_INFO_WIDTH].val;
270*4882a593Smuzhiyun u32 bitdepth = priv->codec_info[DEC_INFO_BITDEPTH].val;
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun task->width = (bitdepth > 8) ? ((width * bitdepth + 7) >> 3) : width;
273*4882a593Smuzhiyun task->height = priv->codec_info[DEC_INFO_HEIGHT].val;
274*4882a593Smuzhiyun task->pixels = task->width * task->height;
275*4882a593Smuzhiyun mpp_debug(DEBUG_TASK_INFO, "width=%d, bitdepth=%d, height=%d\n",
276*4882a593Smuzhiyun width, bitdepth, task->height);
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun mpp_debug_leave();
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun return 0;
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun fail:
284*4882a593Smuzhiyun mpp_task_dump_mem_region(mpp, mpp_task);
285*4882a593Smuzhiyun mpp_task_dump_reg(mpp, mpp_task);
286*4882a593Smuzhiyun mpp_task_finalize(session, mpp_task);
287*4882a593Smuzhiyun return ret;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun
rkvdec2_alloc_task(struct mpp_session * session,struct mpp_task_msgs * msgs)290*4882a593Smuzhiyun void *rkvdec2_alloc_task(struct mpp_session *session,
291*4882a593Smuzhiyun struct mpp_task_msgs *msgs)
292*4882a593Smuzhiyun {
293*4882a593Smuzhiyun int ret;
294*4882a593Smuzhiyun struct rkvdec2_task *task;
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun task = kzalloc(sizeof(*task), GFP_KERNEL);
297*4882a593Smuzhiyun if (!task)
298*4882a593Smuzhiyun return NULL;
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun ret = rkvdec2_task_init(session->mpp, session, task, msgs);
301*4882a593Smuzhiyun if (ret) {
302*4882a593Smuzhiyun kfree(task);
303*4882a593Smuzhiyun return NULL;
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun mpp_set_rcbbuf(session->mpp, session, &task->mpp_task);
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun return &task->mpp_task;
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun
rkvdec2_rk3568_alloc_task(struct mpp_session * session,struct mpp_task_msgs * msgs)310*4882a593Smuzhiyun static void *rkvdec2_rk3568_alloc_task(struct mpp_session *session,
311*4882a593Smuzhiyun struct mpp_task_msgs *msgs)
312*4882a593Smuzhiyun {
313*4882a593Smuzhiyun u32 fmt;
314*4882a593Smuzhiyun struct mpp_task *mpp_task = NULL;
315*4882a593Smuzhiyun struct rkvdec2_task *task = NULL;
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun mpp_task = rkvdec2_alloc_task(session, msgs);
318*4882a593Smuzhiyun if (!mpp_task)
319*4882a593Smuzhiyun return NULL;
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun task = to_rkvdec2_task(mpp_task);
322*4882a593Smuzhiyun fmt = RKVDEC_GET_FORMAT(task->reg[RKVDEC_REG_FORMAT_INDEX]);
323*4882a593Smuzhiyun /* workaround for rk356x, fix the hw bug of cabac/cavlc switch only in h264d */
324*4882a593Smuzhiyun task->need_hack = (fmt == RKVDEC_FMT_H264D);
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun return mpp_task;
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun
rkvdec2_run(struct mpp_dev * mpp,struct mpp_task * mpp_task)329*4882a593Smuzhiyun static int rkvdec2_run(struct mpp_dev *mpp, struct mpp_task *mpp_task)
330*4882a593Smuzhiyun {
331*4882a593Smuzhiyun struct rkvdec2_task *task = to_rkvdec2_task(mpp_task);
332*4882a593Smuzhiyun u32 timing_en = mpp->srv->timing_en;
333*4882a593Smuzhiyun u32 reg_en = mpp_task->hw_info->reg_en;
334*4882a593Smuzhiyun /* set cache size */
335*4882a593Smuzhiyun u32 reg = RKVDEC_CACHE_PERMIT_CACHEABLE_ACCESS |
336*4882a593Smuzhiyun RKVDEC_CACHE_PERMIT_READ_ALLOCATE;
337*4882a593Smuzhiyun int i;
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun mpp_debug_enter();
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun if (!mpp_debug_unlikely(DEBUG_CACHE_32B))
342*4882a593Smuzhiyun reg |= RKVDEC_CACHE_LINE_SIZE_64_BYTES;
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun mpp_write_relaxed(mpp, RKVDEC_REG_CACHE0_SIZE_BASE, reg);
345*4882a593Smuzhiyun mpp_write_relaxed(mpp, RKVDEC_REG_CACHE1_SIZE_BASE, reg);
346*4882a593Smuzhiyun mpp_write_relaxed(mpp, RKVDEC_REG_CACHE2_SIZE_BASE, reg);
347*4882a593Smuzhiyun /* clear cache */
348*4882a593Smuzhiyun mpp_write_relaxed(mpp, RKVDEC_REG_CLR_CACHE0_BASE, 1);
349*4882a593Smuzhiyun mpp_write_relaxed(mpp, RKVDEC_REG_CLR_CACHE1_BASE, 1);
350*4882a593Smuzhiyun mpp_write_relaxed(mpp, RKVDEC_REG_CLR_CACHE2_BASE, 1);
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun /* set registers for hardware */
353*4882a593Smuzhiyun for (i = 0; i < task->w_req_cnt; i++) {
354*4882a593Smuzhiyun int s, e;
355*4882a593Smuzhiyun struct mpp_request *req = &task->w_reqs[i];
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun s = req->offset / sizeof(u32);
358*4882a593Smuzhiyun e = s + req->size / sizeof(u32);
359*4882a593Smuzhiyun mpp_write_req(mpp, task->reg, s, e, reg_en);
360*4882a593Smuzhiyun }
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun /* flush tlb before starting hardware */
363*4882a593Smuzhiyun mpp_iommu_flush_tlb(mpp->iommu_info);
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun /* init current task */
366*4882a593Smuzhiyun mpp->cur_task = mpp_task;
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun mpp_task_run_begin(mpp_task, timing_en, MPP_WORK_TIMEOUT_DELAY);
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun /* Flush the register before the start the device */
371*4882a593Smuzhiyun wmb();
372*4882a593Smuzhiyun mpp_write(mpp, RKVDEC_REG_START_EN_BASE, task->reg[reg_en] | RKVDEC_START_EN);
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun mpp_task_run_end(mpp_task, timing_en);
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun mpp_debug_leave();
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun return 0;
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun
rkvdec2_rk3568_run(struct mpp_dev * mpp,struct mpp_task * mpp_task)381*4882a593Smuzhiyun static int rkvdec2_rk3568_run(struct mpp_dev *mpp, struct mpp_task *mpp_task)
382*4882a593Smuzhiyun {
383*4882a593Smuzhiyun struct rkvdec2_task *task = to_rkvdec2_task(mpp_task);
384*4882a593Smuzhiyun int ret = 0;
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun mpp_debug_enter();
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun /*
389*4882a593Smuzhiyun * run fix before task processing
390*4882a593Smuzhiyun * workaround for rk356x, fix the hw bug of cabac/cavlc switch only in h264d
391*4882a593Smuzhiyun */
392*4882a593Smuzhiyun if (task->need_hack)
393*4882a593Smuzhiyun rkvdec2_3568_hack_fix(mpp);
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun ret = rkvdec2_run(mpp, mpp_task);
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun mpp_debug_leave();
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun return ret;
400*4882a593Smuzhiyun }
401*4882a593Smuzhiyun
rkvdec2_irq(struct mpp_dev * mpp)402*4882a593Smuzhiyun static int rkvdec2_irq(struct mpp_dev *mpp)
403*4882a593Smuzhiyun {
404*4882a593Smuzhiyun mpp->irq_status = mpp_read(mpp, RKVDEC_REG_INT_EN);
405*4882a593Smuzhiyun if (!(mpp->irq_status & RKVDEC_IRQ_RAW))
406*4882a593Smuzhiyun return IRQ_NONE;
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun mpp_write(mpp, RKVDEC_REG_INT_EN, 0);
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun return IRQ_WAKE_THREAD;
411*4882a593Smuzhiyun }
412*4882a593Smuzhiyun
rkvdec2_isr(struct mpp_dev * mpp)413*4882a593Smuzhiyun static int rkvdec2_isr(struct mpp_dev *mpp)
414*4882a593Smuzhiyun {
415*4882a593Smuzhiyun u32 err_mask;
416*4882a593Smuzhiyun struct rkvdec2_task *task = NULL;
417*4882a593Smuzhiyun struct mpp_task *mpp_task = mpp->cur_task;
418*4882a593Smuzhiyun struct rkvdec2_dev *dec = to_rkvdec2_dev(mpp);
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun /* FIXME use a spin lock here */
421*4882a593Smuzhiyun if (!mpp_task) {
422*4882a593Smuzhiyun dev_err(mpp->dev, "no current task\n");
423*4882a593Smuzhiyun return IRQ_HANDLED;
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun mpp_task->hw_cycles = mpp_read(mpp, RKVDEC_PERF_WORKING_CNT);
426*4882a593Smuzhiyun mpp_time_diff_with_hw_time(mpp_task, dec->cycle_clk->real_rate_hz);
427*4882a593Smuzhiyun mpp->cur_task = NULL;
428*4882a593Smuzhiyun task = to_rkvdec2_task(mpp_task);
429*4882a593Smuzhiyun task->irq_status = mpp->irq_status;
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun mpp_debug(DEBUG_IRQ_STATUS, "irq_status: %08x\n", task->irq_status);
432*4882a593Smuzhiyun err_mask = RKVDEC_COLMV_REF_ERR_STA | RKVDEC_BUF_EMPTY_STA |
433*4882a593Smuzhiyun RKVDEC_TIMEOUT_STA | RKVDEC_ERROR_STA;
434*4882a593Smuzhiyun if (err_mask & task->irq_status) {
435*4882a593Smuzhiyun atomic_inc(&mpp->reset_request);
436*4882a593Smuzhiyun if (mpp_debug_unlikely(DEBUG_DUMP_ERR_REG)) {
437*4882a593Smuzhiyun mpp_debug(DEBUG_DUMP_ERR_REG, "irq_status: %08x\n", task->irq_status);
438*4882a593Smuzhiyun mpp_task_dump_hw_reg(mpp);
439*4882a593Smuzhiyun }
440*4882a593Smuzhiyun }
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun mpp_task_finish(mpp_task->session, mpp_task);
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun mpp_debug_leave();
445*4882a593Smuzhiyun return IRQ_HANDLED;
446*4882a593Smuzhiyun }
447*4882a593Smuzhiyun
rkvdec2_read_perf_sel(struct mpp_dev * mpp,u32 * regs,u32 s,u32 e)448*4882a593Smuzhiyun static int rkvdec2_read_perf_sel(struct mpp_dev *mpp, u32 *regs, u32 s, u32 e)
449*4882a593Smuzhiyun {
450*4882a593Smuzhiyun u32 i;
451*4882a593Smuzhiyun u32 sel0, sel1, sel2, val;
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun for (i = s; i < e; i += 3) {
454*4882a593Smuzhiyun /* set sel */
455*4882a593Smuzhiyun sel0 = i;
456*4882a593Smuzhiyun sel1 = ((i + 1) < e) ? (i + 1) : 0;
457*4882a593Smuzhiyun sel2 = ((i + 2) < e) ? (i + 2) : 0;
458*4882a593Smuzhiyun val = RKVDEC_SET_PERF_SEL(sel0, sel1, sel2);
459*4882a593Smuzhiyun writel_relaxed(val, mpp->reg_base + RKVDEC_PERF_SEL_BASE);
460*4882a593Smuzhiyun /* read data */
461*4882a593Smuzhiyun regs[sel0] = readl_relaxed(mpp->reg_base + RKVDEC_SEL_VAL0_BASE);
462*4882a593Smuzhiyun mpp_debug(DEBUG_GET_PERF_VAL, "sel[%d]:%u\n", sel0, regs[sel0]);
463*4882a593Smuzhiyun if (sel1) {
464*4882a593Smuzhiyun regs[sel1] = readl_relaxed(mpp->reg_base + RKVDEC_SEL_VAL1_BASE);
465*4882a593Smuzhiyun mpp_debug(DEBUG_GET_PERF_VAL, "sel[%d]:%u\n", sel1, regs[sel1]);
466*4882a593Smuzhiyun }
467*4882a593Smuzhiyun if (sel2) {
468*4882a593Smuzhiyun regs[sel2] = readl_relaxed(mpp->reg_base + RKVDEC_SEL_VAL2_BASE);
469*4882a593Smuzhiyun mpp_debug(DEBUG_GET_PERF_VAL, "sel[%d]:%u\n", sel2, regs[sel2]);
470*4882a593Smuzhiyun }
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun return 0;
474*4882a593Smuzhiyun }
475*4882a593Smuzhiyun
rkvdec2_finish(struct mpp_dev * mpp,struct mpp_task * mpp_task)476*4882a593Smuzhiyun static int rkvdec2_finish(struct mpp_dev *mpp, struct mpp_task *mpp_task)
477*4882a593Smuzhiyun {
478*4882a593Smuzhiyun u32 i;
479*4882a593Smuzhiyun u32 dec_get;
480*4882a593Smuzhiyun s32 dec_length;
481*4882a593Smuzhiyun struct rkvdec2_task *task = to_rkvdec2_task(mpp_task);
482*4882a593Smuzhiyun struct mpp_request *req;
483*4882a593Smuzhiyun u32 s, e;
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun mpp_debug_enter();
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun /* read register after running */
488*4882a593Smuzhiyun for (i = 0; i < task->r_req_cnt; i++) {
489*4882a593Smuzhiyun req = &task->r_reqs[i];
490*4882a593Smuzhiyun /* read perf register */
491*4882a593Smuzhiyun if (req->offset >= RKVDEC_PERF_SEL_OFFSET) {
492*4882a593Smuzhiyun int off = req->offset - RKVDEC_PERF_SEL_OFFSET;
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun s = off / sizeof(u32);
495*4882a593Smuzhiyun e = s + req->size / sizeof(u32);
496*4882a593Smuzhiyun rkvdec2_read_perf_sel(mpp, task->reg_sel, s, e);
497*4882a593Smuzhiyun } else {
498*4882a593Smuzhiyun s = req->offset / sizeof(u32);
499*4882a593Smuzhiyun e = s + req->size / sizeof(u32);
500*4882a593Smuzhiyun mpp_read_req(mpp, task->reg, s, e);
501*4882a593Smuzhiyun }
502*4882a593Smuzhiyun }
503*4882a593Smuzhiyun /* revert hack for irq status */
504*4882a593Smuzhiyun task->reg[RKVDEC_REG_INT_EN_INDEX] = task->irq_status;
505*4882a593Smuzhiyun /* revert hack for decoded length */
506*4882a593Smuzhiyun dec_get = mpp_read_relaxed(mpp, RKVDEC_REG_RLC_BASE);
507*4882a593Smuzhiyun dec_length = dec_get - task->strm_addr;
508*4882a593Smuzhiyun task->reg[RKVDEC_REG_RLC_BASE_INDEX] = dec_length << 10;
509*4882a593Smuzhiyun mpp_debug(DEBUG_REGISTER, "dec_get %08x dec_length %d\n", dec_get, dec_length);
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun if (mpp->srv->timing_en) {
512*4882a593Smuzhiyun s64 time_diff;
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun mpp_task->on_finish = ktime_get();
515*4882a593Smuzhiyun set_bit(TASK_TIMING_FINISH, &mpp_task->state);
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun time_diff = ktime_us_delta(mpp_task->on_finish, mpp_task->on_create);
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun if (mpp->timing_check && time_diff > (s64)mpp->timing_check)
520*4882a593Smuzhiyun mpp_task_dump_timing(mpp_task, time_diff);
521*4882a593Smuzhiyun }
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun mpp_debug_leave();
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun return 0;
526*4882a593Smuzhiyun }
527*4882a593Smuzhiyun
rkvdec2_result(struct mpp_dev * mpp,struct mpp_task * mpp_task,struct mpp_task_msgs * msgs)528*4882a593Smuzhiyun int rkvdec2_result(struct mpp_dev *mpp, struct mpp_task *mpp_task,
529*4882a593Smuzhiyun struct mpp_task_msgs *msgs)
530*4882a593Smuzhiyun {
531*4882a593Smuzhiyun u32 i;
532*4882a593Smuzhiyun struct mpp_request *req;
533*4882a593Smuzhiyun struct rkvdec2_task *task = to_rkvdec2_task(mpp_task);
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun for (i = 0; i < task->r_req_cnt; i++) {
536*4882a593Smuzhiyun req = &task->r_reqs[i];
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun if (req->offset >= RKVDEC_PERF_SEL_OFFSET) {
539*4882a593Smuzhiyun int off = req->offset - RKVDEC_PERF_SEL_OFFSET;
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun if (copy_to_user(req->data,
542*4882a593Smuzhiyun (u8 *)task->reg_sel + off,
543*4882a593Smuzhiyun req->size)) {
544*4882a593Smuzhiyun mpp_err("copy_to_user perf_sel fail\n");
545*4882a593Smuzhiyun return -EIO;
546*4882a593Smuzhiyun }
547*4882a593Smuzhiyun } else {
548*4882a593Smuzhiyun if (copy_to_user(req->data,
549*4882a593Smuzhiyun (u8 *)task->reg + req->offset,
550*4882a593Smuzhiyun req->size)) {
551*4882a593Smuzhiyun mpp_err("copy_to_user reg fail\n");
552*4882a593Smuzhiyun return -EIO;
553*4882a593Smuzhiyun }
554*4882a593Smuzhiyun }
555*4882a593Smuzhiyun }
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun return 0;
558*4882a593Smuzhiyun }
559*4882a593Smuzhiyun
rkvdec2_free_task(struct mpp_session * session,struct mpp_task * mpp_task)560*4882a593Smuzhiyun int rkvdec2_free_task(struct mpp_session *session, struct mpp_task *mpp_task)
561*4882a593Smuzhiyun {
562*4882a593Smuzhiyun struct rkvdec2_task *task = to_rkvdec2_task(mpp_task);
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun mpp_task_finalize(session, mpp_task);
565*4882a593Smuzhiyun kfree(task);
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun return 0;
568*4882a593Smuzhiyun }
569*4882a593Smuzhiyun
rkvdec2_control(struct mpp_session * session,struct mpp_request * req)570*4882a593Smuzhiyun static int rkvdec2_control(struct mpp_session *session, struct mpp_request *req)
571*4882a593Smuzhiyun {
572*4882a593Smuzhiyun switch (req->cmd) {
573*4882a593Smuzhiyun case MPP_CMD_SEND_CODEC_INFO: {
574*4882a593Smuzhiyun int i;
575*4882a593Smuzhiyun int cnt;
576*4882a593Smuzhiyun struct codec_info_elem elem;
577*4882a593Smuzhiyun struct rkvdec2_session_priv *priv;
578*4882a593Smuzhiyun
579*4882a593Smuzhiyun if (!session || !session->priv) {
580*4882a593Smuzhiyun mpp_err("session info null\n");
581*4882a593Smuzhiyun return -EINVAL;
582*4882a593Smuzhiyun }
583*4882a593Smuzhiyun priv = session->priv;
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun cnt = req->size / sizeof(elem);
586*4882a593Smuzhiyun cnt = (cnt > DEC_INFO_BUTT) ? DEC_INFO_BUTT : cnt;
587*4882a593Smuzhiyun mpp_debug(DEBUG_IOCTL, "codec info count %d\n", cnt);
588*4882a593Smuzhiyun for (i = 0; i < cnt; i++) {
589*4882a593Smuzhiyun if (copy_from_user(&elem, req->data + i * sizeof(elem), sizeof(elem))) {
590*4882a593Smuzhiyun mpp_err("copy_from_user failed\n");
591*4882a593Smuzhiyun continue;
592*4882a593Smuzhiyun }
593*4882a593Smuzhiyun if (elem.type > DEC_INFO_BASE && elem.type < DEC_INFO_BUTT &&
594*4882a593Smuzhiyun elem.flag > CODEC_INFO_FLAG_NULL && elem.flag < CODEC_INFO_FLAG_BUTT) {
595*4882a593Smuzhiyun elem.type = array_index_nospec(elem.type, DEC_INFO_BUTT);
596*4882a593Smuzhiyun priv->codec_info[elem.type].flag = elem.flag;
597*4882a593Smuzhiyun priv->codec_info[elem.type].val = elem.data;
598*4882a593Smuzhiyun } else {
599*4882a593Smuzhiyun mpp_err("codec info invalid, type %d, flag %d\n",
600*4882a593Smuzhiyun elem.type, elem.flag);
601*4882a593Smuzhiyun }
602*4882a593Smuzhiyun }
603*4882a593Smuzhiyun } break;
604*4882a593Smuzhiyun default: {
605*4882a593Smuzhiyun mpp_err("unknown mpp ioctl cmd %x\n", req->cmd);
606*4882a593Smuzhiyun } break;
607*4882a593Smuzhiyun }
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun return 0;
610*4882a593Smuzhiyun }
611*4882a593Smuzhiyun
rkvdec2_free_session(struct mpp_session * session)612*4882a593Smuzhiyun int rkvdec2_free_session(struct mpp_session *session)
613*4882a593Smuzhiyun {
614*4882a593Smuzhiyun if (session && session->priv) {
615*4882a593Smuzhiyun kfree(session->priv);
616*4882a593Smuzhiyun session->priv = NULL;
617*4882a593Smuzhiyun }
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun return 0;
620*4882a593Smuzhiyun }
621*4882a593Smuzhiyun
rkvdec2_init_session(struct mpp_session * session)622*4882a593Smuzhiyun static int rkvdec2_init_session(struct mpp_session *session)
623*4882a593Smuzhiyun {
624*4882a593Smuzhiyun struct rkvdec2_session_priv *priv;
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun if (!session) {
627*4882a593Smuzhiyun mpp_err("session is null\n");
628*4882a593Smuzhiyun return -EINVAL;
629*4882a593Smuzhiyun }
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun priv = kzalloc(sizeof(*priv), GFP_KERNEL);
632*4882a593Smuzhiyun if (!priv)
633*4882a593Smuzhiyun return -ENOMEM;
634*4882a593Smuzhiyun session->priv = priv;
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun return 0;
637*4882a593Smuzhiyun }
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun #ifdef CONFIG_ROCKCHIP_MPP_PROC_FS
rkvdec2_procfs_remove(struct mpp_dev * mpp)640*4882a593Smuzhiyun static int rkvdec2_procfs_remove(struct mpp_dev *mpp)
641*4882a593Smuzhiyun {
642*4882a593Smuzhiyun struct rkvdec2_dev *dec = to_rkvdec2_dev(mpp);
643*4882a593Smuzhiyun
644*4882a593Smuzhiyun if (dec->procfs) {
645*4882a593Smuzhiyun proc_remove(dec->procfs);
646*4882a593Smuzhiyun dec->procfs = NULL;
647*4882a593Smuzhiyun }
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun return 0;
650*4882a593Smuzhiyun }
651*4882a593Smuzhiyun
rkvdec2_show_pref_sel_offset(struct seq_file * file,void * v)652*4882a593Smuzhiyun static int rkvdec2_show_pref_sel_offset(struct seq_file *file, void *v)
653*4882a593Smuzhiyun {
654*4882a593Smuzhiyun seq_printf(file, "0x%08x\n", RKVDEC_PERF_SEL_OFFSET);
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun return 0;
657*4882a593Smuzhiyun }
658*4882a593Smuzhiyun
rkvdec2_procfs_init(struct mpp_dev * mpp)659*4882a593Smuzhiyun static int rkvdec2_procfs_init(struct mpp_dev *mpp)
660*4882a593Smuzhiyun {
661*4882a593Smuzhiyun struct rkvdec2_dev *dec = to_rkvdec2_dev(mpp);
662*4882a593Smuzhiyun char name[32];
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun if (!mpp->dev || !mpp->dev->of_node || !mpp->dev->of_node->name ||
665*4882a593Smuzhiyun !mpp->srv || !mpp->srv->procfs)
666*4882a593Smuzhiyun return -EINVAL;
667*4882a593Smuzhiyun
668*4882a593Smuzhiyun snprintf(name, sizeof(name) - 1, "%s%d",
669*4882a593Smuzhiyun mpp->dev->of_node->name, mpp->core_id);
670*4882a593Smuzhiyun dec->procfs = proc_mkdir(name, mpp->srv->procfs);
671*4882a593Smuzhiyun if (IS_ERR_OR_NULL(dec->procfs)) {
672*4882a593Smuzhiyun mpp_err("failed on open procfs\n");
673*4882a593Smuzhiyun dec->procfs = NULL;
674*4882a593Smuzhiyun return -EIO;
675*4882a593Smuzhiyun }
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun /* for common mpp_dev options */
678*4882a593Smuzhiyun mpp_procfs_create_common(dec->procfs, mpp);
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun mpp_procfs_create_u32("aclk", 0644,
681*4882a593Smuzhiyun dec->procfs, &dec->aclk_info.debug_rate_hz);
682*4882a593Smuzhiyun mpp_procfs_create_u32("clk_core", 0644,
683*4882a593Smuzhiyun dec->procfs, &dec->core_clk_info.debug_rate_hz);
684*4882a593Smuzhiyun mpp_procfs_create_u32("clk_cabac", 0644,
685*4882a593Smuzhiyun dec->procfs, &dec->cabac_clk_info.debug_rate_hz);
686*4882a593Smuzhiyun mpp_procfs_create_u32("clk_hevc_cabac", 0644,
687*4882a593Smuzhiyun dec->procfs, &dec->hevc_cabac_clk_info.debug_rate_hz);
688*4882a593Smuzhiyun mpp_procfs_create_u32("session_buffers", 0644,
689*4882a593Smuzhiyun dec->procfs, &mpp->session_max_buffers);
690*4882a593Smuzhiyun proc_create_single("perf_sel_offset", 0444,
691*4882a593Smuzhiyun dec->procfs, rkvdec2_show_pref_sel_offset);
692*4882a593Smuzhiyun mpp_procfs_create_u32("task_count", 0644,
693*4882a593Smuzhiyun dec->procfs, &mpp->task_index);
694*4882a593Smuzhiyun
695*4882a593Smuzhiyun return 0;
696*4882a593Smuzhiyun }
697*4882a593Smuzhiyun #else
rkvdec2_procfs_remove(struct mpp_dev * mpp)698*4882a593Smuzhiyun static inline int rkvdec2_procfs_remove(struct mpp_dev *mpp)
699*4882a593Smuzhiyun {
700*4882a593Smuzhiyun return 0;
701*4882a593Smuzhiyun }
702*4882a593Smuzhiyun
rkvdec2_procfs_init(struct mpp_dev * mpp)703*4882a593Smuzhiyun static inline int rkvdec2_procfs_init(struct mpp_dev *mpp)
704*4882a593Smuzhiyun {
705*4882a593Smuzhiyun return 0;
706*4882a593Smuzhiyun }
707*4882a593Smuzhiyun #endif
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun #ifdef CONFIG_PM_DEVFREQ
rkvdec2_devfreq_target(struct device * dev,unsigned long * freq,u32 flags)710*4882a593Smuzhiyun static int rkvdec2_devfreq_target(struct device *dev,
711*4882a593Smuzhiyun unsigned long *freq, u32 flags)
712*4882a593Smuzhiyun {
713*4882a593Smuzhiyun struct dev_pm_opp *opp;
714*4882a593Smuzhiyun unsigned long target_volt, target_freq;
715*4882a593Smuzhiyun int ret = 0;
716*4882a593Smuzhiyun
717*4882a593Smuzhiyun struct rkvdec2_dev *dec = dev_get_drvdata(dev);
718*4882a593Smuzhiyun struct devfreq *devfreq = dec->devfreq;
719*4882a593Smuzhiyun struct devfreq_dev_status *stat = &devfreq->last_status;
720*4882a593Smuzhiyun unsigned long old_clk_rate = stat->current_frequency;
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun opp = devfreq_recommended_opp(dev, freq, flags);
723*4882a593Smuzhiyun if (IS_ERR(opp)) {
724*4882a593Smuzhiyun dev_err(dev, "Failed to find opp for %lu Hz\n", *freq);
725*4882a593Smuzhiyun return PTR_ERR(opp);
726*4882a593Smuzhiyun }
727*4882a593Smuzhiyun target_freq = dev_pm_opp_get_freq(opp);
728*4882a593Smuzhiyun target_volt = dev_pm_opp_get_voltage(opp);
729*4882a593Smuzhiyun dev_pm_opp_put(opp);
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun if (old_clk_rate == target_freq) {
732*4882a593Smuzhiyun dec->core_last_rate_hz = target_freq;
733*4882a593Smuzhiyun if (dec->volt == target_volt)
734*4882a593Smuzhiyun return ret;
735*4882a593Smuzhiyun ret = regulator_set_voltage(dec->vdd, target_volt, INT_MAX);
736*4882a593Smuzhiyun if (ret) {
737*4882a593Smuzhiyun dev_err(dev, "Cannot set voltage %lu uV\n",
738*4882a593Smuzhiyun target_volt);
739*4882a593Smuzhiyun return ret;
740*4882a593Smuzhiyun }
741*4882a593Smuzhiyun dec->volt = target_volt;
742*4882a593Smuzhiyun return 0;
743*4882a593Smuzhiyun }
744*4882a593Smuzhiyun
745*4882a593Smuzhiyun if (old_clk_rate < target_freq) {
746*4882a593Smuzhiyun ret = regulator_set_voltage(dec->vdd, target_volt, INT_MAX);
747*4882a593Smuzhiyun if (ret) {
748*4882a593Smuzhiyun dev_err(dev, "set voltage %lu uV\n", target_volt);
749*4882a593Smuzhiyun return ret;
750*4882a593Smuzhiyun }
751*4882a593Smuzhiyun }
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun dev_dbg(dev, "%lu-->%lu\n", old_clk_rate, target_freq);
754*4882a593Smuzhiyun clk_set_rate(dec->core_clk_info.clk, target_freq);
755*4882a593Smuzhiyun stat->current_frequency = target_freq;
756*4882a593Smuzhiyun dec->core_last_rate_hz = target_freq;
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun if (old_clk_rate > target_freq) {
759*4882a593Smuzhiyun ret = regulator_set_voltage(dec->vdd, target_volt, INT_MAX);
760*4882a593Smuzhiyun if (ret) {
761*4882a593Smuzhiyun dev_err(dev, "set vol %lu uV\n", target_volt);
762*4882a593Smuzhiyun return ret;
763*4882a593Smuzhiyun }
764*4882a593Smuzhiyun }
765*4882a593Smuzhiyun dec->volt = target_volt;
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun return ret;
768*4882a593Smuzhiyun }
769*4882a593Smuzhiyun
rkvdec2_devfreq_get_dev_status(struct device * dev,struct devfreq_dev_status * stat)770*4882a593Smuzhiyun static int rkvdec2_devfreq_get_dev_status(struct device *dev,
771*4882a593Smuzhiyun struct devfreq_dev_status *stat)
772*4882a593Smuzhiyun {
773*4882a593Smuzhiyun return 0;
774*4882a593Smuzhiyun }
775*4882a593Smuzhiyun
rkvdec2_devfreq_get_cur_freq(struct device * dev,unsigned long * freq)776*4882a593Smuzhiyun static int rkvdec2_devfreq_get_cur_freq(struct device *dev,
777*4882a593Smuzhiyun unsigned long *freq)
778*4882a593Smuzhiyun {
779*4882a593Smuzhiyun struct rkvdec2_dev *dec = dev_get_drvdata(dev);
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun *freq = dec->core_last_rate_hz;
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun return 0;
784*4882a593Smuzhiyun }
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun static struct devfreq_dev_profile rkvdec2_devfreq_profile = {
787*4882a593Smuzhiyun .target = rkvdec2_devfreq_target,
788*4882a593Smuzhiyun .get_dev_status = rkvdec2_devfreq_get_dev_status,
789*4882a593Smuzhiyun .get_cur_freq = rkvdec2_devfreq_get_cur_freq,
790*4882a593Smuzhiyun };
791*4882a593Smuzhiyun
devfreq_vdec2_ondemand_func(struct devfreq * df,unsigned long * freq)792*4882a593Smuzhiyun static int devfreq_vdec2_ondemand_func(struct devfreq *df, unsigned long *freq)
793*4882a593Smuzhiyun {
794*4882a593Smuzhiyun struct rkvdec2_dev *dec = df->data;
795*4882a593Smuzhiyun
796*4882a593Smuzhiyun if (dec)
797*4882a593Smuzhiyun *freq = dec->core_rate_hz;
798*4882a593Smuzhiyun else
799*4882a593Smuzhiyun *freq = df->previous_freq;
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun return 0;
802*4882a593Smuzhiyun }
803*4882a593Smuzhiyun
devfreq_vdec2_ondemand_handler(struct devfreq * devfreq,unsigned int event,void * data)804*4882a593Smuzhiyun static int devfreq_vdec2_ondemand_handler(struct devfreq *devfreq,
805*4882a593Smuzhiyun unsigned int event, void *data)
806*4882a593Smuzhiyun {
807*4882a593Smuzhiyun return 0;
808*4882a593Smuzhiyun }
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun static struct devfreq_governor devfreq_vdec2_ondemand = {
811*4882a593Smuzhiyun .name = "vdec2_ondemand",
812*4882a593Smuzhiyun .get_target_freq = devfreq_vdec2_ondemand_func,
813*4882a593Smuzhiyun .event_handler = devfreq_vdec2_ondemand_handler,
814*4882a593Smuzhiyun };
815*4882a593Smuzhiyun
rkvdec2_get_static_power(struct devfreq * devfreq,unsigned long voltage)816*4882a593Smuzhiyun static unsigned long rkvdec2_get_static_power(struct devfreq *devfreq,
817*4882a593Smuzhiyun unsigned long voltage)
818*4882a593Smuzhiyun {
819*4882a593Smuzhiyun struct rkvdec2_dev *dec = devfreq->data;
820*4882a593Smuzhiyun
821*4882a593Smuzhiyun if (!dec->model_data)
822*4882a593Smuzhiyun return 0;
823*4882a593Smuzhiyun else
824*4882a593Smuzhiyun return rockchip_ipa_get_static_power(dec->model_data,
825*4882a593Smuzhiyun voltage);
826*4882a593Smuzhiyun }
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun static struct devfreq_cooling_power vdec2_cooling_power_data = {
829*4882a593Smuzhiyun .get_static_power = rkvdec2_get_static_power,
830*4882a593Smuzhiyun };
831*4882a593Smuzhiyun
832*4882a593Smuzhiyun static struct monitor_dev_profile vdec2_mdevp = {
833*4882a593Smuzhiyun .type = MONITOR_TYPE_DEV,
834*4882a593Smuzhiyun .low_temp_adjust = rockchip_monitor_dev_low_temp_adjust,
835*4882a593Smuzhiyun .high_temp_adjust = rockchip_monitor_dev_high_temp_adjust,
836*4882a593Smuzhiyun };
837*4882a593Smuzhiyun
rkvdec2_devfreq_init(struct mpp_dev * mpp)838*4882a593Smuzhiyun static int rkvdec2_devfreq_init(struct mpp_dev *mpp)
839*4882a593Smuzhiyun {
840*4882a593Smuzhiyun struct rkvdec2_dev *dec = to_rkvdec2_dev(mpp);
841*4882a593Smuzhiyun struct clk *clk_core = dec->core_clk_info.clk;
842*4882a593Smuzhiyun struct devfreq_cooling_power *vdec2_dcp = &vdec2_cooling_power_data;
843*4882a593Smuzhiyun int ret = 0;
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun if (!clk_core)
846*4882a593Smuzhiyun return 0;
847*4882a593Smuzhiyun
848*4882a593Smuzhiyun dec->vdd = devm_regulator_get_optional(mpp->dev, "vdec");
849*4882a593Smuzhiyun if (IS_ERR_OR_NULL(dec->vdd)) {
850*4882a593Smuzhiyun if (PTR_ERR(dec->vdd) == -EPROBE_DEFER) {
851*4882a593Smuzhiyun dev_warn(mpp->dev, "vdec regulator not ready, retry\n");
852*4882a593Smuzhiyun
853*4882a593Smuzhiyun return -EPROBE_DEFER;
854*4882a593Smuzhiyun }
855*4882a593Smuzhiyun dev_info(mpp->dev, "no regulator, devfreq is disabled\n");
856*4882a593Smuzhiyun
857*4882a593Smuzhiyun return 0;
858*4882a593Smuzhiyun }
859*4882a593Smuzhiyun
860*4882a593Smuzhiyun ret = rockchip_init_opp_table(mpp->dev, NULL, "leakage", "vdec");
861*4882a593Smuzhiyun if (ret) {
862*4882a593Smuzhiyun dev_err(mpp->dev, "failed to init_opp_table\n");
863*4882a593Smuzhiyun return ret;
864*4882a593Smuzhiyun }
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun ret = devfreq_add_governor(&devfreq_vdec2_ondemand);
867*4882a593Smuzhiyun if (ret) {
868*4882a593Smuzhiyun dev_err(mpp->dev, "failed to add vdec2_ondemand governor\n");
869*4882a593Smuzhiyun goto governor_err;
870*4882a593Smuzhiyun }
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun rkvdec2_devfreq_profile.initial_freq = clk_get_rate(clk_core);
873*4882a593Smuzhiyun
874*4882a593Smuzhiyun dec->devfreq = devm_devfreq_add_device(mpp->dev,
875*4882a593Smuzhiyun &rkvdec2_devfreq_profile,
876*4882a593Smuzhiyun "vdec2_ondemand", (void *)dec);
877*4882a593Smuzhiyun if (IS_ERR(dec->devfreq)) {
878*4882a593Smuzhiyun ret = PTR_ERR(dec->devfreq);
879*4882a593Smuzhiyun dec->devfreq = NULL;
880*4882a593Smuzhiyun goto devfreq_err;
881*4882a593Smuzhiyun }
882*4882a593Smuzhiyun dec->devfreq->last_status.total_time = 1;
883*4882a593Smuzhiyun dec->devfreq->last_status.busy_time = 1;
884*4882a593Smuzhiyun
885*4882a593Smuzhiyun devfreq_register_opp_notifier(mpp->dev, dec->devfreq);
886*4882a593Smuzhiyun
887*4882a593Smuzhiyun of_property_read_u32(mpp->dev->of_node, "dynamic-power-coefficient",
888*4882a593Smuzhiyun (u32 *)&vdec2_dcp->dyn_power_coeff);
889*4882a593Smuzhiyun dec->model_data = rockchip_ipa_power_model_init(mpp->dev,
890*4882a593Smuzhiyun "vdec_leakage");
891*4882a593Smuzhiyun if (IS_ERR_OR_NULL(dec->model_data)) {
892*4882a593Smuzhiyun dec->model_data = NULL;
893*4882a593Smuzhiyun dev_err(mpp->dev, "failed to initialize power model\n");
894*4882a593Smuzhiyun } else if (dec->model_data->dynamic_coefficient) {
895*4882a593Smuzhiyun vdec2_dcp->dyn_power_coeff =
896*4882a593Smuzhiyun dec->model_data->dynamic_coefficient;
897*4882a593Smuzhiyun }
898*4882a593Smuzhiyun if (!vdec2_dcp->dyn_power_coeff) {
899*4882a593Smuzhiyun dev_err(mpp->dev, "failed to get dynamic-coefficient\n");
900*4882a593Smuzhiyun goto out;
901*4882a593Smuzhiyun }
902*4882a593Smuzhiyun
903*4882a593Smuzhiyun dec->devfreq_cooling =
904*4882a593Smuzhiyun of_devfreq_cooling_register_power(mpp->dev->of_node,
905*4882a593Smuzhiyun dec->devfreq, vdec2_dcp);
906*4882a593Smuzhiyun if (IS_ERR_OR_NULL(dec->devfreq_cooling))
907*4882a593Smuzhiyun dev_err(mpp->dev, "failed to register cooling device\n");
908*4882a593Smuzhiyun
909*4882a593Smuzhiyun vdec2_mdevp.data = dec->devfreq;
910*4882a593Smuzhiyun dec->mdev_info = rockchip_system_monitor_register(mpp->dev, &vdec2_mdevp);
911*4882a593Smuzhiyun if (IS_ERR(dec->mdev_info)) {
912*4882a593Smuzhiyun dev_dbg(mpp->dev, "without system monitor\n");
913*4882a593Smuzhiyun dec->mdev_info = NULL;
914*4882a593Smuzhiyun }
915*4882a593Smuzhiyun
916*4882a593Smuzhiyun out:
917*4882a593Smuzhiyun return 0;
918*4882a593Smuzhiyun
919*4882a593Smuzhiyun devfreq_err:
920*4882a593Smuzhiyun devfreq_remove_governor(&devfreq_vdec2_ondemand);
921*4882a593Smuzhiyun governor_err:
922*4882a593Smuzhiyun dev_pm_opp_of_remove_table(mpp->dev);
923*4882a593Smuzhiyun
924*4882a593Smuzhiyun return ret;
925*4882a593Smuzhiyun }
926*4882a593Smuzhiyun
rkvdec2_devfreq_remove(struct mpp_dev * mpp)927*4882a593Smuzhiyun static int rkvdec2_devfreq_remove(struct mpp_dev *mpp)
928*4882a593Smuzhiyun {
929*4882a593Smuzhiyun struct rkvdec2_dev *dec = to_rkvdec2_dev(mpp);
930*4882a593Smuzhiyun
931*4882a593Smuzhiyun if (dec->mdev_info)
932*4882a593Smuzhiyun rockchip_system_monitor_unregister(dec->mdev_info);
933*4882a593Smuzhiyun if (dec->devfreq) {
934*4882a593Smuzhiyun devfreq_unregister_opp_notifier(mpp->dev, dec->devfreq);
935*4882a593Smuzhiyun dev_pm_opp_of_remove_table(mpp->dev);
936*4882a593Smuzhiyun devfreq_remove_governor(&devfreq_vdec2_ondemand);
937*4882a593Smuzhiyun }
938*4882a593Smuzhiyun
939*4882a593Smuzhiyun return 0;
940*4882a593Smuzhiyun }
941*4882a593Smuzhiyun
mpp_devfreq_set_core_rate(struct mpp_dev * mpp,enum MPP_CLOCK_MODE mode)942*4882a593Smuzhiyun void mpp_devfreq_set_core_rate(struct mpp_dev *mpp, enum MPP_CLOCK_MODE mode)
943*4882a593Smuzhiyun {
944*4882a593Smuzhiyun struct rkvdec2_dev *dec = to_rkvdec2_dev(mpp);
945*4882a593Smuzhiyun
946*4882a593Smuzhiyun if (dec->devfreq) {
947*4882a593Smuzhiyun unsigned long core_rate_hz;
948*4882a593Smuzhiyun
949*4882a593Smuzhiyun mutex_lock(&dec->devfreq->lock);
950*4882a593Smuzhiyun core_rate_hz = mpp_get_clk_info_rate_hz(&dec->core_clk_info, mode);
951*4882a593Smuzhiyun if (dec->core_rate_hz != core_rate_hz) {
952*4882a593Smuzhiyun dec->core_rate_hz = core_rate_hz;
953*4882a593Smuzhiyun update_devfreq(dec->devfreq);
954*4882a593Smuzhiyun }
955*4882a593Smuzhiyun mutex_unlock(&dec->devfreq->lock);
956*4882a593Smuzhiyun }
957*4882a593Smuzhiyun
958*4882a593Smuzhiyun mpp_clk_set_rate(&dec->core_clk_info, mode);
959*4882a593Smuzhiyun }
960*4882a593Smuzhiyun #else
rkvdec2_devfreq_init(struct mpp_dev * mpp)961*4882a593Smuzhiyun static inline int rkvdec2_devfreq_init(struct mpp_dev *mpp)
962*4882a593Smuzhiyun {
963*4882a593Smuzhiyun return 0;
964*4882a593Smuzhiyun }
965*4882a593Smuzhiyun
rkvdec2_devfreq_remove(struct mpp_dev * mpp)966*4882a593Smuzhiyun static inline int rkvdec2_devfreq_remove(struct mpp_dev *mpp)
967*4882a593Smuzhiyun {
968*4882a593Smuzhiyun return 0;
969*4882a593Smuzhiyun }
970*4882a593Smuzhiyun
mpp_devfreq_set_core_rate(struct mpp_dev * mpp,enum MPP_CLOCK_MODE mode)971*4882a593Smuzhiyun void mpp_devfreq_set_core_rate(struct mpp_dev *mpp, enum MPP_CLOCK_MODE mode)
972*4882a593Smuzhiyun {
973*4882a593Smuzhiyun struct rkvdec2_dev *dec = to_rkvdec2_dev(mpp);
974*4882a593Smuzhiyun
975*4882a593Smuzhiyun mpp_clk_set_rate(&dec->core_clk_info, mode);
976*4882a593Smuzhiyun }
977*4882a593Smuzhiyun #endif
978*4882a593Smuzhiyun
rkvdec2_init(struct mpp_dev * mpp)979*4882a593Smuzhiyun static int rkvdec2_init(struct mpp_dev *mpp)
980*4882a593Smuzhiyun {
981*4882a593Smuzhiyun int ret;
982*4882a593Smuzhiyun struct rkvdec2_dev *dec = to_rkvdec2_dev(mpp);
983*4882a593Smuzhiyun
984*4882a593Smuzhiyun mutex_init(&dec->sip_reset_lock);
985*4882a593Smuzhiyun mpp->grf_info = &mpp->srv->grf_infos[MPP_DRIVER_RKVDEC];
986*4882a593Smuzhiyun
987*4882a593Smuzhiyun /* Get clock info from dtsi */
988*4882a593Smuzhiyun ret = mpp_get_clk_info(mpp, &dec->aclk_info, "aclk_vcodec");
989*4882a593Smuzhiyun if (ret)
990*4882a593Smuzhiyun mpp_err("failed on clk_get aclk_vcodec\n");
991*4882a593Smuzhiyun ret = mpp_get_clk_info(mpp, &dec->hclk_info, "hclk_vcodec");
992*4882a593Smuzhiyun if (ret)
993*4882a593Smuzhiyun mpp_err("failed on clk_get hclk_vcodec\n");
994*4882a593Smuzhiyun ret = mpp_get_clk_info(mpp, &dec->core_clk_info, "clk_core");
995*4882a593Smuzhiyun if (ret)
996*4882a593Smuzhiyun mpp_err("failed on clk_get clk_core\n");
997*4882a593Smuzhiyun ret = mpp_get_clk_info(mpp, &dec->cabac_clk_info, "clk_cabac");
998*4882a593Smuzhiyun if (ret)
999*4882a593Smuzhiyun mpp_err("failed on clk_get clk_cabac\n");
1000*4882a593Smuzhiyun ret = mpp_get_clk_info(mpp, &dec->hevc_cabac_clk_info, "clk_hevc_cabac");
1001*4882a593Smuzhiyun if (ret)
1002*4882a593Smuzhiyun mpp_err("failed on clk_get clk_hevc_cabac\n");
1003*4882a593Smuzhiyun /* Set default rates */
1004*4882a593Smuzhiyun mpp_set_clk_info_rate_hz(&dec->aclk_info, CLK_MODE_DEFAULT, 300 * MHZ);
1005*4882a593Smuzhiyun mpp_set_clk_info_rate_hz(&dec->core_clk_info, CLK_MODE_DEFAULT, 200 * MHZ);
1006*4882a593Smuzhiyun mpp_set_clk_info_rate_hz(&dec->cabac_clk_info, CLK_MODE_DEFAULT, 200 * MHZ);
1007*4882a593Smuzhiyun mpp_set_clk_info_rate_hz(&dec->hevc_cabac_clk_info, CLK_MODE_DEFAULT, 300 * MHZ);
1008*4882a593Smuzhiyun
1009*4882a593Smuzhiyun dec->cycle_clk = &dec->aclk_info;
1010*4882a593Smuzhiyun /* Get normal max workload from dtsi */
1011*4882a593Smuzhiyun of_property_read_u32(mpp->dev->of_node,
1012*4882a593Smuzhiyun "rockchip,default-max-load", &dec->default_max_load);
1013*4882a593Smuzhiyun /* Get reset control from dtsi */
1014*4882a593Smuzhiyun dec->rst_a = mpp_reset_control_get(mpp, RST_TYPE_A, "video_a");
1015*4882a593Smuzhiyun if (!dec->rst_a)
1016*4882a593Smuzhiyun mpp_err("No aclk reset resource define\n");
1017*4882a593Smuzhiyun dec->rst_h = mpp_reset_control_get(mpp, RST_TYPE_H, "video_h");
1018*4882a593Smuzhiyun if (!dec->rst_h)
1019*4882a593Smuzhiyun mpp_err("No hclk reset resource define\n");
1020*4882a593Smuzhiyun dec->rst_niu_a = mpp_reset_control_get(mpp, RST_TYPE_NIU_A, "niu_a");
1021*4882a593Smuzhiyun if (!dec->rst_niu_a)
1022*4882a593Smuzhiyun mpp_err("No niu aclk reset resource define\n");
1023*4882a593Smuzhiyun dec->rst_niu_h = mpp_reset_control_get(mpp, RST_TYPE_NIU_H, "niu_h");
1024*4882a593Smuzhiyun if (!dec->rst_niu_h)
1025*4882a593Smuzhiyun mpp_err("No niu hclk reset resource define\n");
1026*4882a593Smuzhiyun dec->rst_core = mpp_reset_control_get(mpp, RST_TYPE_CORE, "video_core");
1027*4882a593Smuzhiyun if (!dec->rst_core)
1028*4882a593Smuzhiyun mpp_err("No core reset resource define\n");
1029*4882a593Smuzhiyun dec->rst_cabac = mpp_reset_control_get(mpp, RST_TYPE_CABAC, "video_cabac");
1030*4882a593Smuzhiyun if (!dec->rst_cabac)
1031*4882a593Smuzhiyun mpp_err("No cabac reset resource define\n");
1032*4882a593Smuzhiyun dec->rst_hevc_cabac = mpp_reset_control_get(mpp, RST_TYPE_HEVC_CABAC, "video_hevc_cabac");
1033*4882a593Smuzhiyun if (!dec->rst_hevc_cabac)
1034*4882a593Smuzhiyun mpp_err("No hevc cabac reset resource define\n");
1035*4882a593Smuzhiyun
1036*4882a593Smuzhiyun ret = rkvdec2_devfreq_init(mpp);
1037*4882a593Smuzhiyun if (ret)
1038*4882a593Smuzhiyun mpp_err("failed to add vdec devfreq\n");
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun return ret;
1041*4882a593Smuzhiyun }
1042*4882a593Smuzhiyun
rkvdec2_rk3568_init(struct mpp_dev * mpp)1043*4882a593Smuzhiyun static int rkvdec2_rk3568_init(struct mpp_dev *mpp)
1044*4882a593Smuzhiyun {
1045*4882a593Smuzhiyun int ret;
1046*4882a593Smuzhiyun struct rkvdec2_dev *dec = to_rkvdec2_dev(mpp);
1047*4882a593Smuzhiyun
1048*4882a593Smuzhiyun dec->fix = mpp_dma_alloc(mpp->dev, FIX_RK3568_BUF_SIZE);
1049*4882a593Smuzhiyun ret = dec->fix ? 0 : -ENOMEM;
1050*4882a593Smuzhiyun if (!ret)
1051*4882a593Smuzhiyun rkvdec2_3568_hack_data_setup(dec->fix);
1052*4882a593Smuzhiyun else
1053*4882a593Smuzhiyun dev_err(mpp->dev, "failed to create buffer for hack\n");
1054*4882a593Smuzhiyun
1055*4882a593Smuzhiyun ret = rkvdec2_init(mpp);
1056*4882a593Smuzhiyun
1057*4882a593Smuzhiyun return ret;
1058*4882a593Smuzhiyun }
1059*4882a593Smuzhiyun
rkvdec2_rk3568_exit(struct mpp_dev * mpp)1060*4882a593Smuzhiyun static int rkvdec2_rk3568_exit(struct mpp_dev *mpp)
1061*4882a593Smuzhiyun {
1062*4882a593Smuzhiyun struct rkvdec2_dev *dec = to_rkvdec2_dev(mpp);
1063*4882a593Smuzhiyun
1064*4882a593Smuzhiyun rkvdec2_devfreq_remove(mpp);
1065*4882a593Smuzhiyun
1066*4882a593Smuzhiyun if (dec->fix)
1067*4882a593Smuzhiyun mpp_dma_free(dec->fix);
1068*4882a593Smuzhiyun
1069*4882a593Smuzhiyun return 0;
1070*4882a593Smuzhiyun }
1071*4882a593Smuzhiyun
rkvdec2_clk_on(struct mpp_dev * mpp)1072*4882a593Smuzhiyun static int rkvdec2_clk_on(struct mpp_dev *mpp)
1073*4882a593Smuzhiyun {
1074*4882a593Smuzhiyun struct rkvdec2_dev *dec = to_rkvdec2_dev(mpp);
1075*4882a593Smuzhiyun
1076*4882a593Smuzhiyun mpp_clk_safe_enable(dec->aclk_info.clk);
1077*4882a593Smuzhiyun mpp_clk_safe_enable(dec->hclk_info.clk);
1078*4882a593Smuzhiyun mpp_clk_safe_enable(dec->core_clk_info.clk);
1079*4882a593Smuzhiyun mpp_clk_safe_enable(dec->cabac_clk_info.clk);
1080*4882a593Smuzhiyun mpp_clk_safe_enable(dec->hevc_cabac_clk_info.clk);
1081*4882a593Smuzhiyun
1082*4882a593Smuzhiyun return 0;
1083*4882a593Smuzhiyun }
1084*4882a593Smuzhiyun
rkvdec2_clk_off(struct mpp_dev * mpp)1085*4882a593Smuzhiyun static int rkvdec2_clk_off(struct mpp_dev *mpp)
1086*4882a593Smuzhiyun {
1087*4882a593Smuzhiyun struct rkvdec2_dev *dec = to_rkvdec2_dev(mpp);
1088*4882a593Smuzhiyun
1089*4882a593Smuzhiyun clk_disable_unprepare(dec->aclk_info.clk);
1090*4882a593Smuzhiyun clk_disable_unprepare(dec->hclk_info.clk);
1091*4882a593Smuzhiyun clk_disable_unprepare(dec->core_clk_info.clk);
1092*4882a593Smuzhiyun clk_disable_unprepare(dec->cabac_clk_info.clk);
1093*4882a593Smuzhiyun clk_disable_unprepare(dec->hevc_cabac_clk_info.clk);
1094*4882a593Smuzhiyun
1095*4882a593Smuzhiyun return 0;
1096*4882a593Smuzhiyun }
1097*4882a593Smuzhiyun
rkvdec2_get_freq(struct mpp_dev * mpp,struct mpp_task * mpp_task)1098*4882a593Smuzhiyun static int rkvdec2_get_freq(struct mpp_dev *mpp,
1099*4882a593Smuzhiyun struct mpp_task *mpp_task)
1100*4882a593Smuzhiyun {
1101*4882a593Smuzhiyun u32 task_cnt;
1102*4882a593Smuzhiyun u32 workload;
1103*4882a593Smuzhiyun struct mpp_task *loop = NULL, *n;
1104*4882a593Smuzhiyun struct rkvdec2_dev *dec = to_rkvdec2_dev(mpp);
1105*4882a593Smuzhiyun struct rkvdec2_task *task = to_rkvdec2_task(mpp_task);
1106*4882a593Smuzhiyun
1107*4882a593Smuzhiyun /* if not set max load, consider not have advanced mode */
1108*4882a593Smuzhiyun if (!dec->default_max_load || !task->pixels)
1109*4882a593Smuzhiyun return 0;
1110*4882a593Smuzhiyun
1111*4882a593Smuzhiyun task_cnt = 1;
1112*4882a593Smuzhiyun workload = task->pixels;
1113*4882a593Smuzhiyun /* calc workload in pending list */
1114*4882a593Smuzhiyun mutex_lock(&mpp->queue->pending_lock);
1115*4882a593Smuzhiyun list_for_each_entry_safe(loop, n,
1116*4882a593Smuzhiyun &mpp->queue->pending_list,
1117*4882a593Smuzhiyun queue_link) {
1118*4882a593Smuzhiyun struct rkvdec2_task *loop_task = to_rkvdec2_task(loop);
1119*4882a593Smuzhiyun
1120*4882a593Smuzhiyun task_cnt++;
1121*4882a593Smuzhiyun workload += loop_task->pixels;
1122*4882a593Smuzhiyun }
1123*4882a593Smuzhiyun mutex_unlock(&mpp->queue->pending_lock);
1124*4882a593Smuzhiyun
1125*4882a593Smuzhiyun if (workload > dec->default_max_load)
1126*4882a593Smuzhiyun task->clk_mode = CLK_MODE_ADVANCED;
1127*4882a593Smuzhiyun
1128*4882a593Smuzhiyun mpp_debug(DEBUG_TASK_INFO, "pending task %d, workload %d, clk_mode=%d\n",
1129*4882a593Smuzhiyun task_cnt, workload, task->clk_mode);
1130*4882a593Smuzhiyun
1131*4882a593Smuzhiyun return 0;
1132*4882a593Smuzhiyun }
1133*4882a593Smuzhiyun
rkvdec2_set_freq(struct mpp_dev * mpp,struct mpp_task * mpp_task)1134*4882a593Smuzhiyun static int rkvdec2_set_freq(struct mpp_dev *mpp,
1135*4882a593Smuzhiyun struct mpp_task *mpp_task)
1136*4882a593Smuzhiyun {
1137*4882a593Smuzhiyun struct rkvdec2_dev *dec = to_rkvdec2_dev(mpp);
1138*4882a593Smuzhiyun struct rkvdec2_task *task = to_rkvdec2_task(mpp_task);
1139*4882a593Smuzhiyun
1140*4882a593Smuzhiyun mpp_clk_set_rate(&dec->aclk_info, task->clk_mode);
1141*4882a593Smuzhiyun mpp_clk_set_rate(&dec->cabac_clk_info, task->clk_mode);
1142*4882a593Smuzhiyun mpp_clk_set_rate(&dec->hevc_cabac_clk_info, task->clk_mode);
1143*4882a593Smuzhiyun mpp_devfreq_set_core_rate(mpp, task->clk_mode);
1144*4882a593Smuzhiyun
1145*4882a593Smuzhiyun return 0;
1146*4882a593Smuzhiyun }
1147*4882a593Smuzhiyun
rkvdec2_soft_reset(struct mpp_dev * mpp)1148*4882a593Smuzhiyun static int rkvdec2_soft_reset(struct mpp_dev *mpp)
1149*4882a593Smuzhiyun {
1150*4882a593Smuzhiyun int ret = 0;
1151*4882a593Smuzhiyun
1152*4882a593Smuzhiyun /*
1153*4882a593Smuzhiyun * for rk3528 and rk3562
1154*4882a593Smuzhiyun * use mmu reset instead of rkvdec soft reset
1155*4882a593Smuzhiyun * rkvdec will reset together when rkvdec_mmu force reset
1156*4882a593Smuzhiyun */
1157*4882a593Smuzhiyun ret = rockchip_iommu_force_reset(mpp->dev);
1158*4882a593Smuzhiyun if (ret)
1159*4882a593Smuzhiyun mpp_err("soft mmu reset fail, ret %d\n", ret);
1160*4882a593Smuzhiyun mpp_write(mpp, RKVDEC_REG_INT_EN, 0);
1161*4882a593Smuzhiyun
1162*4882a593Smuzhiyun return ret;
1163*4882a593Smuzhiyun
1164*4882a593Smuzhiyun }
1165*4882a593Smuzhiyun
rkvdec2_sip_reset(struct mpp_dev * mpp)1166*4882a593Smuzhiyun static int rkvdec2_sip_reset(struct mpp_dev *mpp)
1167*4882a593Smuzhiyun {
1168*4882a593Smuzhiyun mpp_debug_enter();
1169*4882a593Smuzhiyun
1170*4882a593Smuzhiyun if (IS_REACHABLE(CONFIG_ROCKCHIP_SIP)) {
1171*4882a593Smuzhiyun /* sip reset */
1172*4882a593Smuzhiyun rockchip_dmcfreq_lock();
1173*4882a593Smuzhiyun sip_smc_vpu_reset(0, 0, 0);
1174*4882a593Smuzhiyun rockchip_dmcfreq_unlock();
1175*4882a593Smuzhiyun } else {
1176*4882a593Smuzhiyun rkvdec2_reset(mpp);
1177*4882a593Smuzhiyun }
1178*4882a593Smuzhiyun
1179*4882a593Smuzhiyun mpp_debug_leave();
1180*4882a593Smuzhiyun
1181*4882a593Smuzhiyun return 0;
1182*4882a593Smuzhiyun }
1183*4882a593Smuzhiyun
rkvdec2_reset(struct mpp_dev * mpp)1184*4882a593Smuzhiyun int rkvdec2_reset(struct mpp_dev *mpp)
1185*4882a593Smuzhiyun {
1186*4882a593Smuzhiyun struct rkvdec2_dev *dec = to_rkvdec2_dev(mpp);
1187*4882a593Smuzhiyun int ret = 0;
1188*4882a593Smuzhiyun
1189*4882a593Smuzhiyun mpp_debug_enter();
1190*4882a593Smuzhiyun
1191*4882a593Smuzhiyun /* safe reset first*/
1192*4882a593Smuzhiyun ret = rkvdec2_soft_reset(mpp);
1193*4882a593Smuzhiyun
1194*4882a593Smuzhiyun /* cru reset */
1195*4882a593Smuzhiyun if (ret && dec->rst_a && dec->rst_h) {
1196*4882a593Smuzhiyun mpp_err("soft reset timeout, use cru reset\n");
1197*4882a593Smuzhiyun mpp_pmu_idle_request(mpp, true);
1198*4882a593Smuzhiyun mpp_safe_reset(dec->rst_niu_a);
1199*4882a593Smuzhiyun mpp_safe_reset(dec->rst_niu_h);
1200*4882a593Smuzhiyun mpp_safe_reset(dec->rst_a);
1201*4882a593Smuzhiyun mpp_safe_reset(dec->rst_h);
1202*4882a593Smuzhiyun mpp_safe_reset(dec->rst_core);
1203*4882a593Smuzhiyun mpp_safe_reset(dec->rst_cabac);
1204*4882a593Smuzhiyun mpp_safe_reset(dec->rst_hevc_cabac);
1205*4882a593Smuzhiyun udelay(5);
1206*4882a593Smuzhiyun mpp_safe_unreset(dec->rst_niu_h);
1207*4882a593Smuzhiyun mpp_safe_unreset(dec->rst_niu_a);
1208*4882a593Smuzhiyun mpp_safe_unreset(dec->rst_a);
1209*4882a593Smuzhiyun mpp_safe_unreset(dec->rst_h);
1210*4882a593Smuzhiyun mpp_safe_unreset(dec->rst_core);
1211*4882a593Smuzhiyun mpp_safe_unreset(dec->rst_cabac);
1212*4882a593Smuzhiyun mpp_safe_unreset(dec->rst_hevc_cabac);
1213*4882a593Smuzhiyun mpp_pmu_idle_request(mpp, false);
1214*4882a593Smuzhiyun }
1215*4882a593Smuzhiyun mpp_debug_leave();
1216*4882a593Smuzhiyun
1217*4882a593Smuzhiyun return 0;
1218*4882a593Smuzhiyun }
1219*4882a593Smuzhiyun
1220*4882a593Smuzhiyun static struct mpp_hw_ops rkvdec_v2_hw_ops = {
1221*4882a593Smuzhiyun .init = rkvdec2_init,
1222*4882a593Smuzhiyun .clk_on = rkvdec2_clk_on,
1223*4882a593Smuzhiyun .clk_off = rkvdec2_clk_off,
1224*4882a593Smuzhiyun .get_freq = rkvdec2_get_freq,
1225*4882a593Smuzhiyun .set_freq = rkvdec2_set_freq,
1226*4882a593Smuzhiyun .reset = rkvdec2_reset,
1227*4882a593Smuzhiyun };
1228*4882a593Smuzhiyun
1229*4882a593Smuzhiyun static struct mpp_hw_ops rkvdec_rk3568_hw_ops = {
1230*4882a593Smuzhiyun .init = rkvdec2_rk3568_init,
1231*4882a593Smuzhiyun .exit = rkvdec2_rk3568_exit,
1232*4882a593Smuzhiyun .clk_on = rkvdec2_clk_on,
1233*4882a593Smuzhiyun .clk_off = rkvdec2_clk_off,
1234*4882a593Smuzhiyun .get_freq = rkvdec2_get_freq,
1235*4882a593Smuzhiyun .set_freq = rkvdec2_set_freq,
1236*4882a593Smuzhiyun .reset = rkvdec2_sip_reset,
1237*4882a593Smuzhiyun };
1238*4882a593Smuzhiyun
1239*4882a593Smuzhiyun static struct mpp_hw_ops rkvdec_rk3588_hw_ops = {
1240*4882a593Smuzhiyun .init = rkvdec2_init,
1241*4882a593Smuzhiyun .clk_on = rkvdec2_clk_on,
1242*4882a593Smuzhiyun .clk_off = rkvdec2_clk_off,
1243*4882a593Smuzhiyun .get_freq = rkvdec2_get_freq,
1244*4882a593Smuzhiyun .set_freq = rkvdec2_set_freq,
1245*4882a593Smuzhiyun .reset = rkvdec2_sip_reset,
1246*4882a593Smuzhiyun };
1247*4882a593Smuzhiyun
1248*4882a593Smuzhiyun static struct mpp_dev_ops rkvdec_v2_dev_ops = {
1249*4882a593Smuzhiyun .alloc_task = rkvdec2_alloc_task,
1250*4882a593Smuzhiyun .run = rkvdec2_run,
1251*4882a593Smuzhiyun .irq = rkvdec2_irq,
1252*4882a593Smuzhiyun .isr = rkvdec2_isr,
1253*4882a593Smuzhiyun .finish = rkvdec2_finish,
1254*4882a593Smuzhiyun .result = rkvdec2_result,
1255*4882a593Smuzhiyun .free_task = rkvdec2_free_task,
1256*4882a593Smuzhiyun .ioctl = rkvdec2_control,
1257*4882a593Smuzhiyun .init_session = rkvdec2_init_session,
1258*4882a593Smuzhiyun .free_session = rkvdec2_free_session,
1259*4882a593Smuzhiyun };
1260*4882a593Smuzhiyun
1261*4882a593Smuzhiyun static struct mpp_dev_ops rkvdec_rk3568_dev_ops = {
1262*4882a593Smuzhiyun .alloc_task = rkvdec2_rk3568_alloc_task,
1263*4882a593Smuzhiyun .run = rkvdec2_rk3568_run,
1264*4882a593Smuzhiyun .irq = rkvdec2_irq,
1265*4882a593Smuzhiyun .isr = rkvdec2_isr,
1266*4882a593Smuzhiyun .finish = rkvdec2_finish,
1267*4882a593Smuzhiyun .result = rkvdec2_result,
1268*4882a593Smuzhiyun .free_task = rkvdec2_free_task,
1269*4882a593Smuzhiyun .ioctl = rkvdec2_control,
1270*4882a593Smuzhiyun .init_session = rkvdec2_init_session,
1271*4882a593Smuzhiyun .free_session = rkvdec2_free_session,
1272*4882a593Smuzhiyun .dump_dev = rkvdec_link_dump,
1273*4882a593Smuzhiyun };
1274*4882a593Smuzhiyun
1275*4882a593Smuzhiyun static const struct mpp_dev_var rkvdec_v2_data = {
1276*4882a593Smuzhiyun .device_type = MPP_DEVICE_RKVDEC,
1277*4882a593Smuzhiyun .hw_info = &rkvdec_v2_hw_info,
1278*4882a593Smuzhiyun .trans_info = rkvdec_v2_trans,
1279*4882a593Smuzhiyun .hw_ops = &rkvdec_v2_hw_ops,
1280*4882a593Smuzhiyun .dev_ops = &rkvdec_v2_dev_ops,
1281*4882a593Smuzhiyun };
1282*4882a593Smuzhiyun
1283*4882a593Smuzhiyun static const struct mpp_dev_var rkvdec_rk3568_data = {
1284*4882a593Smuzhiyun .device_type = MPP_DEVICE_RKVDEC,
1285*4882a593Smuzhiyun .hw_info = &rkvdec_rk356x_hw_info,
1286*4882a593Smuzhiyun .trans_info = rkvdec_v2_trans,
1287*4882a593Smuzhiyun .hw_ops = &rkvdec_rk3568_hw_ops,
1288*4882a593Smuzhiyun .dev_ops = &rkvdec_rk3568_dev_ops,
1289*4882a593Smuzhiyun };
1290*4882a593Smuzhiyun
1291*4882a593Smuzhiyun static const struct mpp_dev_var rkvdec_vdpu382_data = {
1292*4882a593Smuzhiyun .device_type = MPP_DEVICE_RKVDEC,
1293*4882a593Smuzhiyun .hw_info = &rkvdec_vdpu382_hw_info,
1294*4882a593Smuzhiyun .trans_info = rkvdec_v2_trans,
1295*4882a593Smuzhiyun .hw_ops = &rkvdec_v2_hw_ops,
1296*4882a593Smuzhiyun .dev_ops = &rkvdec_v2_dev_ops,
1297*4882a593Smuzhiyun };
1298*4882a593Smuzhiyun
1299*4882a593Smuzhiyun static const struct mpp_dev_var rkvdec_rk3588_data = {
1300*4882a593Smuzhiyun .device_type = MPP_DEVICE_RKVDEC,
1301*4882a593Smuzhiyun .hw_info = &rkvdec_v2_hw_info,
1302*4882a593Smuzhiyun .trans_info = rkvdec_v2_trans,
1303*4882a593Smuzhiyun .hw_ops = &rkvdec_rk3588_hw_ops,
1304*4882a593Smuzhiyun .dev_ops = &rkvdec_v2_dev_ops,
1305*4882a593Smuzhiyun };
1306*4882a593Smuzhiyun
1307*4882a593Smuzhiyun static const struct of_device_id mpp_rkvdec2_dt_match[] = {
1308*4882a593Smuzhiyun {
1309*4882a593Smuzhiyun .compatible = "rockchip,rkv-decoder-v2",
1310*4882a593Smuzhiyun .data = &rkvdec_v2_data,
1311*4882a593Smuzhiyun },
1312*4882a593Smuzhiyun #ifdef CONFIG_CPU_RK3568
1313*4882a593Smuzhiyun {
1314*4882a593Smuzhiyun .compatible = "rockchip,rkv-decoder-rk3568",
1315*4882a593Smuzhiyun .data = &rkvdec_rk3568_data,
1316*4882a593Smuzhiyun },
1317*4882a593Smuzhiyun #endif
1318*4882a593Smuzhiyun #ifdef CONFIG_CPU_RK3588
1319*4882a593Smuzhiyun {
1320*4882a593Smuzhiyun .compatible = "rockchip,rkv-decoder-v2-ccu",
1321*4882a593Smuzhiyun .data = &rkvdec_rk3588_data,
1322*4882a593Smuzhiyun },
1323*4882a593Smuzhiyun #endif
1324*4882a593Smuzhiyun #ifdef CONFIG_CPU_RK3528
1325*4882a593Smuzhiyun {
1326*4882a593Smuzhiyun .compatible = "rockchip,rkv-decoder-rk3528",
1327*4882a593Smuzhiyun .data = &rkvdec_vdpu382_data,
1328*4882a593Smuzhiyun },
1329*4882a593Smuzhiyun #endif
1330*4882a593Smuzhiyun #ifdef CONFIG_CPU_RK3562
1331*4882a593Smuzhiyun {
1332*4882a593Smuzhiyun .compatible = "rockchip,rkv-decoder-rk3562",
1333*4882a593Smuzhiyun .data = &rkvdec_vdpu382_data,
1334*4882a593Smuzhiyun },
1335*4882a593Smuzhiyun #endif
1336*4882a593Smuzhiyun {},
1337*4882a593Smuzhiyun };
1338*4882a593Smuzhiyun
rkvdec2_ccu_remove(struct device * dev)1339*4882a593Smuzhiyun static int rkvdec2_ccu_remove(struct device *dev)
1340*4882a593Smuzhiyun {
1341*4882a593Smuzhiyun device_init_wakeup(dev, false);
1342*4882a593Smuzhiyun pm_runtime_disable(dev);
1343*4882a593Smuzhiyun
1344*4882a593Smuzhiyun return 0;
1345*4882a593Smuzhiyun }
1346*4882a593Smuzhiyun
rkvdec2_ccu_probe(struct platform_device * pdev)1347*4882a593Smuzhiyun static int rkvdec2_ccu_probe(struct platform_device *pdev)
1348*4882a593Smuzhiyun {
1349*4882a593Smuzhiyun struct rkvdec2_ccu *ccu;
1350*4882a593Smuzhiyun struct resource *res;
1351*4882a593Smuzhiyun struct device *dev = &pdev->dev;
1352*4882a593Smuzhiyun u32 ccu_mode;
1353*4882a593Smuzhiyun
1354*4882a593Smuzhiyun ccu = devm_kzalloc(dev, sizeof(*ccu), GFP_KERNEL);
1355*4882a593Smuzhiyun if (!ccu)
1356*4882a593Smuzhiyun return -ENOMEM;
1357*4882a593Smuzhiyun
1358*4882a593Smuzhiyun ccu->dev = dev;
1359*4882a593Smuzhiyun /* use task-level soft ccu default */
1360*4882a593Smuzhiyun ccu->ccu_mode = RKVDEC2_CCU_TASK_SOFT;
1361*4882a593Smuzhiyun atomic_set(&ccu->power_enabled, 0);
1362*4882a593Smuzhiyun INIT_LIST_HEAD(&ccu->unused_list);
1363*4882a593Smuzhiyun INIT_LIST_HEAD(&ccu->used_list);
1364*4882a593Smuzhiyun platform_set_drvdata(pdev, ccu);
1365*4882a593Smuzhiyun
1366*4882a593Smuzhiyun if (!of_property_read_u32(dev->of_node, "rockchip,ccu-mode", &ccu_mode)) {
1367*4882a593Smuzhiyun if (ccu_mode <= RKVDEC2_CCU_MODE_NULL || ccu_mode >= RKVDEC2_CCU_MODE_BUTT)
1368*4882a593Smuzhiyun ccu_mode = RKVDEC2_CCU_TASK_SOFT;
1369*4882a593Smuzhiyun ccu->ccu_mode = (enum RKVDEC2_CCU_MODE)ccu_mode;
1370*4882a593Smuzhiyun }
1371*4882a593Smuzhiyun
1372*4882a593Smuzhiyun res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ccu");
1373*4882a593Smuzhiyun if (!res) {
1374*4882a593Smuzhiyun dev_err(dev, "no memory resource defined\n");
1375*4882a593Smuzhiyun return -ENODEV;
1376*4882a593Smuzhiyun }
1377*4882a593Smuzhiyun
1378*4882a593Smuzhiyun ccu->reg_base = devm_ioremap(dev, res->start, resource_size(res));
1379*4882a593Smuzhiyun if (!ccu->reg_base) {
1380*4882a593Smuzhiyun dev_err(dev, "ioremap failed for resource %pR\n", res);
1381*4882a593Smuzhiyun return -ENODEV;
1382*4882a593Smuzhiyun }
1383*4882a593Smuzhiyun
1384*4882a593Smuzhiyun ccu->aclk_info.clk = devm_clk_get(dev, "aclk_ccu");
1385*4882a593Smuzhiyun if (!ccu->aclk_info.clk)
1386*4882a593Smuzhiyun mpp_err("failed on clk_get ccu aclk\n");
1387*4882a593Smuzhiyun
1388*4882a593Smuzhiyun ccu->rst_a = devm_reset_control_get(dev, "video_ccu");
1389*4882a593Smuzhiyun if (ccu->rst_a)
1390*4882a593Smuzhiyun mpp_safe_unreset(ccu->rst_a);
1391*4882a593Smuzhiyun else
1392*4882a593Smuzhiyun mpp_err("failed on clk_get ccu reset\n");
1393*4882a593Smuzhiyun
1394*4882a593Smuzhiyun /* power domain autosuspend delay 2s */
1395*4882a593Smuzhiyun pm_runtime_set_autosuspend_delay(dev, 2000);
1396*4882a593Smuzhiyun pm_runtime_use_autosuspend(dev);
1397*4882a593Smuzhiyun device_init_wakeup(dev, true);
1398*4882a593Smuzhiyun pm_runtime_enable(dev);
1399*4882a593Smuzhiyun
1400*4882a593Smuzhiyun dev_info(dev, "ccu-mode: %d\n", ccu->ccu_mode);
1401*4882a593Smuzhiyun return 0;
1402*4882a593Smuzhiyun }
1403*4882a593Smuzhiyun
rkvdec2_alloc_rcbbuf(struct platform_device * pdev,struct rkvdec2_dev * dec)1404*4882a593Smuzhiyun static int rkvdec2_alloc_rcbbuf(struct platform_device *pdev, struct rkvdec2_dev *dec)
1405*4882a593Smuzhiyun {
1406*4882a593Smuzhiyun int ret;
1407*4882a593Smuzhiyun u32 vals[2];
1408*4882a593Smuzhiyun dma_addr_t iova;
1409*4882a593Smuzhiyun u32 rcb_size, sram_size;
1410*4882a593Smuzhiyun struct device_node *sram_np;
1411*4882a593Smuzhiyun struct resource sram_res;
1412*4882a593Smuzhiyun resource_size_t sram_start, sram_end;
1413*4882a593Smuzhiyun struct iommu_domain *domain;
1414*4882a593Smuzhiyun struct device *dev = &pdev->dev;
1415*4882a593Smuzhiyun
1416*4882a593Smuzhiyun /* get rcb iova start and size */
1417*4882a593Smuzhiyun ret = device_property_read_u32_array(dev, "rockchip,rcb-iova", vals, 2);
1418*4882a593Smuzhiyun if (ret) {
1419*4882a593Smuzhiyun dev_err(dev, "could not find property rcb-iova\n");
1420*4882a593Smuzhiyun return ret;
1421*4882a593Smuzhiyun }
1422*4882a593Smuzhiyun iova = PAGE_ALIGN(vals[0]);
1423*4882a593Smuzhiyun rcb_size = PAGE_ALIGN(vals[1]);
1424*4882a593Smuzhiyun if (!rcb_size) {
1425*4882a593Smuzhiyun dev_err(dev, "rcb_size invalid.\n");
1426*4882a593Smuzhiyun return -EINVAL;
1427*4882a593Smuzhiyun }
1428*4882a593Smuzhiyun /* alloc reserve iova for rcb */
1429*4882a593Smuzhiyun ret = iommu_dma_reserve_iova(dev, iova, rcb_size);
1430*4882a593Smuzhiyun if (ret) {
1431*4882a593Smuzhiyun dev_err(dev, "alloc rcb iova error.\n");
1432*4882a593Smuzhiyun return ret;
1433*4882a593Smuzhiyun }
1434*4882a593Smuzhiyun /* get sram device node */
1435*4882a593Smuzhiyun sram_np = of_parse_phandle(dev->of_node, "rockchip,sram", 0);
1436*4882a593Smuzhiyun if (!sram_np) {
1437*4882a593Smuzhiyun dev_err(dev, "could not find phandle sram\n");
1438*4882a593Smuzhiyun return -ENODEV;
1439*4882a593Smuzhiyun }
1440*4882a593Smuzhiyun /* get sram start and size */
1441*4882a593Smuzhiyun ret = of_address_to_resource(sram_np, 0, &sram_res);
1442*4882a593Smuzhiyun of_node_put(sram_np);
1443*4882a593Smuzhiyun if (ret) {
1444*4882a593Smuzhiyun dev_err(dev, "find sram res error\n");
1445*4882a593Smuzhiyun return ret;
1446*4882a593Smuzhiyun }
1447*4882a593Smuzhiyun /* check sram start and size is PAGE_SIZE align */
1448*4882a593Smuzhiyun sram_start = round_up(sram_res.start, PAGE_SIZE);
1449*4882a593Smuzhiyun sram_end = round_down(sram_res.start + resource_size(&sram_res), PAGE_SIZE);
1450*4882a593Smuzhiyun if (sram_end <= sram_start) {
1451*4882a593Smuzhiyun dev_err(dev, "no available sram, phy_start %pa, phy_end %pa\n",
1452*4882a593Smuzhiyun &sram_start, &sram_end);
1453*4882a593Smuzhiyun return -ENOMEM;
1454*4882a593Smuzhiyun }
1455*4882a593Smuzhiyun sram_size = sram_end - sram_start;
1456*4882a593Smuzhiyun sram_size = rcb_size < sram_size ? rcb_size : sram_size;
1457*4882a593Smuzhiyun /* iova map to sram */
1458*4882a593Smuzhiyun domain = dec->mpp.iommu_info->domain;
1459*4882a593Smuzhiyun ret = iommu_map(domain, iova, sram_start, sram_size, IOMMU_READ | IOMMU_WRITE);
1460*4882a593Smuzhiyun if (ret) {
1461*4882a593Smuzhiyun dev_err(dev, "sram iommu_map error.\n");
1462*4882a593Smuzhiyun return ret;
1463*4882a593Smuzhiyun }
1464*4882a593Smuzhiyun /* alloc dma for the remaining buffer, sram + dma */
1465*4882a593Smuzhiyun if (sram_size < rcb_size) {
1466*4882a593Smuzhiyun struct page *page;
1467*4882a593Smuzhiyun size_t page_size = PAGE_ALIGN(rcb_size - sram_size);
1468*4882a593Smuzhiyun
1469*4882a593Smuzhiyun page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(page_size));
1470*4882a593Smuzhiyun if (!page) {
1471*4882a593Smuzhiyun dev_err(dev, "unable to allocate pages\n");
1472*4882a593Smuzhiyun ret = -ENOMEM;
1473*4882a593Smuzhiyun goto err_sram_map;
1474*4882a593Smuzhiyun }
1475*4882a593Smuzhiyun /* iova map to dma */
1476*4882a593Smuzhiyun ret = iommu_map(domain, iova + sram_size, page_to_phys(page),
1477*4882a593Smuzhiyun page_size, IOMMU_READ | IOMMU_WRITE);
1478*4882a593Smuzhiyun if (ret) {
1479*4882a593Smuzhiyun dev_err(dev, "page iommu_map error.\n");
1480*4882a593Smuzhiyun __free_pages(page, get_order(page_size));
1481*4882a593Smuzhiyun goto err_sram_map;
1482*4882a593Smuzhiyun }
1483*4882a593Smuzhiyun dec->rcb_page = page;
1484*4882a593Smuzhiyun }
1485*4882a593Smuzhiyun dec->sram_size = sram_size;
1486*4882a593Smuzhiyun dec->rcb_size = rcb_size;
1487*4882a593Smuzhiyun dec->rcb_iova = iova;
1488*4882a593Smuzhiyun dev_info(dev, "sram_start %pa\n", &sram_start);
1489*4882a593Smuzhiyun dev_info(dev, "rcb_iova %pad\n", &dec->rcb_iova);
1490*4882a593Smuzhiyun dev_info(dev, "sram_size %u\n", dec->sram_size);
1491*4882a593Smuzhiyun dev_info(dev, "rcb_size %u\n", dec->rcb_size);
1492*4882a593Smuzhiyun
1493*4882a593Smuzhiyun ret = of_property_read_u32(dev->of_node, "rockchip,rcb-min-width", &dec->rcb_min_width);
1494*4882a593Smuzhiyun if (!ret && dec->rcb_min_width)
1495*4882a593Smuzhiyun dev_info(dev, "min_width %u\n", dec->rcb_min_width);
1496*4882a593Smuzhiyun
1497*4882a593Smuzhiyun /* if have, read rcb_info */
1498*4882a593Smuzhiyun dec->rcb_info_count = device_property_count_u32(dev, "rockchip,rcb-info");
1499*4882a593Smuzhiyun if (dec->rcb_info_count > 0 &&
1500*4882a593Smuzhiyun dec->rcb_info_count <= (sizeof(dec->rcb_infos) / sizeof(u32))) {
1501*4882a593Smuzhiyun int i;
1502*4882a593Smuzhiyun
1503*4882a593Smuzhiyun ret = device_property_read_u32_array(dev, "rockchip,rcb-info",
1504*4882a593Smuzhiyun dec->rcb_infos, dec->rcb_info_count);
1505*4882a593Smuzhiyun if (!ret) {
1506*4882a593Smuzhiyun dev_info(dev, "rcb_info_count %u\n", dec->rcb_info_count);
1507*4882a593Smuzhiyun for (i = 0; i < dec->rcb_info_count; i += 2)
1508*4882a593Smuzhiyun dev_info(dev, "[%u, %u]\n",
1509*4882a593Smuzhiyun dec->rcb_infos[i], dec->rcb_infos[i+1]);
1510*4882a593Smuzhiyun }
1511*4882a593Smuzhiyun }
1512*4882a593Smuzhiyun
1513*4882a593Smuzhiyun return 0;
1514*4882a593Smuzhiyun
1515*4882a593Smuzhiyun err_sram_map:
1516*4882a593Smuzhiyun iommu_unmap(domain, iova, sram_size);
1517*4882a593Smuzhiyun
1518*4882a593Smuzhiyun return ret;
1519*4882a593Smuzhiyun }
1520*4882a593Smuzhiyun
rkvdec2_core_probe(struct platform_device * pdev)1521*4882a593Smuzhiyun static int rkvdec2_core_probe(struct platform_device *pdev)
1522*4882a593Smuzhiyun {
1523*4882a593Smuzhiyun int ret;
1524*4882a593Smuzhiyun struct rkvdec2_dev *dec;
1525*4882a593Smuzhiyun struct mpp_dev *mpp;
1526*4882a593Smuzhiyun struct device *dev = &pdev->dev;
1527*4882a593Smuzhiyun irq_handler_t irq_proc = NULL;
1528*4882a593Smuzhiyun
1529*4882a593Smuzhiyun dec = devm_kzalloc(dev, sizeof(*dec), GFP_KERNEL);
1530*4882a593Smuzhiyun if (!dec)
1531*4882a593Smuzhiyun return -ENOMEM;
1532*4882a593Smuzhiyun
1533*4882a593Smuzhiyun mpp = &dec->mpp;
1534*4882a593Smuzhiyun platform_set_drvdata(pdev, mpp);
1535*4882a593Smuzhiyun mpp->is_irq_startup = false;
1536*4882a593Smuzhiyun if (dev->of_node) {
1537*4882a593Smuzhiyun struct device_node *np = pdev->dev.of_node;
1538*4882a593Smuzhiyun const struct of_device_id *match;
1539*4882a593Smuzhiyun
1540*4882a593Smuzhiyun match = of_match_node(mpp_rkvdec2_dt_match, dev->of_node);
1541*4882a593Smuzhiyun if (match)
1542*4882a593Smuzhiyun mpp->var = (struct mpp_dev_var *)match->data;
1543*4882a593Smuzhiyun mpp->core_id = of_alias_get_id(np, "rkvdec");
1544*4882a593Smuzhiyun }
1545*4882a593Smuzhiyun
1546*4882a593Smuzhiyun ret = mpp_dev_probe(mpp, pdev);
1547*4882a593Smuzhiyun if (ret) {
1548*4882a593Smuzhiyun dev_err(dev, "probe sub driver failed\n");
1549*4882a593Smuzhiyun return ret;
1550*4882a593Smuzhiyun }
1551*4882a593Smuzhiyun dec->mmu_base = ioremap(dec->mpp.io_base + 0x600, 0x80);
1552*4882a593Smuzhiyun if (!dec->mmu_base)
1553*4882a593Smuzhiyun dev_err(dev, "mmu base map failed!\n");
1554*4882a593Smuzhiyun
1555*4882a593Smuzhiyun /* attach core to ccu */
1556*4882a593Smuzhiyun ret = rkvdec2_attach_ccu(dev, dec);
1557*4882a593Smuzhiyun if (ret) {
1558*4882a593Smuzhiyun dev_err(dev, "attach ccu failed\n");
1559*4882a593Smuzhiyun return ret;
1560*4882a593Smuzhiyun }
1561*4882a593Smuzhiyun
1562*4882a593Smuzhiyun /* alloc rcb buffer */
1563*4882a593Smuzhiyun rkvdec2_alloc_rcbbuf(pdev, dec);
1564*4882a593Smuzhiyun
1565*4882a593Smuzhiyun /* set device for link */
1566*4882a593Smuzhiyun ret = rkvdec2_ccu_link_init(pdev, dec);
1567*4882a593Smuzhiyun if (ret)
1568*4882a593Smuzhiyun return ret;
1569*4882a593Smuzhiyun
1570*4882a593Smuzhiyun mpp->dev_ops->alloc_task = rkvdec2_ccu_alloc_task;
1571*4882a593Smuzhiyun if (dec->ccu->ccu_mode == RKVDEC2_CCU_TASK_SOFT) {
1572*4882a593Smuzhiyun mpp->dev_ops->task_worker = rkvdec2_soft_ccu_worker;
1573*4882a593Smuzhiyun irq_proc = rkvdec2_soft_ccu_irq;
1574*4882a593Smuzhiyun } else if (dec->ccu->ccu_mode == RKVDEC2_CCU_TASK_HARD) {
1575*4882a593Smuzhiyun if (mpp->core_id == 0 && mpp->task_capacity > 1) {
1576*4882a593Smuzhiyun dec->link_dec->task_capacity = mpp->task_capacity;
1577*4882a593Smuzhiyun ret = rkvdec2_ccu_alloc_table(dec, dec->link_dec);
1578*4882a593Smuzhiyun if (ret)
1579*4882a593Smuzhiyun return ret;
1580*4882a593Smuzhiyun }
1581*4882a593Smuzhiyun mpp->dev_ops->task_worker = rkvdec2_hard_ccu_worker;
1582*4882a593Smuzhiyun irq_proc = rkvdec2_hard_ccu_irq;
1583*4882a593Smuzhiyun }
1584*4882a593Smuzhiyun mpp->iommu_info->hdl = rkvdec2_ccu_iommu_fault_handle;
1585*4882a593Smuzhiyun kthread_init_work(&mpp->work, mpp->dev_ops->task_worker);
1586*4882a593Smuzhiyun
1587*4882a593Smuzhiyun /* get irq request */
1588*4882a593Smuzhiyun ret = devm_request_threaded_irq(dev, mpp->irq, irq_proc, NULL,
1589*4882a593Smuzhiyun IRQF_SHARED, dev_name(dev), mpp);
1590*4882a593Smuzhiyun if (ret) {
1591*4882a593Smuzhiyun dev_err(dev, "register interrupter runtime failed\n");
1592*4882a593Smuzhiyun return -EINVAL;
1593*4882a593Smuzhiyun }
1594*4882a593Smuzhiyun /*make sure mpp->irq is startup then can be en/disable*/
1595*4882a593Smuzhiyun mpp->is_irq_startup = true;
1596*4882a593Smuzhiyun
1597*4882a593Smuzhiyun mpp->session_max_buffers = RKVDEC_SESSION_MAX_BUFFERS;
1598*4882a593Smuzhiyun rkvdec2_procfs_init(mpp);
1599*4882a593Smuzhiyun
1600*4882a593Smuzhiyun /* if is main-core, register to mpp service */
1601*4882a593Smuzhiyun if (mpp->core_id == 0)
1602*4882a593Smuzhiyun mpp_dev_register_srv(mpp, mpp->srv);
1603*4882a593Smuzhiyun
1604*4882a593Smuzhiyun return ret;
1605*4882a593Smuzhiyun }
1606*4882a593Smuzhiyun
rkvdec2_probe_default(struct platform_device * pdev)1607*4882a593Smuzhiyun static int rkvdec2_probe_default(struct platform_device *pdev)
1608*4882a593Smuzhiyun {
1609*4882a593Smuzhiyun struct device *dev = &pdev->dev;
1610*4882a593Smuzhiyun struct rkvdec2_dev *dec = NULL;
1611*4882a593Smuzhiyun struct mpp_dev *mpp = NULL;
1612*4882a593Smuzhiyun const struct of_device_id *match = NULL;
1613*4882a593Smuzhiyun int ret = 0;
1614*4882a593Smuzhiyun
1615*4882a593Smuzhiyun dec = devm_kzalloc(dev, sizeof(*dec), GFP_KERNEL);
1616*4882a593Smuzhiyun if (!dec)
1617*4882a593Smuzhiyun return -ENOMEM;
1618*4882a593Smuzhiyun
1619*4882a593Smuzhiyun mpp = &dec->mpp;
1620*4882a593Smuzhiyun platform_set_drvdata(pdev, mpp);
1621*4882a593Smuzhiyun
1622*4882a593Smuzhiyun if (pdev->dev.of_node) {
1623*4882a593Smuzhiyun match = of_match_node(mpp_rkvdec2_dt_match, pdev->dev.of_node);
1624*4882a593Smuzhiyun if (match)
1625*4882a593Smuzhiyun mpp->var = (struct mpp_dev_var *)match->data;
1626*4882a593Smuzhiyun }
1627*4882a593Smuzhiyun
1628*4882a593Smuzhiyun ret = mpp_dev_probe(mpp, pdev);
1629*4882a593Smuzhiyun if (ret) {
1630*4882a593Smuzhiyun dev_err(dev, "probe sub driver failed\n");
1631*4882a593Smuzhiyun return ret;
1632*4882a593Smuzhiyun }
1633*4882a593Smuzhiyun
1634*4882a593Smuzhiyun rkvdec2_alloc_rcbbuf(pdev, dec);
1635*4882a593Smuzhiyun rkvdec2_link_init(pdev, dec);
1636*4882a593Smuzhiyun
1637*4882a593Smuzhiyun if (dec->link_dec) {
1638*4882a593Smuzhiyun ret = devm_request_threaded_irq(dev, mpp->irq,
1639*4882a593Smuzhiyun rkvdec2_link_irq_proc, NULL,
1640*4882a593Smuzhiyun IRQF_SHARED, dev_name(dev), mpp);
1641*4882a593Smuzhiyun mpp->dev_ops->process_task = rkvdec2_link_process_task;
1642*4882a593Smuzhiyun mpp->dev_ops->wait_result = rkvdec2_link_wait_result;
1643*4882a593Smuzhiyun mpp->dev_ops->task_worker = rkvdec2_link_worker;
1644*4882a593Smuzhiyun mpp->dev_ops->deinit = rkvdec2_link_session_deinit;
1645*4882a593Smuzhiyun kthread_init_work(&mpp->work, rkvdec2_link_worker);
1646*4882a593Smuzhiyun } else {
1647*4882a593Smuzhiyun ret = devm_request_threaded_irq(dev, mpp->irq,
1648*4882a593Smuzhiyun mpp_dev_irq, mpp_dev_isr_sched,
1649*4882a593Smuzhiyun IRQF_SHARED, dev_name(dev), mpp);
1650*4882a593Smuzhiyun }
1651*4882a593Smuzhiyun if (ret) {
1652*4882a593Smuzhiyun dev_err(dev, "register interrupter runtime failed\n");
1653*4882a593Smuzhiyun return -EINVAL;
1654*4882a593Smuzhiyun }
1655*4882a593Smuzhiyun
1656*4882a593Smuzhiyun mpp->session_max_buffers = RKVDEC_SESSION_MAX_BUFFERS;
1657*4882a593Smuzhiyun rkvdec2_procfs_init(mpp);
1658*4882a593Smuzhiyun rkvdec2_link_procfs_init(mpp);
1659*4882a593Smuzhiyun /* register current device to mpp service */
1660*4882a593Smuzhiyun mpp_dev_register_srv(mpp, mpp->srv);
1661*4882a593Smuzhiyun
1662*4882a593Smuzhiyun return ret;
1663*4882a593Smuzhiyun }
1664*4882a593Smuzhiyun
rkvdec2_probe(struct platform_device * pdev)1665*4882a593Smuzhiyun static int rkvdec2_probe(struct platform_device *pdev)
1666*4882a593Smuzhiyun {
1667*4882a593Smuzhiyun int ret;
1668*4882a593Smuzhiyun struct device *dev = &pdev->dev;
1669*4882a593Smuzhiyun struct device_node *np = dev->of_node;
1670*4882a593Smuzhiyun
1671*4882a593Smuzhiyun dev_info(dev, "%s, probing start\n", np->name);
1672*4882a593Smuzhiyun
1673*4882a593Smuzhiyun if (strstr(np->name, "ccu"))
1674*4882a593Smuzhiyun ret = rkvdec2_ccu_probe(pdev);
1675*4882a593Smuzhiyun else if (strstr(np->name, "core"))
1676*4882a593Smuzhiyun ret = rkvdec2_core_probe(pdev);
1677*4882a593Smuzhiyun else
1678*4882a593Smuzhiyun ret = rkvdec2_probe_default(pdev);
1679*4882a593Smuzhiyun
1680*4882a593Smuzhiyun dev_info(dev, "probing finish\n");
1681*4882a593Smuzhiyun
1682*4882a593Smuzhiyun return ret;
1683*4882a593Smuzhiyun }
1684*4882a593Smuzhiyun
rkvdec2_free_rcbbuf(struct platform_device * pdev,struct rkvdec2_dev * dec)1685*4882a593Smuzhiyun static int rkvdec2_free_rcbbuf(struct platform_device *pdev, struct rkvdec2_dev *dec)
1686*4882a593Smuzhiyun {
1687*4882a593Smuzhiyun struct iommu_domain *domain;
1688*4882a593Smuzhiyun
1689*4882a593Smuzhiyun if (dec->rcb_page) {
1690*4882a593Smuzhiyun size_t page_size = PAGE_ALIGN(dec->rcb_size - dec->sram_size);
1691*4882a593Smuzhiyun int order = min(get_order(page_size), MAX_ORDER);
1692*4882a593Smuzhiyun
1693*4882a593Smuzhiyun __free_pages(dec->rcb_page, order);
1694*4882a593Smuzhiyun }
1695*4882a593Smuzhiyun if (dec->rcb_iova) {
1696*4882a593Smuzhiyun domain = dec->mpp.iommu_info->domain;
1697*4882a593Smuzhiyun iommu_unmap(domain, dec->rcb_iova, dec->rcb_size);
1698*4882a593Smuzhiyun }
1699*4882a593Smuzhiyun
1700*4882a593Smuzhiyun return 0;
1701*4882a593Smuzhiyun }
1702*4882a593Smuzhiyun
rkvdec2_remove(struct platform_device * pdev)1703*4882a593Smuzhiyun static int rkvdec2_remove(struct platform_device *pdev)
1704*4882a593Smuzhiyun {
1705*4882a593Smuzhiyun struct device *dev = &pdev->dev;
1706*4882a593Smuzhiyun
1707*4882a593Smuzhiyun if (strstr(dev_name(dev), "ccu")) {
1708*4882a593Smuzhiyun dev_info(dev, "remove ccu device\n");
1709*4882a593Smuzhiyun rkvdec2_ccu_remove(dev);
1710*4882a593Smuzhiyun } else {
1711*4882a593Smuzhiyun struct mpp_dev *mpp = dev_get_drvdata(dev);
1712*4882a593Smuzhiyun struct rkvdec2_dev *dec = to_rkvdec2_dev(mpp);
1713*4882a593Smuzhiyun
1714*4882a593Smuzhiyun dev_info(dev, "remove device\n");
1715*4882a593Smuzhiyun if (dec->mmu_base) {
1716*4882a593Smuzhiyun iounmap(dec->mmu_base);
1717*4882a593Smuzhiyun dec->mmu_base = NULL;
1718*4882a593Smuzhiyun }
1719*4882a593Smuzhiyun rkvdec2_free_rcbbuf(pdev, dec);
1720*4882a593Smuzhiyun mpp_dev_remove(mpp);
1721*4882a593Smuzhiyun rkvdec2_procfs_remove(mpp);
1722*4882a593Smuzhiyun rkvdec2_link_remove(mpp, dec->link_dec);
1723*4882a593Smuzhiyun }
1724*4882a593Smuzhiyun
1725*4882a593Smuzhiyun return 0;
1726*4882a593Smuzhiyun }
1727*4882a593Smuzhiyun
rkvdec2_shutdown(struct platform_device * pdev)1728*4882a593Smuzhiyun static void rkvdec2_shutdown(struct platform_device *pdev)
1729*4882a593Smuzhiyun {
1730*4882a593Smuzhiyun struct device *dev = &pdev->dev;
1731*4882a593Smuzhiyun
1732*4882a593Smuzhiyun if (!strstr(dev_name(dev), "ccu"))
1733*4882a593Smuzhiyun mpp_dev_shutdown(pdev);
1734*4882a593Smuzhiyun }
1735*4882a593Smuzhiyun
rkvdec2_runtime_suspend(struct device * dev)1736*4882a593Smuzhiyun static int __maybe_unused rkvdec2_runtime_suspend(struct device *dev)
1737*4882a593Smuzhiyun {
1738*4882a593Smuzhiyun if (strstr(dev_name(dev), "ccu")) {
1739*4882a593Smuzhiyun struct rkvdec2_ccu *ccu = dev_get_drvdata(dev);
1740*4882a593Smuzhiyun
1741*4882a593Smuzhiyun mpp_clk_safe_disable(ccu->aclk_info.clk);
1742*4882a593Smuzhiyun } else {
1743*4882a593Smuzhiyun struct mpp_dev *mpp = dev_get_drvdata(dev);
1744*4882a593Smuzhiyun
1745*4882a593Smuzhiyun if (mpp->is_irq_startup) {
1746*4882a593Smuzhiyun /* disable core irq */
1747*4882a593Smuzhiyun disable_irq(mpp->irq);
1748*4882a593Smuzhiyun if (mpp->iommu_info && mpp->iommu_info->got_irq)
1749*4882a593Smuzhiyun /* disable mmu irq */
1750*4882a593Smuzhiyun disable_irq(mpp->iommu_info->irq);
1751*4882a593Smuzhiyun }
1752*4882a593Smuzhiyun
1753*4882a593Smuzhiyun if (mpp->hw_ops->clk_off)
1754*4882a593Smuzhiyun mpp->hw_ops->clk_off(mpp);
1755*4882a593Smuzhiyun }
1756*4882a593Smuzhiyun
1757*4882a593Smuzhiyun return 0;
1758*4882a593Smuzhiyun }
1759*4882a593Smuzhiyun
rkvdec2_runtime_resume(struct device * dev)1760*4882a593Smuzhiyun static int __maybe_unused rkvdec2_runtime_resume(struct device *dev)
1761*4882a593Smuzhiyun {
1762*4882a593Smuzhiyun if (strstr(dev_name(dev), "ccu")) {
1763*4882a593Smuzhiyun struct rkvdec2_ccu *ccu = dev_get_drvdata(dev);
1764*4882a593Smuzhiyun
1765*4882a593Smuzhiyun mpp_clk_safe_enable(ccu->aclk_info.clk);
1766*4882a593Smuzhiyun } else {
1767*4882a593Smuzhiyun struct mpp_dev *mpp = dev_get_drvdata(dev);
1768*4882a593Smuzhiyun
1769*4882a593Smuzhiyun if (mpp->hw_ops->clk_on)
1770*4882a593Smuzhiyun mpp->hw_ops->clk_on(mpp);
1771*4882a593Smuzhiyun if (mpp->is_irq_startup) {
1772*4882a593Smuzhiyun /* enable core irq */
1773*4882a593Smuzhiyun enable_irq(mpp->irq);
1774*4882a593Smuzhiyun /* enable mmu irq */
1775*4882a593Smuzhiyun if (mpp->iommu_info && mpp->iommu_info->got_irq)
1776*4882a593Smuzhiyun enable_irq(mpp->iommu_info->irq);
1777*4882a593Smuzhiyun }
1778*4882a593Smuzhiyun
1779*4882a593Smuzhiyun }
1780*4882a593Smuzhiyun
1781*4882a593Smuzhiyun return 0;
1782*4882a593Smuzhiyun }
1783*4882a593Smuzhiyun
1784*4882a593Smuzhiyun static const struct dev_pm_ops rkvdec2_pm_ops = {
1785*4882a593Smuzhiyun SET_RUNTIME_PM_OPS(rkvdec2_runtime_suspend, rkvdec2_runtime_resume, NULL)
1786*4882a593Smuzhiyun SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)
1787*4882a593Smuzhiyun };
1788*4882a593Smuzhiyun
1789*4882a593Smuzhiyun struct platform_driver rockchip_rkvdec2_driver = {
1790*4882a593Smuzhiyun .probe = rkvdec2_probe,
1791*4882a593Smuzhiyun .remove = rkvdec2_remove,
1792*4882a593Smuzhiyun .shutdown = rkvdec2_shutdown,
1793*4882a593Smuzhiyun .driver = {
1794*4882a593Smuzhiyun .name = RKVDEC_DRIVER_NAME,
1795*4882a593Smuzhiyun .of_match_table = of_match_ptr(mpp_rkvdec2_dt_match),
1796*4882a593Smuzhiyun .pm = &rkvdec2_pm_ops,
1797*4882a593Smuzhiyun },
1798*4882a593Smuzhiyun };
1799*4882a593Smuzhiyun EXPORT_SYMBOL(rockchip_rkvdec2_driver);
1800