1*4882a593Smuzhiyun /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * author:
6*4882a593Smuzhiyun * Alpha Lin, alpha.lin@rock-chips.com
7*4882a593Smuzhiyun * Randy Li, randy.li@rock-chips.com
8*4882a593Smuzhiyun * Ding Wei, leo.ding@rock-chips.com
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun #ifndef __ROCKCHIP_MPP_IOMMU_H__
12*4882a593Smuzhiyun #define __ROCKCHIP_MPP_IOMMU_H__
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <linux/iommu.h>
15*4882a593Smuzhiyun #include <linux/dma-mapping.h>
16*4882a593Smuzhiyun #include <linux/interrupt.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun struct mpp_dma_buffer {
19*4882a593Smuzhiyun /* link to dma session buffer list */
20*4882a593Smuzhiyun struct list_head link;
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /* dma session belong */
23*4882a593Smuzhiyun struct mpp_dma_session *dma;
24*4882a593Smuzhiyun /* DMABUF information */
25*4882a593Smuzhiyun struct dma_buf *dmabuf;
26*4882a593Smuzhiyun struct dma_buf_attachment *attach;
27*4882a593Smuzhiyun struct sg_table *sgt;
28*4882a593Smuzhiyun struct sg_table *copy_sgt;
29*4882a593Smuzhiyun enum dma_data_direction dir;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun dma_addr_t iova;
32*4882a593Smuzhiyun unsigned long size;
33*4882a593Smuzhiyun void *vaddr;
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun struct kref ref;
36*4882a593Smuzhiyun ktime_t last_used;
37*4882a593Smuzhiyun /* alloc by device */
38*4882a593Smuzhiyun struct device *dev;
39*4882a593Smuzhiyun };
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun #define MPP_SESSION_MAX_BUFFERS 60
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun struct mpp_dma_session {
44*4882a593Smuzhiyun /* the buffer used in session */
45*4882a593Smuzhiyun struct list_head unused_list;
46*4882a593Smuzhiyun struct list_head used_list;
47*4882a593Smuzhiyun struct mpp_dma_buffer dma_bufs[MPP_SESSION_MAX_BUFFERS];
48*4882a593Smuzhiyun /* the mutex for the above buffer list */
49*4882a593Smuzhiyun struct mutex list_mutex;
50*4882a593Smuzhiyun /* the max buffer num for the buffer list */
51*4882a593Smuzhiyun u32 max_buffers;
52*4882a593Smuzhiyun /* the count for the buffer list */
53*4882a593Smuzhiyun int buffer_count;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun struct device *dev;
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun struct mpp_rk_iommu {
59*4882a593Smuzhiyun struct list_head link;
60*4882a593Smuzhiyun u32 grf_val;
61*4882a593Smuzhiyun int mmu_num;
62*4882a593Smuzhiyun u32 base_addr[2];
63*4882a593Smuzhiyun void __iomem *bases[2];
64*4882a593Smuzhiyun u32 dte_addr;
65*4882a593Smuzhiyun u32 is_paged;
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun struct mpp_dev;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun struct mpp_iommu_info {
71*4882a593Smuzhiyun struct rw_semaphore rw_sem;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun struct device *dev;
74*4882a593Smuzhiyun struct platform_device *pdev;
75*4882a593Smuzhiyun struct iommu_domain *domain;
76*4882a593Smuzhiyun struct iommu_group *group;
77*4882a593Smuzhiyun struct mpp_rk_iommu *iommu;
78*4882a593Smuzhiyun iommu_fault_handler_t hdl;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun spinlock_t dev_lock;
81*4882a593Smuzhiyun struct mpp_dev *dev_active;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun u32 av1d_iommu;
84*4882a593Smuzhiyun int irq;
85*4882a593Smuzhiyun int got_irq;
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun struct mpp_dma_session *
89*4882a593Smuzhiyun mpp_dma_session_create(struct device *dev, u32 max_buffers);
90*4882a593Smuzhiyun int mpp_dma_session_destroy(struct mpp_dma_session *dma);
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun struct mpp_dma_buffer *
93*4882a593Smuzhiyun mpp_dma_alloc(struct device *dev, size_t size);
94*4882a593Smuzhiyun int mpp_dma_free(struct mpp_dma_buffer *buffer);
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun struct mpp_dma_buffer *
97*4882a593Smuzhiyun mpp_dma_import_fd(struct mpp_iommu_info *iommu_info,
98*4882a593Smuzhiyun struct mpp_dma_session *dma, int fd);
99*4882a593Smuzhiyun int mpp_dma_release(struct mpp_dma_session *dma,
100*4882a593Smuzhiyun struct mpp_dma_buffer *buffer);
101*4882a593Smuzhiyun int mpp_dma_release_fd(struct mpp_dma_session *dma, int fd);
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun int mpp_dma_unmap_kernel(struct mpp_dma_session *dma,
104*4882a593Smuzhiyun struct mpp_dma_buffer *buffer);
105*4882a593Smuzhiyun int mpp_dma_map_kernel(struct mpp_dma_session *dma,
106*4882a593Smuzhiyun struct mpp_dma_buffer *buffer);
107*4882a593Smuzhiyun struct mpp_dma_buffer *mpp_dma_find_buffer_fd(struct mpp_dma_session *dma, int fd);
108*4882a593Smuzhiyun void mpp_dma_buf_sync(struct mpp_dma_buffer *buffer, u32 offset, u32 length,
109*4882a593Smuzhiyun enum dma_data_direction dir, bool for_cpu);
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun struct mpp_iommu_info *
112*4882a593Smuzhiyun mpp_iommu_probe(struct device *dev);
113*4882a593Smuzhiyun int mpp_iommu_remove(struct mpp_iommu_info *info);
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun int mpp_iommu_attach(struct mpp_iommu_info *info);
116*4882a593Smuzhiyun int mpp_iommu_detach(struct mpp_iommu_info *info);
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun int mpp_iommu_refresh(struct mpp_iommu_info *info, struct device *dev);
119*4882a593Smuzhiyun int mpp_iommu_flush_tlb(struct mpp_iommu_info *info);
120*4882a593Smuzhiyun int mpp_av1_iommu_disable(struct device *dev);
121*4882a593Smuzhiyun int mpp_av1_iommu_enable(struct device *dev);
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun int mpp_iommu_dev_activate(struct mpp_iommu_info *info, struct mpp_dev *dev);
124*4882a593Smuzhiyun int mpp_iommu_dev_deactivate(struct mpp_iommu_info *info, struct mpp_dev *dev);
125*4882a593Smuzhiyun
mpp_iommu_down_read(struct mpp_iommu_info * info)126*4882a593Smuzhiyun static inline int mpp_iommu_down_read(struct mpp_iommu_info *info)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun if (info)
129*4882a593Smuzhiyun down_read(&info->rw_sem);
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun return 0;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
mpp_iommu_up_read(struct mpp_iommu_info * info)134*4882a593Smuzhiyun static inline int mpp_iommu_up_read(struct mpp_iommu_info *info)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun if (info)
137*4882a593Smuzhiyun up_read(&info->rw_sem);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun return 0;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
mpp_iommu_down_write(struct mpp_iommu_info * info)142*4882a593Smuzhiyun static inline int mpp_iommu_down_write(struct mpp_iommu_info *info)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun if (info)
145*4882a593Smuzhiyun down_write(&info->rw_sem);
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun return 0;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
mpp_iommu_up_write(struct mpp_iommu_info * info)150*4882a593Smuzhiyun static inline int mpp_iommu_up_write(struct mpp_iommu_info *info)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun if (info)
153*4882a593Smuzhiyun up_write(&info->rw_sem);
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun return 0;
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
mpp_iommu_enable_irq(struct mpp_iommu_info * info)158*4882a593Smuzhiyun static inline void mpp_iommu_enable_irq(struct mpp_iommu_info *info)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun if (info && info->got_irq)
161*4882a593Smuzhiyun enable_irq(info->irq);
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun
mpp_iommu_disable_irq(struct mpp_iommu_info * info)164*4882a593Smuzhiyun static inline void mpp_iommu_disable_irq(struct mpp_iommu_info *info)
165*4882a593Smuzhiyun {
166*4882a593Smuzhiyun if (info && info->got_irq)
167*4882a593Smuzhiyun disable_irq(info->irq);
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun #endif
171