1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Support for viafb GPIO ports.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2009 Jonathan Corbet <corbet@lwn.net>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/spinlock.h>
9*4882a593Smuzhiyun #include <linux/gpio/driver.h>
10*4882a593Smuzhiyun #include <linux/platform_device.h>
11*4882a593Smuzhiyun #include <linux/via-core.h>
12*4882a593Smuzhiyun #include <linux/via-gpio.h>
13*4882a593Smuzhiyun #include <linux/export.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun /*
16*4882a593Smuzhiyun * The ports we know about. Note that the port-25 gpios are not
17*4882a593Smuzhiyun * mentioned in the datasheet.
18*4882a593Smuzhiyun */
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun struct viafb_gpio {
21*4882a593Smuzhiyun char *vg_name; /* Data sheet name */
22*4882a593Smuzhiyun u16 vg_io_port;
23*4882a593Smuzhiyun u8 vg_port_index;
24*4882a593Smuzhiyun int vg_mask_shift;
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun static struct viafb_gpio viafb_all_gpios[] = {
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun .vg_name = "VGPIO0", /* Guess - not in datasheet */
30*4882a593Smuzhiyun .vg_io_port = VIASR,
31*4882a593Smuzhiyun .vg_port_index = 0x25,
32*4882a593Smuzhiyun .vg_mask_shift = 1
33*4882a593Smuzhiyun },
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun .vg_name = "VGPIO1",
36*4882a593Smuzhiyun .vg_io_port = VIASR,
37*4882a593Smuzhiyun .vg_port_index = 0x25,
38*4882a593Smuzhiyun .vg_mask_shift = 0
39*4882a593Smuzhiyun },
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun .vg_name = "VGPIO2", /* aka DISPCLKI0 */
42*4882a593Smuzhiyun .vg_io_port = VIASR,
43*4882a593Smuzhiyun .vg_port_index = 0x2c,
44*4882a593Smuzhiyun .vg_mask_shift = 1
45*4882a593Smuzhiyun },
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun .vg_name = "VGPIO3", /* aka DISPCLKO0 */
48*4882a593Smuzhiyun .vg_io_port = VIASR,
49*4882a593Smuzhiyun .vg_port_index = 0x2c,
50*4882a593Smuzhiyun .vg_mask_shift = 0
51*4882a593Smuzhiyun },
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun .vg_name = "VGPIO4", /* DISPCLKI1 */
54*4882a593Smuzhiyun .vg_io_port = VIASR,
55*4882a593Smuzhiyun .vg_port_index = 0x3d,
56*4882a593Smuzhiyun .vg_mask_shift = 1
57*4882a593Smuzhiyun },
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun .vg_name = "VGPIO5", /* DISPCLKO1 */
60*4882a593Smuzhiyun .vg_io_port = VIASR,
61*4882a593Smuzhiyun .vg_port_index = 0x3d,
62*4882a593Smuzhiyun .vg_mask_shift = 0
63*4882a593Smuzhiyun },
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun #define VIAFB_NUM_GPIOS ARRAY_SIZE(viafb_all_gpios)
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /*
69*4882a593Smuzhiyun * This structure controls the active GPIOs, which may be a subset
70*4882a593Smuzhiyun * of those which are known.
71*4882a593Smuzhiyun */
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun struct viafb_gpio_cfg {
74*4882a593Smuzhiyun struct gpio_chip gpio_chip;
75*4882a593Smuzhiyun struct viafb_dev *vdev;
76*4882a593Smuzhiyun struct viafb_gpio *active_gpios[VIAFB_NUM_GPIOS];
77*4882a593Smuzhiyun const char *gpio_names[VIAFB_NUM_GPIOS];
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun /*
81*4882a593Smuzhiyun * GPIO access functions
82*4882a593Smuzhiyun */
via_gpio_set(struct gpio_chip * chip,unsigned int nr,int value)83*4882a593Smuzhiyun static void via_gpio_set(struct gpio_chip *chip, unsigned int nr,
84*4882a593Smuzhiyun int value)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun struct viafb_gpio_cfg *cfg = gpiochip_get_data(chip);
87*4882a593Smuzhiyun u8 reg;
88*4882a593Smuzhiyun struct viafb_gpio *gpio;
89*4882a593Smuzhiyun unsigned long flags;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun spin_lock_irqsave(&cfg->vdev->reg_lock, flags);
92*4882a593Smuzhiyun gpio = cfg->active_gpios[nr];
93*4882a593Smuzhiyun reg = via_read_reg(VIASR, gpio->vg_port_index);
94*4882a593Smuzhiyun reg |= 0x40 << gpio->vg_mask_shift; /* output enable */
95*4882a593Smuzhiyun if (value)
96*4882a593Smuzhiyun reg |= 0x10 << gpio->vg_mask_shift;
97*4882a593Smuzhiyun else
98*4882a593Smuzhiyun reg &= ~(0x10 << gpio->vg_mask_shift);
99*4882a593Smuzhiyun via_write_reg(VIASR, gpio->vg_port_index, reg);
100*4882a593Smuzhiyun spin_unlock_irqrestore(&cfg->vdev->reg_lock, flags);
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
via_gpio_dir_out(struct gpio_chip * chip,unsigned int nr,int value)103*4882a593Smuzhiyun static int via_gpio_dir_out(struct gpio_chip *chip, unsigned int nr,
104*4882a593Smuzhiyun int value)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun via_gpio_set(chip, nr, value);
107*4882a593Smuzhiyun return 0;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun /*
111*4882a593Smuzhiyun * Set the input direction. I'm not sure this is right; we should
112*4882a593Smuzhiyun * be able to do input without disabling output.
113*4882a593Smuzhiyun */
via_gpio_dir_input(struct gpio_chip * chip,unsigned int nr)114*4882a593Smuzhiyun static int via_gpio_dir_input(struct gpio_chip *chip, unsigned int nr)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun struct viafb_gpio_cfg *cfg = gpiochip_get_data(chip);
117*4882a593Smuzhiyun struct viafb_gpio *gpio;
118*4882a593Smuzhiyun unsigned long flags;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun spin_lock_irqsave(&cfg->vdev->reg_lock, flags);
121*4882a593Smuzhiyun gpio = cfg->active_gpios[nr];
122*4882a593Smuzhiyun via_write_reg_mask(VIASR, gpio->vg_port_index, 0,
123*4882a593Smuzhiyun 0x40 << gpio->vg_mask_shift);
124*4882a593Smuzhiyun spin_unlock_irqrestore(&cfg->vdev->reg_lock, flags);
125*4882a593Smuzhiyun return 0;
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
via_gpio_get(struct gpio_chip * chip,unsigned int nr)128*4882a593Smuzhiyun static int via_gpio_get(struct gpio_chip *chip, unsigned int nr)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun struct viafb_gpio_cfg *cfg = gpiochip_get_data(chip);
131*4882a593Smuzhiyun u8 reg;
132*4882a593Smuzhiyun struct viafb_gpio *gpio;
133*4882a593Smuzhiyun unsigned long flags;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun spin_lock_irqsave(&cfg->vdev->reg_lock, flags);
136*4882a593Smuzhiyun gpio = cfg->active_gpios[nr];
137*4882a593Smuzhiyun reg = via_read_reg(VIASR, gpio->vg_port_index);
138*4882a593Smuzhiyun spin_unlock_irqrestore(&cfg->vdev->reg_lock, flags);
139*4882a593Smuzhiyun return !!(reg & (0x04 << gpio->vg_mask_shift));
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun static struct viafb_gpio_cfg viafb_gpio_config = {
144*4882a593Smuzhiyun .gpio_chip = {
145*4882a593Smuzhiyun .label = "VIAFB onboard GPIO",
146*4882a593Smuzhiyun .owner = THIS_MODULE,
147*4882a593Smuzhiyun .direction_output = via_gpio_dir_out,
148*4882a593Smuzhiyun .set = via_gpio_set,
149*4882a593Smuzhiyun .direction_input = via_gpio_dir_input,
150*4882a593Smuzhiyun .get = via_gpio_get,
151*4882a593Smuzhiyun .base = -1,
152*4882a593Smuzhiyun .ngpio = 0,
153*4882a593Smuzhiyun .can_sleep = 0
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun };
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun /*
158*4882a593Smuzhiyun * Manage the software enable bit.
159*4882a593Smuzhiyun */
viafb_gpio_enable(struct viafb_gpio * gpio)160*4882a593Smuzhiyun static void viafb_gpio_enable(struct viafb_gpio *gpio)
161*4882a593Smuzhiyun {
162*4882a593Smuzhiyun via_write_reg_mask(VIASR, gpio->vg_port_index, 0x02, 0x02);
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
viafb_gpio_disable(struct viafb_gpio * gpio)165*4882a593Smuzhiyun static void viafb_gpio_disable(struct viafb_gpio *gpio)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun via_write_reg_mask(VIASR, gpio->vg_port_index, 0, 0x02);
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun #ifdef CONFIG_PM
171*4882a593Smuzhiyun
viafb_gpio_suspend(void * private)172*4882a593Smuzhiyun static int viafb_gpio_suspend(void *private)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun return 0;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
viafb_gpio_resume(void * private)177*4882a593Smuzhiyun static int viafb_gpio_resume(void *private)
178*4882a593Smuzhiyun {
179*4882a593Smuzhiyun int i;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun for (i = 0; i < viafb_gpio_config.gpio_chip.ngpio; i += 2)
182*4882a593Smuzhiyun viafb_gpio_enable(viafb_gpio_config.active_gpios[i]);
183*4882a593Smuzhiyun return 0;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun static struct viafb_pm_hooks viafb_gpio_pm_hooks = {
187*4882a593Smuzhiyun .suspend = viafb_gpio_suspend,
188*4882a593Smuzhiyun .resume = viafb_gpio_resume
189*4882a593Smuzhiyun };
190*4882a593Smuzhiyun #endif /* CONFIG_PM */
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun /*
193*4882a593Smuzhiyun * Look up a specific gpio and return the number it was assigned.
194*4882a593Smuzhiyun */
viafb_gpio_lookup(const char * name)195*4882a593Smuzhiyun int viafb_gpio_lookup(const char *name)
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun int i;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun for (i = 0; i < viafb_gpio_config.gpio_chip.ngpio; i++)
200*4882a593Smuzhiyun if (!strcmp(name, viafb_gpio_config.active_gpios[i]->vg_name))
201*4882a593Smuzhiyun return viafb_gpio_config.gpio_chip.base + i;
202*4882a593Smuzhiyun return -1;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(viafb_gpio_lookup);
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun /*
207*4882a593Smuzhiyun * Platform device stuff.
208*4882a593Smuzhiyun */
viafb_gpio_probe(struct platform_device * platdev)209*4882a593Smuzhiyun static int viafb_gpio_probe(struct platform_device *platdev)
210*4882a593Smuzhiyun {
211*4882a593Smuzhiyun struct viafb_dev *vdev = platdev->dev.platform_data;
212*4882a593Smuzhiyun struct via_port_cfg *port_cfg = vdev->port_cfg;
213*4882a593Smuzhiyun int i, ngpio = 0, ret;
214*4882a593Smuzhiyun struct viafb_gpio *gpio;
215*4882a593Smuzhiyun unsigned long flags;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun /*
218*4882a593Smuzhiyun * Set up entries for all GPIOs which have been configured to
219*4882a593Smuzhiyun * operate as such (as opposed to as i2c ports).
220*4882a593Smuzhiyun */
221*4882a593Smuzhiyun for (i = 0; i < VIAFB_NUM_PORTS; i++) {
222*4882a593Smuzhiyun if (port_cfg[i].mode != VIA_MODE_GPIO)
223*4882a593Smuzhiyun continue;
224*4882a593Smuzhiyun for (gpio = viafb_all_gpios;
225*4882a593Smuzhiyun gpio < viafb_all_gpios + VIAFB_NUM_GPIOS; gpio++)
226*4882a593Smuzhiyun if (gpio->vg_port_index == port_cfg[i].ioport_index) {
227*4882a593Smuzhiyun viafb_gpio_config.active_gpios[ngpio] = gpio;
228*4882a593Smuzhiyun viafb_gpio_config.gpio_names[ngpio] =
229*4882a593Smuzhiyun gpio->vg_name;
230*4882a593Smuzhiyun ngpio++;
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun viafb_gpio_config.gpio_chip.ngpio = ngpio;
234*4882a593Smuzhiyun viafb_gpio_config.gpio_chip.names = viafb_gpio_config.gpio_names;
235*4882a593Smuzhiyun viafb_gpio_config.vdev = vdev;
236*4882a593Smuzhiyun if (ngpio == 0) {
237*4882a593Smuzhiyun printk(KERN_INFO "viafb: no GPIOs configured\n");
238*4882a593Smuzhiyun return 0;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun /*
241*4882a593Smuzhiyun * Enable the ports. They come in pairs, with a single
242*4882a593Smuzhiyun * enable bit for both.
243*4882a593Smuzhiyun */
244*4882a593Smuzhiyun spin_lock_irqsave(&viafb_gpio_config.vdev->reg_lock, flags);
245*4882a593Smuzhiyun for (i = 0; i < ngpio; i += 2)
246*4882a593Smuzhiyun viafb_gpio_enable(viafb_gpio_config.active_gpios[i]);
247*4882a593Smuzhiyun spin_unlock_irqrestore(&viafb_gpio_config.vdev->reg_lock, flags);
248*4882a593Smuzhiyun /*
249*4882a593Smuzhiyun * Get registered.
250*4882a593Smuzhiyun */
251*4882a593Smuzhiyun viafb_gpio_config.gpio_chip.base = -1; /* Dynamic */
252*4882a593Smuzhiyun ret = gpiochip_add_data(&viafb_gpio_config.gpio_chip,
253*4882a593Smuzhiyun &viafb_gpio_config);
254*4882a593Smuzhiyun if (ret) {
255*4882a593Smuzhiyun printk(KERN_ERR "viafb: failed to add gpios (%d)\n", ret);
256*4882a593Smuzhiyun viafb_gpio_config.gpio_chip.ngpio = 0;
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun #ifdef CONFIG_PM
259*4882a593Smuzhiyun viafb_pm_register(&viafb_gpio_pm_hooks);
260*4882a593Smuzhiyun #endif
261*4882a593Smuzhiyun return ret;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun
viafb_gpio_remove(struct platform_device * platdev)265*4882a593Smuzhiyun static int viafb_gpio_remove(struct platform_device *platdev)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun unsigned long flags;
268*4882a593Smuzhiyun int i;
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun #ifdef CONFIG_PM
271*4882a593Smuzhiyun viafb_pm_unregister(&viafb_gpio_pm_hooks);
272*4882a593Smuzhiyun #endif
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun /*
275*4882a593Smuzhiyun * Get unregistered.
276*4882a593Smuzhiyun */
277*4882a593Smuzhiyun if (viafb_gpio_config.gpio_chip.ngpio > 0) {
278*4882a593Smuzhiyun gpiochip_remove(&viafb_gpio_config.gpio_chip);
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun /*
281*4882a593Smuzhiyun * Disable the ports.
282*4882a593Smuzhiyun */
283*4882a593Smuzhiyun spin_lock_irqsave(&viafb_gpio_config.vdev->reg_lock, flags);
284*4882a593Smuzhiyun for (i = 0; i < viafb_gpio_config.gpio_chip.ngpio; i += 2)
285*4882a593Smuzhiyun viafb_gpio_disable(viafb_gpio_config.active_gpios[i]);
286*4882a593Smuzhiyun viafb_gpio_config.gpio_chip.ngpio = 0;
287*4882a593Smuzhiyun spin_unlock_irqrestore(&viafb_gpio_config.vdev->reg_lock, flags);
288*4882a593Smuzhiyun return 0;
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun static struct platform_driver via_gpio_driver = {
292*4882a593Smuzhiyun .driver = {
293*4882a593Smuzhiyun .name = "viafb-gpio",
294*4882a593Smuzhiyun },
295*4882a593Smuzhiyun .probe = viafb_gpio_probe,
296*4882a593Smuzhiyun .remove = viafb_gpio_remove,
297*4882a593Smuzhiyun };
298*4882a593Smuzhiyun
viafb_gpio_init(void)299*4882a593Smuzhiyun int viafb_gpio_init(void)
300*4882a593Smuzhiyun {
301*4882a593Smuzhiyun return platform_driver_register(&via_gpio_driver);
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun
viafb_gpio_exit(void)304*4882a593Smuzhiyun void viafb_gpio_exit(void)
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun platform_driver_unregister(&via_gpio_driver);
307*4882a593Smuzhiyun }
308