1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /* tcx.c: TCX frame buffer driver
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
5*4882a593Smuzhiyun * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
6*4882a593Smuzhiyun * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
7*4882a593Smuzhiyun * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Driver layout based loosely on tgafb.c, see that file for credits.
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/errno.h>
15*4882a593Smuzhiyun #include <linux/string.h>
16*4882a593Smuzhiyun #include <linux/delay.h>
17*4882a593Smuzhiyun #include <linux/init.h>
18*4882a593Smuzhiyun #include <linux/fb.h>
19*4882a593Smuzhiyun #include <linux/mm.h>
20*4882a593Smuzhiyun #include <linux/of_device.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #include <asm/io.h>
23*4882a593Smuzhiyun #include <asm/fbio.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include "sbuslib.h"
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /*
28*4882a593Smuzhiyun * Local functions.
29*4882a593Smuzhiyun */
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun static int tcx_setcolreg(unsigned, unsigned, unsigned, unsigned,
32*4882a593Smuzhiyun unsigned, struct fb_info *);
33*4882a593Smuzhiyun static int tcx_blank(int, struct fb_info *);
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun static int tcx_mmap(struct fb_info *, struct vm_area_struct *);
36*4882a593Smuzhiyun static int tcx_ioctl(struct fb_info *, unsigned int, unsigned long);
37*4882a593Smuzhiyun static int tcx_pan_display(struct fb_var_screeninfo *, struct fb_info *);
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun /*
40*4882a593Smuzhiyun * Frame buffer operations
41*4882a593Smuzhiyun */
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun static const struct fb_ops tcx_ops = {
44*4882a593Smuzhiyun .owner = THIS_MODULE,
45*4882a593Smuzhiyun .fb_setcolreg = tcx_setcolreg,
46*4882a593Smuzhiyun .fb_blank = tcx_blank,
47*4882a593Smuzhiyun .fb_pan_display = tcx_pan_display,
48*4882a593Smuzhiyun .fb_fillrect = cfb_fillrect,
49*4882a593Smuzhiyun .fb_copyarea = cfb_copyarea,
50*4882a593Smuzhiyun .fb_imageblit = cfb_imageblit,
51*4882a593Smuzhiyun .fb_mmap = tcx_mmap,
52*4882a593Smuzhiyun .fb_ioctl = tcx_ioctl,
53*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
54*4882a593Smuzhiyun .fb_compat_ioctl = sbusfb_compat_ioctl,
55*4882a593Smuzhiyun #endif
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun /* THC definitions */
59*4882a593Smuzhiyun #define TCX_THC_MISC_REV_SHIFT 16
60*4882a593Smuzhiyun #define TCX_THC_MISC_REV_MASK 15
61*4882a593Smuzhiyun #define TCX_THC_MISC_VSYNC_DIS (1 << 25)
62*4882a593Smuzhiyun #define TCX_THC_MISC_HSYNC_DIS (1 << 24)
63*4882a593Smuzhiyun #define TCX_THC_MISC_RESET (1 << 12)
64*4882a593Smuzhiyun #define TCX_THC_MISC_VIDEO (1 << 10)
65*4882a593Smuzhiyun #define TCX_THC_MISC_SYNC (1 << 9)
66*4882a593Smuzhiyun #define TCX_THC_MISC_VSYNC (1 << 8)
67*4882a593Smuzhiyun #define TCX_THC_MISC_SYNC_ENAB (1 << 7)
68*4882a593Smuzhiyun #define TCX_THC_MISC_CURS_RES (1 << 6)
69*4882a593Smuzhiyun #define TCX_THC_MISC_INT_ENAB (1 << 5)
70*4882a593Smuzhiyun #define TCX_THC_MISC_INT (1 << 4)
71*4882a593Smuzhiyun #define TCX_THC_MISC_INIT 0x9f
72*4882a593Smuzhiyun #define TCX_THC_REV_REV_SHIFT 20
73*4882a593Smuzhiyun #define TCX_THC_REV_REV_MASK 15
74*4882a593Smuzhiyun #define TCX_THC_REV_MINREV_SHIFT 28
75*4882a593Smuzhiyun #define TCX_THC_REV_MINREV_MASK 15
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun /* The contents are unknown */
78*4882a593Smuzhiyun struct tcx_tec {
79*4882a593Smuzhiyun u32 tec_matrix;
80*4882a593Smuzhiyun u32 tec_clip;
81*4882a593Smuzhiyun u32 tec_vdc;
82*4882a593Smuzhiyun };
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun struct tcx_thc {
85*4882a593Smuzhiyun u32 thc_rev;
86*4882a593Smuzhiyun u32 thc_pad0[511];
87*4882a593Smuzhiyun u32 thc_hs; /* hsync timing */
88*4882a593Smuzhiyun u32 thc_hsdvs;
89*4882a593Smuzhiyun u32 thc_hd;
90*4882a593Smuzhiyun u32 thc_vs; /* vsync timing */
91*4882a593Smuzhiyun u32 thc_vd;
92*4882a593Smuzhiyun u32 thc_refresh;
93*4882a593Smuzhiyun u32 thc_misc;
94*4882a593Smuzhiyun u32 thc_pad1[56];
95*4882a593Smuzhiyun u32 thc_cursxy; /* cursor x,y position (16 bits each) */
96*4882a593Smuzhiyun u32 thc_cursmask[32]; /* cursor mask bits */
97*4882a593Smuzhiyun u32 thc_cursbits[32]; /* what to show where mask enabled */
98*4882a593Smuzhiyun };
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun struct bt_regs {
101*4882a593Smuzhiyun u32 addr;
102*4882a593Smuzhiyun u32 color_map;
103*4882a593Smuzhiyun u32 control;
104*4882a593Smuzhiyun u32 cursor;
105*4882a593Smuzhiyun };
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun #define TCX_MMAP_ENTRIES 14
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun struct tcx_par {
110*4882a593Smuzhiyun spinlock_t lock;
111*4882a593Smuzhiyun struct bt_regs __iomem *bt;
112*4882a593Smuzhiyun struct tcx_thc __iomem *thc;
113*4882a593Smuzhiyun struct tcx_tec __iomem *tec;
114*4882a593Smuzhiyun u32 __iomem *cplane;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun u32 flags;
117*4882a593Smuzhiyun #define TCX_FLAG_BLANKED 0x00000001
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun unsigned long which_io;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun struct sbus_mmap_map mmap_map[TCX_MMAP_ENTRIES];
122*4882a593Smuzhiyun int lowdepth;
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun /* Reset control plane so that WID is 8-bit plane. */
__tcx_set_control_plane(struct fb_info * info)126*4882a593Smuzhiyun static void __tcx_set_control_plane(struct fb_info *info)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun struct tcx_par *par = info->par;
129*4882a593Smuzhiyun u32 __iomem *p, *pend;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun if (par->lowdepth)
132*4882a593Smuzhiyun return;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun p = par->cplane;
135*4882a593Smuzhiyun if (p == NULL)
136*4882a593Smuzhiyun return;
137*4882a593Smuzhiyun for (pend = p + info->fix.smem_len; p < pend; p++) {
138*4882a593Smuzhiyun u32 tmp = sbus_readl(p);
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun tmp &= 0xffffff;
141*4882a593Smuzhiyun sbus_writel(tmp, p);
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun
tcx_reset(struct fb_info * info)145*4882a593Smuzhiyun static void tcx_reset(struct fb_info *info)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun struct tcx_par *par = (struct tcx_par *) info->par;
148*4882a593Smuzhiyun unsigned long flags;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun spin_lock_irqsave(&par->lock, flags);
151*4882a593Smuzhiyun __tcx_set_control_plane(info);
152*4882a593Smuzhiyun spin_unlock_irqrestore(&par->lock, flags);
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
tcx_pan_display(struct fb_var_screeninfo * var,struct fb_info * info)155*4882a593Smuzhiyun static int tcx_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
156*4882a593Smuzhiyun {
157*4882a593Smuzhiyun tcx_reset(info);
158*4882a593Smuzhiyun return 0;
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun /**
162*4882a593Smuzhiyun * tcx_setcolreg - Optional function. Sets a color register.
163*4882a593Smuzhiyun * @regno: boolean, 0 copy local, 1 get_user() function
164*4882a593Smuzhiyun * @red: frame buffer colormap structure
165*4882a593Smuzhiyun * @green: The green value which can be up to 16 bits wide
166*4882a593Smuzhiyun * @blue: The blue value which can be up to 16 bits wide.
167*4882a593Smuzhiyun * @transp: If supported the alpha value which can be up to 16 bits wide.
168*4882a593Smuzhiyun * @info: frame buffer info structure
169*4882a593Smuzhiyun */
tcx_setcolreg(unsigned regno,unsigned red,unsigned green,unsigned blue,unsigned transp,struct fb_info * info)170*4882a593Smuzhiyun static int tcx_setcolreg(unsigned regno,
171*4882a593Smuzhiyun unsigned red, unsigned green, unsigned blue,
172*4882a593Smuzhiyun unsigned transp, struct fb_info *info)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun struct tcx_par *par = (struct tcx_par *) info->par;
175*4882a593Smuzhiyun struct bt_regs __iomem *bt = par->bt;
176*4882a593Smuzhiyun unsigned long flags;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun if (regno >= 256)
179*4882a593Smuzhiyun return 1;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun red >>= 8;
182*4882a593Smuzhiyun green >>= 8;
183*4882a593Smuzhiyun blue >>= 8;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun spin_lock_irqsave(&par->lock, flags);
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun sbus_writel(regno << 24, &bt->addr);
188*4882a593Smuzhiyun sbus_writel(red << 24, &bt->color_map);
189*4882a593Smuzhiyun sbus_writel(green << 24, &bt->color_map);
190*4882a593Smuzhiyun sbus_writel(blue << 24, &bt->color_map);
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun spin_unlock_irqrestore(&par->lock, flags);
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun return 0;
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun /**
198*4882a593Smuzhiyun * tcx_blank - Optional function. Blanks the display.
199*4882a593Smuzhiyun * @blank_mode: the blank mode we want.
200*4882a593Smuzhiyun * @info: frame buffer structure that represents a single frame buffer
201*4882a593Smuzhiyun */
202*4882a593Smuzhiyun static int
tcx_blank(int blank,struct fb_info * info)203*4882a593Smuzhiyun tcx_blank(int blank, struct fb_info *info)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun struct tcx_par *par = (struct tcx_par *) info->par;
206*4882a593Smuzhiyun struct tcx_thc __iomem *thc = par->thc;
207*4882a593Smuzhiyun unsigned long flags;
208*4882a593Smuzhiyun u32 val;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun spin_lock_irqsave(&par->lock, flags);
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun val = sbus_readl(&thc->thc_misc);
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun switch (blank) {
215*4882a593Smuzhiyun case FB_BLANK_UNBLANK: /* Unblanking */
216*4882a593Smuzhiyun val &= ~(TCX_THC_MISC_VSYNC_DIS |
217*4882a593Smuzhiyun TCX_THC_MISC_HSYNC_DIS);
218*4882a593Smuzhiyun val |= TCX_THC_MISC_VIDEO;
219*4882a593Smuzhiyun par->flags &= ~TCX_FLAG_BLANKED;
220*4882a593Smuzhiyun break;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun case FB_BLANK_NORMAL: /* Normal blanking */
223*4882a593Smuzhiyun val &= ~TCX_THC_MISC_VIDEO;
224*4882a593Smuzhiyun par->flags |= TCX_FLAG_BLANKED;
225*4882a593Smuzhiyun break;
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */
228*4882a593Smuzhiyun val |= TCX_THC_MISC_VSYNC_DIS;
229*4882a593Smuzhiyun break;
230*4882a593Smuzhiyun case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */
231*4882a593Smuzhiyun val |= TCX_THC_MISC_HSYNC_DIS;
232*4882a593Smuzhiyun break;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun case FB_BLANK_POWERDOWN: /* Poweroff */
235*4882a593Smuzhiyun break;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun sbus_writel(val, &thc->thc_misc);
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun spin_unlock_irqrestore(&par->lock, flags);
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun return 0;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun static struct sbus_mmap_map __tcx_mmap_map[TCX_MMAP_ENTRIES] = {
246*4882a593Smuzhiyun {
247*4882a593Smuzhiyun .voff = TCX_RAM8BIT,
248*4882a593Smuzhiyun .size = SBUS_MMAP_FBSIZE(1)
249*4882a593Smuzhiyun },
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun .voff = TCX_RAM24BIT,
252*4882a593Smuzhiyun .size = SBUS_MMAP_FBSIZE(4)
253*4882a593Smuzhiyun },
254*4882a593Smuzhiyun {
255*4882a593Smuzhiyun .voff = TCX_UNK3,
256*4882a593Smuzhiyun .size = SBUS_MMAP_FBSIZE(8)
257*4882a593Smuzhiyun },
258*4882a593Smuzhiyun {
259*4882a593Smuzhiyun .voff = TCX_UNK4,
260*4882a593Smuzhiyun .size = SBUS_MMAP_FBSIZE(8)
261*4882a593Smuzhiyun },
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun .voff = TCX_CONTROLPLANE,
264*4882a593Smuzhiyun .size = SBUS_MMAP_FBSIZE(4)
265*4882a593Smuzhiyun },
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun .voff = TCX_UNK6,
268*4882a593Smuzhiyun .size = SBUS_MMAP_FBSIZE(8)
269*4882a593Smuzhiyun },
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun .voff = TCX_UNK7,
272*4882a593Smuzhiyun .size = SBUS_MMAP_FBSIZE(8)
273*4882a593Smuzhiyun },
274*4882a593Smuzhiyun {
275*4882a593Smuzhiyun .voff = TCX_TEC,
276*4882a593Smuzhiyun .size = PAGE_SIZE
277*4882a593Smuzhiyun },
278*4882a593Smuzhiyun {
279*4882a593Smuzhiyun .voff = TCX_BTREGS,
280*4882a593Smuzhiyun .size = PAGE_SIZE
281*4882a593Smuzhiyun },
282*4882a593Smuzhiyun {
283*4882a593Smuzhiyun .voff = TCX_THC,
284*4882a593Smuzhiyun .size = PAGE_SIZE
285*4882a593Smuzhiyun },
286*4882a593Smuzhiyun {
287*4882a593Smuzhiyun .voff = TCX_DHC,
288*4882a593Smuzhiyun .size = PAGE_SIZE
289*4882a593Smuzhiyun },
290*4882a593Smuzhiyun {
291*4882a593Smuzhiyun .voff = TCX_ALT,
292*4882a593Smuzhiyun .size = PAGE_SIZE
293*4882a593Smuzhiyun },
294*4882a593Smuzhiyun {
295*4882a593Smuzhiyun .voff = TCX_UNK2,
296*4882a593Smuzhiyun .size = 0x20000
297*4882a593Smuzhiyun },
298*4882a593Smuzhiyun { .size = 0 }
299*4882a593Smuzhiyun };
300*4882a593Smuzhiyun
tcx_mmap(struct fb_info * info,struct vm_area_struct * vma)301*4882a593Smuzhiyun static int tcx_mmap(struct fb_info *info, struct vm_area_struct *vma)
302*4882a593Smuzhiyun {
303*4882a593Smuzhiyun struct tcx_par *par = (struct tcx_par *)info->par;
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun return sbusfb_mmap_helper(par->mmap_map,
306*4882a593Smuzhiyun info->fix.smem_start, info->fix.smem_len,
307*4882a593Smuzhiyun par->which_io, vma);
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun
tcx_ioctl(struct fb_info * info,unsigned int cmd,unsigned long arg)310*4882a593Smuzhiyun static int tcx_ioctl(struct fb_info *info, unsigned int cmd,
311*4882a593Smuzhiyun unsigned long arg)
312*4882a593Smuzhiyun {
313*4882a593Smuzhiyun struct tcx_par *par = (struct tcx_par *) info->par;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun return sbusfb_ioctl_helper(cmd, arg, info,
316*4882a593Smuzhiyun FBTYPE_TCXCOLOR,
317*4882a593Smuzhiyun (par->lowdepth ? 8 : 24),
318*4882a593Smuzhiyun info->fix.smem_len);
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun /*
322*4882a593Smuzhiyun * Initialisation
323*4882a593Smuzhiyun */
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun static void
tcx_init_fix(struct fb_info * info,int linebytes)326*4882a593Smuzhiyun tcx_init_fix(struct fb_info *info, int linebytes)
327*4882a593Smuzhiyun {
328*4882a593Smuzhiyun struct tcx_par *par = (struct tcx_par *)info->par;
329*4882a593Smuzhiyun const char *tcx_name;
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun if (par->lowdepth)
332*4882a593Smuzhiyun tcx_name = "TCX8";
333*4882a593Smuzhiyun else
334*4882a593Smuzhiyun tcx_name = "TCX24";
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun strlcpy(info->fix.id, tcx_name, sizeof(info->fix.id));
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun info->fix.type = FB_TYPE_PACKED_PIXELS;
339*4882a593Smuzhiyun info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun info->fix.line_length = linebytes;
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun info->fix.accel = FB_ACCEL_SUN_TCX;
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun
tcx_unmap_regs(struct platform_device * op,struct fb_info * info,struct tcx_par * par)346*4882a593Smuzhiyun static void tcx_unmap_regs(struct platform_device *op, struct fb_info *info,
347*4882a593Smuzhiyun struct tcx_par *par)
348*4882a593Smuzhiyun {
349*4882a593Smuzhiyun if (par->tec)
350*4882a593Smuzhiyun of_iounmap(&op->resource[7],
351*4882a593Smuzhiyun par->tec, sizeof(struct tcx_tec));
352*4882a593Smuzhiyun if (par->thc)
353*4882a593Smuzhiyun of_iounmap(&op->resource[9],
354*4882a593Smuzhiyun par->thc, sizeof(struct tcx_thc));
355*4882a593Smuzhiyun if (par->bt)
356*4882a593Smuzhiyun of_iounmap(&op->resource[8],
357*4882a593Smuzhiyun par->bt, sizeof(struct bt_regs));
358*4882a593Smuzhiyun if (par->cplane)
359*4882a593Smuzhiyun of_iounmap(&op->resource[4],
360*4882a593Smuzhiyun par->cplane, info->fix.smem_len * sizeof(u32));
361*4882a593Smuzhiyun if (info->screen_base)
362*4882a593Smuzhiyun of_iounmap(&op->resource[0],
363*4882a593Smuzhiyun info->screen_base, info->fix.smem_len);
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun
tcx_probe(struct platform_device * op)366*4882a593Smuzhiyun static int tcx_probe(struct platform_device *op)
367*4882a593Smuzhiyun {
368*4882a593Smuzhiyun struct device_node *dp = op->dev.of_node;
369*4882a593Smuzhiyun struct fb_info *info;
370*4882a593Smuzhiyun struct tcx_par *par;
371*4882a593Smuzhiyun int linebytes, i, err;
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun info = framebuffer_alloc(sizeof(struct tcx_par), &op->dev);
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun err = -ENOMEM;
376*4882a593Smuzhiyun if (!info)
377*4882a593Smuzhiyun goto out_err;
378*4882a593Smuzhiyun par = info->par;
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun spin_lock_init(&par->lock);
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun par->lowdepth =
383*4882a593Smuzhiyun (of_find_property(dp, "tcx-8-bit", NULL) != NULL);
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun sbusfb_fill_var(&info->var, dp, 8);
386*4882a593Smuzhiyun info->var.red.length = 8;
387*4882a593Smuzhiyun info->var.green.length = 8;
388*4882a593Smuzhiyun info->var.blue.length = 8;
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun linebytes = of_getintprop_default(dp, "linebytes",
391*4882a593Smuzhiyun info->var.xres);
392*4882a593Smuzhiyun info->fix.smem_len = PAGE_ALIGN(linebytes * info->var.yres);
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun par->tec = of_ioremap(&op->resource[7], 0,
395*4882a593Smuzhiyun sizeof(struct tcx_tec), "tcx tec");
396*4882a593Smuzhiyun par->thc = of_ioremap(&op->resource[9], 0,
397*4882a593Smuzhiyun sizeof(struct tcx_thc), "tcx thc");
398*4882a593Smuzhiyun par->bt = of_ioremap(&op->resource[8], 0,
399*4882a593Smuzhiyun sizeof(struct bt_regs), "tcx dac");
400*4882a593Smuzhiyun info->screen_base = of_ioremap(&op->resource[0], 0,
401*4882a593Smuzhiyun info->fix.smem_len, "tcx ram");
402*4882a593Smuzhiyun if (!par->tec || !par->thc ||
403*4882a593Smuzhiyun !par->bt || !info->screen_base)
404*4882a593Smuzhiyun goto out_unmap_regs;
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun memcpy(&par->mmap_map, &__tcx_mmap_map, sizeof(par->mmap_map));
407*4882a593Smuzhiyun if (!par->lowdepth) {
408*4882a593Smuzhiyun par->cplane = of_ioremap(&op->resource[4], 0,
409*4882a593Smuzhiyun info->fix.smem_len * sizeof(u32),
410*4882a593Smuzhiyun "tcx cplane");
411*4882a593Smuzhiyun if (!par->cplane)
412*4882a593Smuzhiyun goto out_unmap_regs;
413*4882a593Smuzhiyun } else {
414*4882a593Smuzhiyun par->mmap_map[1].size = SBUS_MMAP_EMPTY;
415*4882a593Smuzhiyun par->mmap_map[4].size = SBUS_MMAP_EMPTY;
416*4882a593Smuzhiyun par->mmap_map[5].size = SBUS_MMAP_EMPTY;
417*4882a593Smuzhiyun par->mmap_map[6].size = SBUS_MMAP_EMPTY;
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun info->fix.smem_start = op->resource[0].start;
421*4882a593Smuzhiyun par->which_io = op->resource[0].flags & IORESOURCE_BITS;
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun for (i = 0; i < TCX_MMAP_ENTRIES; i++) {
424*4882a593Smuzhiyun int j;
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun switch (i) {
427*4882a593Smuzhiyun case 10:
428*4882a593Smuzhiyun j = 12;
429*4882a593Smuzhiyun break;
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun case 11: case 12:
432*4882a593Smuzhiyun j = i - 1;
433*4882a593Smuzhiyun break;
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun default:
436*4882a593Smuzhiyun j = i;
437*4882a593Smuzhiyun break;
438*4882a593Smuzhiyun }
439*4882a593Smuzhiyun par->mmap_map[i].poff = op->resource[j].start;
440*4882a593Smuzhiyun }
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun info->flags = FBINFO_DEFAULT;
443*4882a593Smuzhiyun info->fbops = &tcx_ops;
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun /* Initialize brooktree DAC. */
446*4882a593Smuzhiyun sbus_writel(0x04 << 24, &par->bt->addr); /* color planes */
447*4882a593Smuzhiyun sbus_writel(0xff << 24, &par->bt->control);
448*4882a593Smuzhiyun sbus_writel(0x05 << 24, &par->bt->addr);
449*4882a593Smuzhiyun sbus_writel(0x00 << 24, &par->bt->control);
450*4882a593Smuzhiyun sbus_writel(0x06 << 24, &par->bt->addr); /* overlay plane */
451*4882a593Smuzhiyun sbus_writel(0x73 << 24, &par->bt->control);
452*4882a593Smuzhiyun sbus_writel(0x07 << 24, &par->bt->addr);
453*4882a593Smuzhiyun sbus_writel(0x00 << 24, &par->bt->control);
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun tcx_reset(info);
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun tcx_blank(FB_BLANK_UNBLANK, info);
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun if (fb_alloc_cmap(&info->cmap, 256, 0))
460*4882a593Smuzhiyun goto out_unmap_regs;
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun fb_set_cmap(&info->cmap, info);
463*4882a593Smuzhiyun tcx_init_fix(info, linebytes);
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun err = register_framebuffer(info);
466*4882a593Smuzhiyun if (err < 0)
467*4882a593Smuzhiyun goto out_dealloc_cmap;
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun dev_set_drvdata(&op->dev, info);
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun printk(KERN_INFO "%pOF: TCX at %lx:%lx, %s\n",
472*4882a593Smuzhiyun dp,
473*4882a593Smuzhiyun par->which_io,
474*4882a593Smuzhiyun info->fix.smem_start,
475*4882a593Smuzhiyun par->lowdepth ? "8-bit only" : "24-bit depth");
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun return 0;
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun out_dealloc_cmap:
480*4882a593Smuzhiyun fb_dealloc_cmap(&info->cmap);
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun out_unmap_regs:
483*4882a593Smuzhiyun tcx_unmap_regs(op, info, par);
484*4882a593Smuzhiyun framebuffer_release(info);
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun out_err:
487*4882a593Smuzhiyun return err;
488*4882a593Smuzhiyun }
489*4882a593Smuzhiyun
tcx_remove(struct platform_device * op)490*4882a593Smuzhiyun static int tcx_remove(struct platform_device *op)
491*4882a593Smuzhiyun {
492*4882a593Smuzhiyun struct fb_info *info = dev_get_drvdata(&op->dev);
493*4882a593Smuzhiyun struct tcx_par *par = info->par;
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun unregister_framebuffer(info);
496*4882a593Smuzhiyun fb_dealloc_cmap(&info->cmap);
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun tcx_unmap_regs(op, info, par);
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun framebuffer_release(info);
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun return 0;
503*4882a593Smuzhiyun }
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun static const struct of_device_id tcx_match[] = {
506*4882a593Smuzhiyun {
507*4882a593Smuzhiyun .name = "SUNW,tcx",
508*4882a593Smuzhiyun },
509*4882a593Smuzhiyun {},
510*4882a593Smuzhiyun };
511*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, tcx_match);
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun static struct platform_driver tcx_driver = {
514*4882a593Smuzhiyun .driver = {
515*4882a593Smuzhiyun .name = "tcx",
516*4882a593Smuzhiyun .of_match_table = tcx_match,
517*4882a593Smuzhiyun },
518*4882a593Smuzhiyun .probe = tcx_probe,
519*4882a593Smuzhiyun .remove = tcx_remove,
520*4882a593Smuzhiyun };
521*4882a593Smuzhiyun
tcx_init(void)522*4882a593Smuzhiyun static int __init tcx_init(void)
523*4882a593Smuzhiyun {
524*4882a593Smuzhiyun if (fb_get_options("tcxfb", NULL))
525*4882a593Smuzhiyun return -ENODEV;
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun return platform_driver_register(&tcx_driver);
528*4882a593Smuzhiyun }
529*4882a593Smuzhiyun
tcx_exit(void)530*4882a593Smuzhiyun static void __exit tcx_exit(void)
531*4882a593Smuzhiyun {
532*4882a593Smuzhiyun platform_driver_unregister(&tcx_driver);
533*4882a593Smuzhiyun }
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun module_init(tcx_init);
536*4882a593Smuzhiyun module_exit(tcx_exit);
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun MODULE_DESCRIPTION("framebuffer driver for TCX chipsets");
539*4882a593Smuzhiyun MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
540*4882a593Smuzhiyun MODULE_VERSION("2.0");
541*4882a593Smuzhiyun MODULE_LICENSE("GPL");
542