xref: /OK3568_Linux_fs/kernel/drivers/video/fbdev/savage/savagefb-i2c.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * linux/drivers/video/savage/savagefb-i2c.c - S3 Savage DDC2
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright 2004 Antonino A. Daplas <adaplas @pol.net>
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Based partly on rivafb-i2c.c
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * This file is subject to the terms and conditions of the GNU General Public
9*4882a593Smuzhiyun  * License.  See the file COPYING in the main directory of this archive
10*4882a593Smuzhiyun  * for more details.
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/gfp.h>
17*4882a593Smuzhiyun #include <linux/pci.h>
18*4882a593Smuzhiyun #include <linux/fb.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include <asm/io.h>
21*4882a593Smuzhiyun #include "savagefb.h"
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define SAVAGE_DDC 	0x50
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #define VGA_CR_IX	0x3d4
26*4882a593Smuzhiyun #define VGA_CR_DATA	0x3d5
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #define CR_SERIAL1	0xa0	/* I2C serial communications interface */
29*4882a593Smuzhiyun #define MM_SERIAL1	0xff20
30*4882a593Smuzhiyun #define CR_SERIAL2	0xb1	/* DDC2 monitor communications interface */
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun /* based on vt8365 documentation */
33*4882a593Smuzhiyun #define PROSAVAGE_I2C_ENAB	0x10
34*4882a593Smuzhiyun #define PROSAVAGE_I2C_SCL_OUT	0x01
35*4882a593Smuzhiyun #define PROSAVAGE_I2C_SDA_OUT	0x02
36*4882a593Smuzhiyun #define PROSAVAGE_I2C_SCL_IN	0x04
37*4882a593Smuzhiyun #define PROSAVAGE_I2C_SDA_IN	0x08
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #define SAVAGE4_I2C_ENAB	0x00000020
40*4882a593Smuzhiyun #define SAVAGE4_I2C_SCL_OUT	0x00000001
41*4882a593Smuzhiyun #define SAVAGE4_I2C_SDA_OUT	0x00000002
42*4882a593Smuzhiyun #define SAVAGE4_I2C_SCL_IN	0x00000008
43*4882a593Smuzhiyun #define SAVAGE4_I2C_SDA_IN	0x00000010
44*4882a593Smuzhiyun 
savage4_gpio_setscl(void * data,int val)45*4882a593Smuzhiyun static void savage4_gpio_setscl(void *data, int val)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun 	struct savagefb_i2c_chan *chan = data;
48*4882a593Smuzhiyun 	unsigned int r;
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun 	r = readl(chan->ioaddr + chan->reg);
51*4882a593Smuzhiyun 	if(val)
52*4882a593Smuzhiyun 		r |= SAVAGE4_I2C_SCL_OUT;
53*4882a593Smuzhiyun 	else
54*4882a593Smuzhiyun 		r &= ~SAVAGE4_I2C_SCL_OUT;
55*4882a593Smuzhiyun 	writel(r, chan->ioaddr + chan->reg);
56*4882a593Smuzhiyun 	readl(chan->ioaddr + chan->reg);	/* flush posted write */
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun 
savage4_gpio_setsda(void * data,int val)59*4882a593Smuzhiyun static void savage4_gpio_setsda(void *data, int val)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun 	struct savagefb_i2c_chan *chan = data;
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	unsigned int r;
64*4882a593Smuzhiyun 	r = readl(chan->ioaddr + chan->reg);
65*4882a593Smuzhiyun 	if(val)
66*4882a593Smuzhiyun 		r |= SAVAGE4_I2C_SDA_OUT;
67*4882a593Smuzhiyun 	else
68*4882a593Smuzhiyun 		r &= ~SAVAGE4_I2C_SDA_OUT;
69*4882a593Smuzhiyun 	writel(r, chan->ioaddr + chan->reg);
70*4882a593Smuzhiyun 	readl(chan->ioaddr + chan->reg);	/* flush posted write */
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun 
savage4_gpio_getscl(void * data)73*4882a593Smuzhiyun static int savage4_gpio_getscl(void *data)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun 	struct savagefb_i2c_chan *chan = data;
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	return (0 != (readl(chan->ioaddr + chan->reg) & SAVAGE4_I2C_SCL_IN));
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun 
savage4_gpio_getsda(void * data)80*4882a593Smuzhiyun static int savage4_gpio_getsda(void *data)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun 	struct savagefb_i2c_chan *chan = data;
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 	return (0 != (readl(chan->ioaddr + chan->reg) & SAVAGE4_I2C_SDA_IN));
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun 
prosavage_gpio_setscl(void * data,int val)87*4882a593Smuzhiyun static void prosavage_gpio_setscl(void* data, int val)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun 	struct savagefb_i2c_chan *chan = data;
90*4882a593Smuzhiyun 	u32			  r;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	r = VGArCR(chan->reg, chan->par);
93*4882a593Smuzhiyun 	r |= PROSAVAGE_I2C_ENAB;
94*4882a593Smuzhiyun 	if (val) {
95*4882a593Smuzhiyun 		r |= PROSAVAGE_I2C_SCL_OUT;
96*4882a593Smuzhiyun 	} else {
97*4882a593Smuzhiyun 		r &= ~PROSAVAGE_I2C_SCL_OUT;
98*4882a593Smuzhiyun 	}
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	VGAwCR(chan->reg, r, chan->par);
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun 
prosavage_gpio_setsda(void * data,int val)103*4882a593Smuzhiyun static void prosavage_gpio_setsda(void* data, int val)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun 	struct savagefb_i2c_chan *chan = data;
106*4882a593Smuzhiyun 	unsigned int r;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	r = VGArCR(chan->reg, chan->par);
109*4882a593Smuzhiyun 	r |= PROSAVAGE_I2C_ENAB;
110*4882a593Smuzhiyun 	if (val) {
111*4882a593Smuzhiyun 		r |= PROSAVAGE_I2C_SDA_OUT;
112*4882a593Smuzhiyun 	} else {
113*4882a593Smuzhiyun 		r &= ~PROSAVAGE_I2C_SDA_OUT;
114*4882a593Smuzhiyun 	}
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	VGAwCR(chan->reg, r, chan->par);
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun 
prosavage_gpio_getscl(void * data)119*4882a593Smuzhiyun static int prosavage_gpio_getscl(void* data)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun 	struct savagefb_i2c_chan *chan = data;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	return (VGArCR(chan->reg, chan->par) & PROSAVAGE_I2C_SCL_IN) ? 1 : 0;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun 
prosavage_gpio_getsda(void * data)126*4882a593Smuzhiyun static int prosavage_gpio_getsda(void* data)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun 	struct savagefb_i2c_chan *chan = data;
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	return (VGArCR(chan->reg, chan->par) & PROSAVAGE_I2C_SDA_IN) ? 1 : 0;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun 
savage_setup_i2c_bus(struct savagefb_i2c_chan * chan,const char * name)133*4882a593Smuzhiyun static int savage_setup_i2c_bus(struct savagefb_i2c_chan *chan,
134*4882a593Smuzhiyun 				const char *name)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun 	int rc = 0;
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	if (chan->par) {
139*4882a593Smuzhiyun 		strcpy(chan->adapter.name, name);
140*4882a593Smuzhiyun 		chan->adapter.owner		= THIS_MODULE;
141*4882a593Smuzhiyun 		chan->adapter.algo_data		= &chan->algo;
142*4882a593Smuzhiyun 		chan->adapter.dev.parent	= &chan->par->pcidev->dev;
143*4882a593Smuzhiyun 		chan->algo.udelay		= 10;
144*4882a593Smuzhiyun 		chan->algo.timeout		= 20;
145*4882a593Smuzhiyun 		chan->algo.data 		= chan;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 		i2c_set_adapdata(&chan->adapter, chan);
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 		/* Raise SCL and SDA */
150*4882a593Smuzhiyun 		chan->algo.setsda(chan, 1);
151*4882a593Smuzhiyun 		chan->algo.setscl(chan, 1);
152*4882a593Smuzhiyun 		udelay(20);
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 		rc = i2c_bit_add_bus(&chan->adapter);
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 		if (rc == 0)
157*4882a593Smuzhiyun 			dev_dbg(&chan->par->pcidev->dev,
158*4882a593Smuzhiyun 				"I2C bus %s registered.\n", name);
159*4882a593Smuzhiyun 		else
160*4882a593Smuzhiyun 			dev_warn(&chan->par->pcidev->dev,
161*4882a593Smuzhiyun 				 "Failed to register I2C bus %s.\n", name);
162*4882a593Smuzhiyun 	}
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	return rc;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun 
savagefb_create_i2c_busses(struct fb_info * info)167*4882a593Smuzhiyun void savagefb_create_i2c_busses(struct fb_info *info)
168*4882a593Smuzhiyun {
169*4882a593Smuzhiyun 	struct savagefb_par *par = info->par;
170*4882a593Smuzhiyun 	par->chan.par	= par;
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	switch (par->chip) {
173*4882a593Smuzhiyun 	case S3_PROSAVAGE:
174*4882a593Smuzhiyun 	case S3_PROSAVAGEDDR:
175*4882a593Smuzhiyun 	case S3_TWISTER:
176*4882a593Smuzhiyun 		par->chan.reg         = CR_SERIAL2;
177*4882a593Smuzhiyun 		par->chan.ioaddr      = par->mmio.vbase;
178*4882a593Smuzhiyun 		par->chan.algo.setsda = prosavage_gpio_setsda;
179*4882a593Smuzhiyun 		par->chan.algo.setscl = prosavage_gpio_setscl;
180*4882a593Smuzhiyun 		par->chan.algo.getsda = prosavage_gpio_getsda;
181*4882a593Smuzhiyun 		par->chan.algo.getscl = prosavage_gpio_getscl;
182*4882a593Smuzhiyun 		break;
183*4882a593Smuzhiyun 	case S3_SAVAGE4:
184*4882a593Smuzhiyun 		par->chan.reg = CR_SERIAL1;
185*4882a593Smuzhiyun 		if (par->pcidev->revision > 1 && !(VGArCR(0xa6, par) & 0x40))
186*4882a593Smuzhiyun 			par->chan.reg = CR_SERIAL2;
187*4882a593Smuzhiyun 		par->chan.ioaddr      = par->mmio.vbase;
188*4882a593Smuzhiyun 		par->chan.algo.setsda = prosavage_gpio_setsda;
189*4882a593Smuzhiyun 		par->chan.algo.setscl = prosavage_gpio_setscl;
190*4882a593Smuzhiyun 		par->chan.algo.getsda = prosavage_gpio_getsda;
191*4882a593Smuzhiyun 		par->chan.algo.getscl = prosavage_gpio_getscl;
192*4882a593Smuzhiyun 		break;
193*4882a593Smuzhiyun 	case S3_SAVAGE2000:
194*4882a593Smuzhiyun 		par->chan.reg         = MM_SERIAL1;
195*4882a593Smuzhiyun 		par->chan.ioaddr      = par->mmio.vbase;
196*4882a593Smuzhiyun 		par->chan.algo.setsda = savage4_gpio_setsda;
197*4882a593Smuzhiyun 		par->chan.algo.setscl = savage4_gpio_setscl;
198*4882a593Smuzhiyun 		par->chan.algo.getsda = savage4_gpio_getsda;
199*4882a593Smuzhiyun 		par->chan.algo.getscl = savage4_gpio_getscl;
200*4882a593Smuzhiyun 		break;
201*4882a593Smuzhiyun 	default:
202*4882a593Smuzhiyun 		par->chan.par = NULL;
203*4882a593Smuzhiyun 	}
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	savage_setup_i2c_bus(&par->chan, "SAVAGE DDC2");
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun 
savagefb_delete_i2c_busses(struct fb_info * info)208*4882a593Smuzhiyun void savagefb_delete_i2c_busses(struct fb_info *info)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun 	struct savagefb_par *par = info->par;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	if (par->chan.par)
213*4882a593Smuzhiyun 		i2c_del_adapter(&par->chan.adapter);
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	par->chan.par = NULL;
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun 
savagefb_probe_i2c_connector(struct fb_info * info,u8 ** out_edid)218*4882a593Smuzhiyun int savagefb_probe_i2c_connector(struct fb_info *info, u8 **out_edid)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun 	struct savagefb_par *par = info->par;
221*4882a593Smuzhiyun 	u8 *edid;
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	if (par->chan.par)
224*4882a593Smuzhiyun 		edid = fb_ddc_read(&par->chan.adapter);
225*4882a593Smuzhiyun 	else
226*4882a593Smuzhiyun 		edid = NULL;
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	if (!edid) {
229*4882a593Smuzhiyun 		/* try to get from firmware */
230*4882a593Smuzhiyun 		const u8 *e = fb_firmware_edid(info->device);
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 		if (e)
233*4882a593Smuzhiyun 			edid = kmemdup(e, EDID_LENGTH, GFP_KERNEL);
234*4882a593Smuzhiyun 	}
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	*out_edid = edid;
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	return (edid) ? 0 : 1;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun MODULE_LICENSE("GPL");
242