1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * linux/drivers/video/riva/fbdev-i2c.c - nVidia i2c
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Maintained by Ani Joshi <ajoshi@shell.unixbox.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright 2004 Antonino A. Daplas <adaplas @pol.net>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Based on radeonfb-i2c.c
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public
11*4882a593Smuzhiyun * License. See the file COPYING in the main directory of this archive
12*4882a593Smuzhiyun * for more details.
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/kernel.h>
17*4882a593Smuzhiyun #include <linux/delay.h>
18*4882a593Smuzhiyun #include <linux/pci.h>
19*4882a593Smuzhiyun #include <linux/fb.h>
20*4882a593Smuzhiyun #include <linux/jiffies.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #include <asm/io.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #include "rivafb.h"
25*4882a593Smuzhiyun #include "../edid.h"
26*4882a593Smuzhiyun
riva_gpio_setscl(void * data,int state)27*4882a593Smuzhiyun static void riva_gpio_setscl(void* data, int state)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun struct riva_i2c_chan *chan = data;
30*4882a593Smuzhiyun struct riva_par *par = chan->par;
31*4882a593Smuzhiyun u32 val;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
34*4882a593Smuzhiyun val = VGA_RD08(par->riva.PCIO, 0x3d5) & 0xf0;
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun if (state)
37*4882a593Smuzhiyun val |= 0x20;
38*4882a593Smuzhiyun else
39*4882a593Smuzhiyun val &= ~0x20;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
42*4882a593Smuzhiyun VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1);
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
riva_gpio_setsda(void * data,int state)45*4882a593Smuzhiyun static void riva_gpio_setsda(void* data, int state)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun struct riva_i2c_chan *chan = data;
48*4882a593Smuzhiyun struct riva_par *par = chan->par;
49*4882a593Smuzhiyun u32 val;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
52*4882a593Smuzhiyun val = VGA_RD08(par->riva.PCIO, 0x3d5) & 0xf0;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun if (state)
55*4882a593Smuzhiyun val |= 0x10;
56*4882a593Smuzhiyun else
57*4882a593Smuzhiyun val &= ~0x10;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
60*4882a593Smuzhiyun VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1);
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
riva_gpio_getscl(void * data)63*4882a593Smuzhiyun static int riva_gpio_getscl(void* data)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun struct riva_i2c_chan *chan = data;
66*4882a593Smuzhiyun struct riva_par *par = chan->par;
67*4882a593Smuzhiyun u32 val = 0;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base);
70*4882a593Smuzhiyun if (VGA_RD08(par->riva.PCIO, 0x3d5) & 0x04)
71*4882a593Smuzhiyun val = 1;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun return val;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
riva_gpio_getsda(void * data)76*4882a593Smuzhiyun static int riva_gpio_getsda(void* data)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun struct riva_i2c_chan *chan = data;
79*4882a593Smuzhiyun struct riva_par *par = chan->par;
80*4882a593Smuzhiyun u32 val = 0;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base);
83*4882a593Smuzhiyun if (VGA_RD08(par->riva.PCIO, 0x3d5) & 0x08)
84*4882a593Smuzhiyun val = 1;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun return val;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
riva_setup_i2c_bus(struct riva_i2c_chan * chan,const char * name,unsigned int i2c_class)89*4882a593Smuzhiyun static int riva_setup_i2c_bus(struct riva_i2c_chan *chan, const char *name,
90*4882a593Smuzhiyun unsigned int i2c_class)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun int rc;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun strcpy(chan->adapter.name, name);
95*4882a593Smuzhiyun chan->adapter.owner = THIS_MODULE;
96*4882a593Smuzhiyun chan->adapter.class = i2c_class;
97*4882a593Smuzhiyun chan->adapter.algo_data = &chan->algo;
98*4882a593Smuzhiyun chan->adapter.dev.parent = &chan->par->pdev->dev;
99*4882a593Smuzhiyun chan->algo.setsda = riva_gpio_setsda;
100*4882a593Smuzhiyun chan->algo.setscl = riva_gpio_setscl;
101*4882a593Smuzhiyun chan->algo.getsda = riva_gpio_getsda;
102*4882a593Smuzhiyun chan->algo.getscl = riva_gpio_getscl;
103*4882a593Smuzhiyun chan->algo.udelay = 40;
104*4882a593Smuzhiyun chan->algo.timeout = msecs_to_jiffies(2);
105*4882a593Smuzhiyun chan->algo.data = chan;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun i2c_set_adapdata(&chan->adapter, chan);
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun /* Raise SCL and SDA */
110*4882a593Smuzhiyun riva_gpio_setsda(chan, 1);
111*4882a593Smuzhiyun riva_gpio_setscl(chan, 1);
112*4882a593Smuzhiyun udelay(20);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun rc = i2c_bit_add_bus(&chan->adapter);
115*4882a593Smuzhiyun if (rc == 0)
116*4882a593Smuzhiyun dev_dbg(&chan->par->pdev->dev, "I2C bus %s registered.\n", name);
117*4882a593Smuzhiyun else {
118*4882a593Smuzhiyun dev_warn(&chan->par->pdev->dev,
119*4882a593Smuzhiyun "Failed to register I2C bus %s.\n", name);
120*4882a593Smuzhiyun chan->par = NULL;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun return rc;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun
riva_create_i2c_busses(struct riva_par * par)126*4882a593Smuzhiyun void riva_create_i2c_busses(struct riva_par *par)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun par->chan[0].par = par;
129*4882a593Smuzhiyun par->chan[1].par = par;
130*4882a593Smuzhiyun par->chan[2].par = par;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun par->chan[0].ddc_base = 0x36;
133*4882a593Smuzhiyun par->chan[1].ddc_base = 0x3e;
134*4882a593Smuzhiyun par->chan[2].ddc_base = 0x50;
135*4882a593Smuzhiyun riva_setup_i2c_bus(&par->chan[0], "BUS1", I2C_CLASS_HWMON);
136*4882a593Smuzhiyun riva_setup_i2c_bus(&par->chan[1], "BUS2", 0);
137*4882a593Smuzhiyun riva_setup_i2c_bus(&par->chan[2], "BUS3", 0);
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
riva_delete_i2c_busses(struct riva_par * par)140*4882a593Smuzhiyun void riva_delete_i2c_busses(struct riva_par *par)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun int i;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun for (i = 0; i < 3; i++) {
145*4882a593Smuzhiyun if (!par->chan[i].par)
146*4882a593Smuzhiyun continue;
147*4882a593Smuzhiyun i2c_del_adapter(&par->chan[i].adapter);
148*4882a593Smuzhiyun par->chan[i].par = NULL;
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun
riva_probe_i2c_connector(struct riva_par * par,int conn,u8 ** out_edid)152*4882a593Smuzhiyun int riva_probe_i2c_connector(struct riva_par *par, int conn, u8 **out_edid)
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun u8 *edid = NULL;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun if (par->chan[conn].par)
157*4882a593Smuzhiyun edid = fb_ddc_read(&par->chan[conn].adapter);
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun if (out_edid)
160*4882a593Smuzhiyun *out_edid = edid;
161*4882a593Smuzhiyun if (!edid)
162*4882a593Smuzhiyun return 1;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun return 0;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun
167