1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __PXA3XX_GCU_H__ 3*4882a593Smuzhiyun #define __PXA3XX_GCU_H__ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #include <linux/types.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun /* Number of 32bit words in display list (ring buffer). */ 8*4882a593Smuzhiyun #define PXA3XX_GCU_BUFFER_WORDS ((256 * 1024 - 256) / 4) 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* To be increased when breaking the ABI */ 11*4882a593Smuzhiyun #define PXA3XX_GCU_SHARED_MAGIC 0x30000001 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define PXA3XX_GCU_BATCH_WORDS 8192 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun struct pxa3xx_gcu_shared { 16*4882a593Smuzhiyun u32 buffer[PXA3XX_GCU_BUFFER_WORDS]; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun bool hw_running; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun unsigned long buffer_phys; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun unsigned int num_words; 23*4882a593Smuzhiyun unsigned int num_writes; 24*4882a593Smuzhiyun unsigned int num_done; 25*4882a593Smuzhiyun unsigned int num_interrupts; 26*4882a593Smuzhiyun unsigned int num_wait_idle; 27*4882a593Smuzhiyun unsigned int num_wait_free; 28*4882a593Smuzhiyun unsigned int num_idle; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun u32 magic; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* Initialization and synchronization. 34*4882a593Smuzhiyun * Hardware is started upon write(). */ 35*4882a593Smuzhiyun #define PXA3XX_GCU_IOCTL_RESET _IO('G', 0) 36*4882a593Smuzhiyun #define PXA3XX_GCU_IOCTL_WAIT_IDLE _IO('G', 2) 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #endif /* __PXA3XX_GCU_H__ */ 39*4882a593Smuzhiyun 40