1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * linux/drivers/video/pmagb-b-fb.c
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * PMAGB-B TURBOchannel Smart Frame Buffer (SFB) card support,
5*4882a593Smuzhiyun * derived from:
6*4882a593Smuzhiyun * "HP300 Topcat framebuffer support (derived from macfb of all things)
7*4882a593Smuzhiyun * Phil Blundell <philb@gnu.org> 1998", the original code can be
8*4882a593Smuzhiyun * found in the file hpfb.c in the same directory.
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * DECstation related code Copyright (C) 1999, 2000, 2001 by
11*4882a593Smuzhiyun * Michael Engel <engel@unix-ag.org>,
12*4882a593Smuzhiyun * Karsten Merker <merker@linuxtag.org> and
13*4882a593Smuzhiyun * Harald Koerfgen.
14*4882a593Smuzhiyun * Copyright (c) 2005, 2006 Maciej W. Rozycki
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General
17*4882a593Smuzhiyun * Public License. See the file COPYING in the main directory of this
18*4882a593Smuzhiyun * archive for more details.
19*4882a593Smuzhiyun */
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include <linux/compiler.h>
22*4882a593Smuzhiyun #include <linux/delay.h>
23*4882a593Smuzhiyun #include <linux/errno.h>
24*4882a593Smuzhiyun #include <linux/fb.h>
25*4882a593Smuzhiyun #include <linux/init.h>
26*4882a593Smuzhiyun #include <linux/kernel.h>
27*4882a593Smuzhiyun #include <linux/module.h>
28*4882a593Smuzhiyun #include <linux/tc.h>
29*4882a593Smuzhiyun #include <linux/types.h>
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #include <asm/io.h>
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #include <video/pmagb-b-fb.h>
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun struct pmagbbfb_par {
37*4882a593Smuzhiyun volatile void __iomem *mmio;
38*4882a593Smuzhiyun volatile void __iomem *smem;
39*4882a593Smuzhiyun volatile u32 __iomem *sfb;
40*4882a593Smuzhiyun volatile u32 __iomem *dac;
41*4882a593Smuzhiyun unsigned int osc0;
42*4882a593Smuzhiyun unsigned int osc1;
43*4882a593Smuzhiyun int slot;
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun static const struct fb_var_screeninfo pmagbbfb_defined = {
48*4882a593Smuzhiyun .bits_per_pixel = 8,
49*4882a593Smuzhiyun .red.length = 8,
50*4882a593Smuzhiyun .green.length = 8,
51*4882a593Smuzhiyun .blue.length = 8,
52*4882a593Smuzhiyun .activate = FB_ACTIVATE_NOW,
53*4882a593Smuzhiyun .height = -1,
54*4882a593Smuzhiyun .width = -1,
55*4882a593Smuzhiyun .accel_flags = FB_ACCEL_NONE,
56*4882a593Smuzhiyun .sync = FB_SYNC_ON_GREEN,
57*4882a593Smuzhiyun .vmode = FB_VMODE_NONINTERLACED,
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun static const struct fb_fix_screeninfo pmagbbfb_fix = {
61*4882a593Smuzhiyun .id = "PMAGB-BA",
62*4882a593Smuzhiyun .smem_len = (2048 * 1024),
63*4882a593Smuzhiyun .type = FB_TYPE_PACKED_PIXELS,
64*4882a593Smuzhiyun .visual = FB_VISUAL_PSEUDOCOLOR,
65*4882a593Smuzhiyun .mmio_len = PMAGB_B_FBMEM,
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun
sfb_write(struct pmagbbfb_par * par,unsigned int reg,u32 v)69*4882a593Smuzhiyun static inline void sfb_write(struct pmagbbfb_par *par, unsigned int reg, u32 v)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun writel(v, par->sfb + reg / 4);
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
sfb_read(struct pmagbbfb_par * par,unsigned int reg)74*4882a593Smuzhiyun static inline u32 sfb_read(struct pmagbbfb_par *par, unsigned int reg)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun return readl(par->sfb + reg / 4);
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
dac_write(struct pmagbbfb_par * par,unsigned int reg,u8 v)79*4882a593Smuzhiyun static inline void dac_write(struct pmagbbfb_par *par, unsigned int reg, u8 v)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun writeb(v, par->dac + reg / 4);
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
dac_read(struct pmagbbfb_par * par,unsigned int reg)84*4882a593Smuzhiyun static inline u8 dac_read(struct pmagbbfb_par *par, unsigned int reg)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun return readb(par->dac + reg / 4);
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
gp0_write(struct pmagbbfb_par * par,u32 v)89*4882a593Smuzhiyun static inline void gp0_write(struct pmagbbfb_par *par, u32 v)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun writel(v, par->mmio + PMAGB_B_GP0);
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun /*
96*4882a593Smuzhiyun * Set the palette.
97*4882a593Smuzhiyun */
pmagbbfb_setcolreg(unsigned int regno,unsigned int red,unsigned int green,unsigned int blue,unsigned int transp,struct fb_info * info)98*4882a593Smuzhiyun static int pmagbbfb_setcolreg(unsigned int regno, unsigned int red,
99*4882a593Smuzhiyun unsigned int green, unsigned int blue,
100*4882a593Smuzhiyun unsigned int transp, struct fb_info *info)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun struct pmagbbfb_par *par = info->par;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun if (regno >= info->cmap.len)
105*4882a593Smuzhiyun return 1;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun red >>= 8; /* The cmap fields are 16 bits */
108*4882a593Smuzhiyun green >>= 8; /* wide, but the hardware colormap */
109*4882a593Smuzhiyun blue >>= 8; /* registers are only 8 bits wide */
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun mb();
112*4882a593Smuzhiyun dac_write(par, BT459_ADDR_LO, regno);
113*4882a593Smuzhiyun dac_write(par, BT459_ADDR_HI, 0x00);
114*4882a593Smuzhiyun wmb();
115*4882a593Smuzhiyun dac_write(par, BT459_CMAP, red);
116*4882a593Smuzhiyun wmb();
117*4882a593Smuzhiyun dac_write(par, BT459_CMAP, green);
118*4882a593Smuzhiyun wmb();
119*4882a593Smuzhiyun dac_write(par, BT459_CMAP, blue);
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun return 0;
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun static const struct fb_ops pmagbbfb_ops = {
125*4882a593Smuzhiyun .owner = THIS_MODULE,
126*4882a593Smuzhiyun .fb_setcolreg = pmagbbfb_setcolreg,
127*4882a593Smuzhiyun .fb_fillrect = cfb_fillrect,
128*4882a593Smuzhiyun .fb_copyarea = cfb_copyarea,
129*4882a593Smuzhiyun .fb_imageblit = cfb_imageblit,
130*4882a593Smuzhiyun };
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun /*
134*4882a593Smuzhiyun * Turn the hardware cursor off.
135*4882a593Smuzhiyun */
pmagbbfb_erase_cursor(struct fb_info * info)136*4882a593Smuzhiyun static void pmagbbfb_erase_cursor(struct fb_info *info)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun struct pmagbbfb_par *par = info->par;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun mb();
141*4882a593Smuzhiyun dac_write(par, BT459_ADDR_LO, 0x00);
142*4882a593Smuzhiyun dac_write(par, BT459_ADDR_HI, 0x03);
143*4882a593Smuzhiyun wmb();
144*4882a593Smuzhiyun dac_write(par, BT459_DATA, 0x00);
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun /*
148*4882a593Smuzhiyun * Set up screen parameters.
149*4882a593Smuzhiyun */
pmagbbfb_screen_setup(struct fb_info * info)150*4882a593Smuzhiyun static void pmagbbfb_screen_setup(struct fb_info *info)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun struct pmagbbfb_par *par = info->par;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun info->var.xres = ((sfb_read(par, SFB_REG_VID_HOR) >>
155*4882a593Smuzhiyun SFB_VID_HOR_PIX_SHIFT) & SFB_VID_HOR_PIX_MASK) * 4;
156*4882a593Smuzhiyun info->var.xres_virtual = info->var.xres;
157*4882a593Smuzhiyun info->var.yres = (sfb_read(par, SFB_REG_VID_VER) >>
158*4882a593Smuzhiyun SFB_VID_VER_SL_SHIFT) & SFB_VID_VER_SL_MASK;
159*4882a593Smuzhiyun info->var.yres_virtual = info->var.yres;
160*4882a593Smuzhiyun info->var.left_margin = ((sfb_read(par, SFB_REG_VID_HOR) >>
161*4882a593Smuzhiyun SFB_VID_HOR_BP_SHIFT) &
162*4882a593Smuzhiyun SFB_VID_HOR_BP_MASK) * 4;
163*4882a593Smuzhiyun info->var.right_margin = ((sfb_read(par, SFB_REG_VID_HOR) >>
164*4882a593Smuzhiyun SFB_VID_HOR_FP_SHIFT) &
165*4882a593Smuzhiyun SFB_VID_HOR_FP_MASK) * 4;
166*4882a593Smuzhiyun info->var.upper_margin = (sfb_read(par, SFB_REG_VID_VER) >>
167*4882a593Smuzhiyun SFB_VID_VER_BP_SHIFT) & SFB_VID_VER_BP_MASK;
168*4882a593Smuzhiyun info->var.lower_margin = (sfb_read(par, SFB_REG_VID_VER) >>
169*4882a593Smuzhiyun SFB_VID_VER_FP_SHIFT) & SFB_VID_VER_FP_MASK;
170*4882a593Smuzhiyun info->var.hsync_len = ((sfb_read(par, SFB_REG_VID_HOR) >>
171*4882a593Smuzhiyun SFB_VID_HOR_SYN_SHIFT) &
172*4882a593Smuzhiyun SFB_VID_HOR_SYN_MASK) * 4;
173*4882a593Smuzhiyun info->var.vsync_len = (sfb_read(par, SFB_REG_VID_VER) >>
174*4882a593Smuzhiyun SFB_VID_VER_SYN_SHIFT) & SFB_VID_VER_SYN_MASK;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun info->fix.line_length = info->var.xres;
177*4882a593Smuzhiyun };
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun /*
180*4882a593Smuzhiyun * Determine oscillator configuration.
181*4882a593Smuzhiyun */
pmagbbfb_osc_setup(struct fb_info * info)182*4882a593Smuzhiyun static void pmagbbfb_osc_setup(struct fb_info *info)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun static unsigned int pmagbbfb_freqs[] = {
185*4882a593Smuzhiyun 130808, 119843, 104000, 92980, 74370, 72800,
186*4882a593Smuzhiyun 69197, 66000, 65000, 50350, 36000, 32000, 25175
187*4882a593Smuzhiyun };
188*4882a593Smuzhiyun struct pmagbbfb_par *par = info->par;
189*4882a593Smuzhiyun struct tc_bus *tbus = to_tc_dev(info->device)->bus;
190*4882a593Smuzhiyun u32 count0 = 8, count1 = 8, counttc = 16 * 256 + 8;
191*4882a593Smuzhiyun u32 freq0, freq1, freqtc = tc_get_speed(tbus) / 250;
192*4882a593Smuzhiyun int i, j;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun gp0_write(par, 0); /* select Osc0 */
195*4882a593Smuzhiyun for (j = 0; j < 16; j++) {
196*4882a593Smuzhiyun mb();
197*4882a593Smuzhiyun sfb_write(par, SFB_REG_TCCLK_COUNT, 0);
198*4882a593Smuzhiyun mb();
199*4882a593Smuzhiyun for (i = 0; i < 100; i++) { /* nominally max. 20.5us */
200*4882a593Smuzhiyun if (sfb_read(par, SFB_REG_TCCLK_COUNT) == 0)
201*4882a593Smuzhiyun break;
202*4882a593Smuzhiyun udelay(1);
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun count0 += sfb_read(par, SFB_REG_VIDCLK_COUNT);
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun gp0_write(par, 1); /* select Osc1 */
208*4882a593Smuzhiyun for (j = 0; j < 16; j++) {
209*4882a593Smuzhiyun mb();
210*4882a593Smuzhiyun sfb_write(par, SFB_REG_TCCLK_COUNT, 0);
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun for (i = 0; i < 100; i++) { /* nominally max. 20.5us */
213*4882a593Smuzhiyun if (sfb_read(par, SFB_REG_TCCLK_COUNT) == 0)
214*4882a593Smuzhiyun break;
215*4882a593Smuzhiyun udelay(1);
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun count1 += sfb_read(par, SFB_REG_VIDCLK_COUNT);
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun freq0 = (freqtc * count0 + counttc / 2) / counttc;
221*4882a593Smuzhiyun par->osc0 = freq0;
222*4882a593Smuzhiyun if (freq0 >= pmagbbfb_freqs[0] - (pmagbbfb_freqs[0] + 32) / 64 &&
223*4882a593Smuzhiyun freq0 <= pmagbbfb_freqs[0] + (pmagbbfb_freqs[0] + 32) / 64)
224*4882a593Smuzhiyun par->osc0 = pmagbbfb_freqs[0];
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun freq1 = (par->osc0 * count1 + count0 / 2) / count0;
227*4882a593Smuzhiyun par->osc1 = freq1;
228*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(pmagbbfb_freqs); i++)
229*4882a593Smuzhiyun if (freq1 >= pmagbbfb_freqs[i] -
230*4882a593Smuzhiyun (pmagbbfb_freqs[i] + 128) / 256 &&
231*4882a593Smuzhiyun freq1 <= pmagbbfb_freqs[i] +
232*4882a593Smuzhiyun (pmagbbfb_freqs[i] + 128) / 256) {
233*4882a593Smuzhiyun par->osc1 = pmagbbfb_freqs[i];
234*4882a593Smuzhiyun break;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun if (par->osc0 - par->osc1 <= (par->osc0 + par->osc1 + 256) / 512 ||
238*4882a593Smuzhiyun par->osc1 - par->osc0 <= (par->osc0 + par->osc1 + 256) / 512)
239*4882a593Smuzhiyun par->osc1 = 0;
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun gp0_write(par, par->osc1 != 0); /* reselect OscX */
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun info->var.pixclock = par->osc1 ?
244*4882a593Smuzhiyun (1000000000 + par->osc1 / 2) / par->osc1 :
245*4882a593Smuzhiyun (1000000000 + par->osc0 / 2) / par->osc0;
246*4882a593Smuzhiyun };
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun
pmagbbfb_probe(struct device * dev)249*4882a593Smuzhiyun static int pmagbbfb_probe(struct device *dev)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun struct tc_dev *tdev = to_tc_dev(dev);
252*4882a593Smuzhiyun resource_size_t start, len;
253*4882a593Smuzhiyun struct fb_info *info;
254*4882a593Smuzhiyun struct pmagbbfb_par *par;
255*4882a593Smuzhiyun char freq0[12], freq1[12];
256*4882a593Smuzhiyun u32 vid_base;
257*4882a593Smuzhiyun int err;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun info = framebuffer_alloc(sizeof(struct pmagbbfb_par), dev);
260*4882a593Smuzhiyun if (!info)
261*4882a593Smuzhiyun return -ENOMEM;
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun par = info->par;
264*4882a593Smuzhiyun dev_set_drvdata(dev, info);
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
267*4882a593Smuzhiyun printk(KERN_ERR "%s: Cannot allocate color map\n",
268*4882a593Smuzhiyun dev_name(dev));
269*4882a593Smuzhiyun err = -ENOMEM;
270*4882a593Smuzhiyun goto err_alloc;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun info->fbops = &pmagbbfb_ops;
274*4882a593Smuzhiyun info->fix = pmagbbfb_fix;
275*4882a593Smuzhiyun info->var = pmagbbfb_defined;
276*4882a593Smuzhiyun info->flags = FBINFO_DEFAULT;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun /* Request the I/O MEM resource. */
279*4882a593Smuzhiyun start = tdev->resource.start;
280*4882a593Smuzhiyun len = tdev->resource.end - start + 1;
281*4882a593Smuzhiyun if (!request_mem_region(start, len, dev_name(dev))) {
282*4882a593Smuzhiyun printk(KERN_ERR "%s: Cannot reserve FB region\n",
283*4882a593Smuzhiyun dev_name(dev));
284*4882a593Smuzhiyun err = -EBUSY;
285*4882a593Smuzhiyun goto err_cmap;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun /* MMIO mapping setup. */
289*4882a593Smuzhiyun info->fix.mmio_start = start;
290*4882a593Smuzhiyun par->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
291*4882a593Smuzhiyun if (!par->mmio) {
292*4882a593Smuzhiyun printk(KERN_ERR "%s: Cannot map MMIO\n", dev_name(dev));
293*4882a593Smuzhiyun err = -ENOMEM;
294*4882a593Smuzhiyun goto err_resource;
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun par->sfb = par->mmio + PMAGB_B_SFB;
297*4882a593Smuzhiyun par->dac = par->mmio + PMAGB_B_BT459;
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun /* Frame buffer mapping setup. */
300*4882a593Smuzhiyun info->fix.smem_start = start + PMAGB_B_FBMEM;
301*4882a593Smuzhiyun par->smem = ioremap(info->fix.smem_start, info->fix.smem_len);
302*4882a593Smuzhiyun if (!par->smem) {
303*4882a593Smuzhiyun printk(KERN_ERR "%s: Cannot map FB\n", dev_name(dev));
304*4882a593Smuzhiyun err = -ENOMEM;
305*4882a593Smuzhiyun goto err_mmio_map;
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun vid_base = sfb_read(par, SFB_REG_VID_BASE);
308*4882a593Smuzhiyun info->screen_base = (void __iomem *)par->smem + vid_base * 0x1000;
309*4882a593Smuzhiyun info->screen_size = info->fix.smem_len - 2 * vid_base * 0x1000;
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun pmagbbfb_erase_cursor(info);
312*4882a593Smuzhiyun pmagbbfb_screen_setup(info);
313*4882a593Smuzhiyun pmagbbfb_osc_setup(info);
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun err = register_framebuffer(info);
316*4882a593Smuzhiyun if (err < 0) {
317*4882a593Smuzhiyun printk(KERN_ERR "%s: Cannot register framebuffer\n",
318*4882a593Smuzhiyun dev_name(dev));
319*4882a593Smuzhiyun goto err_smem_map;
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun get_device(dev);
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun snprintf(freq0, sizeof(freq0), "%u.%03uMHz",
325*4882a593Smuzhiyun par->osc0 / 1000, par->osc0 % 1000);
326*4882a593Smuzhiyun snprintf(freq1, sizeof(freq1), "%u.%03uMHz",
327*4882a593Smuzhiyun par->osc1 / 1000, par->osc1 % 1000);
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun fb_info(info, "%s frame buffer device at %s\n",
330*4882a593Smuzhiyun info->fix.id, dev_name(dev));
331*4882a593Smuzhiyun fb_info(info, "Osc0: %s, Osc1: %s, Osc%u selected\n",
332*4882a593Smuzhiyun freq0, par->osc1 ? freq1 : "disabled", par->osc1 != 0);
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun return 0;
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun err_smem_map:
338*4882a593Smuzhiyun iounmap(par->smem);
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun err_mmio_map:
341*4882a593Smuzhiyun iounmap(par->mmio);
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun err_resource:
344*4882a593Smuzhiyun release_mem_region(start, len);
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun err_cmap:
347*4882a593Smuzhiyun fb_dealloc_cmap(&info->cmap);
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun err_alloc:
350*4882a593Smuzhiyun framebuffer_release(info);
351*4882a593Smuzhiyun return err;
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun
pmagbbfb_remove(struct device * dev)354*4882a593Smuzhiyun static int pmagbbfb_remove(struct device *dev)
355*4882a593Smuzhiyun {
356*4882a593Smuzhiyun struct tc_dev *tdev = to_tc_dev(dev);
357*4882a593Smuzhiyun struct fb_info *info = dev_get_drvdata(dev);
358*4882a593Smuzhiyun struct pmagbbfb_par *par = info->par;
359*4882a593Smuzhiyun resource_size_t start, len;
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun put_device(dev);
362*4882a593Smuzhiyun unregister_framebuffer(info);
363*4882a593Smuzhiyun iounmap(par->smem);
364*4882a593Smuzhiyun iounmap(par->mmio);
365*4882a593Smuzhiyun start = tdev->resource.start;
366*4882a593Smuzhiyun len = tdev->resource.end - start + 1;
367*4882a593Smuzhiyun release_mem_region(start, len);
368*4882a593Smuzhiyun fb_dealloc_cmap(&info->cmap);
369*4882a593Smuzhiyun framebuffer_release(info);
370*4882a593Smuzhiyun return 0;
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun /*
375*4882a593Smuzhiyun * Initialize the framebuffer.
376*4882a593Smuzhiyun */
377*4882a593Smuzhiyun static const struct tc_device_id pmagbbfb_tc_table[] = {
378*4882a593Smuzhiyun { "DEC ", "PMAGB-BA" },
379*4882a593Smuzhiyun { }
380*4882a593Smuzhiyun };
381*4882a593Smuzhiyun MODULE_DEVICE_TABLE(tc, pmagbbfb_tc_table);
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun static struct tc_driver pmagbbfb_driver = {
384*4882a593Smuzhiyun .id_table = pmagbbfb_tc_table,
385*4882a593Smuzhiyun .driver = {
386*4882a593Smuzhiyun .name = "pmagbbfb",
387*4882a593Smuzhiyun .bus = &tc_bus_type,
388*4882a593Smuzhiyun .probe = pmagbbfb_probe,
389*4882a593Smuzhiyun .remove = pmagbbfb_remove,
390*4882a593Smuzhiyun },
391*4882a593Smuzhiyun };
392*4882a593Smuzhiyun
pmagbbfb_init(void)393*4882a593Smuzhiyun static int __init pmagbbfb_init(void)
394*4882a593Smuzhiyun {
395*4882a593Smuzhiyun #ifndef MODULE
396*4882a593Smuzhiyun if (fb_get_options("pmagbbfb", NULL))
397*4882a593Smuzhiyun return -ENXIO;
398*4882a593Smuzhiyun #endif
399*4882a593Smuzhiyun return tc_register_driver(&pmagbbfb_driver);
400*4882a593Smuzhiyun }
401*4882a593Smuzhiyun
pmagbbfb_exit(void)402*4882a593Smuzhiyun static void __exit pmagbbfb_exit(void)
403*4882a593Smuzhiyun {
404*4882a593Smuzhiyun tc_unregister_driver(&pmagbbfb_driver);
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun module_init(pmagbbfb_init);
409*4882a593Smuzhiyun module_exit(pmagbbfb_exit);
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun MODULE_LICENSE("GPL");
412