xref: /OK3568_Linux_fs/kernel/drivers/video/fbdev/platinumfb.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * linux/drivers/video/platinumfb-hw.c -- Frame buffer device for the
3*4882a593Smuzhiyun  * Platinum on-board video in PowerMac 7200s (and some clones based
4*4882a593Smuzhiyun  * on the same motherboard.)
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  *  Created 09 Feb 1998 by Jon Howell <jonh@cs.dartmouth.edu>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Copyright (C) 1998 Jon Howell
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  *  based on drivers/macintosh/platinum.c: Console support
11*4882a593Smuzhiyun  * 	for PowerMac "platinum" display adaptor.
12*4882a593Smuzhiyun  *  Copyright (C) 1996 Paul Mackerras and Mark Abene.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  *  based on skeletonfb.c:
15*4882a593Smuzhiyun  *  Created 28 Dec 1997 by Geert Uytterhoeven
16*4882a593Smuzhiyun  *
17*4882a593Smuzhiyun  * This file is subject to the terms and conditions of the GNU General Public
18*4882a593Smuzhiyun  * License.  See the file COPYING in the main directory of this archive
19*4882a593Smuzhiyun  * for more details.
20*4882a593Smuzhiyun  */
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun /*
23*4882a593Smuzhiyun  * Structure of the registers for the DACula colormap device.
24*4882a593Smuzhiyun  */
25*4882a593Smuzhiyun struct cmap_regs {
26*4882a593Smuzhiyun 	unsigned char addr;
27*4882a593Smuzhiyun 	char pad1[15];
28*4882a593Smuzhiyun 	unsigned char d1;
29*4882a593Smuzhiyun 	char pad2[15];
30*4882a593Smuzhiyun 	unsigned char d2;
31*4882a593Smuzhiyun 	char pad3[15];
32*4882a593Smuzhiyun 	unsigned char lut;
33*4882a593Smuzhiyun 	char pad4[15];
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun /*
37*4882a593Smuzhiyun  * Structure of the registers for the "platinum" display adaptor".
38*4882a593Smuzhiyun  */
39*4882a593Smuzhiyun struct preg {			/* padded register */
40*4882a593Smuzhiyun 	unsigned r;			/* notice this is 32 bits. */
41*4882a593Smuzhiyun 	char pad[12];
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun struct platinum_regs {
45*4882a593Smuzhiyun 	struct preg reg[128];
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun /*
49*4882a593Smuzhiyun  * Register initialization tables for the platinum display.
50*4882a593Smuzhiyun  *
51*4882a593Smuzhiyun  * It seems that there are two different types of platinum display
52*4882a593Smuzhiyun  * out there.  Older ones use the values in clocksel[1], for which
53*4882a593Smuzhiyun  * the formula for the clock frequency seems to be
54*4882a593Smuzhiyun  *	F = 14.3MHz * c0 / (c1 & 0x1f) / (1 << (c1 >> 5))
55*4882a593Smuzhiyun  * Newer ones use the values in clocksel[0], for which the formula
56*4882a593Smuzhiyun  * seems to be
57*4882a593Smuzhiyun  *	F = 15MHz * c0 / ((c1 & 0x1f) + 2) / (1 << (c1 >> 5))
58*4882a593Smuzhiyun  */
59*4882a593Smuzhiyun struct platinum_regvals {
60*4882a593Smuzhiyun 	int	fb_offset;
61*4882a593Smuzhiyun 	int	pitch[3];
62*4882a593Smuzhiyun 	unsigned regs[26];
63*4882a593Smuzhiyun 	unsigned char offset[3];
64*4882a593Smuzhiyun 	unsigned char mode[3];
65*4882a593Smuzhiyun 	unsigned char dacula_ctrl[3];
66*4882a593Smuzhiyun 	unsigned char clock_params[2][2];
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun #define DIV2	0x20
70*4882a593Smuzhiyun #define DIV4	0x40
71*4882a593Smuzhiyun #define DIV8	0x60
72*4882a593Smuzhiyun #define DIV16	0x80
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun /* 1280x1024, 75Hz (20) */
75*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_20 = {
76*4882a593Smuzhiyun 	0x5c00,
77*4882a593Smuzhiyun 	{ 1312, 2592, 2592 },
78*4882a593Smuzhiyun 	{ 0xffc, 4, 0, 0, 0, 0, 0x428, 0,
79*4882a593Smuzhiyun 	  0, 0xb3, 0xd3, 0x12, 0x1a5, 0x23, 0x28, 0x2d,
80*4882a593Smuzhiyun 	  0x5e, 0x19e, 0x1a4, 0x854, 0x852, 4, 9, 0x50,
81*4882a593Smuzhiyun 	  0x850, 0x851 }, { 0x58, 0x5d, 0x5d },
82*4882a593Smuzhiyun 	{ 0, 0xff, 0xff }, { 0x51, 0x55, 0x55 },
83*4882a593Smuzhiyun 	{{ 45, 3 }, { 66, 7 }}
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun /* 1280x960, 75Hz (19) */
87*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_19 = {
88*4882a593Smuzhiyun 	0x5c00,
89*4882a593Smuzhiyun 	{ 1312, 2592, 2592 },
90*4882a593Smuzhiyun 	{ 0xffc, 4, 0, 0, 0, 0, 0x428, 0,
91*4882a593Smuzhiyun 	  0, 0xb2, 0xd2, 0x12, 0x1a3, 0x23, 0x28, 0x2d,
92*4882a593Smuzhiyun 	  0x5c, 0x19c, 0x1a2, 0x7d0, 0x7ce, 4, 9, 0x4c,
93*4882a593Smuzhiyun 	  0x7cc, 0x7cd }, { 0x56, 0x5b, 0x5b },
94*4882a593Smuzhiyun 	{ 0, 0xff, 0xff }, { 0x51, 0x55, 0x55 },
95*4882a593Smuzhiyun 	{{ 42, 3 }, { 44, 5 }}
96*4882a593Smuzhiyun };
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun /* 1152x870, 75Hz (18) */
99*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_18 = {
100*4882a593Smuzhiyun 	0x11b0,
101*4882a593Smuzhiyun 	{ 1184, 2336, 4640 },
102*4882a593Smuzhiyun 	{ 0xff0, 4, 0, 0, 0, 0, 0x38f, 0,
103*4882a593Smuzhiyun 	  0, 0x294, 0x16c, 0x20, 0x2d7, 0x3f, 0x49, 0x53,
104*4882a593Smuzhiyun 	  0x82, 0x2c2, 0x2d6, 0x726, 0x724, 4, 9, 0x52,
105*4882a593Smuzhiyun 	  0x71e, 0x722 }, { 0x74, 0x7c, 0x81 },
106*4882a593Smuzhiyun 	{ 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
107*4882a593Smuzhiyun 	{{ 26, 0 + DIV2 }, { 42, 6 }}
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun /* 1024x768, 75Hz (17) */
111*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_17 = {
112*4882a593Smuzhiyun 	0x10b0,
113*4882a593Smuzhiyun 	{ 1056, 2080, 4128 },
114*4882a593Smuzhiyun 	{ 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
115*4882a593Smuzhiyun 	  0, 0x254, 0x14b, 0x18, 0x295, 0x2f, 0x32, 0x3b,
116*4882a593Smuzhiyun 	  0x80, 0x280, 0x296, 0x648, 0x646, 4, 9, 0x40,
117*4882a593Smuzhiyun 	  0x640, 0x644 }, { 0x72, 0x7a, 0x7f },
118*4882a593Smuzhiyun 	{ 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
119*4882a593Smuzhiyun 	{{ 54, 3 + DIV2 }, { 67, 12 }}
120*4882a593Smuzhiyun };
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun /* 1024x768, 75Hz (16) */
123*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_16 = {
124*4882a593Smuzhiyun 	0x10b0,
125*4882a593Smuzhiyun 	{ 1056, 2080, 4128 },
126*4882a593Smuzhiyun 	{ 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
127*4882a593Smuzhiyun 	  0, 0x250, 0x147, 0x17, 0x28f, 0x2f, 0x35, 0x47,
128*4882a593Smuzhiyun 	  0x82, 0x282, 0x28e, 0x640, 0x63e, 4, 9, 0x3c,
129*4882a593Smuzhiyun 	  0x63c, 0x63d }, { 0x74, 0x7c, 0x81 },
130*4882a593Smuzhiyun 	{ 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
131*4882a593Smuzhiyun 	{{ 20, 0 + DIV2 }, { 11, 2 }}
132*4882a593Smuzhiyun };
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun /* 1024x768, 70Hz (15) */
135*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_15 = {
136*4882a593Smuzhiyun 	0x10b0,
137*4882a593Smuzhiyun 	{ 1056, 2080, 4128 },
138*4882a593Smuzhiyun 	{ 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
139*4882a593Smuzhiyun 	  0, 0x254, 0x14b, 0x22, 0x297, 0x43, 0x49, 0x5b,
140*4882a593Smuzhiyun 	  0x86, 0x286, 0x296, 0x64c, 0x64a, 0xa, 0xf, 0x44,
141*4882a593Smuzhiyun 	  0x644, 0x646 }, { 0x78, 0x80, 0x85 },
142*4882a593Smuzhiyun 	{ 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
143*4882a593Smuzhiyun 	{{ 19, 0 + DIV2 }, { 110, 21 }}
144*4882a593Smuzhiyun };
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun /* 1024x768, 60Hz (14) */
147*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_14 = {
148*4882a593Smuzhiyun 	0x10b0,
149*4882a593Smuzhiyun 	{ 1056, 2080, 4128 },
150*4882a593Smuzhiyun 	{ 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
151*4882a593Smuzhiyun 	  0, 0x25a, 0x14f, 0x22, 0x29f, 0x43, 0x49, 0x5b,
152*4882a593Smuzhiyun 	  0x8e, 0x28e, 0x29e, 0x64c, 0x64a, 0xa, 0xf, 0x44,
153*4882a593Smuzhiyun 	  0x644, 0x646 }, { 0x80, 0x88, 0x8d },
154*4882a593Smuzhiyun 	{ 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
155*4882a593Smuzhiyun 	{{ 71, 6 + DIV2 }, { 118, 13 + DIV2 }}
156*4882a593Smuzhiyun };
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun /* 832x624, 75Hz (13) */
159*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_13 = {
160*4882a593Smuzhiyun 	0x70,
161*4882a593Smuzhiyun 	{ 864, 1680, 3344 },	/* MacOS does 1680 instead of 1696 to fit 16bpp in 1MB,
162*4882a593Smuzhiyun 				 * and we use 3344 instead of 3360 to fit in 2Mb
163*4882a593Smuzhiyun 				 */
164*4882a593Smuzhiyun 	{ 0xff0, 4, 0, 0, 0, 0, 0x299, 0,
165*4882a593Smuzhiyun 	  0, 0x21e, 0x120, 0x10, 0x23f, 0x1f, 0x25, 0x37,
166*4882a593Smuzhiyun 	  0x8a, 0x22a, 0x23e, 0x536, 0x534, 4, 9, 0x52,
167*4882a593Smuzhiyun 	  0x532, 0x533 }, { 0x7c, 0x84, 0x89 },
168*4882a593Smuzhiyun 	{ 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
169*4882a593Smuzhiyun 	{{ 30, 0 + DIV4 }, { 56, 7 + DIV2 }}
170*4882a593Smuzhiyun };
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun /* 800x600, 75Hz (12) */
173*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_12 = {
174*4882a593Smuzhiyun 	0x1010,
175*4882a593Smuzhiyun 	{ 832, 1632, 3232 },
176*4882a593Smuzhiyun 	{ 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
177*4882a593Smuzhiyun 	  0, 0x1ce, 0x108, 0x14, 0x20f, 0x27, 0x30, 0x39,
178*4882a593Smuzhiyun 	  0x72, 0x202, 0x20e, 0x4e2, 0x4e0, 4, 9, 0x2e,
179*4882a593Smuzhiyun 	  0x4de, 0x4df }, { 0x64, 0x6c, 0x71 },
180*4882a593Smuzhiyun 	{ 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
181*4882a593Smuzhiyun 	{{ 122, 7 + DIV4 }, { 62, 9 + DIV2 }}
182*4882a593Smuzhiyun };
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun /* 800x600, 72Hz (11) */
185*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_11 = {
186*4882a593Smuzhiyun 	0x1010,
187*4882a593Smuzhiyun 	{ 832, 1632, 3232 },
188*4882a593Smuzhiyun 	{ 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
189*4882a593Smuzhiyun 	  0, 0x1ca, 0x104, 0x1e, 0x207, 0x3b, 0x44, 0x4d,
190*4882a593Smuzhiyun 	  0x56, 0x1e6, 0x206, 0x534, 0x532, 0xa, 0xe, 0x38,
191*4882a593Smuzhiyun 	  0x4e8, 0x4ec }, { 0x48, 0x50, 0x55 },
192*4882a593Smuzhiyun 	{ 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
193*4882a593Smuzhiyun 	{{ 26, 0 + DIV4 }, { 42, 6 + DIV2 }}
194*4882a593Smuzhiyun };
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun /* 800x600, 60Hz (10) */
197*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_10 = {
198*4882a593Smuzhiyun 	0x1010,
199*4882a593Smuzhiyun 	{ 832, 1632, 3232 },
200*4882a593Smuzhiyun 	{ 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
201*4882a593Smuzhiyun 	  0, 0x1ce, 0x108, 0x20, 0x20f, 0x3f, 0x45, 0x5d,
202*4882a593Smuzhiyun 	  0x66, 0x1f6, 0x20e, 0x4e8, 0x4e6, 6, 0xa, 0x34,
203*4882a593Smuzhiyun 	  0x4e4, 0x4e5 }, { 0x58, 0x60, 0x65 },
204*4882a593Smuzhiyun 	{ 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
205*4882a593Smuzhiyun 	{{ 54, 3 + DIV4 }, { 95, 1 + DIV8 }}
206*4882a593Smuzhiyun };
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun /* 800x600, 56Hz (9) --unsupported? copy of mode 10 for now... */
209*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_9 = {
210*4882a593Smuzhiyun 	0x1010,
211*4882a593Smuzhiyun 	{ 832, 1632, 3232 },
212*4882a593Smuzhiyun 	{ 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
213*4882a593Smuzhiyun 	  0, 0x1ce, 0x108, 0x20, 0x20f, 0x3f, 0x45, 0x5d,
214*4882a593Smuzhiyun 	  0x66, 0x1f6, 0x20e, 0x4e8, 0x4e6, 6, 0xa, 0x34,
215*4882a593Smuzhiyun 	  0x4e4, 0x4e5 }, { 0x58, 0x60, 0x65 },
216*4882a593Smuzhiyun 	{ 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
217*4882a593Smuzhiyun 	{{ 54, 3 + DIV4 }, { 88, 1 + DIV8 }}
218*4882a593Smuzhiyun };
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun /* 768x576, 50Hz Interlaced-PAL (8) */
221*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_8 = {
222*4882a593Smuzhiyun 	0x1010,
223*4882a593Smuzhiyun 	{ 800, 1568, 3104 },
224*4882a593Smuzhiyun 	{ 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
225*4882a593Smuzhiyun 	  0, 0xc8, 0xec, 0x11, 0x1d7, 0x22, 0x25, 0x36,
226*4882a593Smuzhiyun 	  0x47, 0x1c7, 0x1d6, 0x271, 0x270, 4, 9, 0x27,
227*4882a593Smuzhiyun 	  0x267, 0x26b }, { 0x39, 0x41, 0x46 },
228*4882a593Smuzhiyun 	{ 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
229*4882a593Smuzhiyun 	{{ 31, 0 + DIV16 }, { 74, 9 + DIV8 }}
230*4882a593Smuzhiyun };
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun /* 640x870, 75Hz Portrait (7) */
233*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_7 = {
234*4882a593Smuzhiyun 	0xb10,
235*4882a593Smuzhiyun 	{ 672, 1312, 2592 },
236*4882a593Smuzhiyun 	{ 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
237*4882a593Smuzhiyun 	  0, 0x176, 0xd0, 0x14, 0x19f, 0x27, 0x2d, 0x3f,
238*4882a593Smuzhiyun 	  0x4a, 0x18a, 0x19e, 0x72c, 0x72a, 4, 9, 0x58,
239*4882a593Smuzhiyun 	  0x724, 0x72a }, { 0x3c, 0x44, 0x49 },
240*4882a593Smuzhiyun 	{ 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
241*4882a593Smuzhiyun 	{{ 30, 0 + DIV4 }, { 56, 7 + DIV2 }}
242*4882a593Smuzhiyun };
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun /* 640x480, 67Hz (6) */
245*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_6 = {
246*4882a593Smuzhiyun 	0x1010,
247*4882a593Smuzhiyun 	{ 672, 1312, 2592 },
248*4882a593Smuzhiyun 	{ 0xff0, 4, 0, 0, 0, 0, 0x209, 0,
249*4882a593Smuzhiyun 	  0, 0x18e, 0xd8, 0x10, 0x1af, 0x1f, 0x25, 0x37,
250*4882a593Smuzhiyun 	  0x4a, 0x18a, 0x1ae, 0x41a, 0x418, 4, 9, 0x52,
251*4882a593Smuzhiyun 	  0x412, 0x416 }, { 0x3c, 0x44, 0x49 },
252*4882a593Smuzhiyun 	{ 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
253*4882a593Smuzhiyun 	{{ 99, 4 + DIV8 }, { 42, 5 + DIV4 }}
254*4882a593Smuzhiyun };
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun /* 640x480, 60Hz (5) */
257*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_5 = {
258*4882a593Smuzhiyun 	0x1010,
259*4882a593Smuzhiyun 	{ 672, 1312, 2592 },
260*4882a593Smuzhiyun 	{ 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
261*4882a593Smuzhiyun 	  0, 0x15e, 0xc8, 0x18, 0x18f, 0x2f, 0x35, 0x3e,
262*4882a593Smuzhiyun 	  0x42, 0x182, 0x18e, 0x41a, 0x418, 2, 7, 0x44,
263*4882a593Smuzhiyun 	  0x404, 0x408 }, { 0x34, 0x3c, 0x41 },
264*4882a593Smuzhiyun 	{ 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
265*4882a593Smuzhiyun 	{{ 26, 0 + DIV8 }, { 14, 2 + DIV4 }}
266*4882a593Smuzhiyun };
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun /* 640x480, 60Hz Interlaced-NTSC (4) */
269*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_4 = {
270*4882a593Smuzhiyun 	0x1010,
271*4882a593Smuzhiyun 	{ 672, 1312, 2592 },
272*4882a593Smuzhiyun 	{ 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
273*4882a593Smuzhiyun 	  0, 0xa5, 0xc3, 0xe, 0x185, 0x1c, 0x1f, 0x30,
274*4882a593Smuzhiyun 	  0x37, 0x177, 0x184, 0x20d, 0x20c, 5, 0xb, 0x23,
275*4882a593Smuzhiyun 	  0x203, 0x206 }, { 0x29, 0x31, 0x36 },
276*4882a593Smuzhiyun 	{ 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
277*4882a593Smuzhiyun 	{{ 94, 5 + DIV16 }, { 48, 7 + DIV8 }}
278*4882a593Smuzhiyun };
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun /* 640x480, 50Hz Interlaced-PAL (3) */
281*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_3 = {
282*4882a593Smuzhiyun 	0x1010,
283*4882a593Smuzhiyun 	{ 672, 1312, 2592 },
284*4882a593Smuzhiyun 	{ 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
285*4882a593Smuzhiyun 	  0, 0xc8, 0xec, 0x11, 0x1d7, 0x22, 0x25, 0x36,
286*4882a593Smuzhiyun 	  0x67, 0x1a7, 0x1d6, 0x271, 0x270, 4, 9, 0x57,
287*4882a593Smuzhiyun 	  0x237, 0x26b }, { 0x59, 0x61, 0x66 },
288*4882a593Smuzhiyun 	{ 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
289*4882a593Smuzhiyun 	{{ 31, 0 + DIV16 }, { 74, 9 + DIV8 }}
290*4882a593Smuzhiyun };
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun /* 512x384, 60Hz (2) */
293*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_2 = {
294*4882a593Smuzhiyun 	0x1010,
295*4882a593Smuzhiyun 	{ 544, 1056, 2080 },
296*4882a593Smuzhiyun 	{ 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
297*4882a593Smuzhiyun 	  0, 0x25c, 0x140, 0x10, 0x27f, 0x1f, 0x2b, 0x4f,
298*4882a593Smuzhiyun 	  0x68, 0x268, 0x27e, 0x32e, 0x32c, 4, 9, 0x2a,
299*4882a593Smuzhiyun 	  0x32a, 0x32b }, { 0x5a, 0x62, 0x67 },
300*4882a593Smuzhiyun 	{ 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
301*4882a593Smuzhiyun 	{{ 33, 2 + DIV8 }, { 79, 9 + DIV8 }}
302*4882a593Smuzhiyun };
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun /* 512x384, 60Hz Interlaced-NTSC (1) */
305*4882a593Smuzhiyun static struct platinum_regvals platinum_reg_init_1 = {
306*4882a593Smuzhiyun 	0x1010,
307*4882a593Smuzhiyun 	{ 544, 1056, 2080 },
308*4882a593Smuzhiyun 	{ 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
309*4882a593Smuzhiyun 	  0, 0xa5, 0xc3, 0xe, 0x185, 0x1c, 0x1f, 0x30,
310*4882a593Smuzhiyun 	  0x57, 0x157, 0x184, 0x20d, 0x20c, 5, 0xb, 0x53,
311*4882a593Smuzhiyun 	  0x1d3, 0x206 }, { 0x49, 0x51, 0x56 },
312*4882a593Smuzhiyun 	{ 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
313*4882a593Smuzhiyun 	{{ 94, 5 + DIV16 }, { 48, 7 + DIV8 }}
314*4882a593Smuzhiyun };
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun static struct platinum_regvals *platinum_reg_init[VMODE_MAX] = {
317*4882a593Smuzhiyun 	&platinum_reg_init_1,
318*4882a593Smuzhiyun 	&platinum_reg_init_2,
319*4882a593Smuzhiyun 	&platinum_reg_init_3,
320*4882a593Smuzhiyun 	&platinum_reg_init_4,
321*4882a593Smuzhiyun 	&platinum_reg_init_5,
322*4882a593Smuzhiyun 	&platinum_reg_init_6,
323*4882a593Smuzhiyun 	&platinum_reg_init_7,
324*4882a593Smuzhiyun 	&platinum_reg_init_8,
325*4882a593Smuzhiyun 	&platinum_reg_init_9,
326*4882a593Smuzhiyun 	&platinum_reg_init_10,
327*4882a593Smuzhiyun 	&platinum_reg_init_11,
328*4882a593Smuzhiyun 	&platinum_reg_init_12,
329*4882a593Smuzhiyun 	&platinum_reg_init_13,
330*4882a593Smuzhiyun 	&platinum_reg_init_14,
331*4882a593Smuzhiyun 	&platinum_reg_init_15,
332*4882a593Smuzhiyun 	&platinum_reg_init_16,
333*4882a593Smuzhiyun 	&platinum_reg_init_17,
334*4882a593Smuzhiyun 	&platinum_reg_init_18,
335*4882a593Smuzhiyun 	&platinum_reg_init_19,
336*4882a593Smuzhiyun 	&platinum_reg_init_20
337*4882a593Smuzhiyun };
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun struct vmode_attr {
340*4882a593Smuzhiyun 	int hres;
341*4882a593Smuzhiyun 	int vres;
342*4882a593Smuzhiyun 	int vfreq;
343*4882a593Smuzhiyun 	int interlaced;
344*4882a593Smuzhiyun };
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun struct vmode_attr vmode_attrs[VMODE_MAX] = {
347*4882a593Smuzhiyun 	{512, 384, 60, 1},
348*4882a593Smuzhiyun 	{512, 384, 60},
349*4882a593Smuzhiyun 	{640, 480, 50, 1},
350*4882a593Smuzhiyun 	{640, 480, 60, 1},
351*4882a593Smuzhiyun 	{640, 480, 60},
352*4882a593Smuzhiyun 	{640, 480, 67},
353*4882a593Smuzhiyun 	{640, 870, 75},
354*4882a593Smuzhiyun 	{768, 576, 50, 1},
355*4882a593Smuzhiyun 	{800, 600, 56},
356*4882a593Smuzhiyun 	{800, 600, 60},
357*4882a593Smuzhiyun 	{800, 600, 72},
358*4882a593Smuzhiyun 	{800, 600, 75},
359*4882a593Smuzhiyun 	{832, 624, 75},
360*4882a593Smuzhiyun 	{1024, 768, 60},
361*4882a593Smuzhiyun 	{1024, 768, 72},
362*4882a593Smuzhiyun 	{1024, 768, 75},
363*4882a593Smuzhiyun 	{1024, 768, 75},
364*4882a593Smuzhiyun 	{1152, 870, 75},
365*4882a593Smuzhiyun 	{1280, 960, 75},
366*4882a593Smuzhiyun 	{1280, 1024, 75}
367*4882a593Smuzhiyun };
368*4882a593Smuzhiyun 
369