xref: /OK3568_Linux_fs/kernel/drivers/video/fbdev/p9100.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /* p9100.c: P9100 frame buffer driver
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
5*4882a593Smuzhiyun  * Copyright 1999 Derrick J Brashear (shadow@dementia.org)
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Driver layout based loosely on tgafb.c, see that file for credits.
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/errno.h>
13*4882a593Smuzhiyun #include <linux/string.h>
14*4882a593Smuzhiyun #include <linux/delay.h>
15*4882a593Smuzhiyun #include <linux/init.h>
16*4882a593Smuzhiyun #include <linux/fb.h>
17*4882a593Smuzhiyun #include <linux/mm.h>
18*4882a593Smuzhiyun #include <linux/of_device.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include <asm/io.h>
21*4882a593Smuzhiyun #include <asm/fbio.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #include "sbuslib.h"
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun /*
26*4882a593Smuzhiyun  * Local functions.
27*4882a593Smuzhiyun  */
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun static int p9100_setcolreg(unsigned, unsigned, unsigned, unsigned,
30*4882a593Smuzhiyun 			   unsigned, struct fb_info *);
31*4882a593Smuzhiyun static int p9100_blank(int, struct fb_info *);
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun static int p9100_mmap(struct fb_info *, struct vm_area_struct *);
34*4882a593Smuzhiyun static int p9100_ioctl(struct fb_info *, unsigned int, unsigned long);
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun /*
37*4882a593Smuzhiyun  *  Frame buffer operations
38*4882a593Smuzhiyun  */
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun static const struct fb_ops p9100_ops = {
41*4882a593Smuzhiyun 	.owner			= THIS_MODULE,
42*4882a593Smuzhiyun 	.fb_setcolreg		= p9100_setcolreg,
43*4882a593Smuzhiyun 	.fb_blank		= p9100_blank,
44*4882a593Smuzhiyun 	.fb_fillrect		= cfb_fillrect,
45*4882a593Smuzhiyun 	.fb_copyarea		= cfb_copyarea,
46*4882a593Smuzhiyun 	.fb_imageblit		= cfb_imageblit,
47*4882a593Smuzhiyun 	.fb_mmap		= p9100_mmap,
48*4882a593Smuzhiyun 	.fb_ioctl		= p9100_ioctl,
49*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
50*4882a593Smuzhiyun 	.fb_compat_ioctl	= sbusfb_compat_ioctl,
51*4882a593Smuzhiyun #endif
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun /* P9100 control registers */
55*4882a593Smuzhiyun #define P9100_SYSCTL_OFF	0x0UL
56*4882a593Smuzhiyun #define P9100_VIDEOCTL_OFF	0x100UL
57*4882a593Smuzhiyun #define P9100_VRAMCTL_OFF 	0x180UL
58*4882a593Smuzhiyun #define P9100_RAMDAC_OFF 	0x200UL
59*4882a593Smuzhiyun #define P9100_VIDEOCOPROC_OFF 	0x400UL
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun /* P9100 command registers */
62*4882a593Smuzhiyun #define P9100_CMD_OFF 0x0UL
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun /* P9100 framebuffer memory */
65*4882a593Smuzhiyun #define P9100_FB_OFF 0x0UL
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun /* 3 bits: 2=8bpp 3=16bpp 5=32bpp 7=24bpp */
68*4882a593Smuzhiyun #define SYS_CONFIG_PIXELSIZE_SHIFT 26
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun #define SCREENPAINT_TIMECTL1_ENABLE_VIDEO 0x20 /* 0 = off, 1 = on */
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun struct p9100_regs {
73*4882a593Smuzhiyun 	/* Registers for the system control */
74*4882a593Smuzhiyun 	u32 sys_base;
75*4882a593Smuzhiyun 	u32 sys_config;
76*4882a593Smuzhiyun 	u32 sys_intr;
77*4882a593Smuzhiyun 	u32 sys_int_ena;
78*4882a593Smuzhiyun 	u32 sys_alt_rd;
79*4882a593Smuzhiyun 	u32 sys_alt_wr;
80*4882a593Smuzhiyun 	u32 sys_xxx[58];
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	/* Registers for the video control */
83*4882a593Smuzhiyun 	u32 vid_base;
84*4882a593Smuzhiyun 	u32 vid_hcnt;
85*4882a593Smuzhiyun 	u32 vid_htotal;
86*4882a593Smuzhiyun 	u32 vid_hsync_rise;
87*4882a593Smuzhiyun 	u32 vid_hblank_rise;
88*4882a593Smuzhiyun 	u32 vid_hblank_fall;
89*4882a593Smuzhiyun 	u32 vid_hcnt_preload;
90*4882a593Smuzhiyun 	u32 vid_vcnt;
91*4882a593Smuzhiyun 	u32 vid_vlen;
92*4882a593Smuzhiyun 	u32 vid_vsync_rise;
93*4882a593Smuzhiyun 	u32 vid_vblank_rise;
94*4882a593Smuzhiyun 	u32 vid_vblank_fall;
95*4882a593Smuzhiyun 	u32 vid_vcnt_preload;
96*4882a593Smuzhiyun 	u32 vid_screenpaint_addr;
97*4882a593Smuzhiyun 	u32 vid_screenpaint_timectl1;
98*4882a593Smuzhiyun 	u32 vid_screenpaint_qsfcnt;
99*4882a593Smuzhiyun 	u32 vid_screenpaint_timectl2;
100*4882a593Smuzhiyun 	u32 vid_xxx[15];
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	/* Registers for the video control */
103*4882a593Smuzhiyun 	u32 vram_base;
104*4882a593Smuzhiyun 	u32 vram_memcfg;
105*4882a593Smuzhiyun 	u32 vram_refresh_pd;
106*4882a593Smuzhiyun 	u32 vram_refresh_cnt;
107*4882a593Smuzhiyun 	u32 vram_raslo_max;
108*4882a593Smuzhiyun 	u32 vram_raslo_cur;
109*4882a593Smuzhiyun 	u32 pwrup_cfg;
110*4882a593Smuzhiyun 	u32 vram_xxx[25];
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	/* Registers for IBM RGB528 Palette */
113*4882a593Smuzhiyun 	u32 ramdac_cmap_wridx;
114*4882a593Smuzhiyun 	u32 ramdac_palette_data;
115*4882a593Smuzhiyun 	u32 ramdac_pixel_mask;
116*4882a593Smuzhiyun 	u32 ramdac_palette_rdaddr;
117*4882a593Smuzhiyun 	u32 ramdac_idx_lo;
118*4882a593Smuzhiyun 	u32 ramdac_idx_hi;
119*4882a593Smuzhiyun 	u32 ramdac_idx_data;
120*4882a593Smuzhiyun 	u32 ramdac_idx_ctl;
121*4882a593Smuzhiyun 	u32 ramdac_xxx[1784];
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun struct p9100_cmd_parameng {
125*4882a593Smuzhiyun 	u32 parameng_status;
126*4882a593Smuzhiyun 	u32 parameng_bltcmd;
127*4882a593Smuzhiyun 	u32 parameng_quadcmd;
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun struct p9100_par {
131*4882a593Smuzhiyun 	spinlock_t		lock;
132*4882a593Smuzhiyun 	struct p9100_regs	__iomem *regs;
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	u32			flags;
135*4882a593Smuzhiyun #define P9100_FLAG_BLANKED	0x00000001
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	unsigned long		which_io;
138*4882a593Smuzhiyun };
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun /**
141*4882a593Smuzhiyun  *      p9100_setcolreg - Optional function. Sets a color register.
142*4882a593Smuzhiyun  *      @regno: boolean, 0 copy local, 1 get_user() function
143*4882a593Smuzhiyun  *      @red: frame buffer colormap structure
144*4882a593Smuzhiyun  *      @green: The green value which can be up to 16 bits wide
145*4882a593Smuzhiyun  *      @blue:  The blue value which can be up to 16 bits wide.
146*4882a593Smuzhiyun  *      @transp: If supported the alpha value which can be up to 16 bits wide.
147*4882a593Smuzhiyun  *      @info: frame buffer info structure
148*4882a593Smuzhiyun  */
p9100_setcolreg(unsigned regno,unsigned red,unsigned green,unsigned blue,unsigned transp,struct fb_info * info)149*4882a593Smuzhiyun static int p9100_setcolreg(unsigned regno,
150*4882a593Smuzhiyun 			   unsigned red, unsigned green, unsigned blue,
151*4882a593Smuzhiyun 			   unsigned transp, struct fb_info *info)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun 	struct p9100_par *par = (struct p9100_par *) info->par;
154*4882a593Smuzhiyun 	struct p9100_regs __iomem *regs = par->regs;
155*4882a593Smuzhiyun 	unsigned long flags;
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	if (regno >= 256)
158*4882a593Smuzhiyun 		return 1;
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	red >>= 8;
161*4882a593Smuzhiyun 	green >>= 8;
162*4882a593Smuzhiyun 	blue >>= 8;
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	spin_lock_irqsave(&par->lock, flags);
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	sbus_writel((regno << 16), &regs->ramdac_cmap_wridx);
167*4882a593Smuzhiyun 	sbus_writel((red << 16), &regs->ramdac_palette_data);
168*4882a593Smuzhiyun 	sbus_writel((green << 16), &regs->ramdac_palette_data);
169*4882a593Smuzhiyun 	sbus_writel((blue << 16), &regs->ramdac_palette_data);
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	spin_unlock_irqrestore(&par->lock, flags);
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	return 0;
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun /**
177*4882a593Smuzhiyun  *      p9100_blank - Optional function.  Blanks the display.
178*4882a593Smuzhiyun  *      @blank_mode: the blank mode we want.
179*4882a593Smuzhiyun  *      @info: frame buffer structure that represents a single frame buffer
180*4882a593Smuzhiyun  */
181*4882a593Smuzhiyun static int
p9100_blank(int blank,struct fb_info * info)182*4882a593Smuzhiyun p9100_blank(int blank, struct fb_info *info)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun 	struct p9100_par *par = (struct p9100_par *) info->par;
185*4882a593Smuzhiyun 	struct p9100_regs __iomem *regs = par->regs;
186*4882a593Smuzhiyun 	unsigned long flags;
187*4882a593Smuzhiyun 	u32 val;
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	spin_lock_irqsave(&par->lock, flags);
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	switch (blank) {
192*4882a593Smuzhiyun 	case FB_BLANK_UNBLANK: /* Unblanking */
193*4882a593Smuzhiyun 		val = sbus_readl(&regs->vid_screenpaint_timectl1);
194*4882a593Smuzhiyun 		val |= SCREENPAINT_TIMECTL1_ENABLE_VIDEO;
195*4882a593Smuzhiyun 		sbus_writel(val, &regs->vid_screenpaint_timectl1);
196*4882a593Smuzhiyun 		par->flags &= ~P9100_FLAG_BLANKED;
197*4882a593Smuzhiyun 		break;
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	case FB_BLANK_NORMAL: /* Normal blanking */
200*4882a593Smuzhiyun 	case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */
201*4882a593Smuzhiyun 	case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */
202*4882a593Smuzhiyun 	case FB_BLANK_POWERDOWN: /* Poweroff */
203*4882a593Smuzhiyun 		val = sbus_readl(&regs->vid_screenpaint_timectl1);
204*4882a593Smuzhiyun 		val &= ~SCREENPAINT_TIMECTL1_ENABLE_VIDEO;
205*4882a593Smuzhiyun 		sbus_writel(val, &regs->vid_screenpaint_timectl1);
206*4882a593Smuzhiyun 		par->flags |= P9100_FLAG_BLANKED;
207*4882a593Smuzhiyun 		break;
208*4882a593Smuzhiyun 	}
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	spin_unlock_irqrestore(&par->lock, flags);
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	return 0;
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun static struct sbus_mmap_map p9100_mmap_map[] = {
216*4882a593Smuzhiyun 	{ CG3_MMAP_OFFSET,	0,		SBUS_MMAP_FBSIZE(1) },
217*4882a593Smuzhiyun 	{ 0,			0,		0		    }
218*4882a593Smuzhiyun };
219*4882a593Smuzhiyun 
p9100_mmap(struct fb_info * info,struct vm_area_struct * vma)220*4882a593Smuzhiyun static int p9100_mmap(struct fb_info *info, struct vm_area_struct *vma)
221*4882a593Smuzhiyun {
222*4882a593Smuzhiyun 	struct p9100_par *par = (struct p9100_par *)info->par;
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	return sbusfb_mmap_helper(p9100_mmap_map,
225*4882a593Smuzhiyun 				  info->fix.smem_start, info->fix.smem_len,
226*4882a593Smuzhiyun 				  par->which_io, vma);
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun 
p9100_ioctl(struct fb_info * info,unsigned int cmd,unsigned long arg)229*4882a593Smuzhiyun static int p9100_ioctl(struct fb_info *info, unsigned int cmd,
230*4882a593Smuzhiyun 		       unsigned long arg)
231*4882a593Smuzhiyun {
232*4882a593Smuzhiyun 	/* Make it look like a cg3. */
233*4882a593Smuzhiyun 	return sbusfb_ioctl_helper(cmd, arg, info,
234*4882a593Smuzhiyun 				   FBTYPE_SUN3COLOR, 8, info->fix.smem_len);
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun /*
238*4882a593Smuzhiyun  *  Initialisation
239*4882a593Smuzhiyun  */
240*4882a593Smuzhiyun 
p9100_init_fix(struct fb_info * info,int linebytes,struct device_node * dp)241*4882a593Smuzhiyun static void p9100_init_fix(struct fb_info *info, int linebytes, struct device_node *dp)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun 	snprintf(info->fix.id, sizeof(info->fix.id), "%pOFn", dp);
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	info->fix.type = FB_TYPE_PACKED_PIXELS;
246*4882a593Smuzhiyun 	info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	info->fix.line_length = linebytes;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	info->fix.accel = FB_ACCEL_SUN_CGTHREE;
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun 
p9100_probe(struct platform_device * op)253*4882a593Smuzhiyun static int p9100_probe(struct platform_device *op)
254*4882a593Smuzhiyun {
255*4882a593Smuzhiyun 	struct device_node *dp = op->dev.of_node;
256*4882a593Smuzhiyun 	struct fb_info *info;
257*4882a593Smuzhiyun 	struct p9100_par *par;
258*4882a593Smuzhiyun 	int linebytes, err;
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	info = framebuffer_alloc(sizeof(struct p9100_par), &op->dev);
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	err = -ENOMEM;
263*4882a593Smuzhiyun 	if (!info)
264*4882a593Smuzhiyun 		goto out_err;
265*4882a593Smuzhiyun 	par = info->par;
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	spin_lock_init(&par->lock);
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	/* This is the framebuffer and the only resource apps can mmap.  */
270*4882a593Smuzhiyun 	info->fix.smem_start = op->resource[2].start;
271*4882a593Smuzhiyun 	par->which_io = op->resource[2].flags & IORESOURCE_BITS;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	sbusfb_fill_var(&info->var, dp, 8);
274*4882a593Smuzhiyun 	info->var.red.length = 8;
275*4882a593Smuzhiyun 	info->var.green.length = 8;
276*4882a593Smuzhiyun 	info->var.blue.length = 8;
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	linebytes = of_getintprop_default(dp, "linebytes", info->var.xres);
279*4882a593Smuzhiyun 	info->fix.smem_len = PAGE_ALIGN(linebytes * info->var.yres);
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	par->regs = of_ioremap(&op->resource[0], 0,
282*4882a593Smuzhiyun 			       sizeof(struct p9100_regs), "p9100 regs");
283*4882a593Smuzhiyun 	if (!par->regs)
284*4882a593Smuzhiyun 		goto out_release_fb;
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	info->flags = FBINFO_DEFAULT;
287*4882a593Smuzhiyun 	info->fbops = &p9100_ops;
288*4882a593Smuzhiyun 	info->screen_base = of_ioremap(&op->resource[2], 0,
289*4882a593Smuzhiyun 				       info->fix.smem_len, "p9100 ram");
290*4882a593Smuzhiyun 	if (!info->screen_base)
291*4882a593Smuzhiyun 		goto out_unmap_regs;
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	p9100_blank(FB_BLANK_UNBLANK, info);
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	if (fb_alloc_cmap(&info->cmap, 256, 0))
296*4882a593Smuzhiyun 		goto out_unmap_screen;
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	p9100_init_fix(info, linebytes, dp);
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 	err = register_framebuffer(info);
301*4882a593Smuzhiyun 	if (err < 0)
302*4882a593Smuzhiyun 		goto out_dealloc_cmap;
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 	fb_set_cmap(&info->cmap, info);
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	dev_set_drvdata(&op->dev, info);
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun 	printk(KERN_INFO "%pOF: p9100 at %lx:%lx\n",
309*4882a593Smuzhiyun 	       dp,
310*4882a593Smuzhiyun 	       par->which_io, info->fix.smem_start);
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	return 0;
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun out_dealloc_cmap:
315*4882a593Smuzhiyun 	fb_dealloc_cmap(&info->cmap);
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun out_unmap_screen:
318*4882a593Smuzhiyun 	of_iounmap(&op->resource[2], info->screen_base, info->fix.smem_len);
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun out_unmap_regs:
321*4882a593Smuzhiyun 	of_iounmap(&op->resource[0], par->regs, sizeof(struct p9100_regs));
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun out_release_fb:
324*4882a593Smuzhiyun 	framebuffer_release(info);
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun out_err:
327*4882a593Smuzhiyun 	return err;
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun 
p9100_remove(struct platform_device * op)330*4882a593Smuzhiyun static int p9100_remove(struct platform_device *op)
331*4882a593Smuzhiyun {
332*4882a593Smuzhiyun 	struct fb_info *info = dev_get_drvdata(&op->dev);
333*4882a593Smuzhiyun 	struct p9100_par *par = info->par;
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	unregister_framebuffer(info);
336*4882a593Smuzhiyun 	fb_dealloc_cmap(&info->cmap);
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun 	of_iounmap(&op->resource[0], par->regs, sizeof(struct p9100_regs));
339*4882a593Smuzhiyun 	of_iounmap(&op->resource[2], info->screen_base, info->fix.smem_len);
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 	framebuffer_release(info);
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	return 0;
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun static const struct of_device_id p9100_match[] = {
347*4882a593Smuzhiyun 	{
348*4882a593Smuzhiyun 		.name = "p9100",
349*4882a593Smuzhiyun 	},
350*4882a593Smuzhiyun 	{},
351*4882a593Smuzhiyun };
352*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, p9100_match);
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun static struct platform_driver p9100_driver = {
355*4882a593Smuzhiyun 	.driver = {
356*4882a593Smuzhiyun 		.name = "p9100",
357*4882a593Smuzhiyun 		.of_match_table = p9100_match,
358*4882a593Smuzhiyun 	},
359*4882a593Smuzhiyun 	.probe		= p9100_probe,
360*4882a593Smuzhiyun 	.remove		= p9100_remove,
361*4882a593Smuzhiyun };
362*4882a593Smuzhiyun 
p9100_init(void)363*4882a593Smuzhiyun static int __init p9100_init(void)
364*4882a593Smuzhiyun {
365*4882a593Smuzhiyun 	if (fb_get_options("p9100fb", NULL))
366*4882a593Smuzhiyun 		return -ENODEV;
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	return platform_driver_register(&p9100_driver);
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun 
p9100_exit(void)371*4882a593Smuzhiyun static void __exit p9100_exit(void)
372*4882a593Smuzhiyun {
373*4882a593Smuzhiyun 	platform_driver_unregister(&p9100_driver);
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun module_init(p9100_init);
377*4882a593Smuzhiyun module_exit(p9100_exit);
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun MODULE_DESCRIPTION("framebuffer driver for P9100 chipsets");
380*4882a593Smuzhiyun MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
381*4882a593Smuzhiyun MODULE_VERSION("2.0");
382*4882a593Smuzhiyun MODULE_LICENSE("GPL");
383