1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2012 Texas Instruments 4*4882a593Smuzhiyun * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __OMAP2_DSS_DISPC_COMPAT_H 8*4882a593Smuzhiyun #define __OMAP2_DSS_DISPC_COMPAT_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun void dispc_mgr_enable_sync(enum omap_channel channel); 11*4882a593Smuzhiyun void dispc_mgr_disable_sync(enum omap_channel channel); 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask, 14*4882a593Smuzhiyun unsigned long timeout); 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun int dss_dispc_initialize_irq(void); 17*4882a593Smuzhiyun void dss_dispc_uninitialize_irq(void); 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #endif 20