xref: /OK3568_Linux_fs/kernel/drivers/video/fbdev/omap2/omapfb/displays/panel-lgphilips-lb035q02.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * LG.Philips LB035Q02 LCD Panel driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2013 Texas Instruments
6*4882a593Smuzhiyun  * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
7*4882a593Smuzhiyun  * Based on a driver by: Steve Sakoman <steve@sakoman.com>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/spi/spi.h>
13*4882a593Smuzhiyun #include <linux/mutex.h>
14*4882a593Smuzhiyun #include <linux/gpio.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <video/omapfb_dss.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun static const struct omap_video_timings lb035q02_timings = {
19*4882a593Smuzhiyun 	.x_res = 320,
20*4882a593Smuzhiyun 	.y_res = 240,
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun 	.pixelclock	= 6500000,
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun 	.hsw		= 2,
25*4882a593Smuzhiyun 	.hfp		= 20,
26*4882a593Smuzhiyun 	.hbp		= 68,
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun 	.vsw		= 2,
29*4882a593Smuzhiyun 	.vfp		= 4,
30*4882a593Smuzhiyun 	.vbp		= 18,
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 	.vsync_level	= OMAPDSS_SIG_ACTIVE_LOW,
33*4882a593Smuzhiyun 	.hsync_level	= OMAPDSS_SIG_ACTIVE_LOW,
34*4882a593Smuzhiyun 	.data_pclk_edge	= OMAPDSS_DRIVE_SIG_RISING_EDGE,
35*4882a593Smuzhiyun 	.de_level	= OMAPDSS_SIG_ACTIVE_HIGH,
36*4882a593Smuzhiyun 	.sync_pclk_edge	= OMAPDSS_DRIVE_SIG_FALLING_EDGE,
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun struct panel_drv_data {
40*4882a593Smuzhiyun 	struct omap_dss_device dssdev;
41*4882a593Smuzhiyun 	struct omap_dss_device *in;
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	struct spi_device *spi;
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	int data_lines;
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 	struct omap_video_timings videomode;
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	/* used for non-DT boot, to be removed */
50*4882a593Smuzhiyun 	int backlight_gpio;
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	struct gpio_desc *enable_gpio;
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun #define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)
56*4882a593Smuzhiyun 
lb035q02_write_reg(struct spi_device * spi,u8 reg,u16 val)57*4882a593Smuzhiyun static int lb035q02_write_reg(struct spi_device *spi, u8 reg, u16 val)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun 	struct spi_message msg;
60*4882a593Smuzhiyun 	struct spi_transfer index_xfer = {
61*4882a593Smuzhiyun 		.len		= 3,
62*4882a593Smuzhiyun 		.cs_change	= 1,
63*4882a593Smuzhiyun 	};
64*4882a593Smuzhiyun 	struct spi_transfer value_xfer = {
65*4882a593Smuzhiyun 		.len		= 3,
66*4882a593Smuzhiyun 	};
67*4882a593Smuzhiyun 	u8	buffer[16];
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	spi_message_init(&msg);
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	/* register index */
72*4882a593Smuzhiyun 	buffer[0] = 0x70;
73*4882a593Smuzhiyun 	buffer[1] = 0x00;
74*4882a593Smuzhiyun 	buffer[2] = reg & 0x7f;
75*4882a593Smuzhiyun 	index_xfer.tx_buf = buffer;
76*4882a593Smuzhiyun 	spi_message_add_tail(&index_xfer, &msg);
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	/* register value */
79*4882a593Smuzhiyun 	buffer[4] = 0x72;
80*4882a593Smuzhiyun 	buffer[5] = val >> 8;
81*4882a593Smuzhiyun 	buffer[6] = val;
82*4882a593Smuzhiyun 	value_xfer.tx_buf = buffer + 4;
83*4882a593Smuzhiyun 	spi_message_add_tail(&value_xfer, &msg);
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	return spi_sync(spi, &msg);
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun 
init_lb035q02_panel(struct spi_device * spi)88*4882a593Smuzhiyun static void init_lb035q02_panel(struct spi_device *spi)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun 	/* Init sequence from page 28 of the lb035q02 spec */
91*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x01, 0x6300);
92*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x02, 0x0200);
93*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x03, 0x0177);
94*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x04, 0x04c7);
95*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x05, 0xffc0);
96*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x06, 0xe806);
97*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x0a, 0x4008);
98*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x0b, 0x0000);
99*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x0d, 0x0030);
100*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x0e, 0x2800);
101*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x0f, 0x0000);
102*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x16, 0x9f80);
103*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x17, 0x0a0f);
104*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x1e, 0x00c1);
105*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x30, 0x0300);
106*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x31, 0x0007);
107*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x32, 0x0000);
108*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x33, 0x0000);
109*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x34, 0x0707);
110*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x35, 0x0004);
111*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x36, 0x0302);
112*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x37, 0x0202);
113*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x3a, 0x0a0d);
114*4882a593Smuzhiyun 	lb035q02_write_reg(spi, 0x3b, 0x0806);
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun 
lb035q02_connect(struct omap_dss_device * dssdev)117*4882a593Smuzhiyun static int lb035q02_connect(struct omap_dss_device *dssdev)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun 	struct panel_drv_data *ddata = to_panel_data(dssdev);
120*4882a593Smuzhiyun 	struct omap_dss_device *in = ddata->in;
121*4882a593Smuzhiyun 	int r;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	if (omapdss_device_is_connected(dssdev))
124*4882a593Smuzhiyun 		return 0;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	r = in->ops.dpi->connect(in, dssdev);
127*4882a593Smuzhiyun 	if (r)
128*4882a593Smuzhiyun 		return r;
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	init_lb035q02_panel(ddata->spi);
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	return 0;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun 
lb035q02_disconnect(struct omap_dss_device * dssdev)135*4882a593Smuzhiyun static void lb035q02_disconnect(struct omap_dss_device *dssdev)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun 	struct panel_drv_data *ddata = to_panel_data(dssdev);
138*4882a593Smuzhiyun 	struct omap_dss_device *in = ddata->in;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	if (!omapdss_device_is_connected(dssdev))
141*4882a593Smuzhiyun 		return;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	in->ops.dpi->disconnect(in, dssdev);
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun 
lb035q02_enable(struct omap_dss_device * dssdev)146*4882a593Smuzhiyun static int lb035q02_enable(struct omap_dss_device *dssdev)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun 	struct panel_drv_data *ddata = to_panel_data(dssdev);
149*4882a593Smuzhiyun 	struct omap_dss_device *in = ddata->in;
150*4882a593Smuzhiyun 	int r;
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	if (!omapdss_device_is_connected(dssdev))
153*4882a593Smuzhiyun 		return -ENODEV;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	if (omapdss_device_is_enabled(dssdev))
156*4882a593Smuzhiyun 		return 0;
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	if (ddata->data_lines)
159*4882a593Smuzhiyun 		in->ops.dpi->set_data_lines(in, ddata->data_lines);
160*4882a593Smuzhiyun 	in->ops.dpi->set_timings(in, &ddata->videomode);
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	r = in->ops.dpi->enable(in);
163*4882a593Smuzhiyun 	if (r)
164*4882a593Smuzhiyun 		return r;
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	if (ddata->enable_gpio)
167*4882a593Smuzhiyun 		gpiod_set_value_cansleep(ddata->enable_gpio, 1);
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	if (gpio_is_valid(ddata->backlight_gpio))
170*4882a593Smuzhiyun 		gpio_set_value_cansleep(ddata->backlight_gpio, 1);
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	return 0;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun 
lb035q02_disable(struct omap_dss_device * dssdev)177*4882a593Smuzhiyun static void lb035q02_disable(struct omap_dss_device *dssdev)
178*4882a593Smuzhiyun {
179*4882a593Smuzhiyun 	struct panel_drv_data *ddata = to_panel_data(dssdev);
180*4882a593Smuzhiyun 	struct omap_dss_device *in = ddata->in;
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	if (!omapdss_device_is_enabled(dssdev))
183*4882a593Smuzhiyun 		return;
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	if (ddata->enable_gpio)
186*4882a593Smuzhiyun 		gpiod_set_value_cansleep(ddata->enable_gpio, 0);
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	if (gpio_is_valid(ddata->backlight_gpio))
189*4882a593Smuzhiyun 		gpio_set_value_cansleep(ddata->backlight_gpio, 0);
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	in->ops.dpi->disable(in);
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun 
lb035q02_set_timings(struct omap_dss_device * dssdev,struct omap_video_timings * timings)196*4882a593Smuzhiyun static void lb035q02_set_timings(struct omap_dss_device *dssdev,
197*4882a593Smuzhiyun 		struct omap_video_timings *timings)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun 	struct panel_drv_data *ddata = to_panel_data(dssdev);
200*4882a593Smuzhiyun 	struct omap_dss_device *in = ddata->in;
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	ddata->videomode = *timings;
203*4882a593Smuzhiyun 	dssdev->panel.timings = *timings;
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	in->ops.dpi->set_timings(in, timings);
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun 
lb035q02_get_timings(struct omap_dss_device * dssdev,struct omap_video_timings * timings)208*4882a593Smuzhiyun static void lb035q02_get_timings(struct omap_dss_device *dssdev,
209*4882a593Smuzhiyun 		struct omap_video_timings *timings)
210*4882a593Smuzhiyun {
211*4882a593Smuzhiyun 	struct panel_drv_data *ddata = to_panel_data(dssdev);
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	*timings = ddata->videomode;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun 
lb035q02_check_timings(struct omap_dss_device * dssdev,struct omap_video_timings * timings)216*4882a593Smuzhiyun static int lb035q02_check_timings(struct omap_dss_device *dssdev,
217*4882a593Smuzhiyun 		struct omap_video_timings *timings)
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun 	struct panel_drv_data *ddata = to_panel_data(dssdev);
220*4882a593Smuzhiyun 	struct omap_dss_device *in = ddata->in;
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	return in->ops.dpi->check_timings(in, timings);
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun static struct omap_dss_driver lb035q02_ops = {
226*4882a593Smuzhiyun 	.connect	= lb035q02_connect,
227*4882a593Smuzhiyun 	.disconnect	= lb035q02_disconnect,
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	.enable		= lb035q02_enable,
230*4882a593Smuzhiyun 	.disable	= lb035q02_disable,
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	.set_timings	= lb035q02_set_timings,
233*4882a593Smuzhiyun 	.get_timings	= lb035q02_get_timings,
234*4882a593Smuzhiyun 	.check_timings	= lb035q02_check_timings,
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	.get_resolution	= omapdss_default_get_resolution,
237*4882a593Smuzhiyun };
238*4882a593Smuzhiyun 
lb035q02_probe_of(struct spi_device * spi)239*4882a593Smuzhiyun static int lb035q02_probe_of(struct spi_device *spi)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun 	struct device_node *node = spi->dev.of_node;
242*4882a593Smuzhiyun 	struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
243*4882a593Smuzhiyun 	struct omap_dss_device *in;
244*4882a593Smuzhiyun 	struct gpio_desc *gpio;
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	gpio = devm_gpiod_get(&spi->dev, "enable", GPIOD_OUT_LOW);
247*4882a593Smuzhiyun 	if (IS_ERR(gpio)) {
248*4882a593Smuzhiyun 		dev_err(&spi->dev, "failed to parse enable gpio\n");
249*4882a593Smuzhiyun 		return PTR_ERR(gpio);
250*4882a593Smuzhiyun 	}
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	ddata->enable_gpio = gpio;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	ddata->backlight_gpio = -ENOENT;
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	in = omapdss_of_find_source_for_first_ep(node);
257*4882a593Smuzhiyun 	if (IS_ERR(in)) {
258*4882a593Smuzhiyun 		dev_err(&spi->dev, "failed to find video source\n");
259*4882a593Smuzhiyun 		return PTR_ERR(in);
260*4882a593Smuzhiyun 	}
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	ddata->in = in;
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	return 0;
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun 
lb035q02_panel_spi_probe(struct spi_device * spi)267*4882a593Smuzhiyun static int lb035q02_panel_spi_probe(struct spi_device *spi)
268*4882a593Smuzhiyun {
269*4882a593Smuzhiyun 	struct panel_drv_data *ddata;
270*4882a593Smuzhiyun 	struct omap_dss_device *dssdev;
271*4882a593Smuzhiyun 	int r;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	if (!spi->dev.of_node)
274*4882a593Smuzhiyun 		return -ENODEV;
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	ddata = devm_kzalloc(&spi->dev, sizeof(*ddata), GFP_KERNEL);
277*4882a593Smuzhiyun 	if (ddata == NULL)
278*4882a593Smuzhiyun 		return -ENOMEM;
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	dev_set_drvdata(&spi->dev, ddata);
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	ddata->spi = spi;
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	r = lb035q02_probe_of(spi);
285*4882a593Smuzhiyun 	if (r)
286*4882a593Smuzhiyun 		return r;
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 	if (gpio_is_valid(ddata->backlight_gpio)) {
289*4882a593Smuzhiyun 		r = devm_gpio_request_one(&spi->dev, ddata->backlight_gpio,
290*4882a593Smuzhiyun 				GPIOF_OUT_INIT_LOW, "panel backlight");
291*4882a593Smuzhiyun 		if (r)
292*4882a593Smuzhiyun 			goto err_gpio;
293*4882a593Smuzhiyun 	}
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	ddata->videomode = lb035q02_timings;
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	dssdev = &ddata->dssdev;
298*4882a593Smuzhiyun 	dssdev->dev = &spi->dev;
299*4882a593Smuzhiyun 	dssdev->driver = &lb035q02_ops;
300*4882a593Smuzhiyun 	dssdev->type = OMAP_DISPLAY_TYPE_DPI;
301*4882a593Smuzhiyun 	dssdev->owner = THIS_MODULE;
302*4882a593Smuzhiyun 	dssdev->panel.timings = ddata->videomode;
303*4882a593Smuzhiyun 	dssdev->phy.dpi.data_lines = ddata->data_lines;
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	r = omapdss_register_display(dssdev);
306*4882a593Smuzhiyun 	if (r) {
307*4882a593Smuzhiyun 		dev_err(&spi->dev, "Failed to register panel\n");
308*4882a593Smuzhiyun 		goto err_reg;
309*4882a593Smuzhiyun 	}
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	return 0;
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun err_reg:
314*4882a593Smuzhiyun err_gpio:
315*4882a593Smuzhiyun 	omap_dss_put_device(ddata->in);
316*4882a593Smuzhiyun 	return r;
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun 
lb035q02_panel_spi_remove(struct spi_device * spi)319*4882a593Smuzhiyun static int lb035q02_panel_spi_remove(struct spi_device *spi)
320*4882a593Smuzhiyun {
321*4882a593Smuzhiyun 	struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
322*4882a593Smuzhiyun 	struct omap_dss_device *dssdev = &ddata->dssdev;
323*4882a593Smuzhiyun 	struct omap_dss_device *in = ddata->in;
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	omapdss_unregister_display(dssdev);
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	lb035q02_disable(dssdev);
328*4882a593Smuzhiyun 	lb035q02_disconnect(dssdev);
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	omap_dss_put_device(in);
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	return 0;
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun static const struct of_device_id lb035q02_of_match[] = {
336*4882a593Smuzhiyun 	{ .compatible = "omapdss,lgphilips,lb035q02", },
337*4882a593Smuzhiyun 	{},
338*4882a593Smuzhiyun };
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, lb035q02_of_match);
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun static struct spi_driver lb035q02_spi_driver = {
343*4882a593Smuzhiyun 	.probe		= lb035q02_panel_spi_probe,
344*4882a593Smuzhiyun 	.remove		= lb035q02_panel_spi_remove,
345*4882a593Smuzhiyun 	.driver		= {
346*4882a593Smuzhiyun 		.name	= "panel_lgphilips_lb035q02",
347*4882a593Smuzhiyun 		.of_match_table = lb035q02_of_match,
348*4882a593Smuzhiyun 		.suppress_bind_attrs = true,
349*4882a593Smuzhiyun 	},
350*4882a593Smuzhiyun };
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun module_spi_driver(lb035q02_spi_driver);
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun MODULE_ALIAS("spi:lgphilips,lb035q02");
355*4882a593Smuzhiyun MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ti.com>");
356*4882a593Smuzhiyun MODULE_DESCRIPTION("LG.Philips LB035Q02 LCD Panel driver");
357*4882a593Smuzhiyun MODULE_LICENSE("GPL");
358