1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * LCD driver for MIPI DBI-C / DCS compatible LCDs
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2006 Nokia Corporation
6*4882a593Smuzhiyun * Author: Imre Deak <imre.deak@nokia.com>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun #include <linux/device.h>
9*4882a593Smuzhiyun #include <linux/delay.h>
10*4882a593Smuzhiyun #include <linux/slab.h>
11*4882a593Smuzhiyun #include <linux/workqueue.h>
12*4882a593Smuzhiyun #include <linux/spi/spi.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <linux/platform_data/lcd-mipid.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include "omapfb.h"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #define MIPID_MODULE_NAME "lcd_mipid"
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define MIPID_CMD_READ_DISP_ID 0x04
22*4882a593Smuzhiyun #define MIPID_CMD_READ_RED 0x06
23*4882a593Smuzhiyun #define MIPID_CMD_READ_GREEN 0x07
24*4882a593Smuzhiyun #define MIPID_CMD_READ_BLUE 0x08
25*4882a593Smuzhiyun #define MIPID_CMD_READ_DISP_STATUS 0x09
26*4882a593Smuzhiyun #define MIPID_CMD_RDDSDR 0x0F
27*4882a593Smuzhiyun #define MIPID_CMD_SLEEP_IN 0x10
28*4882a593Smuzhiyun #define MIPID_CMD_SLEEP_OUT 0x11
29*4882a593Smuzhiyun #define MIPID_CMD_DISP_OFF 0x28
30*4882a593Smuzhiyun #define MIPID_CMD_DISP_ON 0x29
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define MIPID_ESD_CHECK_PERIOD msecs_to_jiffies(5000)
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #define to_mipid_device(p) container_of(p, struct mipid_device, \
35*4882a593Smuzhiyun panel)
36*4882a593Smuzhiyun struct mipid_device {
37*4882a593Smuzhiyun int enabled;
38*4882a593Smuzhiyun int revision;
39*4882a593Smuzhiyun unsigned int saved_bklight_level;
40*4882a593Smuzhiyun unsigned long hw_guard_end; /* next value of jiffies
41*4882a593Smuzhiyun when we can issue the
42*4882a593Smuzhiyun next sleep in/out command */
43*4882a593Smuzhiyun unsigned long hw_guard_wait; /* max guard time in jiffies */
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun struct omapfb_device *fbdev;
46*4882a593Smuzhiyun struct spi_device *spi;
47*4882a593Smuzhiyun struct mutex mutex;
48*4882a593Smuzhiyun struct lcd_panel panel;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun struct delayed_work esd_work;
51*4882a593Smuzhiyun void (*esd_check)(struct mipid_device *m);
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun
mipid_transfer(struct mipid_device * md,int cmd,const u8 * wbuf,int wlen,u8 * rbuf,int rlen)54*4882a593Smuzhiyun static void mipid_transfer(struct mipid_device *md, int cmd, const u8 *wbuf,
55*4882a593Smuzhiyun int wlen, u8 *rbuf, int rlen)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun struct spi_message m;
58*4882a593Smuzhiyun struct spi_transfer *x, xfer[4];
59*4882a593Smuzhiyun u16 w;
60*4882a593Smuzhiyun int r;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun BUG_ON(md->spi == NULL);
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun spi_message_init(&m);
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun memset(xfer, 0, sizeof(xfer));
67*4882a593Smuzhiyun x = &xfer[0];
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun cmd &= 0xff;
70*4882a593Smuzhiyun x->tx_buf = &cmd;
71*4882a593Smuzhiyun x->bits_per_word = 9;
72*4882a593Smuzhiyun x->len = 2;
73*4882a593Smuzhiyun spi_message_add_tail(x, &m);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun if (wlen) {
76*4882a593Smuzhiyun x++;
77*4882a593Smuzhiyun x->tx_buf = wbuf;
78*4882a593Smuzhiyun x->len = wlen;
79*4882a593Smuzhiyun x->bits_per_word = 9;
80*4882a593Smuzhiyun spi_message_add_tail(x, &m);
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun if (rlen) {
84*4882a593Smuzhiyun x++;
85*4882a593Smuzhiyun x->rx_buf = &w;
86*4882a593Smuzhiyun x->len = 1;
87*4882a593Smuzhiyun spi_message_add_tail(x, &m);
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun if (rlen > 1) {
90*4882a593Smuzhiyun /* Arrange for the extra clock before the first
91*4882a593Smuzhiyun * data bit.
92*4882a593Smuzhiyun */
93*4882a593Smuzhiyun x->bits_per_word = 9;
94*4882a593Smuzhiyun x->len = 2;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun x++;
97*4882a593Smuzhiyun x->rx_buf = &rbuf[1];
98*4882a593Smuzhiyun x->len = rlen - 1;
99*4882a593Smuzhiyun spi_message_add_tail(x, &m);
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun r = spi_sync(md->spi, &m);
104*4882a593Smuzhiyun if (r < 0)
105*4882a593Smuzhiyun dev_dbg(&md->spi->dev, "spi_sync %d\n", r);
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun if (rlen)
108*4882a593Smuzhiyun rbuf[0] = w & 0xff;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
mipid_cmd(struct mipid_device * md,int cmd)111*4882a593Smuzhiyun static inline void mipid_cmd(struct mipid_device *md, int cmd)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun mipid_transfer(md, cmd, NULL, 0, NULL, 0);
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun
mipid_write(struct mipid_device * md,int reg,const u8 * buf,int len)116*4882a593Smuzhiyun static inline void mipid_write(struct mipid_device *md,
117*4882a593Smuzhiyun int reg, const u8 *buf, int len)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun mipid_transfer(md, reg, buf, len, NULL, 0);
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
mipid_read(struct mipid_device * md,int reg,u8 * buf,int len)122*4882a593Smuzhiyun static inline void mipid_read(struct mipid_device *md,
123*4882a593Smuzhiyun int reg, u8 *buf, int len)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun mipid_transfer(md, reg, NULL, 0, buf, len);
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
set_data_lines(struct mipid_device * md,int data_lines)128*4882a593Smuzhiyun static void set_data_lines(struct mipid_device *md, int data_lines)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun u16 par;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun switch (data_lines) {
133*4882a593Smuzhiyun case 16:
134*4882a593Smuzhiyun par = 0x150;
135*4882a593Smuzhiyun break;
136*4882a593Smuzhiyun case 18:
137*4882a593Smuzhiyun par = 0x160;
138*4882a593Smuzhiyun break;
139*4882a593Smuzhiyun case 24:
140*4882a593Smuzhiyun par = 0x170;
141*4882a593Smuzhiyun break;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun mipid_write(md, 0x3a, (u8 *)&par, 2);
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun
send_init_string(struct mipid_device * md)146*4882a593Smuzhiyun static void send_init_string(struct mipid_device *md)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun u16 initpar[] = { 0x0102, 0x0100, 0x0100 };
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun mipid_write(md, 0xc2, (u8 *)initpar, sizeof(initpar));
151*4882a593Smuzhiyun set_data_lines(md, md->panel.data_lines);
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun
hw_guard_start(struct mipid_device * md,int guard_msec)154*4882a593Smuzhiyun static void hw_guard_start(struct mipid_device *md, int guard_msec)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun md->hw_guard_wait = msecs_to_jiffies(guard_msec);
157*4882a593Smuzhiyun md->hw_guard_end = jiffies + md->hw_guard_wait;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
hw_guard_wait(struct mipid_device * md)160*4882a593Smuzhiyun static void hw_guard_wait(struct mipid_device *md)
161*4882a593Smuzhiyun {
162*4882a593Smuzhiyun unsigned long wait = md->hw_guard_end - jiffies;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun if ((long)wait > 0 && time_before_eq(wait, md->hw_guard_wait)) {
165*4882a593Smuzhiyun set_current_state(TASK_UNINTERRUPTIBLE);
166*4882a593Smuzhiyun schedule_timeout(wait);
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun
set_sleep_mode(struct mipid_device * md,int on)170*4882a593Smuzhiyun static void set_sleep_mode(struct mipid_device *md, int on)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun int cmd, sleep_time = 50;
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun if (on)
175*4882a593Smuzhiyun cmd = MIPID_CMD_SLEEP_IN;
176*4882a593Smuzhiyun else
177*4882a593Smuzhiyun cmd = MIPID_CMD_SLEEP_OUT;
178*4882a593Smuzhiyun hw_guard_wait(md);
179*4882a593Smuzhiyun mipid_cmd(md, cmd);
180*4882a593Smuzhiyun hw_guard_start(md, 120);
181*4882a593Smuzhiyun /*
182*4882a593Smuzhiyun * When we enable the panel, it seems we _have_ to sleep
183*4882a593Smuzhiyun * 120 ms before sending the init string. When disabling the
184*4882a593Smuzhiyun * panel we'll sleep for the duration of 2 frames, so that the
185*4882a593Smuzhiyun * controller can still provide the PCLK,HS,VS signals.
186*4882a593Smuzhiyun */
187*4882a593Smuzhiyun if (!on)
188*4882a593Smuzhiyun sleep_time = 120;
189*4882a593Smuzhiyun msleep(sleep_time);
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun
set_display_state(struct mipid_device * md,int enabled)192*4882a593Smuzhiyun static void set_display_state(struct mipid_device *md, int enabled)
193*4882a593Smuzhiyun {
194*4882a593Smuzhiyun int cmd = enabled ? MIPID_CMD_DISP_ON : MIPID_CMD_DISP_OFF;
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun mipid_cmd(md, cmd);
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun
mipid_set_bklight_level(struct lcd_panel * panel,unsigned int level)199*4882a593Smuzhiyun static int mipid_set_bklight_level(struct lcd_panel *panel, unsigned int level)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun struct mipid_device *md = to_mipid_device(panel);
202*4882a593Smuzhiyun struct mipid_platform_data *pd = md->spi->dev.platform_data;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun if (pd->get_bklight_max == NULL || pd->set_bklight_level == NULL)
205*4882a593Smuzhiyun return -ENODEV;
206*4882a593Smuzhiyun if (level > pd->get_bklight_max(pd))
207*4882a593Smuzhiyun return -EINVAL;
208*4882a593Smuzhiyun if (!md->enabled) {
209*4882a593Smuzhiyun md->saved_bklight_level = level;
210*4882a593Smuzhiyun return 0;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun pd->set_bklight_level(pd, level);
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun return 0;
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun
mipid_get_bklight_level(struct lcd_panel * panel)217*4882a593Smuzhiyun static unsigned int mipid_get_bklight_level(struct lcd_panel *panel)
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun struct mipid_device *md = to_mipid_device(panel);
220*4882a593Smuzhiyun struct mipid_platform_data *pd = md->spi->dev.platform_data;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun if (pd->get_bklight_level == NULL)
223*4882a593Smuzhiyun return -ENODEV;
224*4882a593Smuzhiyun return pd->get_bklight_level(pd);
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
mipid_get_bklight_max(struct lcd_panel * panel)227*4882a593Smuzhiyun static unsigned int mipid_get_bklight_max(struct lcd_panel *panel)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun struct mipid_device *md = to_mipid_device(panel);
230*4882a593Smuzhiyun struct mipid_platform_data *pd = md->spi->dev.platform_data;
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun if (pd->get_bklight_max == NULL)
233*4882a593Smuzhiyun return -ENODEV;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun return pd->get_bklight_max(pd);
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun
mipid_get_caps(struct lcd_panel * panel)238*4882a593Smuzhiyun static unsigned long mipid_get_caps(struct lcd_panel *panel)
239*4882a593Smuzhiyun {
240*4882a593Smuzhiyun return OMAPFB_CAPS_SET_BACKLIGHT;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun
read_first_pixel(struct mipid_device * md)243*4882a593Smuzhiyun static u16 read_first_pixel(struct mipid_device *md)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun u16 pixel;
246*4882a593Smuzhiyun u8 red, green, blue;
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun mutex_lock(&md->mutex);
249*4882a593Smuzhiyun mipid_read(md, MIPID_CMD_READ_RED, &red, 1);
250*4882a593Smuzhiyun mipid_read(md, MIPID_CMD_READ_GREEN, &green, 1);
251*4882a593Smuzhiyun mipid_read(md, MIPID_CMD_READ_BLUE, &blue, 1);
252*4882a593Smuzhiyun mutex_unlock(&md->mutex);
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun switch (md->panel.data_lines) {
255*4882a593Smuzhiyun case 16:
256*4882a593Smuzhiyun pixel = ((red >> 1) << 11) | (green << 5) | (blue >> 1);
257*4882a593Smuzhiyun break;
258*4882a593Smuzhiyun case 24:
259*4882a593Smuzhiyun /* 24 bit -> 16 bit */
260*4882a593Smuzhiyun pixel = ((red >> 3) << 11) | ((green >> 2) << 5) |
261*4882a593Smuzhiyun (blue >> 3);
262*4882a593Smuzhiyun break;
263*4882a593Smuzhiyun default:
264*4882a593Smuzhiyun pixel = 0;
265*4882a593Smuzhiyun BUG();
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun return pixel;
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun
mipid_run_test(struct lcd_panel * panel,int test_num)271*4882a593Smuzhiyun static int mipid_run_test(struct lcd_panel *panel, int test_num)
272*4882a593Smuzhiyun {
273*4882a593Smuzhiyun struct mipid_device *md = to_mipid_device(panel);
274*4882a593Smuzhiyun static const u16 test_values[4] = {
275*4882a593Smuzhiyun 0x0000, 0xffff, 0xaaaa, 0x5555,
276*4882a593Smuzhiyun };
277*4882a593Smuzhiyun int i;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun if (test_num != MIPID_TEST_RGB_LINES)
280*4882a593Smuzhiyun return MIPID_TEST_INVALID;
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(test_values); i++) {
283*4882a593Smuzhiyun int delay;
284*4882a593Smuzhiyun unsigned long tmo;
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun omapfb_write_first_pixel(md->fbdev, test_values[i]);
287*4882a593Smuzhiyun tmo = jiffies + msecs_to_jiffies(100);
288*4882a593Smuzhiyun delay = 25;
289*4882a593Smuzhiyun while (1) {
290*4882a593Smuzhiyun u16 pixel;
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun msleep(delay);
293*4882a593Smuzhiyun pixel = read_first_pixel(md);
294*4882a593Smuzhiyun if (pixel == test_values[i])
295*4882a593Smuzhiyun break;
296*4882a593Smuzhiyun if (time_after(jiffies, tmo)) {
297*4882a593Smuzhiyun dev_err(&md->spi->dev,
298*4882a593Smuzhiyun "MIPI LCD RGB I/F test failed: "
299*4882a593Smuzhiyun "expecting %04x, got %04x\n",
300*4882a593Smuzhiyun test_values[i], pixel);
301*4882a593Smuzhiyun return MIPID_TEST_FAILED;
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun delay = 10;
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun }
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun return 0;
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun
ls041y3_esd_recover(struct mipid_device * md)310*4882a593Smuzhiyun static void ls041y3_esd_recover(struct mipid_device *md)
311*4882a593Smuzhiyun {
312*4882a593Smuzhiyun dev_err(&md->spi->dev, "performing LCD ESD recovery\n");
313*4882a593Smuzhiyun set_sleep_mode(md, 1);
314*4882a593Smuzhiyun set_sleep_mode(md, 0);
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun
ls041y3_esd_check_mode1(struct mipid_device * md)317*4882a593Smuzhiyun static void ls041y3_esd_check_mode1(struct mipid_device *md)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun u8 state1, state2;
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun mipid_read(md, MIPID_CMD_RDDSDR, &state1, 1);
322*4882a593Smuzhiyun set_sleep_mode(md, 0);
323*4882a593Smuzhiyun mipid_read(md, MIPID_CMD_RDDSDR, &state2, 1);
324*4882a593Smuzhiyun dev_dbg(&md->spi->dev, "ESD mode 1 state1 %02x state2 %02x\n",
325*4882a593Smuzhiyun state1, state2);
326*4882a593Smuzhiyun /* Each sleep out command will trigger a self diagnostic and flip
327*4882a593Smuzhiyun * Bit6 if the test passes.
328*4882a593Smuzhiyun */
329*4882a593Smuzhiyun if (!((state1 ^ state2) & (1 << 6)))
330*4882a593Smuzhiyun ls041y3_esd_recover(md);
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun
ls041y3_esd_check_mode2(struct mipid_device * md)333*4882a593Smuzhiyun static void ls041y3_esd_check_mode2(struct mipid_device *md)
334*4882a593Smuzhiyun {
335*4882a593Smuzhiyun int i;
336*4882a593Smuzhiyun u8 rbuf[2];
337*4882a593Smuzhiyun static const struct {
338*4882a593Smuzhiyun int cmd;
339*4882a593Smuzhiyun int wlen;
340*4882a593Smuzhiyun u16 wbuf[3];
341*4882a593Smuzhiyun } *rd, rd_ctrl[7] = {
342*4882a593Smuzhiyun { 0xb0, 4, { 0x0101, 0x01fe, } },
343*4882a593Smuzhiyun { 0xb1, 4, { 0x01de, 0x0121, } },
344*4882a593Smuzhiyun { 0xc2, 4, { 0x0100, 0x0100, } },
345*4882a593Smuzhiyun { 0xbd, 2, { 0x0100, } },
346*4882a593Smuzhiyun { 0xc2, 4, { 0x01fc, 0x0103, } },
347*4882a593Smuzhiyun { 0xb4, 0, },
348*4882a593Smuzhiyun { 0x00, 0, },
349*4882a593Smuzhiyun };
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun rd = rd_ctrl;
352*4882a593Smuzhiyun for (i = 0; i < 3; i++, rd++)
353*4882a593Smuzhiyun mipid_write(md, rd->cmd, (u8 *)rd->wbuf, rd->wlen);
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun udelay(10);
356*4882a593Smuzhiyun mipid_read(md, rd->cmd, rbuf, 2);
357*4882a593Smuzhiyun rd++;
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun for (i = 0; i < 3; i++, rd++) {
360*4882a593Smuzhiyun udelay(10);
361*4882a593Smuzhiyun mipid_write(md, rd->cmd, (u8 *)rd->wbuf, rd->wlen);
362*4882a593Smuzhiyun }
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun dev_dbg(&md->spi->dev, "ESD mode 2 state %02x\n", rbuf[1]);
365*4882a593Smuzhiyun if (rbuf[1] == 0x00)
366*4882a593Smuzhiyun ls041y3_esd_recover(md);
367*4882a593Smuzhiyun }
368*4882a593Smuzhiyun
ls041y3_esd_check(struct mipid_device * md)369*4882a593Smuzhiyun static void ls041y3_esd_check(struct mipid_device *md)
370*4882a593Smuzhiyun {
371*4882a593Smuzhiyun ls041y3_esd_check_mode1(md);
372*4882a593Smuzhiyun if (md->revision >= 0x88)
373*4882a593Smuzhiyun ls041y3_esd_check_mode2(md);
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun
mipid_esd_start_check(struct mipid_device * md)376*4882a593Smuzhiyun static void mipid_esd_start_check(struct mipid_device *md)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun if (md->esd_check != NULL)
379*4882a593Smuzhiyun schedule_delayed_work(&md->esd_work,
380*4882a593Smuzhiyun MIPID_ESD_CHECK_PERIOD);
381*4882a593Smuzhiyun }
382*4882a593Smuzhiyun
mipid_esd_stop_check(struct mipid_device * md)383*4882a593Smuzhiyun static void mipid_esd_stop_check(struct mipid_device *md)
384*4882a593Smuzhiyun {
385*4882a593Smuzhiyun if (md->esd_check != NULL)
386*4882a593Smuzhiyun cancel_delayed_work_sync(&md->esd_work);
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun
mipid_esd_work(struct work_struct * work)389*4882a593Smuzhiyun static void mipid_esd_work(struct work_struct *work)
390*4882a593Smuzhiyun {
391*4882a593Smuzhiyun struct mipid_device *md = container_of(work, struct mipid_device,
392*4882a593Smuzhiyun esd_work.work);
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun mutex_lock(&md->mutex);
395*4882a593Smuzhiyun md->esd_check(md);
396*4882a593Smuzhiyun mutex_unlock(&md->mutex);
397*4882a593Smuzhiyun mipid_esd_start_check(md);
398*4882a593Smuzhiyun }
399*4882a593Smuzhiyun
mipid_enable(struct lcd_panel * panel)400*4882a593Smuzhiyun static int mipid_enable(struct lcd_panel *panel)
401*4882a593Smuzhiyun {
402*4882a593Smuzhiyun struct mipid_device *md = to_mipid_device(panel);
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun mutex_lock(&md->mutex);
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun if (md->enabled) {
407*4882a593Smuzhiyun mutex_unlock(&md->mutex);
408*4882a593Smuzhiyun return 0;
409*4882a593Smuzhiyun }
410*4882a593Smuzhiyun set_sleep_mode(md, 0);
411*4882a593Smuzhiyun md->enabled = 1;
412*4882a593Smuzhiyun send_init_string(md);
413*4882a593Smuzhiyun set_display_state(md, 1);
414*4882a593Smuzhiyun mipid_set_bklight_level(panel, md->saved_bklight_level);
415*4882a593Smuzhiyun mipid_esd_start_check(md);
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun mutex_unlock(&md->mutex);
418*4882a593Smuzhiyun return 0;
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun
mipid_disable(struct lcd_panel * panel)421*4882a593Smuzhiyun static void mipid_disable(struct lcd_panel *panel)
422*4882a593Smuzhiyun {
423*4882a593Smuzhiyun struct mipid_device *md = to_mipid_device(panel);
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun /*
426*4882a593Smuzhiyun * A final ESD work might be called before returning,
427*4882a593Smuzhiyun * so do this without holding the lock.
428*4882a593Smuzhiyun */
429*4882a593Smuzhiyun mipid_esd_stop_check(md);
430*4882a593Smuzhiyun mutex_lock(&md->mutex);
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun if (!md->enabled) {
433*4882a593Smuzhiyun mutex_unlock(&md->mutex);
434*4882a593Smuzhiyun return;
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun md->saved_bklight_level = mipid_get_bklight_level(panel);
437*4882a593Smuzhiyun mipid_set_bklight_level(panel, 0);
438*4882a593Smuzhiyun set_display_state(md, 0);
439*4882a593Smuzhiyun set_sleep_mode(md, 1);
440*4882a593Smuzhiyun md->enabled = 0;
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun mutex_unlock(&md->mutex);
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun
panel_enabled(struct mipid_device * md)445*4882a593Smuzhiyun static int panel_enabled(struct mipid_device *md)
446*4882a593Smuzhiyun {
447*4882a593Smuzhiyun u32 disp_status;
448*4882a593Smuzhiyun int enabled;
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun mipid_read(md, MIPID_CMD_READ_DISP_STATUS, (u8 *)&disp_status, 4);
451*4882a593Smuzhiyun disp_status = __be32_to_cpu(disp_status);
452*4882a593Smuzhiyun enabled = (disp_status & (1 << 17)) && (disp_status & (1 << 10));
453*4882a593Smuzhiyun dev_dbg(&md->spi->dev,
454*4882a593Smuzhiyun "LCD panel %senabled by bootloader (status 0x%04x)\n",
455*4882a593Smuzhiyun enabled ? "" : "not ", disp_status);
456*4882a593Smuzhiyun return enabled;
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun
mipid_init(struct lcd_panel * panel,struct omapfb_device * fbdev)459*4882a593Smuzhiyun static int mipid_init(struct lcd_panel *panel,
460*4882a593Smuzhiyun struct omapfb_device *fbdev)
461*4882a593Smuzhiyun {
462*4882a593Smuzhiyun struct mipid_device *md = to_mipid_device(panel);
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun md->fbdev = fbdev;
465*4882a593Smuzhiyun INIT_DELAYED_WORK(&md->esd_work, mipid_esd_work);
466*4882a593Smuzhiyun mutex_init(&md->mutex);
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun md->enabled = panel_enabled(md);
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun if (md->enabled)
471*4882a593Smuzhiyun mipid_esd_start_check(md);
472*4882a593Smuzhiyun else
473*4882a593Smuzhiyun md->saved_bklight_level = mipid_get_bklight_level(panel);
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun return 0;
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun
mipid_cleanup(struct lcd_panel * panel)478*4882a593Smuzhiyun static void mipid_cleanup(struct lcd_panel *panel)
479*4882a593Smuzhiyun {
480*4882a593Smuzhiyun struct mipid_device *md = to_mipid_device(panel);
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun if (md->enabled)
483*4882a593Smuzhiyun mipid_esd_stop_check(md);
484*4882a593Smuzhiyun }
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun static const struct lcd_panel mipid_panel = {
487*4882a593Smuzhiyun .config = OMAP_LCDC_PANEL_TFT,
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun .bpp = 16,
490*4882a593Smuzhiyun .x_res = 800,
491*4882a593Smuzhiyun .y_res = 480,
492*4882a593Smuzhiyun .pixel_clock = 21940,
493*4882a593Smuzhiyun .hsw = 50,
494*4882a593Smuzhiyun .hfp = 20,
495*4882a593Smuzhiyun .hbp = 15,
496*4882a593Smuzhiyun .vsw = 2,
497*4882a593Smuzhiyun .vfp = 1,
498*4882a593Smuzhiyun .vbp = 3,
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun .init = mipid_init,
501*4882a593Smuzhiyun .cleanup = mipid_cleanup,
502*4882a593Smuzhiyun .enable = mipid_enable,
503*4882a593Smuzhiyun .disable = mipid_disable,
504*4882a593Smuzhiyun .get_caps = mipid_get_caps,
505*4882a593Smuzhiyun .set_bklight_level = mipid_set_bklight_level,
506*4882a593Smuzhiyun .get_bklight_level = mipid_get_bklight_level,
507*4882a593Smuzhiyun .get_bklight_max = mipid_get_bklight_max,
508*4882a593Smuzhiyun .run_test = mipid_run_test,
509*4882a593Smuzhiyun };
510*4882a593Smuzhiyun
mipid_detect(struct mipid_device * md)511*4882a593Smuzhiyun static int mipid_detect(struct mipid_device *md)
512*4882a593Smuzhiyun {
513*4882a593Smuzhiyun struct mipid_platform_data *pdata;
514*4882a593Smuzhiyun u8 display_id[3];
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun pdata = md->spi->dev.platform_data;
517*4882a593Smuzhiyun if (pdata == NULL) {
518*4882a593Smuzhiyun dev_err(&md->spi->dev, "missing platform data\n");
519*4882a593Smuzhiyun return -ENOENT;
520*4882a593Smuzhiyun }
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun mipid_read(md, MIPID_CMD_READ_DISP_ID, display_id, 3);
523*4882a593Smuzhiyun dev_dbg(&md->spi->dev, "MIPI display ID: %02x%02x%02x\n",
524*4882a593Smuzhiyun display_id[0], display_id[1], display_id[2]);
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun switch (display_id[0]) {
527*4882a593Smuzhiyun case 0x45:
528*4882a593Smuzhiyun md->panel.name = "lph8923";
529*4882a593Smuzhiyun break;
530*4882a593Smuzhiyun case 0x83:
531*4882a593Smuzhiyun md->panel.name = "ls041y3";
532*4882a593Smuzhiyun md->esd_check = ls041y3_esd_check;
533*4882a593Smuzhiyun break;
534*4882a593Smuzhiyun default:
535*4882a593Smuzhiyun md->panel.name = "unknown";
536*4882a593Smuzhiyun dev_err(&md->spi->dev, "invalid display ID\n");
537*4882a593Smuzhiyun return -ENODEV;
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun md->revision = display_id[1];
541*4882a593Smuzhiyun md->panel.data_lines = pdata->data_lines;
542*4882a593Smuzhiyun pr_info("omapfb: %s rev %02x LCD detected, %d data lines\n",
543*4882a593Smuzhiyun md->panel.name, md->revision, md->panel.data_lines);
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun return 0;
546*4882a593Smuzhiyun }
547*4882a593Smuzhiyun
mipid_spi_probe(struct spi_device * spi)548*4882a593Smuzhiyun static int mipid_spi_probe(struct spi_device *spi)
549*4882a593Smuzhiyun {
550*4882a593Smuzhiyun struct mipid_device *md;
551*4882a593Smuzhiyun int r;
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun md = kzalloc(sizeof(*md), GFP_KERNEL);
554*4882a593Smuzhiyun if (md == NULL) {
555*4882a593Smuzhiyun dev_err(&spi->dev, "out of memory\n");
556*4882a593Smuzhiyun return -ENOMEM;
557*4882a593Smuzhiyun }
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun spi->mode = SPI_MODE_0;
560*4882a593Smuzhiyun md->spi = spi;
561*4882a593Smuzhiyun dev_set_drvdata(&spi->dev, md);
562*4882a593Smuzhiyun md->panel = mipid_panel;
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun r = mipid_detect(md);
565*4882a593Smuzhiyun if (r < 0)
566*4882a593Smuzhiyun return r;
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun omapfb_register_panel(&md->panel);
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun return 0;
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun
mipid_spi_remove(struct spi_device * spi)573*4882a593Smuzhiyun static int mipid_spi_remove(struct spi_device *spi)
574*4882a593Smuzhiyun {
575*4882a593Smuzhiyun struct mipid_device *md = dev_get_drvdata(&spi->dev);
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun mipid_disable(&md->panel);
578*4882a593Smuzhiyun kfree(md);
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun return 0;
581*4882a593Smuzhiyun }
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun static struct spi_driver mipid_spi_driver = {
584*4882a593Smuzhiyun .driver = {
585*4882a593Smuzhiyun .name = MIPID_MODULE_NAME,
586*4882a593Smuzhiyun },
587*4882a593Smuzhiyun .probe = mipid_spi_probe,
588*4882a593Smuzhiyun .remove = mipid_spi_remove,
589*4882a593Smuzhiyun };
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun module_spi_driver(mipid_spi_driver);
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun MODULE_DESCRIPTION("MIPI display driver");
594*4882a593Smuzhiyun MODULE_LICENSE("GPL");
595