xref: /OK3568_Linux_fs/kernel/drivers/video/fbdev/matrox/matroxfb_maven.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200, G400 and G450.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Portions Copyright (c) 2001 Matrox Graphics Inc.
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * Version: 1.65 2002/08/14
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * See matroxfb_base.c for contributors.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  */
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include "matroxfb_maven.h"
17*4882a593Smuzhiyun #include "matroxfb_misc.h"
18*4882a593Smuzhiyun #include "matroxfb_DAC1064.h"
19*4882a593Smuzhiyun #include <linux/i2c.h>
20*4882a593Smuzhiyun #include <linux/matroxfb.h>
21*4882a593Smuzhiyun #include <linux/slab.h>
22*4882a593Smuzhiyun #include <asm/div64.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define MGATVO_B	1
25*4882a593Smuzhiyun #define MGATVO_C	2
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun static const struct maven_gamma {
28*4882a593Smuzhiyun   unsigned char reg83;
29*4882a593Smuzhiyun   unsigned char reg84;
30*4882a593Smuzhiyun   unsigned char reg85;
31*4882a593Smuzhiyun   unsigned char reg86;
32*4882a593Smuzhiyun   unsigned char reg87;
33*4882a593Smuzhiyun   unsigned char reg88;
34*4882a593Smuzhiyun   unsigned char reg89;
35*4882a593Smuzhiyun   unsigned char reg8a;
36*4882a593Smuzhiyun   unsigned char reg8b;
37*4882a593Smuzhiyun } maven_gamma[] = {
38*4882a593Smuzhiyun   { 131, 57, 223, 15, 117, 212, 251, 91, 156},
39*4882a593Smuzhiyun   { 133, 61, 128, 63, 180, 147, 195, 100, 180},
40*4882a593Smuzhiyun   { 131, 19, 63, 31, 50, 66, 171, 64, 176},
41*4882a593Smuzhiyun   { 0, 0, 0, 31, 16, 16, 16, 100, 200},
42*4882a593Smuzhiyun   { 8, 23, 47, 73, 147, 244, 220, 80, 195},
43*4882a593Smuzhiyun   { 22, 43, 64, 80, 147, 115, 58, 85, 168},
44*4882a593Smuzhiyun   { 34, 60, 80, 214, 147, 212, 188, 85, 167},
45*4882a593Smuzhiyun   { 45, 77, 96, 216, 147, 99, 91, 85, 159},
46*4882a593Smuzhiyun   { 56, 76, 112, 107, 147, 212, 148, 64, 144},
47*4882a593Smuzhiyun   { 65, 91, 128, 137, 147, 196, 17, 69, 148},
48*4882a593Smuzhiyun   { 72, 104, 136, 138, 147, 180, 245, 73, 147},
49*4882a593Smuzhiyun   { 87, 116, 143, 126, 16, 83, 229, 77, 144},
50*4882a593Smuzhiyun   { 95, 119, 152, 254, 244, 83, 221, 77, 151},
51*4882a593Smuzhiyun   { 100, 129, 159, 156, 244, 148, 197, 77, 160},
52*4882a593Smuzhiyun   { 105, 141, 167, 247, 244, 132, 181, 84, 166},
53*4882a593Smuzhiyun   { 105, 147, 168, 247, 244, 245, 181, 90, 170},
54*4882a593Smuzhiyun   { 120, 153, 175, 248, 212, 229, 165, 90, 180},
55*4882a593Smuzhiyun   { 119, 156, 176, 248, 244, 229, 84, 74, 160},
56*4882a593Smuzhiyun   { 119, 158, 183, 248, 244, 229, 149, 78, 165}
57*4882a593Smuzhiyun };
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun /* Definition of the various controls */
60*4882a593Smuzhiyun struct mctl {
61*4882a593Smuzhiyun 	struct v4l2_queryctrl desc;
62*4882a593Smuzhiyun 	size_t control;
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun #define BLMIN	0x0FF
66*4882a593Smuzhiyun #define WLMAX	0x3FF
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun static const struct mctl maven_controls[] =
69*4882a593Smuzhiyun {	{ { V4L2_CID_BRIGHTNESS, V4L2_CTRL_TYPE_INTEGER,
70*4882a593Smuzhiyun 	  "brightness",
71*4882a593Smuzhiyun 	  0, WLMAX - BLMIN, 1, 379 - BLMIN,
72*4882a593Smuzhiyun 	  0,
73*4882a593Smuzhiyun 	}, offsetof(struct matrox_fb_info, altout.tvo_params.brightness) },
74*4882a593Smuzhiyun 	{ { V4L2_CID_CONTRAST, V4L2_CTRL_TYPE_INTEGER,
75*4882a593Smuzhiyun 	  "contrast",
76*4882a593Smuzhiyun 	  0, 1023, 1, 127,
77*4882a593Smuzhiyun 	  0,
78*4882a593Smuzhiyun 	}, offsetof(struct matrox_fb_info, altout.tvo_params.contrast) },
79*4882a593Smuzhiyun 	{ { V4L2_CID_SATURATION, V4L2_CTRL_TYPE_INTEGER,
80*4882a593Smuzhiyun 	  "saturation",
81*4882a593Smuzhiyun 	  0, 255, 1, 155,
82*4882a593Smuzhiyun 	  0,
83*4882a593Smuzhiyun 	}, offsetof(struct matrox_fb_info, altout.tvo_params.saturation) },
84*4882a593Smuzhiyun 	{ { V4L2_CID_HUE, V4L2_CTRL_TYPE_INTEGER,
85*4882a593Smuzhiyun 	  "hue",
86*4882a593Smuzhiyun 	  0, 255, 1, 0,
87*4882a593Smuzhiyun 	  0,
88*4882a593Smuzhiyun 	}, offsetof(struct matrox_fb_info, altout.tvo_params.hue) },
89*4882a593Smuzhiyun 	{ { V4L2_CID_GAMMA, V4L2_CTRL_TYPE_INTEGER,
90*4882a593Smuzhiyun 	  "gamma",
91*4882a593Smuzhiyun 	  0, ARRAY_SIZE(maven_gamma) - 1, 1, 3,
92*4882a593Smuzhiyun 	  0,
93*4882a593Smuzhiyun 	}, offsetof(struct matrox_fb_info, altout.tvo_params.gamma) },
94*4882a593Smuzhiyun 	{ { MATROXFB_CID_TESTOUT, V4L2_CTRL_TYPE_BOOLEAN,
95*4882a593Smuzhiyun 	  "test output",
96*4882a593Smuzhiyun 	  0, 1, 1, 0,
97*4882a593Smuzhiyun 	  0,
98*4882a593Smuzhiyun 	}, offsetof(struct matrox_fb_info, altout.tvo_params.testout) },
99*4882a593Smuzhiyun 	{ { MATROXFB_CID_DEFLICKER, V4L2_CTRL_TYPE_INTEGER,
100*4882a593Smuzhiyun 	  "deflicker mode",
101*4882a593Smuzhiyun 	  0, 2, 1, 0,
102*4882a593Smuzhiyun 	  0,
103*4882a593Smuzhiyun 	}, offsetof(struct matrox_fb_info, altout.tvo_params.deflicker) },
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun };
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun #define MAVCTRLS ARRAY_SIZE(maven_controls)
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun /* Return: positive number: id found
110*4882a593Smuzhiyun            -EINVAL:         id not found, return failure
111*4882a593Smuzhiyun 	   -ENOENT:         id not found, create fake disabled control */
get_ctrl_id(__u32 v4l2_id)112*4882a593Smuzhiyun static int get_ctrl_id(__u32 v4l2_id) {
113*4882a593Smuzhiyun 	int i;
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	for (i = 0; i < MAVCTRLS; i++) {
116*4882a593Smuzhiyun 		if (v4l2_id < maven_controls[i].desc.id) {
117*4882a593Smuzhiyun 			if (maven_controls[i].desc.id == 0x08000000) {
118*4882a593Smuzhiyun 				return -EINVAL;
119*4882a593Smuzhiyun 			}
120*4882a593Smuzhiyun 			return -ENOENT;
121*4882a593Smuzhiyun 		}
122*4882a593Smuzhiyun 		if (v4l2_id == maven_controls[i].desc.id) {
123*4882a593Smuzhiyun 			return i;
124*4882a593Smuzhiyun 		}
125*4882a593Smuzhiyun 	}
126*4882a593Smuzhiyun 	return -EINVAL;
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun struct maven_data {
130*4882a593Smuzhiyun 	struct matrox_fb_info*		primary_head;
131*4882a593Smuzhiyun 	struct i2c_client		*client;
132*4882a593Smuzhiyun 	int				version;
133*4882a593Smuzhiyun };
134*4882a593Smuzhiyun 
get_ctrl_ptr(struct maven_data * md,int idx)135*4882a593Smuzhiyun static int* get_ctrl_ptr(struct maven_data* md, int idx) {
136*4882a593Smuzhiyun 	return (int*)((char*)(md->primary_head) + maven_controls[idx].control);
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun 
maven_get_reg(struct i2c_client * c,char reg)139*4882a593Smuzhiyun static int maven_get_reg(struct i2c_client* c, char reg) {
140*4882a593Smuzhiyun 	char dst;
141*4882a593Smuzhiyun 	struct i2c_msg msgs[] = {
142*4882a593Smuzhiyun 		{
143*4882a593Smuzhiyun 			.addr = c->addr,
144*4882a593Smuzhiyun 			.flags = I2C_M_REV_DIR_ADDR,
145*4882a593Smuzhiyun 			.len = sizeof(reg),
146*4882a593Smuzhiyun 			.buf = &reg
147*4882a593Smuzhiyun 		},
148*4882a593Smuzhiyun 		{
149*4882a593Smuzhiyun 			.addr = c->addr,
150*4882a593Smuzhiyun 			.flags = I2C_M_RD | I2C_M_NOSTART,
151*4882a593Smuzhiyun 			.len = sizeof(dst),
152*4882a593Smuzhiyun 			.buf = &dst
153*4882a593Smuzhiyun 		}
154*4882a593Smuzhiyun 	};
155*4882a593Smuzhiyun 	s32 err;
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	err = i2c_transfer(c->adapter, msgs, 2);
158*4882a593Smuzhiyun 	if (err < 0)
159*4882a593Smuzhiyun 		printk(KERN_INFO "ReadReg(%d) failed\n", reg);
160*4882a593Smuzhiyun 	return dst & 0xFF;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun 
maven_set_reg(struct i2c_client * c,int reg,int val)163*4882a593Smuzhiyun static int maven_set_reg(struct i2c_client* c, int reg, int val) {
164*4882a593Smuzhiyun 	s32 err;
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	err = i2c_smbus_write_byte_data(c, reg, val);
167*4882a593Smuzhiyun 	if (err)
168*4882a593Smuzhiyun 		printk(KERN_INFO "WriteReg(%d) failed\n", reg);
169*4882a593Smuzhiyun 	return err;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun 
maven_set_reg_pair(struct i2c_client * c,int reg,int val)172*4882a593Smuzhiyun static int maven_set_reg_pair(struct i2c_client* c, int reg, int val) {
173*4882a593Smuzhiyun 	s32 err;
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	err = i2c_smbus_write_word_data(c, reg, val);
176*4882a593Smuzhiyun 	if (err)
177*4882a593Smuzhiyun 		printk(KERN_INFO "WriteRegPair(%d) failed\n", reg);
178*4882a593Smuzhiyun 	return err;
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun static const struct matrox_pll_features maven_pll = {
182*4882a593Smuzhiyun 	50000,
183*4882a593Smuzhiyun 	27000,
184*4882a593Smuzhiyun 	4, 127,
185*4882a593Smuzhiyun 	2, 31,
186*4882a593Smuzhiyun 	3
187*4882a593Smuzhiyun };
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun struct matrox_pll_features2 {
190*4882a593Smuzhiyun 	unsigned int	vco_freq_min;
191*4882a593Smuzhiyun 	unsigned int	vco_freq_max;
192*4882a593Smuzhiyun 	unsigned int	feed_div_min;
193*4882a593Smuzhiyun 	unsigned int	feed_div_max;
194*4882a593Smuzhiyun 	unsigned int	in_div_min;
195*4882a593Smuzhiyun 	unsigned int	in_div_max;
196*4882a593Smuzhiyun 	unsigned int	post_shift_max;
197*4882a593Smuzhiyun };
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun struct matrox_pll_ctl {
200*4882a593Smuzhiyun 	unsigned int	ref_freq;
201*4882a593Smuzhiyun 	unsigned int	den;
202*4882a593Smuzhiyun };
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun static const struct matrox_pll_features2 maven1000_pll = {
205*4882a593Smuzhiyun 	.vco_freq_min = 50000000,
206*4882a593Smuzhiyun 	.vco_freq_max = 300000000,
207*4882a593Smuzhiyun 	.feed_div_min = 5,
208*4882a593Smuzhiyun 	.feed_div_max = 128,
209*4882a593Smuzhiyun 	.in_div_min = 3,
210*4882a593Smuzhiyun 	.in_div_max = 32,
211*4882a593Smuzhiyun 	.post_shift_max = 3
212*4882a593Smuzhiyun };
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun static const struct matrox_pll_ctl maven_PAL = {
215*4882a593Smuzhiyun 	.ref_freq = 540000,
216*4882a593Smuzhiyun 	.den = 50
217*4882a593Smuzhiyun };
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun static const struct matrox_pll_ctl maven_NTSC = {
220*4882a593Smuzhiyun 	.ref_freq = 450450,	/* 27027000/60 == 27000000/59.94005994 */
221*4882a593Smuzhiyun 	.den = 60
222*4882a593Smuzhiyun };
223*4882a593Smuzhiyun 
matroxfb_PLL_mavenclock(const struct matrox_pll_features2 * pll,const struct matrox_pll_ctl * ctl,unsigned int htotal,unsigned int vtotal,unsigned int * in,unsigned int * feed,unsigned int * post,unsigned int * h2)224*4882a593Smuzhiyun static int matroxfb_PLL_mavenclock(const struct matrox_pll_features2* pll,
225*4882a593Smuzhiyun 		const struct matrox_pll_ctl* ctl,
226*4882a593Smuzhiyun 		unsigned int htotal, unsigned int vtotal,
227*4882a593Smuzhiyun 		unsigned int* in, unsigned int* feed, unsigned int* post,
228*4882a593Smuzhiyun 		unsigned int* h2) {
229*4882a593Smuzhiyun 	unsigned int besth2 = 0;
230*4882a593Smuzhiyun 	unsigned int fxtal = ctl->ref_freq;
231*4882a593Smuzhiyun 	unsigned int fmin = pll->vco_freq_min / ctl->den;
232*4882a593Smuzhiyun 	unsigned int fwant;
233*4882a593Smuzhiyun 	unsigned int p;
234*4882a593Smuzhiyun 	unsigned int scrlen;
235*4882a593Smuzhiyun 	unsigned int fmax;
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	DBG(__func__)
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	scrlen = htotal * (vtotal - 1);
240*4882a593Smuzhiyun 	fwant = htotal * vtotal;
241*4882a593Smuzhiyun 	fmax = pll->vco_freq_max / ctl->den;
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	dprintk(KERN_DEBUG "want: %u, xtal: %u, h: %u, v: %u, fmax: %u\n",
244*4882a593Smuzhiyun 		fwant, fxtal, htotal, vtotal, fmax);
245*4882a593Smuzhiyun 	for (p = 1; p <= pll->post_shift_max; p++) {
246*4882a593Smuzhiyun 		if (fwant * 2 > fmax)
247*4882a593Smuzhiyun 			break;
248*4882a593Smuzhiyun 		fwant *= 2;
249*4882a593Smuzhiyun 	}
250*4882a593Smuzhiyun 	if (fwant > fmax)
251*4882a593Smuzhiyun 		return 0;
252*4882a593Smuzhiyun 	for (; p-- > 0; fwant >>= 1) {
253*4882a593Smuzhiyun 		unsigned int m;
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 		if (fwant < fmin) break;
256*4882a593Smuzhiyun 		for (m = pll->in_div_min; m <= pll->in_div_max; m++) {
257*4882a593Smuzhiyun 			unsigned int n;
258*4882a593Smuzhiyun 			unsigned int dvd;
259*4882a593Smuzhiyun 			unsigned int ln;
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 			n = (fwant * m) / fxtal;
262*4882a593Smuzhiyun 			if (n < pll->feed_div_min)
263*4882a593Smuzhiyun 				continue;
264*4882a593Smuzhiyun 			if (n > pll->feed_div_max)
265*4882a593Smuzhiyun 				break;
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 			ln = fxtal * n;
268*4882a593Smuzhiyun 			dvd = m << p;
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 			if (ln % dvd)
271*4882a593Smuzhiyun 				continue;
272*4882a593Smuzhiyun 			ln = ln / dvd;
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 			if (ln < scrlen + 2)
275*4882a593Smuzhiyun 				continue;
276*4882a593Smuzhiyun 			ln = ln - scrlen;
277*4882a593Smuzhiyun 			if (ln > htotal)
278*4882a593Smuzhiyun 				continue;
279*4882a593Smuzhiyun 			dprintk(KERN_DEBUG "Match: %u / %u / %u / %u\n", n, m, p, ln);
280*4882a593Smuzhiyun 			if (ln > besth2) {
281*4882a593Smuzhiyun 				dprintk(KERN_DEBUG "Better...\n");
282*4882a593Smuzhiyun 				*h2 = besth2 = ln;
283*4882a593Smuzhiyun 				*post = p;
284*4882a593Smuzhiyun 				*in = m;
285*4882a593Smuzhiyun 				*feed = n;
286*4882a593Smuzhiyun 			}
287*4882a593Smuzhiyun 		}
288*4882a593Smuzhiyun 	}
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 	/* if h2/post/in/feed have not been assigned, return zero (error) */
291*4882a593Smuzhiyun 	if (besth2 < 2)
292*4882a593Smuzhiyun 		return 0;
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun 	dprintk(KERN_ERR "clk: %02X %02X %02X %d %d\n", *in, *feed, *post, fxtal, fwant);
295*4882a593Smuzhiyun 	return fxtal * (*feed) / (*in) * ctl->den;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun 
matroxfb_mavenclock(const struct matrox_pll_ctl * ctl,unsigned int htotal,unsigned int vtotal,unsigned int * in,unsigned int * feed,unsigned int * post,unsigned int * htotal2)298*4882a593Smuzhiyun static int matroxfb_mavenclock(const struct matrox_pll_ctl *ctl,
299*4882a593Smuzhiyun 		unsigned int htotal, unsigned int vtotal,
300*4882a593Smuzhiyun 		unsigned int* in, unsigned int* feed, unsigned int* post,
301*4882a593Smuzhiyun 		unsigned int* htotal2) {
302*4882a593Smuzhiyun 	unsigned int fvco;
303*4882a593Smuzhiyun 	unsigned int p;
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	fvco = matroxfb_PLL_mavenclock(&maven1000_pll, ctl, htotal, vtotal, in, feed, &p, htotal2);
306*4882a593Smuzhiyun 	if (!fvco)
307*4882a593Smuzhiyun 		return -EINVAL;
308*4882a593Smuzhiyun 	p = (1 << p) - 1;
309*4882a593Smuzhiyun 	if (fvco <= 100000000)
310*4882a593Smuzhiyun 		;
311*4882a593Smuzhiyun 	else if (fvco <= 140000000)
312*4882a593Smuzhiyun 		p |= 0x08;
313*4882a593Smuzhiyun 	else if (fvco <= 180000000)
314*4882a593Smuzhiyun 		p |= 0x10;
315*4882a593Smuzhiyun 	else
316*4882a593Smuzhiyun 		p |= 0x18;
317*4882a593Smuzhiyun 	*post = p;
318*4882a593Smuzhiyun 	return 0;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun 
DAC1064_calcclock(unsigned int freq,unsigned int fmax,unsigned int * in,unsigned int * feed,unsigned int * post)321*4882a593Smuzhiyun static void DAC1064_calcclock(unsigned int freq, unsigned int fmax,
322*4882a593Smuzhiyun 		unsigned int* in, unsigned int* feed, unsigned int* post) {
323*4882a593Smuzhiyun 	unsigned int fvco;
324*4882a593Smuzhiyun 	unsigned int p;
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	fvco = matroxfb_PLL_calcclock(&maven_pll, freq, fmax, in, feed, &p);
327*4882a593Smuzhiyun 	p = (1 << p) - 1;
328*4882a593Smuzhiyun 	if (fvco <= 100000)
329*4882a593Smuzhiyun 		;
330*4882a593Smuzhiyun 	else if (fvco <= 140000)
331*4882a593Smuzhiyun 		p |= 0x08;
332*4882a593Smuzhiyun 	else if (fvco <= 180000)
333*4882a593Smuzhiyun 		p |= 0x10;
334*4882a593Smuzhiyun 	else
335*4882a593Smuzhiyun 		p |= 0x18;
336*4882a593Smuzhiyun 	*post = p;
337*4882a593Smuzhiyun 	return;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun 
maven_compute_deflicker(const struct maven_data * md)340*4882a593Smuzhiyun static unsigned char maven_compute_deflicker (const struct maven_data* md) {
341*4882a593Smuzhiyun 	unsigned char df;
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	df = (md->version == MGATVO_B?0x40:0x00);
344*4882a593Smuzhiyun 	switch (md->primary_head->altout.tvo_params.deflicker) {
345*4882a593Smuzhiyun 		case 0:
346*4882a593Smuzhiyun /*			df |= 0x00; */
347*4882a593Smuzhiyun 			break;
348*4882a593Smuzhiyun 		case 1:
349*4882a593Smuzhiyun 			df |= 0xB1;
350*4882a593Smuzhiyun 			break;
351*4882a593Smuzhiyun 		case 2:
352*4882a593Smuzhiyun 			df |= 0xA2;
353*4882a593Smuzhiyun 			break;
354*4882a593Smuzhiyun 	}
355*4882a593Smuzhiyun 	return df;
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun 
maven_compute_bwlevel(const struct maven_data * md,int * bl,int * wl)358*4882a593Smuzhiyun static void maven_compute_bwlevel (const struct maven_data* md,
359*4882a593Smuzhiyun 				   int *bl, int *wl) {
360*4882a593Smuzhiyun 	const int b = md->primary_head->altout.tvo_params.brightness + BLMIN;
361*4882a593Smuzhiyun 	const int c = md->primary_head->altout.tvo_params.contrast;
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	*bl = max(b - c, BLMIN);
364*4882a593Smuzhiyun 	*wl = min(b + c, WLMAX);
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun 
maven_compute_gamma(const struct maven_data * md)367*4882a593Smuzhiyun static const struct maven_gamma* maven_compute_gamma (const struct maven_data* md) {
368*4882a593Smuzhiyun  	return maven_gamma + md->primary_head->altout.tvo_params.gamma;
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun 
maven_init_TVdata(const struct maven_data * md,struct mavenregs * data)372*4882a593Smuzhiyun static void maven_init_TVdata(const struct maven_data* md, struct mavenregs* data) {
373*4882a593Smuzhiyun 	static struct mavenregs palregs = { {
374*4882a593Smuzhiyun 		0x2A, 0x09, 0x8A, 0xCB,	/* 00: chroma subcarrier */
375*4882a593Smuzhiyun 		0x00,
376*4882a593Smuzhiyun 		0x00,	/* ? not written */
377*4882a593Smuzhiyun 		0x00,	/* modified by code (F9 written...) */
378*4882a593Smuzhiyun 		0x00,	/* ? not written */
379*4882a593Smuzhiyun 		0x7E,	/* 08 */
380*4882a593Smuzhiyun 		0x44,	/* 09 */
381*4882a593Smuzhiyun 		0x9C,	/* 0A */
382*4882a593Smuzhiyun 		0x2E,	/* 0B */
383*4882a593Smuzhiyun 		0x21,	/* 0C */
384*4882a593Smuzhiyun 		0x00,	/* ? not written */
385*4882a593Smuzhiyun 		0x3F, 0x03, /* 0E-0F */
386*4882a593Smuzhiyun 		0x3F, 0x03, /* 10-11 */
387*4882a593Smuzhiyun 		0x1A,	/* 12 */
388*4882a593Smuzhiyun 		0x2A,	/* 13 */
389*4882a593Smuzhiyun 		0x1C, 0x3D, 0x14, /* 14-16 */
390*4882a593Smuzhiyun 		0x9C, 0x01, /* 17-18 */
391*4882a593Smuzhiyun 		0x00,	/* 19 */
392*4882a593Smuzhiyun 		0xFE,	/* 1A */
393*4882a593Smuzhiyun 		0x7E,	/* 1B */
394*4882a593Smuzhiyun 		0x60,	/* 1C */
395*4882a593Smuzhiyun 		0x05,	/* 1D */
396*4882a593Smuzhiyun 		0x89, 0x03, /* 1E-1F */
397*4882a593Smuzhiyun 		0x72,	/* 20 */
398*4882a593Smuzhiyun 		0x07,	/* 21 */
399*4882a593Smuzhiyun 		0x72,	/* 22 */
400*4882a593Smuzhiyun 		0x00,	/* 23 */
401*4882a593Smuzhiyun 		0x00,	/* 24 */
402*4882a593Smuzhiyun 		0x00,	/* 25 */
403*4882a593Smuzhiyun 		0x08,	/* 26 */
404*4882a593Smuzhiyun 		0x04,	/* 27 */
405*4882a593Smuzhiyun 		0x00,	/* 28 */
406*4882a593Smuzhiyun 		0x1A,	/* 29 */
407*4882a593Smuzhiyun 		0x55, 0x01, /* 2A-2B */
408*4882a593Smuzhiyun 		0x26,	/* 2C */
409*4882a593Smuzhiyun 		0x07, 0x7E, /* 2D-2E */
410*4882a593Smuzhiyun 		0x02, 0x54, /* 2F-30 */
411*4882a593Smuzhiyun 		0xB0, 0x00, /* 31-32 */
412*4882a593Smuzhiyun 		0x14,	/* 33 */
413*4882a593Smuzhiyun 		0x49,	/* 34 */
414*4882a593Smuzhiyun 		0x00,	/* 35 written multiple times */
415*4882a593Smuzhiyun 		0x00,	/* 36 not written */
416*4882a593Smuzhiyun 		0xA3,	/* 37 */
417*4882a593Smuzhiyun 		0xC8,	/* 38 */
418*4882a593Smuzhiyun 		0x22,	/* 39 */
419*4882a593Smuzhiyun 		0x02,	/* 3A */
420*4882a593Smuzhiyun 		0x22,	/* 3B */
421*4882a593Smuzhiyun 		0x3F, 0x03, /* 3C-3D */
422*4882a593Smuzhiyun 		0x00,	/* 3E written multiple times */
423*4882a593Smuzhiyun 		0x00,	/* 3F not written */
424*4882a593Smuzhiyun 	}, MATROXFB_OUTPUT_MODE_PAL, 625, 50 };
425*4882a593Smuzhiyun 	static struct mavenregs ntscregs = { {
426*4882a593Smuzhiyun 		0x21, 0xF0, 0x7C, 0x1F,	/* 00: chroma subcarrier */
427*4882a593Smuzhiyun 		0x00,
428*4882a593Smuzhiyun 		0x00,	/* ? not written */
429*4882a593Smuzhiyun 		0x00,	/* modified by code (F9 written...) */
430*4882a593Smuzhiyun 		0x00,	/* ? not written */
431*4882a593Smuzhiyun 		0x7E,	/* 08 */
432*4882a593Smuzhiyun 		0x43,	/* 09 */
433*4882a593Smuzhiyun 		0x7E,	/* 0A */
434*4882a593Smuzhiyun 		0x3D,	/* 0B */
435*4882a593Smuzhiyun 		0x00,	/* 0C */
436*4882a593Smuzhiyun 		0x00,	/* ? not written */
437*4882a593Smuzhiyun 		0x41, 0x00, /* 0E-0F */
438*4882a593Smuzhiyun 		0x3C, 0x00, /* 10-11 */
439*4882a593Smuzhiyun 		0x17,	/* 12 */
440*4882a593Smuzhiyun 		0x21,	/* 13 */
441*4882a593Smuzhiyun 		0x1B, 0x1B, 0x24, /* 14-16 */
442*4882a593Smuzhiyun 		0x83, 0x01, /* 17-18 */
443*4882a593Smuzhiyun 		0x00,	/* 19 */
444*4882a593Smuzhiyun 		0x0F,	/* 1A */
445*4882a593Smuzhiyun 		0x0F,	/* 1B */
446*4882a593Smuzhiyun 		0x60,	/* 1C */
447*4882a593Smuzhiyun 		0x05,	/* 1D */
448*4882a593Smuzhiyun 		0x89, 0x02, /* 1E-1F */
449*4882a593Smuzhiyun 		0x5F,	/* 20 */
450*4882a593Smuzhiyun 		0x04,	/* 21 */
451*4882a593Smuzhiyun 		0x5F,	/* 22 */
452*4882a593Smuzhiyun 		0x01,	/* 23 */
453*4882a593Smuzhiyun 		0x02,	/* 24 */
454*4882a593Smuzhiyun 		0x00,	/* 25 */
455*4882a593Smuzhiyun 		0x0A,	/* 26 */
456*4882a593Smuzhiyun 		0x05,	/* 27 */
457*4882a593Smuzhiyun 		0x00,	/* 28 */
458*4882a593Smuzhiyun 		0x10,	/* 29 */
459*4882a593Smuzhiyun 		0xFF, 0x03, /* 2A-2B */
460*4882a593Smuzhiyun 		0x24,	/* 2C */
461*4882a593Smuzhiyun 		0x0F, 0x78, /* 2D-2E */
462*4882a593Smuzhiyun 		0x00, 0x00, /* 2F-30 */
463*4882a593Smuzhiyun 		0xB2, 0x04, /* 31-32 */
464*4882a593Smuzhiyun 		0x14,	/* 33 */
465*4882a593Smuzhiyun 		0x02,	/* 34 */
466*4882a593Smuzhiyun 		0x00,	/* 35 written multiple times */
467*4882a593Smuzhiyun 		0x00,	/* 36 not written */
468*4882a593Smuzhiyun 		0xA3,	/* 37 */
469*4882a593Smuzhiyun 		0xC8,	/* 38 */
470*4882a593Smuzhiyun 		0x15,	/* 39 */
471*4882a593Smuzhiyun 		0x05,	/* 3A */
472*4882a593Smuzhiyun 		0x3B,	/* 3B */
473*4882a593Smuzhiyun 		0x3C, 0x00, /* 3C-3D */
474*4882a593Smuzhiyun 		0x00,	/* 3E written multiple times */
475*4882a593Smuzhiyun 		0x00,	/* never written */
476*4882a593Smuzhiyun 	}, MATROXFB_OUTPUT_MODE_NTSC, 525, 60 };
477*4882a593Smuzhiyun 	struct matrox_fb_info *minfo = md->primary_head;
478*4882a593Smuzhiyun 
479*4882a593Smuzhiyun 	if (minfo->outputs[1].mode == MATROXFB_OUTPUT_MODE_PAL)
480*4882a593Smuzhiyun 		*data = palregs;
481*4882a593Smuzhiyun 	else
482*4882a593Smuzhiyun 		*data = ntscregs;
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 	/* Set deflicker */
485*4882a593Smuzhiyun 	data->regs[0x93] = maven_compute_deflicker(md);
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun 	/* set gamma */
488*4882a593Smuzhiyun 	{
489*4882a593Smuzhiyun 		const struct maven_gamma* g;
490*4882a593Smuzhiyun 		g = maven_compute_gamma(md);
491*4882a593Smuzhiyun 		data->regs[0x83] = g->reg83;
492*4882a593Smuzhiyun 		data->regs[0x84] = g->reg84;
493*4882a593Smuzhiyun 		data->regs[0x85] = g->reg85;
494*4882a593Smuzhiyun 		data->regs[0x86] = g->reg86;
495*4882a593Smuzhiyun 		data->regs[0x87] = g->reg87;
496*4882a593Smuzhiyun 		data->regs[0x88] = g->reg88;
497*4882a593Smuzhiyun 		data->regs[0x89] = g->reg89;
498*4882a593Smuzhiyun 		data->regs[0x8A] = g->reg8a;
499*4882a593Smuzhiyun 		data->regs[0x8B] = g->reg8b;
500*4882a593Smuzhiyun 	}
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun 	/* Set contrast / brightness */
503*4882a593Smuzhiyun 	{
504*4882a593Smuzhiyun 		int bl, wl;
505*4882a593Smuzhiyun 		maven_compute_bwlevel (md, &bl, &wl);
506*4882a593Smuzhiyun 		data->regs[0x0e] = bl >> 2;
507*4882a593Smuzhiyun 		data->regs[0x0f] = bl & 3;
508*4882a593Smuzhiyun 		data->regs[0x1e] = wl >> 2;
509*4882a593Smuzhiyun 		data->regs[0x1f] = wl & 3;
510*4882a593Smuzhiyun 	}
511*4882a593Smuzhiyun 
512*4882a593Smuzhiyun 	/* Set saturation */
513*4882a593Smuzhiyun 	{
514*4882a593Smuzhiyun 		data->regs[0x20] =
515*4882a593Smuzhiyun 		data->regs[0x22] = minfo->altout.tvo_params.saturation;
516*4882a593Smuzhiyun 	}
517*4882a593Smuzhiyun 
518*4882a593Smuzhiyun 	/* Set HUE */
519*4882a593Smuzhiyun 	data->regs[0x25] = minfo->altout.tvo_params.hue;
520*4882a593Smuzhiyun 	return;
521*4882a593Smuzhiyun }
522*4882a593Smuzhiyun 
523*4882a593Smuzhiyun #define LR(x) maven_set_reg(c, (x), m->regs[(x)])
524*4882a593Smuzhiyun #define LRP(x) maven_set_reg_pair(c, (x), m->regs[(x)] | (m->regs[(x)+1] << 8))
maven_init_TV(struct i2c_client * c,const struct mavenregs * m)525*4882a593Smuzhiyun static void maven_init_TV(struct i2c_client* c, const struct mavenregs* m) {
526*4882a593Smuzhiyun 	int val;
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun 
529*4882a593Smuzhiyun 	maven_set_reg(c, 0x3E, 0x01);
530*4882a593Smuzhiyun 	maven_get_reg(c, 0x82);	/* fetch oscillator state? */
531*4882a593Smuzhiyun 	maven_set_reg(c, 0x8C, 0x00);
532*4882a593Smuzhiyun 	maven_get_reg(c, 0x94);	/* get 0x82 */
533*4882a593Smuzhiyun 	maven_set_reg(c, 0x94, 0xA2);
534*4882a593Smuzhiyun 	/* xmiscctrl */
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun 	maven_set_reg_pair(c, 0x8E, 0x1EFF);
537*4882a593Smuzhiyun 	maven_set_reg(c, 0xC6, 0x01);
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun 	/* removed code... */
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun 	maven_get_reg(c, 0x06);
542*4882a593Smuzhiyun 	maven_set_reg(c, 0x06, 0xF9);	/* or read |= 0xF0 ? */
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun 	/* removed code here... */
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun 	/* real code begins here? */
547*4882a593Smuzhiyun 	/* chroma subcarrier */
548*4882a593Smuzhiyun 	LR(0x00); LR(0x01); LR(0x02); LR(0x03);
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun 	LR(0x04);
551*4882a593Smuzhiyun 
552*4882a593Smuzhiyun 	LR(0x2C);
553*4882a593Smuzhiyun 	LR(0x08);
554*4882a593Smuzhiyun 	LR(0x0A);
555*4882a593Smuzhiyun 	LR(0x09);
556*4882a593Smuzhiyun 	LR(0x29);
557*4882a593Smuzhiyun 	LRP(0x31);
558*4882a593Smuzhiyun 	LRP(0x17);
559*4882a593Smuzhiyun 	LR(0x0B);
560*4882a593Smuzhiyun 	LR(0x0C);
561*4882a593Smuzhiyun 	if (m->mode == MATROXFB_OUTPUT_MODE_PAL) {
562*4882a593Smuzhiyun 		maven_set_reg(c, 0x35, 0x10); /* ... */
563*4882a593Smuzhiyun 	} else {
564*4882a593Smuzhiyun 		maven_set_reg(c, 0x35, 0x0F); /* ... */
565*4882a593Smuzhiyun 	}
566*4882a593Smuzhiyun 
567*4882a593Smuzhiyun 	LRP(0x10);
568*4882a593Smuzhiyun 
569*4882a593Smuzhiyun 	LRP(0x0E);
570*4882a593Smuzhiyun 	LRP(0x1E);
571*4882a593Smuzhiyun 
572*4882a593Smuzhiyun 	LR(0x20);	/* saturation #1 */
573*4882a593Smuzhiyun 	LR(0x22);	/* saturation #2 */
574*4882a593Smuzhiyun 	LR(0x25);	/* hue */
575*4882a593Smuzhiyun 	LR(0x34);
576*4882a593Smuzhiyun 	LR(0x33);
577*4882a593Smuzhiyun 	LR(0x19);
578*4882a593Smuzhiyun 	LR(0x12);
579*4882a593Smuzhiyun 	LR(0x3B);
580*4882a593Smuzhiyun 	LR(0x13);
581*4882a593Smuzhiyun 	LR(0x39);
582*4882a593Smuzhiyun 	LR(0x1D);
583*4882a593Smuzhiyun 	LR(0x3A);
584*4882a593Smuzhiyun 	LR(0x24);
585*4882a593Smuzhiyun 	LR(0x14);
586*4882a593Smuzhiyun 	LR(0x15);
587*4882a593Smuzhiyun 	LR(0x16);
588*4882a593Smuzhiyun 	LRP(0x2D);
589*4882a593Smuzhiyun 	LRP(0x2F);
590*4882a593Smuzhiyun 	LR(0x1A);
591*4882a593Smuzhiyun 	LR(0x1B);
592*4882a593Smuzhiyun 	LR(0x1C);
593*4882a593Smuzhiyun 	LR(0x23);
594*4882a593Smuzhiyun 	LR(0x26);
595*4882a593Smuzhiyun 	LR(0x28);
596*4882a593Smuzhiyun 	LR(0x27);
597*4882a593Smuzhiyun 	LR(0x21);
598*4882a593Smuzhiyun 	LRP(0x2A);
599*4882a593Smuzhiyun 	if (m->mode == MATROXFB_OUTPUT_MODE_PAL)
600*4882a593Smuzhiyun 		maven_set_reg(c, 0x35, 0x1D);	/* ... */
601*4882a593Smuzhiyun 	else
602*4882a593Smuzhiyun 		maven_set_reg(c, 0x35, 0x1C);
603*4882a593Smuzhiyun 
604*4882a593Smuzhiyun 	LRP(0x3C);
605*4882a593Smuzhiyun 	LR(0x37);
606*4882a593Smuzhiyun 	LR(0x38);
607*4882a593Smuzhiyun 	maven_set_reg(c, 0xB3, 0x01);
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun 	maven_get_reg(c, 0xB0);	/* read 0x80 */
610*4882a593Smuzhiyun 	maven_set_reg(c, 0xB0, 0x08);	/* ugh... */
611*4882a593Smuzhiyun 	maven_get_reg(c, 0xB9);	/* read 0x7C */
612*4882a593Smuzhiyun 	maven_set_reg(c, 0xB9, 0x78);
613*4882a593Smuzhiyun 	maven_get_reg(c, 0xBF);	/* read 0x00 */
614*4882a593Smuzhiyun 	maven_set_reg(c, 0xBF, 0x02);
615*4882a593Smuzhiyun 	maven_get_reg(c, 0x94);	/* read 0x82 */
616*4882a593Smuzhiyun 	maven_set_reg(c, 0x94, 0xB3);
617*4882a593Smuzhiyun 
618*4882a593Smuzhiyun 	LR(0x80); /* 04 1A 91 or 05 21 91 */
619*4882a593Smuzhiyun 	LR(0x81);
620*4882a593Smuzhiyun 	LR(0x82);
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun 	maven_set_reg(c, 0x8C, 0x20);
623*4882a593Smuzhiyun 	maven_get_reg(c, 0x8D);
624*4882a593Smuzhiyun 	maven_set_reg(c, 0x8D, 0x10);
625*4882a593Smuzhiyun 
626*4882a593Smuzhiyun 	LR(0x90); /* 4D 50 52 or 4E 05 45 */
627*4882a593Smuzhiyun 	LR(0x91);
628*4882a593Smuzhiyun 	LR(0x92);
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun 	LRP(0x9A); /* 0049 or 004F */
631*4882a593Smuzhiyun 	LRP(0x9C); /* 0004 or 0004 */
632*4882a593Smuzhiyun 	LRP(0x9E); /* 0458 or 045E */
633*4882a593Smuzhiyun 	LRP(0xA0); /* 05DA or 051B */
634*4882a593Smuzhiyun 	LRP(0xA2); /* 00CC or 00CF */
635*4882a593Smuzhiyun 	LRP(0xA4); /* 007D or 007F */
636*4882a593Smuzhiyun 	LRP(0xA6); /* 007C or 007E */
637*4882a593Smuzhiyun 	LRP(0xA8); /* 03CB or 03CE */
638*4882a593Smuzhiyun 	LRP(0x98); /* 0000 or 0000 */
639*4882a593Smuzhiyun 	LRP(0xAE); /* 0044 or 003A */
640*4882a593Smuzhiyun 	LRP(0x96); /* 05DA or 051B */
641*4882a593Smuzhiyun 	LRP(0xAA); /* 04BC or 046A */
642*4882a593Smuzhiyun 	LRP(0xAC); /* 004D or 004E */
643*4882a593Smuzhiyun 
644*4882a593Smuzhiyun 	LR(0xBE);
645*4882a593Smuzhiyun 	LR(0xC2);
646*4882a593Smuzhiyun 
647*4882a593Smuzhiyun 	maven_get_reg(c, 0x8D);
648*4882a593Smuzhiyun 	maven_set_reg(c, 0x8D, 0x04);
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun 	LR(0x20);	/* saturation #1 */
651*4882a593Smuzhiyun 	LR(0x22);	/* saturation #2 */
652*4882a593Smuzhiyun 	LR(0x93);	/* whoops */
653*4882a593Smuzhiyun 	LR(0x20);	/* oh, saturation #1 again */
654*4882a593Smuzhiyun 	LR(0x22);	/* oh, saturation #2 again */
655*4882a593Smuzhiyun 	LR(0x25);	/* hue */
656*4882a593Smuzhiyun 	LRP(0x0E);
657*4882a593Smuzhiyun 	LRP(0x1E);
658*4882a593Smuzhiyun 	LRP(0x0E);	/* problems with memory? */
659*4882a593Smuzhiyun 	LRP(0x1E);	/* yes, matrox must have problems in memory area... */
660*4882a593Smuzhiyun 
661*4882a593Smuzhiyun 	/* load gamma correction stuff */
662*4882a593Smuzhiyun 	LR(0x83);
663*4882a593Smuzhiyun 	LR(0x84);
664*4882a593Smuzhiyun 	LR(0x85);
665*4882a593Smuzhiyun 	LR(0x86);
666*4882a593Smuzhiyun 	LR(0x87);
667*4882a593Smuzhiyun 	LR(0x88);
668*4882a593Smuzhiyun 	LR(0x89);
669*4882a593Smuzhiyun 	LR(0x8A);
670*4882a593Smuzhiyun 	LR(0x8B);
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun 	val = maven_get_reg(c, 0x8D);
673*4882a593Smuzhiyun 	val &= 0x14;			/* 0x10 or anything ored with it */
674*4882a593Smuzhiyun 	maven_set_reg(c, 0x8D, val);
675*4882a593Smuzhiyun 
676*4882a593Smuzhiyun 	LR(0x33);
677*4882a593Smuzhiyun 	LR(0x19);
678*4882a593Smuzhiyun 	LR(0x12);
679*4882a593Smuzhiyun 	LR(0x3B);
680*4882a593Smuzhiyun 	LR(0x13);
681*4882a593Smuzhiyun 	LR(0x39);
682*4882a593Smuzhiyun 	LR(0x1D);
683*4882a593Smuzhiyun 	LR(0x3A);
684*4882a593Smuzhiyun 	LR(0x24);
685*4882a593Smuzhiyun 	LR(0x14);
686*4882a593Smuzhiyun 	LR(0x15);
687*4882a593Smuzhiyun 	LR(0x16);
688*4882a593Smuzhiyun 	LRP(0x2D);
689*4882a593Smuzhiyun 	LRP(0x2F);
690*4882a593Smuzhiyun 	LR(0x1A);
691*4882a593Smuzhiyun 	LR(0x1B);
692*4882a593Smuzhiyun 	LR(0x1C);
693*4882a593Smuzhiyun 	LR(0x23);
694*4882a593Smuzhiyun 	LR(0x26);
695*4882a593Smuzhiyun 	LR(0x28);
696*4882a593Smuzhiyun 	LR(0x27);
697*4882a593Smuzhiyun 	LR(0x21);
698*4882a593Smuzhiyun 	LRP(0x2A);
699*4882a593Smuzhiyun 	if (m->mode == MATROXFB_OUTPUT_MODE_PAL)
700*4882a593Smuzhiyun 		maven_set_reg(c, 0x35, 0x1D);
701*4882a593Smuzhiyun 	else
702*4882a593Smuzhiyun 		maven_set_reg(c, 0x35, 0x1C);
703*4882a593Smuzhiyun 	LRP(0x3C);
704*4882a593Smuzhiyun 	LR(0x37);
705*4882a593Smuzhiyun 	LR(0x38);
706*4882a593Smuzhiyun 
707*4882a593Smuzhiyun 	maven_get_reg(c, 0xB0);
708*4882a593Smuzhiyun 	LR(0xB0);	/* output mode */
709*4882a593Smuzhiyun 	LR(0x90);
710*4882a593Smuzhiyun 	LR(0xBE);
711*4882a593Smuzhiyun 	LR(0xC2);
712*4882a593Smuzhiyun 
713*4882a593Smuzhiyun 	LRP(0x9A);
714*4882a593Smuzhiyun 	LRP(0xA2);
715*4882a593Smuzhiyun 	LRP(0x9E);
716*4882a593Smuzhiyun 	LRP(0xA6);
717*4882a593Smuzhiyun 	LRP(0xAA);
718*4882a593Smuzhiyun 	LRP(0xAC);
719*4882a593Smuzhiyun 	maven_set_reg(c, 0x3E, 0x00);
720*4882a593Smuzhiyun 	maven_set_reg(c, 0x95, 0x20);
721*4882a593Smuzhiyun }
722*4882a593Smuzhiyun 
maven_find_exact_clocks(unsigned int ht,unsigned int vt,struct mavenregs * m)723*4882a593Smuzhiyun static int maven_find_exact_clocks(unsigned int ht, unsigned int vt,
724*4882a593Smuzhiyun 		struct mavenregs* m) {
725*4882a593Smuzhiyun 	unsigned int x;
726*4882a593Smuzhiyun 	unsigned int err = ~0;
727*4882a593Smuzhiyun 
728*4882a593Smuzhiyun 	/* 1:1 */
729*4882a593Smuzhiyun 	m->regs[0x80] = 0x0F;
730*4882a593Smuzhiyun 	m->regs[0x81] = 0x07;
731*4882a593Smuzhiyun 	m->regs[0x82] = 0x81;
732*4882a593Smuzhiyun 
733*4882a593Smuzhiyun 	for (x = 0; x < 8; x++) {
734*4882a593Smuzhiyun 		unsigned int c;
735*4882a593Smuzhiyun 		unsigned int a, b,
736*4882a593Smuzhiyun 			     h2;
737*4882a593Smuzhiyun 		unsigned int h = ht + 2 + x;
738*4882a593Smuzhiyun 
739*4882a593Smuzhiyun 		if (!matroxfb_mavenclock((m->mode == MATROXFB_OUTPUT_MODE_PAL) ? &maven_PAL : &maven_NTSC, h, vt, &a, &b, &c, &h2)) {
740*4882a593Smuzhiyun 			unsigned int diff = h - h2;
741*4882a593Smuzhiyun 
742*4882a593Smuzhiyun 			if (diff < err) {
743*4882a593Smuzhiyun 				err = diff;
744*4882a593Smuzhiyun 				m->regs[0x80] = a - 1;
745*4882a593Smuzhiyun 				m->regs[0x81] = b - 1;
746*4882a593Smuzhiyun 				m->regs[0x82] = c | 0x80;
747*4882a593Smuzhiyun 				m->hcorr = h2 - 2;
748*4882a593Smuzhiyun 				m->htotal = h - 2;
749*4882a593Smuzhiyun 			}
750*4882a593Smuzhiyun 		}
751*4882a593Smuzhiyun 	}
752*4882a593Smuzhiyun 	return err != ~0U;
753*4882a593Smuzhiyun }
754*4882a593Smuzhiyun 
maven_compute_timming(struct maven_data * md,struct my_timming * mt,struct mavenregs * m)755*4882a593Smuzhiyun static inline int maven_compute_timming(struct maven_data* md,
756*4882a593Smuzhiyun 		struct my_timming* mt,
757*4882a593Smuzhiyun 		struct mavenregs* m) {
758*4882a593Smuzhiyun 	unsigned int tmpi;
759*4882a593Smuzhiyun 	unsigned int a, bv, c;
760*4882a593Smuzhiyun 	struct matrox_fb_info *minfo = md->primary_head;
761*4882a593Smuzhiyun 
762*4882a593Smuzhiyun 	m->mode = minfo->outputs[1].mode;
763*4882a593Smuzhiyun 	if (m->mode != MATROXFB_OUTPUT_MODE_MONITOR) {
764*4882a593Smuzhiyun 		unsigned int lmargin;
765*4882a593Smuzhiyun 		unsigned int umargin;
766*4882a593Smuzhiyun 		unsigned int vslen;
767*4882a593Smuzhiyun 		unsigned int hcrt;
768*4882a593Smuzhiyun 		unsigned int slen;
769*4882a593Smuzhiyun 
770*4882a593Smuzhiyun 		maven_init_TVdata(md, m);
771*4882a593Smuzhiyun 
772*4882a593Smuzhiyun 		if (maven_find_exact_clocks(mt->HTotal, mt->VTotal, m) == 0)
773*4882a593Smuzhiyun 			return -EINVAL;
774*4882a593Smuzhiyun 
775*4882a593Smuzhiyun 		lmargin = mt->HTotal - mt->HSyncEnd;
776*4882a593Smuzhiyun 		slen = mt->HSyncEnd - mt->HSyncStart;
777*4882a593Smuzhiyun 		hcrt = mt->HTotal - slen - mt->delay;
778*4882a593Smuzhiyun 		umargin = mt->VTotal - mt->VSyncEnd;
779*4882a593Smuzhiyun 		vslen = mt->VSyncEnd - mt->VSyncStart;
780*4882a593Smuzhiyun 
781*4882a593Smuzhiyun 		if (m->hcorr < mt->HTotal)
782*4882a593Smuzhiyun 			hcrt += m->hcorr;
783*4882a593Smuzhiyun 		if (hcrt > mt->HTotal)
784*4882a593Smuzhiyun 			hcrt -= mt->HTotal;
785*4882a593Smuzhiyun 		if (hcrt + 2 > mt->HTotal)
786*4882a593Smuzhiyun 			hcrt = 0;	/* or issue warning? */
787*4882a593Smuzhiyun 
788*4882a593Smuzhiyun 		/* last (first? middle?) line in picture can have different length */
789*4882a593Smuzhiyun 		/* hlen - 2 */
790*4882a593Smuzhiyun 		m->regs[0x96] = m->hcorr;
791*4882a593Smuzhiyun 		m->regs[0x97] = m->hcorr >> 8;
792*4882a593Smuzhiyun 		/* ... */
793*4882a593Smuzhiyun 		m->regs[0x98] = 0x00; m->regs[0x99] = 0x00;
794*4882a593Smuzhiyun 		/* hblanking end */
795*4882a593Smuzhiyun 		m->regs[0x9A] = lmargin;	/* 100% */
796*4882a593Smuzhiyun 		m->regs[0x9B] = lmargin >> 8;	/* 100% */
797*4882a593Smuzhiyun 		/* who knows */
798*4882a593Smuzhiyun 		m->regs[0x9C] = 0x04;
799*4882a593Smuzhiyun 		m->regs[0x9D] = 0x00;
800*4882a593Smuzhiyun 		/* htotal - 2 */
801*4882a593Smuzhiyun 		m->regs[0xA0] = m->htotal;
802*4882a593Smuzhiyun 		m->regs[0xA1] = m->htotal >> 8;
803*4882a593Smuzhiyun 		/* vblanking end */
804*4882a593Smuzhiyun 		m->regs[0xA2] = mt->VTotal - mt->VSyncStart - 1;	/* stop vblanking */
805*4882a593Smuzhiyun 		m->regs[0xA3] = (mt->VTotal - mt->VSyncStart - 1) >> 8;
806*4882a593Smuzhiyun 		/* something end... [A6]+1..[A8] */
807*4882a593Smuzhiyun 		if (md->version == MGATVO_B) {
808*4882a593Smuzhiyun 			m->regs[0xA4] = 0x04;
809*4882a593Smuzhiyun 			m->regs[0xA5] = 0x00;
810*4882a593Smuzhiyun 		} else {
811*4882a593Smuzhiyun 			m->regs[0xA4] = 0x01;
812*4882a593Smuzhiyun 			m->regs[0xA5] = 0x00;
813*4882a593Smuzhiyun 		}
814*4882a593Smuzhiyun 		/* something start... 0..[A4]-1 */
815*4882a593Smuzhiyun 		m->regs[0xA6] = 0x00;
816*4882a593Smuzhiyun 		m->regs[0xA7] = 0x00;
817*4882a593Smuzhiyun 		/* vertical line count - 1 */
818*4882a593Smuzhiyun 		m->regs[0xA8] = mt->VTotal - 1;
819*4882a593Smuzhiyun 		m->regs[0xA9] = (mt->VTotal - 1) >> 8;
820*4882a593Smuzhiyun 		/* horizontal vidrst pos */
821*4882a593Smuzhiyun 		m->regs[0xAA] = hcrt;		/* 0 <= hcrt <= htotal - 2 */
822*4882a593Smuzhiyun 		m->regs[0xAB] = hcrt >> 8;
823*4882a593Smuzhiyun 		/* vertical vidrst pos */
824*4882a593Smuzhiyun 		m->regs[0xAC] = mt->VTotal - 2;
825*4882a593Smuzhiyun 		m->regs[0xAD] = (mt->VTotal - 2) >> 8;
826*4882a593Smuzhiyun 		/* moves picture up/down and so on... */
827*4882a593Smuzhiyun 		m->regs[0xAE] = 0x01; /* Fix this... 0..VTotal */
828*4882a593Smuzhiyun 		m->regs[0xAF] = 0x00;
829*4882a593Smuzhiyun 		{
830*4882a593Smuzhiyun 			int hdec;
831*4882a593Smuzhiyun 			int hlen;
832*4882a593Smuzhiyun 			unsigned int ibmin = 4 + lmargin + mt->HDisplay;
833*4882a593Smuzhiyun 			unsigned int ib;
834*4882a593Smuzhiyun 			int i;
835*4882a593Smuzhiyun 
836*4882a593Smuzhiyun 			/* Verify! */
837*4882a593Smuzhiyun 			/* Where 94208 came from? */
838*4882a593Smuzhiyun 			if (mt->HTotal)
839*4882a593Smuzhiyun 				hdec = 94208 / (mt->HTotal);
840*4882a593Smuzhiyun 			else
841*4882a593Smuzhiyun 				hdec = 0x81;
842*4882a593Smuzhiyun 			if (hdec > 0x81)
843*4882a593Smuzhiyun 				hdec = 0x81;
844*4882a593Smuzhiyun 			if (hdec < 0x41)
845*4882a593Smuzhiyun 				hdec = 0x41;
846*4882a593Smuzhiyun 			hdec--;
847*4882a593Smuzhiyun 			hlen = 98304 - 128 - ((lmargin + mt->HDisplay - 8) * hdec);
848*4882a593Smuzhiyun 			if (hlen < 0)
849*4882a593Smuzhiyun 				hlen = 0;
850*4882a593Smuzhiyun 			hlen = hlen >> 8;
851*4882a593Smuzhiyun 			if (hlen > 0xFF)
852*4882a593Smuzhiyun 				hlen = 0xFF;
853*4882a593Smuzhiyun 			/* Now we have to compute input buffer length.
854*4882a593Smuzhiyun 			   If you want any picture, it must be between
855*4882a593Smuzhiyun 			     4 + lmargin + xres
856*4882a593Smuzhiyun 			   and
857*4882a593Smuzhiyun 			     94208 / hdec
858*4882a593Smuzhiyun 			   If you want perfect picture even on the top
859*4882a593Smuzhiyun 			   of screen, it must be also
860*4882a593Smuzhiyun 			     0x3C0000 * i / hdec + Q - R / hdec
861*4882a593Smuzhiyun 			   where
862*4882a593Smuzhiyun 			        R      Qmin   Qmax
863*4882a593Smuzhiyun 			     0x07000   0x5AE  0x5BF
864*4882a593Smuzhiyun 			     0x08000   0x5CF  0x5FF
865*4882a593Smuzhiyun 			     0x0C000   0x653  0x67F
866*4882a593Smuzhiyun 			     0x10000   0x6F8  0x6FF
867*4882a593Smuzhiyun 			 */
868*4882a593Smuzhiyun 			i = 1;
869*4882a593Smuzhiyun 			do {
870*4882a593Smuzhiyun 				ib = ((0x3C0000 * i - 0x8000)/ hdec + 0x05E7) >> 8;
871*4882a593Smuzhiyun 				i++;
872*4882a593Smuzhiyun 			} while (ib < ibmin);
873*4882a593Smuzhiyun 			if (ib >= m->htotal + 2) {
874*4882a593Smuzhiyun 				ib = ibmin;
875*4882a593Smuzhiyun 			}
876*4882a593Smuzhiyun 
877*4882a593Smuzhiyun 			m->regs[0x90] = hdec;	/* < 0x40 || > 0x80 is bad... 0x80 is questionable */
878*4882a593Smuzhiyun 			m->regs[0xC2] = hlen;
879*4882a593Smuzhiyun 			/* 'valid' input line length */
880*4882a593Smuzhiyun 			m->regs[0x9E] = ib;
881*4882a593Smuzhiyun 			m->regs[0x9F] = ib >> 8;
882*4882a593Smuzhiyun 		}
883*4882a593Smuzhiyun 		{
884*4882a593Smuzhiyun 			int vdec;
885*4882a593Smuzhiyun 			int vlen;
886*4882a593Smuzhiyun 
887*4882a593Smuzhiyun #define MATROX_USE64BIT_DIVIDE
888*4882a593Smuzhiyun 			if (mt->VTotal) {
889*4882a593Smuzhiyun #ifdef MATROX_USE64BIT_DIVIDE
890*4882a593Smuzhiyun 				u64 f1;
891*4882a593Smuzhiyun 				u32 a;
892*4882a593Smuzhiyun 				u32 b;
893*4882a593Smuzhiyun 
894*4882a593Smuzhiyun 				a = m->vlines * (m->htotal + 2);
895*4882a593Smuzhiyun 				b = (mt->VTotal - 1) * (m->htotal + 2) + m->hcorr + 2;
896*4882a593Smuzhiyun 
897*4882a593Smuzhiyun 				f1 = ((u64)a) << 15;	/* *32768 */
898*4882a593Smuzhiyun 				do_div(f1, b);
899*4882a593Smuzhiyun 				vdec = f1;
900*4882a593Smuzhiyun #else
901*4882a593Smuzhiyun 				vdec = m->vlines * 32768 / mt->VTotal;
902*4882a593Smuzhiyun #endif
903*4882a593Smuzhiyun 			} else
904*4882a593Smuzhiyun 				vdec = 0x8000;
905*4882a593Smuzhiyun 			if (vdec > 0x8000)
906*4882a593Smuzhiyun 				vdec = 0x8000;
907*4882a593Smuzhiyun 			vlen = (vslen + umargin + mt->VDisplay) * vdec;
908*4882a593Smuzhiyun 			vlen = (vlen >> 16) - 146; /* FIXME: 146?! */
909*4882a593Smuzhiyun 			if (vlen < 0)
910*4882a593Smuzhiyun 				vlen = 0;
911*4882a593Smuzhiyun 			if (vlen > 0xFF)
912*4882a593Smuzhiyun 				vlen = 0xFF;
913*4882a593Smuzhiyun 			vdec--;
914*4882a593Smuzhiyun 			m->regs[0x91] = vdec;
915*4882a593Smuzhiyun 			m->regs[0x92] = vdec >> 8;
916*4882a593Smuzhiyun 			m->regs[0xBE] = vlen;
917*4882a593Smuzhiyun 		}
918*4882a593Smuzhiyun 		m->regs[0xB0] = 0x08;	/* output: SVideo/Composite */
919*4882a593Smuzhiyun 		return 0;
920*4882a593Smuzhiyun 	}
921*4882a593Smuzhiyun 
922*4882a593Smuzhiyun 	DAC1064_calcclock(mt->pixclock, 450000, &a, &bv, &c);
923*4882a593Smuzhiyun 	m->regs[0x80] = a;
924*4882a593Smuzhiyun 	m->regs[0x81] = bv;
925*4882a593Smuzhiyun 	m->regs[0x82] = c | 0x80;
926*4882a593Smuzhiyun 
927*4882a593Smuzhiyun 	m->regs[0xB3] = 0x01;
928*4882a593Smuzhiyun 	m->regs[0x94] = 0xB2;
929*4882a593Smuzhiyun 
930*4882a593Smuzhiyun 	/* htotal... */
931*4882a593Smuzhiyun 	m->regs[0x96] = mt->HTotal;
932*4882a593Smuzhiyun 	m->regs[0x97] = mt->HTotal >> 8;
933*4882a593Smuzhiyun 	/* ?? */
934*4882a593Smuzhiyun 	m->regs[0x98] = 0x00;
935*4882a593Smuzhiyun 	m->regs[0x99] = 0x00;
936*4882a593Smuzhiyun 	/* hsync len */
937*4882a593Smuzhiyun 	tmpi = mt->HSyncEnd - mt->HSyncStart;
938*4882a593Smuzhiyun 	m->regs[0x9A] = tmpi;
939*4882a593Smuzhiyun 	m->regs[0x9B] = tmpi >> 8;
940*4882a593Smuzhiyun 	/* hblank end */
941*4882a593Smuzhiyun 	tmpi = mt->HTotal - mt->HSyncStart;
942*4882a593Smuzhiyun 	m->regs[0x9C] = tmpi;
943*4882a593Smuzhiyun 	m->regs[0x9D] = tmpi >> 8;
944*4882a593Smuzhiyun 	/* hblank start */
945*4882a593Smuzhiyun 	tmpi += mt->HDisplay;
946*4882a593Smuzhiyun 	m->regs[0x9E] = tmpi;
947*4882a593Smuzhiyun 	m->regs[0x9F] = tmpi >> 8;
948*4882a593Smuzhiyun 	/* htotal + 1 */
949*4882a593Smuzhiyun 	tmpi = mt->HTotal + 1;
950*4882a593Smuzhiyun 	m->regs[0xA0] = tmpi;
951*4882a593Smuzhiyun 	m->regs[0xA1] = tmpi >> 8;
952*4882a593Smuzhiyun 	/* vsync?! */
953*4882a593Smuzhiyun 	tmpi = mt->VSyncEnd - mt->VSyncStart - 1;
954*4882a593Smuzhiyun 	m->regs[0xA2] = tmpi;
955*4882a593Smuzhiyun 	m->regs[0xA3] = tmpi >> 8;
956*4882a593Smuzhiyun 	/* ignored? */
957*4882a593Smuzhiyun 	tmpi = mt->VTotal - mt->VSyncStart;
958*4882a593Smuzhiyun 	m->regs[0xA4] = tmpi;
959*4882a593Smuzhiyun 	m->regs[0xA5] = tmpi >> 8;
960*4882a593Smuzhiyun 	/* ignored? */
961*4882a593Smuzhiyun 	tmpi = mt->VTotal - 1;
962*4882a593Smuzhiyun 	m->regs[0xA6] = tmpi;
963*4882a593Smuzhiyun 	m->regs[0xA7] = tmpi >> 8;
964*4882a593Smuzhiyun 	/* vtotal - 1 */
965*4882a593Smuzhiyun 	m->regs[0xA8] = tmpi;
966*4882a593Smuzhiyun 	m->regs[0xA9] = tmpi >> 8;
967*4882a593Smuzhiyun 	/* hor vidrst */
968*4882a593Smuzhiyun 	tmpi = mt->HTotal - mt->delay;
969*4882a593Smuzhiyun 	m->regs[0xAA] = tmpi;
970*4882a593Smuzhiyun 	m->regs[0xAB] = tmpi >> 8;
971*4882a593Smuzhiyun 	/* vert vidrst */
972*4882a593Smuzhiyun 	tmpi = mt->VTotal - 2;
973*4882a593Smuzhiyun 	m->regs[0xAC] = tmpi;
974*4882a593Smuzhiyun 	m->regs[0xAD] = tmpi >> 8;
975*4882a593Smuzhiyun 	/* ignored? */
976*4882a593Smuzhiyun 	m->regs[0xAE] = 0x00;
977*4882a593Smuzhiyun 	m->regs[0xAF] = 0x00;
978*4882a593Smuzhiyun 
979*4882a593Smuzhiyun 	m->regs[0xB0] = 0x03;	/* output: monitor */
980*4882a593Smuzhiyun 	m->regs[0xB1] = 0xA0;	/* ??? */
981*4882a593Smuzhiyun 	m->regs[0x8C] = 0x20;	/* must be set... */
982*4882a593Smuzhiyun 	m->regs[0x8D] = 0x04;	/* defaults to 0x10: test signal */
983*4882a593Smuzhiyun 	m->regs[0xB9] = 0x1A;	/* defaults to 0x2C: too bright */
984*4882a593Smuzhiyun 	m->regs[0xBF] = 0x22;	/* makes picture stable */
985*4882a593Smuzhiyun 
986*4882a593Smuzhiyun 	return 0;
987*4882a593Smuzhiyun }
988*4882a593Smuzhiyun 
maven_program_timming(struct maven_data * md,const struct mavenregs * m)989*4882a593Smuzhiyun static int maven_program_timming(struct maven_data* md,
990*4882a593Smuzhiyun 		const struct mavenregs* m) {
991*4882a593Smuzhiyun 	struct i2c_client *c = md->client;
992*4882a593Smuzhiyun 
993*4882a593Smuzhiyun 	if (m->mode == MATROXFB_OUTPUT_MODE_MONITOR) {
994*4882a593Smuzhiyun 		LR(0x80);
995*4882a593Smuzhiyun 		LR(0x81);
996*4882a593Smuzhiyun 		LR(0x82);
997*4882a593Smuzhiyun 
998*4882a593Smuzhiyun 		LR(0xB3);
999*4882a593Smuzhiyun 		LR(0x94);
1000*4882a593Smuzhiyun 
1001*4882a593Smuzhiyun 		LRP(0x96);
1002*4882a593Smuzhiyun 		LRP(0x98);
1003*4882a593Smuzhiyun 		LRP(0x9A);
1004*4882a593Smuzhiyun 		LRP(0x9C);
1005*4882a593Smuzhiyun 		LRP(0x9E);
1006*4882a593Smuzhiyun 		LRP(0xA0);
1007*4882a593Smuzhiyun 		LRP(0xA2);
1008*4882a593Smuzhiyun 		LRP(0xA4);
1009*4882a593Smuzhiyun 		LRP(0xA6);
1010*4882a593Smuzhiyun 		LRP(0xA8);
1011*4882a593Smuzhiyun 		LRP(0xAA);
1012*4882a593Smuzhiyun 		LRP(0xAC);
1013*4882a593Smuzhiyun 		LRP(0xAE);
1014*4882a593Smuzhiyun 
1015*4882a593Smuzhiyun 		LR(0xB0);	/* output: monitor */
1016*4882a593Smuzhiyun 		LR(0xB1);	/* ??? */
1017*4882a593Smuzhiyun 		LR(0x8C);	/* must be set... */
1018*4882a593Smuzhiyun 		LR(0x8D);	/* defaults to 0x10: test signal */
1019*4882a593Smuzhiyun 		LR(0xB9);	/* defaults to 0x2C: too bright */
1020*4882a593Smuzhiyun 		LR(0xBF);	/* makes picture stable */
1021*4882a593Smuzhiyun 	} else {
1022*4882a593Smuzhiyun 		maven_init_TV(c, m);
1023*4882a593Smuzhiyun 	}
1024*4882a593Smuzhiyun 	return 0;
1025*4882a593Smuzhiyun }
1026*4882a593Smuzhiyun 
maven_resync(struct maven_data * md)1027*4882a593Smuzhiyun static inline int maven_resync(struct maven_data* md) {
1028*4882a593Smuzhiyun 	struct i2c_client *c = md->client;
1029*4882a593Smuzhiyun 	maven_set_reg(c, 0x95, 0x20);	/* start whole thing */
1030*4882a593Smuzhiyun 	return 0;
1031*4882a593Smuzhiyun }
1032*4882a593Smuzhiyun 
maven_get_queryctrl(struct maven_data * md,struct v4l2_queryctrl * p)1033*4882a593Smuzhiyun static int maven_get_queryctrl (struct maven_data* md,
1034*4882a593Smuzhiyun 				struct v4l2_queryctrl *p) {
1035*4882a593Smuzhiyun 	int i;
1036*4882a593Smuzhiyun 
1037*4882a593Smuzhiyun 	i = get_ctrl_id(p->id);
1038*4882a593Smuzhiyun 	if (i >= 0) {
1039*4882a593Smuzhiyun 		*p = maven_controls[i].desc;
1040*4882a593Smuzhiyun 		return 0;
1041*4882a593Smuzhiyun 	}
1042*4882a593Smuzhiyun 	if (i == -ENOENT) {
1043*4882a593Smuzhiyun 		static const struct v4l2_queryctrl disctrl =
1044*4882a593Smuzhiyun 			{ .flags = V4L2_CTRL_FLAG_DISABLED };
1045*4882a593Smuzhiyun 
1046*4882a593Smuzhiyun 		i = p->id;
1047*4882a593Smuzhiyun 		*p = disctrl;
1048*4882a593Smuzhiyun 		p->id = i;
1049*4882a593Smuzhiyun 		sprintf(p->name, "Ctrl #%08X", i);
1050*4882a593Smuzhiyun 		return 0;
1051*4882a593Smuzhiyun 	}
1052*4882a593Smuzhiyun 	return -EINVAL;
1053*4882a593Smuzhiyun }
1054*4882a593Smuzhiyun 
maven_set_control(struct maven_data * md,struct v4l2_control * p)1055*4882a593Smuzhiyun static int maven_set_control (struct maven_data* md,
1056*4882a593Smuzhiyun 			      struct v4l2_control *p) {
1057*4882a593Smuzhiyun 	int i;
1058*4882a593Smuzhiyun 
1059*4882a593Smuzhiyun 	i = get_ctrl_id(p->id);
1060*4882a593Smuzhiyun 	if (i < 0) return -EINVAL;
1061*4882a593Smuzhiyun 
1062*4882a593Smuzhiyun 	/*
1063*4882a593Smuzhiyun 	 * Check if changed.
1064*4882a593Smuzhiyun 	 */
1065*4882a593Smuzhiyun 	if (p->value == *get_ctrl_ptr(md, i)) return 0;
1066*4882a593Smuzhiyun 
1067*4882a593Smuzhiyun 	/*
1068*4882a593Smuzhiyun 	 * Check limits.
1069*4882a593Smuzhiyun 	 */
1070*4882a593Smuzhiyun 	if (p->value > maven_controls[i].desc.maximum) return -EINVAL;
1071*4882a593Smuzhiyun 	if (p->value < maven_controls[i].desc.minimum) return -EINVAL;
1072*4882a593Smuzhiyun 
1073*4882a593Smuzhiyun 	/*
1074*4882a593Smuzhiyun 	 * Store new value.
1075*4882a593Smuzhiyun 	 */
1076*4882a593Smuzhiyun 	*get_ctrl_ptr(md, i) = p->value;
1077*4882a593Smuzhiyun 
1078*4882a593Smuzhiyun 	switch (p->id) {
1079*4882a593Smuzhiyun 		case V4L2_CID_BRIGHTNESS:
1080*4882a593Smuzhiyun 		case V4L2_CID_CONTRAST:
1081*4882a593Smuzhiyun 		{
1082*4882a593Smuzhiyun 		  int blacklevel, whitelevel;
1083*4882a593Smuzhiyun 		  maven_compute_bwlevel(md, &blacklevel, &whitelevel);
1084*4882a593Smuzhiyun 		  blacklevel = (blacklevel >> 2) | ((blacklevel & 3) << 8);
1085*4882a593Smuzhiyun 		  whitelevel = (whitelevel >> 2) | ((whitelevel & 3) << 8);
1086*4882a593Smuzhiyun 		  maven_set_reg_pair(md->client, 0x0e, blacklevel);
1087*4882a593Smuzhiyun 		  maven_set_reg_pair(md->client, 0x1e, whitelevel);
1088*4882a593Smuzhiyun 		}
1089*4882a593Smuzhiyun 		break;
1090*4882a593Smuzhiyun 		case V4L2_CID_SATURATION:
1091*4882a593Smuzhiyun 		{
1092*4882a593Smuzhiyun 		  maven_set_reg(md->client, 0x20, p->value);
1093*4882a593Smuzhiyun 		  maven_set_reg(md->client, 0x22, p->value);
1094*4882a593Smuzhiyun 		}
1095*4882a593Smuzhiyun 		break;
1096*4882a593Smuzhiyun 		case V4L2_CID_HUE:
1097*4882a593Smuzhiyun 		{
1098*4882a593Smuzhiyun 		  maven_set_reg(md->client, 0x25, p->value);
1099*4882a593Smuzhiyun 		}
1100*4882a593Smuzhiyun 		break;
1101*4882a593Smuzhiyun 		case V4L2_CID_GAMMA:
1102*4882a593Smuzhiyun 		{
1103*4882a593Smuzhiyun 		  const struct maven_gamma* g;
1104*4882a593Smuzhiyun 		  g = maven_compute_gamma(md);
1105*4882a593Smuzhiyun 		  maven_set_reg(md->client, 0x83, g->reg83);
1106*4882a593Smuzhiyun 		  maven_set_reg(md->client, 0x84, g->reg84);
1107*4882a593Smuzhiyun 		  maven_set_reg(md->client, 0x85, g->reg85);
1108*4882a593Smuzhiyun 		  maven_set_reg(md->client, 0x86, g->reg86);
1109*4882a593Smuzhiyun 		  maven_set_reg(md->client, 0x87, g->reg87);
1110*4882a593Smuzhiyun 		  maven_set_reg(md->client, 0x88, g->reg88);
1111*4882a593Smuzhiyun 		  maven_set_reg(md->client, 0x89, g->reg89);
1112*4882a593Smuzhiyun 		  maven_set_reg(md->client, 0x8a, g->reg8a);
1113*4882a593Smuzhiyun 		  maven_set_reg(md->client, 0x8b, g->reg8b);
1114*4882a593Smuzhiyun 		}
1115*4882a593Smuzhiyun 		break;
1116*4882a593Smuzhiyun 		case MATROXFB_CID_TESTOUT:
1117*4882a593Smuzhiyun 		{
1118*4882a593Smuzhiyun 			unsigned char val
1119*4882a593Smuzhiyun 			  = maven_get_reg(md->client, 0x8d);
1120*4882a593Smuzhiyun 			if (p->value) val |= 0x10;
1121*4882a593Smuzhiyun 			else          val &= ~0x10;
1122*4882a593Smuzhiyun 			maven_set_reg(md->client, 0x8d, val);
1123*4882a593Smuzhiyun 		}
1124*4882a593Smuzhiyun 		break;
1125*4882a593Smuzhiyun 		case MATROXFB_CID_DEFLICKER:
1126*4882a593Smuzhiyun 		{
1127*4882a593Smuzhiyun 		  maven_set_reg(md->client, 0x93, maven_compute_deflicker(md));
1128*4882a593Smuzhiyun 		}
1129*4882a593Smuzhiyun 		break;
1130*4882a593Smuzhiyun 	}
1131*4882a593Smuzhiyun 
1132*4882a593Smuzhiyun 
1133*4882a593Smuzhiyun 	return 0;
1134*4882a593Smuzhiyun }
1135*4882a593Smuzhiyun 
maven_get_control(struct maven_data * md,struct v4l2_control * p)1136*4882a593Smuzhiyun static int maven_get_control (struct maven_data* md,
1137*4882a593Smuzhiyun 			      struct v4l2_control *p) {
1138*4882a593Smuzhiyun 	int i;
1139*4882a593Smuzhiyun 
1140*4882a593Smuzhiyun 	i = get_ctrl_id(p->id);
1141*4882a593Smuzhiyun 	if (i < 0) return -EINVAL;
1142*4882a593Smuzhiyun 	p->value = *get_ctrl_ptr(md, i);
1143*4882a593Smuzhiyun 	return 0;
1144*4882a593Smuzhiyun }
1145*4882a593Smuzhiyun 
1146*4882a593Smuzhiyun /******************************************************/
1147*4882a593Smuzhiyun 
maven_out_compute(void * md,struct my_timming * mt)1148*4882a593Smuzhiyun static int maven_out_compute(void* md, struct my_timming* mt) {
1149*4882a593Smuzhiyun #define mdinfo ((struct maven_data*)md)
1150*4882a593Smuzhiyun #define minfo (mdinfo->primary_head)
1151*4882a593Smuzhiyun 	return maven_compute_timming(md, mt, &minfo->hw.maven);
1152*4882a593Smuzhiyun #undef minfo
1153*4882a593Smuzhiyun #undef mdinfo
1154*4882a593Smuzhiyun }
1155*4882a593Smuzhiyun 
maven_out_program(void * md)1156*4882a593Smuzhiyun static int maven_out_program(void* md) {
1157*4882a593Smuzhiyun #define mdinfo ((struct maven_data*)md)
1158*4882a593Smuzhiyun #define minfo (mdinfo->primary_head)
1159*4882a593Smuzhiyun 	return maven_program_timming(md, &minfo->hw.maven);
1160*4882a593Smuzhiyun #undef minfo
1161*4882a593Smuzhiyun #undef mdinfo
1162*4882a593Smuzhiyun }
1163*4882a593Smuzhiyun 
maven_out_start(void * md)1164*4882a593Smuzhiyun static int maven_out_start(void* md) {
1165*4882a593Smuzhiyun 	return maven_resync(md);
1166*4882a593Smuzhiyun }
1167*4882a593Smuzhiyun 
maven_out_verify_mode(void * md,u_int32_t arg)1168*4882a593Smuzhiyun static int maven_out_verify_mode(void* md, u_int32_t arg) {
1169*4882a593Smuzhiyun 	switch (arg) {
1170*4882a593Smuzhiyun 		case MATROXFB_OUTPUT_MODE_PAL:
1171*4882a593Smuzhiyun 		case MATROXFB_OUTPUT_MODE_NTSC:
1172*4882a593Smuzhiyun 		case MATROXFB_OUTPUT_MODE_MONITOR:
1173*4882a593Smuzhiyun 			return 0;
1174*4882a593Smuzhiyun 	}
1175*4882a593Smuzhiyun 	return -EINVAL;
1176*4882a593Smuzhiyun }
1177*4882a593Smuzhiyun 
maven_out_get_queryctrl(void * md,struct v4l2_queryctrl * p)1178*4882a593Smuzhiyun static int maven_out_get_queryctrl(void* md, struct v4l2_queryctrl* p) {
1179*4882a593Smuzhiyun         return maven_get_queryctrl(md, p);
1180*4882a593Smuzhiyun }
1181*4882a593Smuzhiyun 
maven_out_get_ctrl(void * md,struct v4l2_control * p)1182*4882a593Smuzhiyun static int maven_out_get_ctrl(void* md, struct v4l2_control* p) {
1183*4882a593Smuzhiyun 	return maven_get_control(md, p);
1184*4882a593Smuzhiyun }
1185*4882a593Smuzhiyun 
maven_out_set_ctrl(void * md,struct v4l2_control * p)1186*4882a593Smuzhiyun static int maven_out_set_ctrl(void* md, struct v4l2_control* p) {
1187*4882a593Smuzhiyun 	return maven_set_control(md, p);
1188*4882a593Smuzhiyun }
1189*4882a593Smuzhiyun 
1190*4882a593Smuzhiyun static struct matrox_altout maven_altout = {
1191*4882a593Smuzhiyun 	.name		= "Secondary output",
1192*4882a593Smuzhiyun 	.compute	= maven_out_compute,
1193*4882a593Smuzhiyun 	.program	= maven_out_program,
1194*4882a593Smuzhiyun 	.start		= maven_out_start,
1195*4882a593Smuzhiyun 	.verifymode	= maven_out_verify_mode,
1196*4882a593Smuzhiyun 	.getqueryctrl	= maven_out_get_queryctrl,
1197*4882a593Smuzhiyun 	.getctrl	= maven_out_get_ctrl,
1198*4882a593Smuzhiyun 	.setctrl	= maven_out_set_ctrl,
1199*4882a593Smuzhiyun };
1200*4882a593Smuzhiyun 
maven_init_client(struct i2c_client * clnt)1201*4882a593Smuzhiyun static int maven_init_client(struct i2c_client* clnt) {
1202*4882a593Smuzhiyun 	struct maven_data* md = i2c_get_clientdata(clnt);
1203*4882a593Smuzhiyun 	struct matrox_fb_info *minfo = container_of(clnt->adapter,
1204*4882a593Smuzhiyun 						    struct i2c_bit_adapter,
1205*4882a593Smuzhiyun 						    adapter)->minfo;
1206*4882a593Smuzhiyun 
1207*4882a593Smuzhiyun 	md->primary_head = minfo;
1208*4882a593Smuzhiyun 	md->client = clnt;
1209*4882a593Smuzhiyun 	down_write(&minfo->altout.lock);
1210*4882a593Smuzhiyun 	minfo->outputs[1].output = &maven_altout;
1211*4882a593Smuzhiyun 	minfo->outputs[1].src = minfo->outputs[1].default_src;
1212*4882a593Smuzhiyun 	minfo->outputs[1].data = md;
1213*4882a593Smuzhiyun 	minfo->outputs[1].mode = MATROXFB_OUTPUT_MODE_MONITOR;
1214*4882a593Smuzhiyun 	up_write(&minfo->altout.lock);
1215*4882a593Smuzhiyun 	if (maven_get_reg(clnt, 0xB2) < 0x14) {
1216*4882a593Smuzhiyun 		md->version = MGATVO_B;
1217*4882a593Smuzhiyun 		/* Tweak some things for this old chip */
1218*4882a593Smuzhiyun 	} else {
1219*4882a593Smuzhiyun 		md->version = MGATVO_C;
1220*4882a593Smuzhiyun 	}
1221*4882a593Smuzhiyun 	/*
1222*4882a593Smuzhiyun 	 * Set all parameters to its initial values.
1223*4882a593Smuzhiyun 	 */
1224*4882a593Smuzhiyun 	{
1225*4882a593Smuzhiyun 		unsigned int i;
1226*4882a593Smuzhiyun 
1227*4882a593Smuzhiyun 		for (i = 0; i < MAVCTRLS; ++i) {
1228*4882a593Smuzhiyun 			*get_ctrl_ptr(md, i) = maven_controls[i].desc.default_value;
1229*4882a593Smuzhiyun 		}
1230*4882a593Smuzhiyun 	}
1231*4882a593Smuzhiyun 
1232*4882a593Smuzhiyun 	return 0;
1233*4882a593Smuzhiyun }
1234*4882a593Smuzhiyun 
maven_shutdown_client(struct i2c_client * clnt)1235*4882a593Smuzhiyun static int maven_shutdown_client(struct i2c_client* clnt) {
1236*4882a593Smuzhiyun 	struct maven_data* md = i2c_get_clientdata(clnt);
1237*4882a593Smuzhiyun 
1238*4882a593Smuzhiyun 	if (md->primary_head) {
1239*4882a593Smuzhiyun 		struct matrox_fb_info *minfo = md->primary_head;
1240*4882a593Smuzhiyun 
1241*4882a593Smuzhiyun 		down_write(&minfo->altout.lock);
1242*4882a593Smuzhiyun 		minfo->outputs[1].src = MATROXFB_SRC_NONE;
1243*4882a593Smuzhiyun 		minfo->outputs[1].output = NULL;
1244*4882a593Smuzhiyun 		minfo->outputs[1].data = NULL;
1245*4882a593Smuzhiyun 		minfo->outputs[1].mode = MATROXFB_OUTPUT_MODE_MONITOR;
1246*4882a593Smuzhiyun 		up_write(&minfo->altout.lock);
1247*4882a593Smuzhiyun 		md->primary_head = NULL;
1248*4882a593Smuzhiyun 	}
1249*4882a593Smuzhiyun 	return 0;
1250*4882a593Smuzhiyun }
1251*4882a593Smuzhiyun 
maven_probe(struct i2c_client * client,const struct i2c_device_id * id)1252*4882a593Smuzhiyun static int maven_probe(struct i2c_client *client,
1253*4882a593Smuzhiyun 		       const struct i2c_device_id *id)
1254*4882a593Smuzhiyun {
1255*4882a593Smuzhiyun 	struct i2c_adapter *adapter = client->adapter;
1256*4882a593Smuzhiyun 	int err = -ENODEV;
1257*4882a593Smuzhiyun 	struct maven_data* data;
1258*4882a593Smuzhiyun 
1259*4882a593Smuzhiyun 	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_WORD_DATA |
1260*4882a593Smuzhiyun 					      I2C_FUNC_SMBUS_BYTE_DATA |
1261*4882a593Smuzhiyun 					      I2C_FUNC_NOSTART |
1262*4882a593Smuzhiyun 					      I2C_FUNC_PROTOCOL_MANGLING))
1263*4882a593Smuzhiyun 		goto ERROR0;
1264*4882a593Smuzhiyun 	if (!(data = kzalloc(sizeof(*data), GFP_KERNEL))) {
1265*4882a593Smuzhiyun 		err = -ENOMEM;
1266*4882a593Smuzhiyun 		goto ERROR0;
1267*4882a593Smuzhiyun 	}
1268*4882a593Smuzhiyun 	i2c_set_clientdata(client, data);
1269*4882a593Smuzhiyun 	err = maven_init_client(client);
1270*4882a593Smuzhiyun 	if (err)
1271*4882a593Smuzhiyun 		goto ERROR4;
1272*4882a593Smuzhiyun 	return 0;
1273*4882a593Smuzhiyun ERROR4:;
1274*4882a593Smuzhiyun 	kfree(data);
1275*4882a593Smuzhiyun ERROR0:;
1276*4882a593Smuzhiyun 	return err;
1277*4882a593Smuzhiyun }
1278*4882a593Smuzhiyun 
maven_remove(struct i2c_client * client)1279*4882a593Smuzhiyun static int maven_remove(struct i2c_client *client)
1280*4882a593Smuzhiyun {
1281*4882a593Smuzhiyun 	maven_shutdown_client(client);
1282*4882a593Smuzhiyun 	kfree(i2c_get_clientdata(client));
1283*4882a593Smuzhiyun 	return 0;
1284*4882a593Smuzhiyun }
1285*4882a593Smuzhiyun 
1286*4882a593Smuzhiyun static const struct i2c_device_id maven_id[] = {
1287*4882a593Smuzhiyun 	{ "maven", 0 },
1288*4882a593Smuzhiyun 	{ }
1289*4882a593Smuzhiyun };
1290*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, maven_id);
1291*4882a593Smuzhiyun 
1292*4882a593Smuzhiyun static struct i2c_driver maven_driver={
1293*4882a593Smuzhiyun 	.driver = {
1294*4882a593Smuzhiyun 		.name	= "maven",
1295*4882a593Smuzhiyun 	},
1296*4882a593Smuzhiyun 	.probe		= maven_probe,
1297*4882a593Smuzhiyun 	.remove		= maven_remove,
1298*4882a593Smuzhiyun 	.id_table	= maven_id,
1299*4882a593Smuzhiyun };
1300*4882a593Smuzhiyun 
1301*4882a593Smuzhiyun module_i2c_driver(maven_driver);
1302*4882a593Smuzhiyun MODULE_AUTHOR("(c) 1999-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
1303*4882a593Smuzhiyun MODULE_DESCRIPTION("Matrox G200/G400 Matrox MGA-TVO driver");
1304*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1305