1*4882a593Smuzhiyun /* $Id: g364fb.c,v 1.3 1998/08/28 22:43:00 tsbogend Exp $
2*4882a593Smuzhiyun *
3*4882a593Smuzhiyun * linux/drivers/video/g364fb.c -- Mips Magnum frame buffer device
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * (C) 1998 Thomas Bogendoerfer
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * This driver is based on tgafb.c
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Copyright (C) 1997 Geert Uytterhoeven
10*4882a593Smuzhiyun * Copyright (C) 1995 Jay Estabrook
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public
13*4882a593Smuzhiyun * License. See the file COPYING in the main directory of this archive for
14*4882a593Smuzhiyun * more details.
15*4882a593Smuzhiyun */
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun #include <linux/console.h>
19*4882a593Smuzhiyun #include <linux/kernel.h>
20*4882a593Smuzhiyun #include <linux/errno.h>
21*4882a593Smuzhiyun #include <linux/string.h>
22*4882a593Smuzhiyun #include <linux/mm.h>
23*4882a593Smuzhiyun #include <linux/vmalloc.h>
24*4882a593Smuzhiyun #include <linux/delay.h>
25*4882a593Smuzhiyun #include <linux/interrupt.h>
26*4882a593Smuzhiyun #include <linux/fb.h>
27*4882a593Smuzhiyun #include <linux/init.h>
28*4882a593Smuzhiyun #include <asm/io.h>
29*4882a593Smuzhiyun #include <asm/jazz.h>
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /*
32*4882a593Smuzhiyun * Various defines for the G364
33*4882a593Smuzhiyun */
34*4882a593Smuzhiyun #define G364_MEM_BASE 0xe4400000
35*4882a593Smuzhiyun #define G364_PORT_BASE 0xe4000000
36*4882a593Smuzhiyun #define ID_REG 0xe4000000 /* Read only */
37*4882a593Smuzhiyun #define BOOT_REG 0xe4080000
38*4882a593Smuzhiyun #define TIMING_REG 0xe4080108 /* to 0x080170 - DON'T TOUCH! */
39*4882a593Smuzhiyun #define DISPLAY_REG 0xe4080118
40*4882a593Smuzhiyun #define VDISPLAY_REG 0xe4080150
41*4882a593Smuzhiyun #define MASK_REG 0xe4080200
42*4882a593Smuzhiyun #define CTLA_REG 0xe4080300
43*4882a593Smuzhiyun #define CURS_TOGGLE 0x800000
44*4882a593Smuzhiyun #define BIT_PER_PIX 0x700000 /* bits 22 to 20 of Control A */
45*4882a593Smuzhiyun #define DELAY_SAMPLE 0x080000
46*4882a593Smuzhiyun #define PORT_INTER 0x040000
47*4882a593Smuzhiyun #define PIX_PIPE_DEL 0x030000 /* bits 17 and 16 of Control A */
48*4882a593Smuzhiyun #define PIX_PIPE_DEL2 0x008000 /* same as above - don't ask me why */
49*4882a593Smuzhiyun #define TR_CYCLE_TOG 0x004000
50*4882a593Smuzhiyun #define VRAM_ADR_INC 0x003000 /* bits 13 and 12 of Control A */
51*4882a593Smuzhiyun #define BLANK_OFF 0x000800
52*4882a593Smuzhiyun #define FORCE_BLANK 0x000400
53*4882a593Smuzhiyun #define BLK_FUN_SWTCH 0x000200
54*4882a593Smuzhiyun #define BLANK_IO 0x000100
55*4882a593Smuzhiyun #define BLANK_LEVEL 0x000080
56*4882a593Smuzhiyun #define A_VID_FORM 0x000040
57*4882a593Smuzhiyun #define D_SYNC_FORM 0x000020
58*4882a593Smuzhiyun #define FRAME_FLY_PAT 0x000010
59*4882a593Smuzhiyun #define OP_MODE 0x000008
60*4882a593Smuzhiyun #define INTL_STAND 0x000004
61*4882a593Smuzhiyun #define SCRN_FORM 0x000002
62*4882a593Smuzhiyun #define ENABLE_VTG 0x000001
63*4882a593Smuzhiyun #define TOP_REG 0xe4080400
64*4882a593Smuzhiyun #define CURS_PAL_REG 0xe4080508 /* to 0x080518 */
65*4882a593Smuzhiyun #define CHKSUM_REG 0xe4080600 /* to 0x080610 - unused */
66*4882a593Smuzhiyun #define CURS_POS_REG 0xe4080638
67*4882a593Smuzhiyun #define CLR_PAL_REG 0xe4080800 /* to 0x080ff8 */
68*4882a593Smuzhiyun #define CURS_PAT_REG 0xe4081000 /* to 0x081ff8 */
69*4882a593Smuzhiyun #define MON_ID_REG 0xe4100000 /* unused */
70*4882a593Smuzhiyun #define RESET_REG 0xe4180000 /* Write only */
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun static struct fb_info fb_info;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun static struct fb_fix_screeninfo fb_fix __initdata = {
75*4882a593Smuzhiyun .id = "G364 8plane",
76*4882a593Smuzhiyun .smem_start = 0x40000000, /* physical address */
77*4882a593Smuzhiyun .type = FB_TYPE_PACKED_PIXELS,
78*4882a593Smuzhiyun .visual = FB_VISUAL_PSEUDOCOLOR,
79*4882a593Smuzhiyun .ypanstep = 1,
80*4882a593Smuzhiyun .accel = FB_ACCEL_NONE,
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun static struct fb_var_screeninfo fb_var __initdata = {
84*4882a593Smuzhiyun .bits_per_pixel = 8,
85*4882a593Smuzhiyun .red = { 0, 8, 0 },
86*4882a593Smuzhiyun .green = { 0, 8, 0 },
87*4882a593Smuzhiyun .blue = { 0, 8, 0 },
88*4882a593Smuzhiyun .activate = FB_ACTIVATE_NOW,
89*4882a593Smuzhiyun .height = -1,
90*4882a593Smuzhiyun .width = -1,
91*4882a593Smuzhiyun .pixclock = 39722,
92*4882a593Smuzhiyun .left_margin = 40,
93*4882a593Smuzhiyun .right_margin = 24,
94*4882a593Smuzhiyun .upper_margin = 32,
95*4882a593Smuzhiyun .lower_margin = 11,
96*4882a593Smuzhiyun .hsync_len = 96,
97*4882a593Smuzhiyun .vsync_len = 2,
98*4882a593Smuzhiyun .vmode = FB_VMODE_NONINTERLACED,
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun /*
102*4882a593Smuzhiyun * Interface used by the world
103*4882a593Smuzhiyun */
104*4882a593Smuzhiyun int g364fb_init(void);
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun static int g364fb_pan_display(struct fb_var_screeninfo *var,
107*4882a593Smuzhiyun struct fb_info *info);
108*4882a593Smuzhiyun static int g364fb_setcolreg(u_int regno, u_int red, u_int green,
109*4882a593Smuzhiyun u_int blue, u_int transp,
110*4882a593Smuzhiyun struct fb_info *info);
111*4882a593Smuzhiyun static int g364fb_blank(int blank, struct fb_info *info);
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun static const struct fb_ops g364fb_ops = {
114*4882a593Smuzhiyun .owner = THIS_MODULE,
115*4882a593Smuzhiyun .fb_setcolreg = g364fb_setcolreg,
116*4882a593Smuzhiyun .fb_pan_display = g364fb_pan_display,
117*4882a593Smuzhiyun .fb_blank = g364fb_blank,
118*4882a593Smuzhiyun .fb_fillrect = cfb_fillrect,
119*4882a593Smuzhiyun .fb_copyarea = cfb_copyarea,
120*4882a593Smuzhiyun .fb_imageblit = cfb_imageblit,
121*4882a593Smuzhiyun };
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun /*
124*4882a593Smuzhiyun * Pan or Wrap the Display
125*4882a593Smuzhiyun *
126*4882a593Smuzhiyun * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag
127*4882a593Smuzhiyun */
g364fb_pan_display(struct fb_var_screeninfo * var,struct fb_info * info)128*4882a593Smuzhiyun static int g364fb_pan_display(struct fb_var_screeninfo *var,
129*4882a593Smuzhiyun struct fb_info *info)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun if (var->xoffset ||
132*4882a593Smuzhiyun var->yoffset + info->var.yres > info->var.yres_virtual)
133*4882a593Smuzhiyun return -EINVAL;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun *(unsigned int *) TOP_REG = var->yoffset * info->var.xres;
136*4882a593Smuzhiyun return 0;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun /*
140*4882a593Smuzhiyun * Blank the display.
141*4882a593Smuzhiyun */
g364fb_blank(int blank,struct fb_info * info)142*4882a593Smuzhiyun static int g364fb_blank(int blank, struct fb_info *info)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun if (blank)
145*4882a593Smuzhiyun *(unsigned int *) CTLA_REG |= FORCE_BLANK;
146*4882a593Smuzhiyun else
147*4882a593Smuzhiyun *(unsigned int *) CTLA_REG &= ~FORCE_BLANK;
148*4882a593Smuzhiyun return 0;
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun /*
152*4882a593Smuzhiyun * Set a single color register. Return != 0 for invalid regno.
153*4882a593Smuzhiyun */
g364fb_setcolreg(u_int regno,u_int red,u_int green,u_int blue,u_int transp,struct fb_info * info)154*4882a593Smuzhiyun static int g364fb_setcolreg(u_int regno, u_int red, u_int green,
155*4882a593Smuzhiyun u_int blue, u_int transp, struct fb_info *info)
156*4882a593Smuzhiyun {
157*4882a593Smuzhiyun volatile unsigned int *ptr = (volatile unsigned int *) CLR_PAL_REG;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun if (regno > 255)
160*4882a593Smuzhiyun return 1;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun red >>= 8;
163*4882a593Smuzhiyun green >>= 8;
164*4882a593Smuzhiyun blue >>= 8;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun ptr[regno << 1] = (red << 16) | (green << 8) | blue;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun return 0;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun /*
172*4882a593Smuzhiyun * Initialisation
173*4882a593Smuzhiyun */
g364fb_init(void)174*4882a593Smuzhiyun int __init g364fb_init(void)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun volatile unsigned int *curs_pal_ptr =
177*4882a593Smuzhiyun (volatile unsigned int *) CURS_PAL_REG;
178*4882a593Smuzhiyun int mem, i;
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun if (fb_get_options("g364fb", NULL))
181*4882a593Smuzhiyun return -ENODEV;
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun /* TBD: G364 detection */
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun /* get the resolution set by ARC console */
186*4882a593Smuzhiyun *(volatile unsigned int *) CTLA_REG &= ~ENABLE_VTG;
187*4882a593Smuzhiyun fb_var.xres =
188*4882a593Smuzhiyun (*((volatile unsigned int *) DISPLAY_REG) & 0x00ffffff) * 4;
189*4882a593Smuzhiyun fb_var.yres =
190*4882a593Smuzhiyun (*((volatile unsigned int *) VDISPLAY_REG) & 0x00ffffff) / 2;
191*4882a593Smuzhiyun *(volatile unsigned int *) CTLA_REG |= ENABLE_VTG;
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun /* setup cursor */
194*4882a593Smuzhiyun curs_pal_ptr[0] |= 0x00ffffff;
195*4882a593Smuzhiyun curs_pal_ptr[2] |= 0x00ffffff;
196*4882a593Smuzhiyun curs_pal_ptr[4] |= 0x00ffffff;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun /*
199*4882a593Smuzhiyun * first set the whole cursor to transparent
200*4882a593Smuzhiyun */
201*4882a593Smuzhiyun for (i = 0; i < 512; i++)
202*4882a593Smuzhiyun *(unsigned short *) (CURS_PAT_REG + i * 8) = 0;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun /*
205*4882a593Smuzhiyun * switch the last two lines to cursor palette 3
206*4882a593Smuzhiyun * we assume here, that FONTSIZE_X is 8
207*4882a593Smuzhiyun */
208*4882a593Smuzhiyun *(unsigned short *) (CURS_PAT_REG + 14 * 64) = 0xffff;
209*4882a593Smuzhiyun *(unsigned short *) (CURS_PAT_REG + 15 * 64) = 0xffff;
210*4882a593Smuzhiyun fb_var.xres_virtual = fb_var.xres;
211*4882a593Smuzhiyun fb_fix.line_length = fb_var.xres_virtual * fb_var.bits_per_pixel / 8;
212*4882a593Smuzhiyun fb_fix.smem_start = 0x40000000; /* physical address */
213*4882a593Smuzhiyun /* get size of video memory; this is special for the JAZZ hardware */
214*4882a593Smuzhiyun mem = (r4030_read_reg32(JAZZ_R4030_CONFIG) >> 8) & 3;
215*4882a593Smuzhiyun fb_fix.smem_len = (1 << (mem * 2)) * 512 * 1024;
216*4882a593Smuzhiyun fb_var.yres_virtual = fb_fix.smem_len / fb_var.xres;
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun fb_info.fbops = &g364fb_ops;
219*4882a593Smuzhiyun fb_info.screen_base = (char *) G364_MEM_BASE; /* virtual kernel address */
220*4882a593Smuzhiyun fb_info.var = fb_var;
221*4882a593Smuzhiyun fb_info.fix = fb_fix;
222*4882a593Smuzhiyun fb_info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun fb_alloc_cmap(&fb_info.cmap, 255, 0);
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun if (register_framebuffer(&fb_info) < 0)
227*4882a593Smuzhiyun return -EINVAL;
228*4882a593Smuzhiyun return 0;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun module_init(g364fb_init);
232*4882a593Smuzhiyun MODULE_LICENSE("GPL");
233