1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * controlfb_hw.h: Constants of all sorts for controlfb 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 1998 Daniel Jacobowitz <dan@debian.org> 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Based on an awful lot of code, including: 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * control.c: Console support for PowerMac "control" display adaptor. 10*4882a593Smuzhiyun * Copyright (C) 1996 Paul Mackerras. 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * The so far unpublished platinumfb.c 13*4882a593Smuzhiyun * Copyright (C) 1998 Jon Howell 14*4882a593Smuzhiyun */ 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* 17*4882a593Smuzhiyun * Structure of the registers for the RADACAL colormap device. 18*4882a593Smuzhiyun */ 19*4882a593Smuzhiyun struct cmap_regs { 20*4882a593Smuzhiyun unsigned char addr; /* index for both cmap and misc registers */ 21*4882a593Smuzhiyun char pad1[15]; 22*4882a593Smuzhiyun unsigned char crsr; /* cursor palette */ 23*4882a593Smuzhiyun char pad2[15]; 24*4882a593Smuzhiyun unsigned char dat; /* RADACAL misc register data */ 25*4882a593Smuzhiyun char pad3[15]; 26*4882a593Smuzhiyun unsigned char lut; /* cmap data */ 27*4882a593Smuzhiyun char pad4[15]; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun /* 31*4882a593Smuzhiyun * Structure of the registers for the "control" display adaptor. 32*4882a593Smuzhiyun */ 33*4882a593Smuzhiyun #define PAD(x) char x[12] 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun struct preg { /* padded register */ 36*4882a593Smuzhiyun unsigned r; 37*4882a593Smuzhiyun char pad[12]; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun struct control_regs { 41*4882a593Smuzhiyun struct preg vcount; /* vertical counter */ 42*4882a593Smuzhiyun /* Vertical parameters are in units of 1/2 scan line */ 43*4882a593Smuzhiyun struct preg vswin; /* between vsblank and vssync */ 44*4882a593Smuzhiyun struct preg vsblank; /* vert start blank */ 45*4882a593Smuzhiyun struct preg veblank; /* vert end blank (display start) */ 46*4882a593Smuzhiyun struct preg vewin; /* between vesync and veblank */ 47*4882a593Smuzhiyun struct preg vesync; /* vert end sync */ 48*4882a593Smuzhiyun struct preg vssync; /* vert start sync */ 49*4882a593Smuzhiyun struct preg vperiod; /* vert period */ 50*4882a593Smuzhiyun struct preg piped; /* pipe delay hardware cursor */ 51*4882a593Smuzhiyun /* Horizontal params are in units of 2 pixels */ 52*4882a593Smuzhiyun struct preg hperiod; /* horiz period - 2 */ 53*4882a593Smuzhiyun struct preg hsblank; /* horiz start blank */ 54*4882a593Smuzhiyun struct preg heblank; /* horiz end blank */ 55*4882a593Smuzhiyun struct preg hesync; /* horiz end sync */ 56*4882a593Smuzhiyun struct preg hssync; /* horiz start sync */ 57*4882a593Smuzhiyun struct preg heq; /* half horiz sync len */ 58*4882a593Smuzhiyun struct preg hlfln; /* half horiz period */ 59*4882a593Smuzhiyun struct preg hserr; /* horiz period - horiz sync len */ 60*4882a593Smuzhiyun struct preg cnttst; 61*4882a593Smuzhiyun struct preg ctrl; /* display control */ 62*4882a593Smuzhiyun struct preg start_addr; /* start address: 5 lsbs zero */ 63*4882a593Smuzhiyun struct preg pitch; /* addrs diff between scan lines */ 64*4882a593Smuzhiyun struct preg mon_sense; /* monitor sense bits */ 65*4882a593Smuzhiyun struct preg vram_attr; /* enable vram banks */ 66*4882a593Smuzhiyun struct preg mode; 67*4882a593Smuzhiyun struct preg rfrcnt; /* refresh count */ 68*4882a593Smuzhiyun struct preg intr_ena; /* interrupt enable */ 69*4882a593Smuzhiyun struct preg intr_stat; /* interrupt status */ 70*4882a593Smuzhiyun struct preg res[5]; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun struct control_regints { 74*4882a593Smuzhiyun /* Vertical parameters are in units of 1/2 scan line */ 75*4882a593Smuzhiyun unsigned vswin; /* between vsblank and vssync */ 76*4882a593Smuzhiyun unsigned vsblank; /* vert start blank */ 77*4882a593Smuzhiyun unsigned veblank; /* vert end blank (display start) */ 78*4882a593Smuzhiyun unsigned vewin; /* between vesync and veblank */ 79*4882a593Smuzhiyun unsigned vesync; /* vert end sync */ 80*4882a593Smuzhiyun unsigned vssync; /* vert start sync */ 81*4882a593Smuzhiyun unsigned vperiod; /* vert period */ 82*4882a593Smuzhiyun unsigned piped; /* pipe delay hardware cursor */ 83*4882a593Smuzhiyun /* Horizontal params are in units of 2 pixels */ 84*4882a593Smuzhiyun /* Except, apparently, for hres > 1024 (or == 1280?) */ 85*4882a593Smuzhiyun unsigned hperiod; /* horiz period - 2 */ 86*4882a593Smuzhiyun unsigned hsblank; /* horiz start blank */ 87*4882a593Smuzhiyun unsigned heblank; /* horiz end blank */ 88*4882a593Smuzhiyun unsigned hesync; /* horiz end sync */ 89*4882a593Smuzhiyun unsigned hssync; /* horiz start sync */ 90*4882a593Smuzhiyun unsigned heq; /* half horiz sync len */ 91*4882a593Smuzhiyun unsigned hlfln; /* half horiz period */ 92*4882a593Smuzhiyun unsigned hserr; /* horiz period - horiz sync len */ 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun /* 96*4882a593Smuzhiyun * Dot clock rate is 97*4882a593Smuzhiyun * 3.9064MHz * 2**clock_params[2] * clock_params[1] / clock_params[0]. 98*4882a593Smuzhiyun */ 99*4882a593Smuzhiyun struct control_regvals { 100*4882a593Smuzhiyun unsigned regs[16]; /* for vswin .. hserr */ 101*4882a593Smuzhiyun unsigned char mode; 102*4882a593Smuzhiyun unsigned char radacal_ctrl; 103*4882a593Smuzhiyun unsigned char clock_params[3]; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun #define CTRLFB_OFF 16 /* position of pixel 0 in frame buffer */ 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun /* 110*4882a593Smuzhiyun * Best cmode supported by control 111*4882a593Smuzhiyun */ 112*4882a593Smuzhiyun struct max_cmodes { 113*4882a593Smuzhiyun int m[2]; /* 0: 2MB vram, 1: 4MB vram */ 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun /* 117*4882a593Smuzhiyun * Video modes supported by macmodes.c 118*4882a593Smuzhiyun */ 119*4882a593Smuzhiyun static struct max_cmodes control_mac_modes[] = { 120*4882a593Smuzhiyun {{-1,-1}}, /* 512x384, 60Hz interlaced (NTSC) */ 121*4882a593Smuzhiyun {{-1,-1}}, /* 512x384, 60Hz */ 122*4882a593Smuzhiyun {{-1,-1}}, /* 640x480, 50Hz interlaced (PAL) */ 123*4882a593Smuzhiyun {{-1,-1}}, /* 640x480, 60Hz interlaced (NTSC) */ 124*4882a593Smuzhiyun {{ 2, 2}}, /* 640x480, 60Hz (VGA) */ 125*4882a593Smuzhiyun {{ 2, 2}}, /* 640x480, 67Hz */ 126*4882a593Smuzhiyun {{-1,-1}}, /* 640x870, 75Hz (portrait) */ 127*4882a593Smuzhiyun {{-1,-1}}, /* 768x576, 50Hz (PAL full frame) */ 128*4882a593Smuzhiyun {{ 2, 2}}, /* 800x600, 56Hz */ 129*4882a593Smuzhiyun {{ 2, 2}}, /* 800x600, 60Hz */ 130*4882a593Smuzhiyun {{ 2, 2}}, /* 800x600, 72Hz */ 131*4882a593Smuzhiyun {{ 2, 2}}, /* 800x600, 75Hz */ 132*4882a593Smuzhiyun {{ 1, 2}}, /* 832x624, 75Hz */ 133*4882a593Smuzhiyun {{ 1, 2}}, /* 1024x768, 60Hz */ 134*4882a593Smuzhiyun {{ 1, 2}}, /* 1024x768, 70Hz (or 72Hz?) */ 135*4882a593Smuzhiyun {{ 1, 2}}, /* 1024x768, 75Hz (VESA) */ 136*4882a593Smuzhiyun {{ 1, 2}}, /* 1024x768, 75Hz */ 137*4882a593Smuzhiyun {{ 1, 2}}, /* 1152x870, 75Hz */ 138*4882a593Smuzhiyun {{ 0, 1}}, /* 1280x960, 75Hz */ 139*4882a593Smuzhiyun {{ 0, 1}}, /* 1280x1024, 75Hz */ 140*4882a593Smuzhiyun {{ 1, 2}}, /* 1152x768, 60Hz */ 141*4882a593Smuzhiyun {{ 0, 1}}, /* 1600x1024, 60Hz */ 142*4882a593Smuzhiyun }; 143*4882a593Smuzhiyun 144