xref: /OK3568_Linux_fs/kernel/drivers/video/fbdev/aty/radeon_monitor.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun #include "radeonfb.h"
3*4882a593Smuzhiyun 
4*4882a593Smuzhiyun #include <linux/slab.h>
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include "../edid.h"
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun static const struct fb_var_screeninfo radeonfb_default_var = {
9*4882a593Smuzhiyun 	.xres		= 640,
10*4882a593Smuzhiyun 	.yres		= 480,
11*4882a593Smuzhiyun 	.xres_virtual	= 640,
12*4882a593Smuzhiyun 	.yres_virtual	= 480,
13*4882a593Smuzhiyun 	.bits_per_pixel = 8,
14*4882a593Smuzhiyun 	.red		= { .length = 8 },
15*4882a593Smuzhiyun 	.green		= { .length = 8 },
16*4882a593Smuzhiyun 	.blue		= { .length = 8 },
17*4882a593Smuzhiyun 	.activate	= FB_ACTIVATE_NOW,
18*4882a593Smuzhiyun 	.height		= -1,
19*4882a593Smuzhiyun 	.width		= -1,
20*4882a593Smuzhiyun 	.pixclock	= 39721,
21*4882a593Smuzhiyun 	.left_margin	= 40,
22*4882a593Smuzhiyun 	.right_margin	= 24,
23*4882a593Smuzhiyun 	.upper_margin	= 32,
24*4882a593Smuzhiyun 	.lower_margin	= 11,
25*4882a593Smuzhiyun 	.hsync_len	= 96,
26*4882a593Smuzhiyun 	.vsync_len	= 2,
27*4882a593Smuzhiyun 	.vmode		= FB_VMODE_NONINTERLACED
28*4882a593Smuzhiyun };
29*4882a593Smuzhiyun 
radeon_get_mon_name(int type)30*4882a593Smuzhiyun static char *radeon_get_mon_name(int type)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun 	char *pret = NULL;
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun 	switch (type) {
35*4882a593Smuzhiyun 		case MT_NONE:
36*4882a593Smuzhiyun 			pret = "no";
37*4882a593Smuzhiyun 			break;
38*4882a593Smuzhiyun 		case MT_CRT:
39*4882a593Smuzhiyun 			pret = "CRT";
40*4882a593Smuzhiyun 			break;
41*4882a593Smuzhiyun 		case MT_DFP:
42*4882a593Smuzhiyun 			pret = "DFP";
43*4882a593Smuzhiyun 			break;
44*4882a593Smuzhiyun 		case MT_LCD:
45*4882a593Smuzhiyun 			pret = "LCD";
46*4882a593Smuzhiyun 			break;
47*4882a593Smuzhiyun 		case MT_CTV:
48*4882a593Smuzhiyun 			pret = "CTV";
49*4882a593Smuzhiyun 			break;
50*4882a593Smuzhiyun 		case MT_STV:
51*4882a593Smuzhiyun 			pret = "STV";
52*4882a593Smuzhiyun 			break;
53*4882a593Smuzhiyun 	}
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	return pret;
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun #if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
60*4882a593Smuzhiyun /*
61*4882a593Smuzhiyun  * Try to find monitor informations & EDID data out of the Open Firmware
62*4882a593Smuzhiyun  * device-tree. This also contains some "hacks" to work around a few machine
63*4882a593Smuzhiyun  * models with broken OF probing by hard-coding known EDIDs for some Mac
64*4882a593Smuzhiyun  * laptops internal LVDS panel. (XXX: not done yet)
65*4882a593Smuzhiyun  */
radeon_parse_montype_prop(struct device_node * dp,u8 ** out_EDID,int hdno)66*4882a593Smuzhiyun static int radeon_parse_montype_prop(struct device_node *dp, u8 **out_EDID,
67*4882a593Smuzhiyun 				     int hdno)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun         static char *propnames[] = { "DFP,EDID", "LCD,EDID", "EDID",
70*4882a593Smuzhiyun 				     "EDID1", "EDID2",  NULL };
71*4882a593Smuzhiyun 	const u8 *pedid = NULL;
72*4882a593Smuzhiyun 	const u8 *pmt = NULL;
73*4882a593Smuzhiyun 	u8 *tmp;
74*4882a593Smuzhiyun         int i, mt = MT_NONE;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	pr_debug("analyzing OF properties...\n");
77*4882a593Smuzhiyun 	pmt = of_get_property(dp, "display-type", NULL);
78*4882a593Smuzhiyun 	if (!pmt)
79*4882a593Smuzhiyun 		return MT_NONE;
80*4882a593Smuzhiyun 	pr_debug("display-type: %s\n", pmt);
81*4882a593Smuzhiyun 	/* OF says "LCD" for DFP as well, we discriminate from the caller of this
82*4882a593Smuzhiyun 	 * function
83*4882a593Smuzhiyun 	 */
84*4882a593Smuzhiyun 	if (!strcmp(pmt, "LCD") || !strcmp(pmt, "DFP"))
85*4882a593Smuzhiyun 		mt = MT_DFP;
86*4882a593Smuzhiyun 	else if (!strcmp(pmt, "CRT"))
87*4882a593Smuzhiyun 		mt = MT_CRT;
88*4882a593Smuzhiyun 	else {
89*4882a593Smuzhiyun 		if (strcmp(pmt, "NONE") != 0)
90*4882a593Smuzhiyun 			printk(KERN_WARNING "radeonfb: Unknown OF display-type: %s\n",
91*4882a593Smuzhiyun 			       pmt);
92*4882a593Smuzhiyun 		return MT_NONE;
93*4882a593Smuzhiyun 	}
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	for (i = 0; propnames[i] != NULL; ++i) {
96*4882a593Smuzhiyun 		pedid = of_get_property(dp, propnames[i], NULL);
97*4882a593Smuzhiyun 		if (pedid != NULL)
98*4882a593Smuzhiyun 			break;
99*4882a593Smuzhiyun 	}
100*4882a593Smuzhiyun 	/* We didn't find the EDID in the leaf node, some cards will actually
101*4882a593Smuzhiyun 	 * put EDID1/EDID2 in the parent, look for these (typically M6 tipb).
102*4882a593Smuzhiyun 	 * single-head cards have hdno == -1 and skip this step
103*4882a593Smuzhiyun 	 */
104*4882a593Smuzhiyun 	if (pedid == NULL && dp->parent && (hdno != -1))
105*4882a593Smuzhiyun 		pedid = of_get_property(dp->parent,
106*4882a593Smuzhiyun 				(hdno == 0) ? "EDID1" : "EDID2", NULL);
107*4882a593Smuzhiyun 	if (pedid == NULL && dp->parent && (hdno == 0))
108*4882a593Smuzhiyun 		pedid = of_get_property(dp->parent, "EDID", NULL);
109*4882a593Smuzhiyun 	if (pedid == NULL)
110*4882a593Smuzhiyun 		return mt;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	tmp = kmemdup(pedid, EDID_LENGTH, GFP_KERNEL);
113*4882a593Smuzhiyun 	if (!tmp)
114*4882a593Smuzhiyun 		return mt;
115*4882a593Smuzhiyun 	*out_EDID = tmp;
116*4882a593Smuzhiyun 	return mt;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun 
radeon_probe_OF_head(struct radeonfb_info * rinfo,int head_no,u8 ** out_EDID)119*4882a593Smuzhiyun static int radeon_probe_OF_head(struct radeonfb_info *rinfo, int head_no,
120*4882a593Smuzhiyun 				u8 **out_EDID)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun         struct device_node *dp;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	pr_debug("radeon_probe_OF_head\n");
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun         dp = rinfo->of_node;
127*4882a593Smuzhiyun         while (dp == NULL)
128*4882a593Smuzhiyun 		return MT_NONE;
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	if (rinfo->has_CRTC2) {
131*4882a593Smuzhiyun 		const char *pname;
132*4882a593Smuzhiyun 		int len, second = 0;
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 		dp = dp->child;
135*4882a593Smuzhiyun 		do {
136*4882a593Smuzhiyun 			if (!dp)
137*4882a593Smuzhiyun 				return MT_NONE;
138*4882a593Smuzhiyun 			pname = of_get_property(dp, "name", NULL);
139*4882a593Smuzhiyun 			if (!pname)
140*4882a593Smuzhiyun 				return MT_NONE;
141*4882a593Smuzhiyun 			len = strlen(pname);
142*4882a593Smuzhiyun 			pr_debug("head: %s (letter: %c, head_no: %d)\n",
143*4882a593Smuzhiyun 			       pname, pname[len-1], head_no);
144*4882a593Smuzhiyun 			if (pname[len-1] == 'A' && head_no == 0) {
145*4882a593Smuzhiyun 				int mt = radeon_parse_montype_prop(dp, out_EDID, 0);
146*4882a593Smuzhiyun 				/* Maybe check for LVDS_GEN_CNTL here ? I need to check out
147*4882a593Smuzhiyun 				 * what OF does when booting with lid closed
148*4882a593Smuzhiyun 				 */
149*4882a593Smuzhiyun 				if (mt == MT_DFP && rinfo->is_mobility)
150*4882a593Smuzhiyun 					mt = MT_LCD;
151*4882a593Smuzhiyun 				return mt;
152*4882a593Smuzhiyun 			} else if (pname[len-1] == 'B' && head_no == 1)
153*4882a593Smuzhiyun 				return radeon_parse_montype_prop(dp, out_EDID, 1);
154*4882a593Smuzhiyun 			second = 1;
155*4882a593Smuzhiyun 			dp = dp->sibling;
156*4882a593Smuzhiyun 		} while(!second);
157*4882a593Smuzhiyun 	} else {
158*4882a593Smuzhiyun 		if (head_no > 0)
159*4882a593Smuzhiyun 			return MT_NONE;
160*4882a593Smuzhiyun 		return radeon_parse_montype_prop(dp, out_EDID, -1);
161*4882a593Smuzhiyun 	}
162*4882a593Smuzhiyun         return MT_NONE;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun #endif /* CONFIG_PPC || CONFIG_SPARC */
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 
radeon_get_panel_info_BIOS(struct radeonfb_info * rinfo)167*4882a593Smuzhiyun static int radeon_get_panel_info_BIOS(struct radeonfb_info *rinfo)
168*4882a593Smuzhiyun {
169*4882a593Smuzhiyun 	unsigned long tmp, tmp0;
170*4882a593Smuzhiyun 	char stmp[30];
171*4882a593Smuzhiyun 	int i;
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	if (!rinfo->bios_seg)
174*4882a593Smuzhiyun 		return 0;
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	if (!(tmp = BIOS_IN16(rinfo->fp_bios_start + 0x40))) {
177*4882a593Smuzhiyun 		printk(KERN_ERR "radeonfb: Failed to detect DFP panel info using BIOS\n");
178*4882a593Smuzhiyun 		rinfo->panel_info.pwr_delay = 200;
179*4882a593Smuzhiyun 		return 0;
180*4882a593Smuzhiyun 	}
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	for(i=0; i<24; i++)
183*4882a593Smuzhiyun 		stmp[i] = BIOS_IN8(tmp+i+1);
184*4882a593Smuzhiyun 	stmp[24] = 0;
185*4882a593Smuzhiyun 	printk("radeonfb: panel ID string: %s\n", stmp);
186*4882a593Smuzhiyun 	rinfo->panel_info.xres = BIOS_IN16(tmp + 25);
187*4882a593Smuzhiyun 	rinfo->panel_info.yres = BIOS_IN16(tmp + 27);
188*4882a593Smuzhiyun 	printk("radeonfb: detected LVDS panel size from BIOS: %dx%d\n",
189*4882a593Smuzhiyun 		rinfo->panel_info.xres, rinfo->panel_info.yres);
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	rinfo->panel_info.pwr_delay = BIOS_IN16(tmp + 44);
192*4882a593Smuzhiyun 	pr_debug("BIOS provided panel power delay: %d\n", rinfo->panel_info.pwr_delay);
193*4882a593Smuzhiyun 	if (rinfo->panel_info.pwr_delay > 2000 || rinfo->panel_info.pwr_delay <= 0)
194*4882a593Smuzhiyun 		rinfo->panel_info.pwr_delay = 2000;
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	/*
197*4882a593Smuzhiyun 	 * Some panels only work properly with some divider combinations
198*4882a593Smuzhiyun 	 */
199*4882a593Smuzhiyun 	rinfo->panel_info.ref_divider = BIOS_IN16(tmp + 46);
200*4882a593Smuzhiyun 	rinfo->panel_info.post_divider = BIOS_IN8(tmp + 48);
201*4882a593Smuzhiyun 	rinfo->panel_info.fbk_divider = BIOS_IN16(tmp + 49);
202*4882a593Smuzhiyun 	if (rinfo->panel_info.ref_divider != 0 &&
203*4882a593Smuzhiyun 	    rinfo->panel_info.fbk_divider > 3) {
204*4882a593Smuzhiyun 		rinfo->panel_info.use_bios_dividers = 1;
205*4882a593Smuzhiyun 		printk(KERN_INFO "radeondb: BIOS provided dividers will be used\n");
206*4882a593Smuzhiyun 		pr_debug("ref_divider = %x\n", rinfo->panel_info.ref_divider);
207*4882a593Smuzhiyun 		pr_debug("post_divider = %x\n", rinfo->panel_info.post_divider);
208*4882a593Smuzhiyun 		pr_debug("fbk_divider = %x\n", rinfo->panel_info.fbk_divider);
209*4882a593Smuzhiyun 	}
210*4882a593Smuzhiyun 	pr_debug("Scanning BIOS table ...\n");
211*4882a593Smuzhiyun 	for(i=0; i<32; i++) {
212*4882a593Smuzhiyun 		tmp0 = BIOS_IN16(tmp+64+i*2);
213*4882a593Smuzhiyun 		if (tmp0 == 0)
214*4882a593Smuzhiyun 			break;
215*4882a593Smuzhiyun 		pr_debug(" %d x %d\n", BIOS_IN16(tmp0), BIOS_IN16(tmp0+2));
216*4882a593Smuzhiyun 		if ((BIOS_IN16(tmp0) == rinfo->panel_info.xres) &&
217*4882a593Smuzhiyun 		    (BIOS_IN16(tmp0+2) == rinfo->panel_info.yres)) {
218*4882a593Smuzhiyun 			rinfo->panel_info.hblank = (BIOS_IN16(tmp0+17) - BIOS_IN16(tmp0+19)) * 8;
219*4882a593Smuzhiyun 			rinfo->panel_info.hOver_plus = ((BIOS_IN16(tmp0+21) -
220*4882a593Smuzhiyun 							 BIOS_IN16(tmp0+19) -1) * 8) & 0x7fff;
221*4882a593Smuzhiyun 			rinfo->panel_info.hSync_width = BIOS_IN8(tmp0+23) * 8;
222*4882a593Smuzhiyun 			rinfo->panel_info.vblank = BIOS_IN16(tmp0+24) - BIOS_IN16(tmp0+26);
223*4882a593Smuzhiyun 			rinfo->panel_info.vOver_plus = (BIOS_IN16(tmp0+28) & 0x7ff) - BIOS_IN16(tmp0+26);
224*4882a593Smuzhiyun 			rinfo->panel_info.vSync_width = (BIOS_IN16(tmp0+28) & 0xf800) >> 11;
225*4882a593Smuzhiyun 			rinfo->panel_info.clock = BIOS_IN16(tmp0+9);
226*4882a593Smuzhiyun 			/* Assume high active syncs for now until ATI tells me more... maybe we
227*4882a593Smuzhiyun 			 * can probe register values here ?
228*4882a593Smuzhiyun 			 */
229*4882a593Smuzhiyun 			rinfo->panel_info.hAct_high = 1;
230*4882a593Smuzhiyun 			rinfo->panel_info.vAct_high = 1;
231*4882a593Smuzhiyun 			/* Mark panel infos valid */
232*4882a593Smuzhiyun 			rinfo->panel_info.valid = 1;
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 			pr_debug("Found panel in BIOS table:\n");
235*4882a593Smuzhiyun 			pr_debug("  hblank: %d\n", rinfo->panel_info.hblank);
236*4882a593Smuzhiyun 			pr_debug("  hOver_plus: %d\n", rinfo->panel_info.hOver_plus);
237*4882a593Smuzhiyun 			pr_debug("  hSync_width: %d\n", rinfo->panel_info.hSync_width);
238*4882a593Smuzhiyun 			pr_debug("  vblank: %d\n", rinfo->panel_info.vblank);
239*4882a593Smuzhiyun 			pr_debug("  vOver_plus: %d\n", rinfo->panel_info.vOver_plus);
240*4882a593Smuzhiyun 			pr_debug("  vSync_width: %d\n", rinfo->panel_info.vSync_width);
241*4882a593Smuzhiyun 			pr_debug("  clock: %d\n", rinfo->panel_info.clock);
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 			return 1;
244*4882a593Smuzhiyun 		}
245*4882a593Smuzhiyun 	}
246*4882a593Smuzhiyun 	pr_debug("Didn't find panel in BIOS table !\n");
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	return 0;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun /* Try to extract the connector informations from the BIOS. This
252*4882a593Smuzhiyun  * doesn't quite work yet, but it's output is still useful for
253*4882a593Smuzhiyun  * debugging
254*4882a593Smuzhiyun  */
radeon_parse_connector_info(struct radeonfb_info * rinfo)255*4882a593Smuzhiyun static void radeon_parse_connector_info(struct radeonfb_info *rinfo)
256*4882a593Smuzhiyun {
257*4882a593Smuzhiyun 	int offset, chips, connectors, tmp, i, conn, type;
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	static char* __conn_type_table[16] = {
260*4882a593Smuzhiyun 		"NONE", "Proprietary", "CRT", "DVI-I", "DVI-D", "Unknown", "Unknown",
261*4882a593Smuzhiyun 		"Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown",
262*4882a593Smuzhiyun 		"Unknown", "Unknown", "Unknown"
263*4882a593Smuzhiyun 	};
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	if (!rinfo->bios_seg)
266*4882a593Smuzhiyun 		return;
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun 	offset = BIOS_IN16(rinfo->fp_bios_start + 0x50);
269*4882a593Smuzhiyun 	if (offset == 0) {
270*4882a593Smuzhiyun 		printk(KERN_WARNING "radeonfb: No connector info table detected\n");
271*4882a593Smuzhiyun 		return;
272*4882a593Smuzhiyun 	}
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	/* Don't do much more at this point but displaying the data if
275*4882a593Smuzhiyun 	 * DEBUG is enabled
276*4882a593Smuzhiyun 	 */
277*4882a593Smuzhiyun 	chips = BIOS_IN8(offset++) >> 4;
278*4882a593Smuzhiyun 	pr_debug("%d chips in connector info\n", chips);
279*4882a593Smuzhiyun 	for (i = 0; i < chips; i++) {
280*4882a593Smuzhiyun 		tmp = BIOS_IN8(offset++);
281*4882a593Smuzhiyun 		connectors = tmp & 0x0f;
282*4882a593Smuzhiyun 		pr_debug(" - chip %d has %d connectors\n", tmp >> 4, connectors);
283*4882a593Smuzhiyun 		for (conn = 0; ; conn++) {
284*4882a593Smuzhiyun 			tmp = BIOS_IN16(offset);
285*4882a593Smuzhiyun 			if (tmp == 0)
286*4882a593Smuzhiyun 				break;
287*4882a593Smuzhiyun 			offset += 2;
288*4882a593Smuzhiyun 			type = (tmp >> 12) & 0x0f;
289*4882a593Smuzhiyun 			pr_debug("  * connector %d of type %d (%s) : %04x\n",
290*4882a593Smuzhiyun 			       conn, type, __conn_type_table[type], tmp);
291*4882a593Smuzhiyun 		}
292*4882a593Smuzhiyun 	}
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun /*
297*4882a593Smuzhiyun  * Probe physical connection of a CRT. This code comes from XFree
298*4882a593Smuzhiyun  * as well and currently is only implemented for the CRT DAC, the
299*4882a593Smuzhiyun  * code for the TVDAC is commented out in XFree as "non working"
300*4882a593Smuzhiyun  */
radeon_crt_is_connected(struct radeonfb_info * rinfo,int is_crt_dac)301*4882a593Smuzhiyun static int radeon_crt_is_connected(struct radeonfb_info *rinfo, int is_crt_dac)
302*4882a593Smuzhiyun {
303*4882a593Smuzhiyun     int	          connected = 0;
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun     /* the monitor either wasn't connected or it is a non-DDC CRT.
306*4882a593Smuzhiyun      * try to probe it
307*4882a593Smuzhiyun      */
308*4882a593Smuzhiyun     if (is_crt_dac) {
309*4882a593Smuzhiyun 	unsigned long ulOrigVCLK_ECP_CNTL;
310*4882a593Smuzhiyun 	unsigned long ulOrigDAC_CNTL;
311*4882a593Smuzhiyun 	unsigned long ulOrigDAC_EXT_CNTL;
312*4882a593Smuzhiyun 	unsigned long ulOrigCRTC_EXT_CNTL;
313*4882a593Smuzhiyun 	unsigned long ulData;
314*4882a593Smuzhiyun 	unsigned long ulMask;
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	ulOrigVCLK_ECP_CNTL = INPLL(VCLK_ECP_CNTL);
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	ulData              = ulOrigVCLK_ECP_CNTL;
319*4882a593Smuzhiyun 	ulData             &= ~(PIXCLK_ALWAYS_ONb
320*4882a593Smuzhiyun 				| PIXCLK_DAC_ALWAYS_ONb);
321*4882a593Smuzhiyun 	ulMask              = ~(PIXCLK_ALWAYS_ONb
322*4882a593Smuzhiyun 				| PIXCLK_DAC_ALWAYS_ONb);
323*4882a593Smuzhiyun 	OUTPLLP(VCLK_ECP_CNTL, ulData, ulMask);
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	ulOrigCRTC_EXT_CNTL = INREG(CRTC_EXT_CNTL);
326*4882a593Smuzhiyun 	ulData              = ulOrigCRTC_EXT_CNTL;
327*4882a593Smuzhiyun 	ulData             |= CRTC_CRT_ON;
328*4882a593Smuzhiyun 	OUTREG(CRTC_EXT_CNTL, ulData);
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	ulOrigDAC_EXT_CNTL = INREG(DAC_EXT_CNTL);
331*4882a593Smuzhiyun 	ulData             = ulOrigDAC_EXT_CNTL;
332*4882a593Smuzhiyun 	ulData            &= ~DAC_FORCE_DATA_MASK;
333*4882a593Smuzhiyun 	ulData            |=  (DAC_FORCE_BLANK_OFF_EN
334*4882a593Smuzhiyun 			       |DAC_FORCE_DATA_EN
335*4882a593Smuzhiyun 			       |DAC_FORCE_DATA_SEL_MASK);
336*4882a593Smuzhiyun 	if ((rinfo->family == CHIP_FAMILY_RV250) ||
337*4882a593Smuzhiyun 	    (rinfo->family == CHIP_FAMILY_RV280))
338*4882a593Smuzhiyun 	    ulData |= (0x01b6 << DAC_FORCE_DATA_SHIFT);
339*4882a593Smuzhiyun 	else
340*4882a593Smuzhiyun 	    ulData |= (0x01ac << DAC_FORCE_DATA_SHIFT);
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	OUTREG(DAC_EXT_CNTL, ulData);
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	ulOrigDAC_CNTL     = INREG(DAC_CNTL);
345*4882a593Smuzhiyun 	ulData             = ulOrigDAC_CNTL;
346*4882a593Smuzhiyun 	ulData            |= DAC_CMP_EN;
347*4882a593Smuzhiyun 	ulData            &= ~(DAC_RANGE_CNTL_MASK
348*4882a593Smuzhiyun 			       | DAC_PDWN);
349*4882a593Smuzhiyun 	ulData            |= 0x2;
350*4882a593Smuzhiyun 	OUTREG(DAC_CNTL, ulData);
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	mdelay(1);
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	ulData     = INREG(DAC_CNTL);
355*4882a593Smuzhiyun 	connected =  (DAC_CMP_OUTPUT & ulData) ? 1 : 0;
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 	ulData    = ulOrigVCLK_ECP_CNTL;
358*4882a593Smuzhiyun 	ulMask    = 0xFFFFFFFFL;
359*4882a593Smuzhiyun 	OUTPLLP(VCLK_ECP_CNTL, ulData, ulMask);
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	OUTREG(DAC_CNTL,      ulOrigDAC_CNTL     );
362*4882a593Smuzhiyun 	OUTREG(DAC_EXT_CNTL,  ulOrigDAC_EXT_CNTL );
363*4882a593Smuzhiyun 	OUTREG(CRTC_EXT_CNTL, ulOrigCRTC_EXT_CNTL);
364*4882a593Smuzhiyun     }
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun     return connected ? MT_CRT : MT_NONE;
367*4882a593Smuzhiyun }
368*4882a593Smuzhiyun 
369*4882a593Smuzhiyun /*
370*4882a593Smuzhiyun  * Parse the "monitor_layout" string if any. This code is mostly
371*4882a593Smuzhiyun  * copied from XFree's radeon driver
372*4882a593Smuzhiyun  */
radeon_parse_monitor_layout(struct radeonfb_info * rinfo,const char * monitor_layout)373*4882a593Smuzhiyun static int radeon_parse_monitor_layout(struct radeonfb_info *rinfo,
374*4882a593Smuzhiyun 				       const char *monitor_layout)
375*4882a593Smuzhiyun {
376*4882a593Smuzhiyun 	char s1[5], s2[5];
377*4882a593Smuzhiyun 	int i = 0, second = 0;
378*4882a593Smuzhiyun 	const char *s;
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	if (!monitor_layout)
381*4882a593Smuzhiyun 		return 0;
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun 	s = monitor_layout;
384*4882a593Smuzhiyun 	do {
385*4882a593Smuzhiyun 		switch(*s) {
386*4882a593Smuzhiyun 		case ',':
387*4882a593Smuzhiyun 			s1[i] = '\0';
388*4882a593Smuzhiyun 			i = 0;
389*4882a593Smuzhiyun 			second = 1;
390*4882a593Smuzhiyun 			break;
391*4882a593Smuzhiyun 		case ' ':
392*4882a593Smuzhiyun 		case '\0':
393*4882a593Smuzhiyun 			break;
394*4882a593Smuzhiyun 		default:
395*4882a593Smuzhiyun 			if (i > 4)
396*4882a593Smuzhiyun 				break;
397*4882a593Smuzhiyun 			if (second)
398*4882a593Smuzhiyun 				s2[i] = *s;
399*4882a593Smuzhiyun 			else
400*4882a593Smuzhiyun 				s1[i] = *s;
401*4882a593Smuzhiyun 			i++;
402*4882a593Smuzhiyun 		}
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun 		if (i > 4)
405*4882a593Smuzhiyun 			i = 4;
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun 	} while (*s++);
408*4882a593Smuzhiyun 	if (second)
409*4882a593Smuzhiyun 		s2[i] = 0;
410*4882a593Smuzhiyun 	else {
411*4882a593Smuzhiyun 		s1[i] = 0;
412*4882a593Smuzhiyun 		s2[0] = 0;
413*4882a593Smuzhiyun 	}
414*4882a593Smuzhiyun 	if (strcmp(s1, "CRT") == 0)
415*4882a593Smuzhiyun 		rinfo->mon1_type = MT_CRT;
416*4882a593Smuzhiyun 	else if (strcmp(s1, "TMDS") == 0)
417*4882a593Smuzhiyun 		rinfo->mon1_type = MT_DFP;
418*4882a593Smuzhiyun 	else if (strcmp(s1, "LVDS") == 0)
419*4882a593Smuzhiyun 		rinfo->mon1_type = MT_LCD;
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun 	if (strcmp(s2, "CRT") == 0)
422*4882a593Smuzhiyun 		rinfo->mon2_type = MT_CRT;
423*4882a593Smuzhiyun 	else if (strcmp(s2, "TMDS") == 0)
424*4882a593Smuzhiyun 		rinfo->mon2_type = MT_DFP;
425*4882a593Smuzhiyun 	else if (strcmp(s2, "LVDS") == 0)
426*4882a593Smuzhiyun 		rinfo->mon2_type = MT_LCD;
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun 	return 1;
429*4882a593Smuzhiyun }
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun /*
432*4882a593Smuzhiyun  * Probe display on both primary and secondary card's connector (if any)
433*4882a593Smuzhiyun  * by various available techniques (i2c, OF device tree, BIOS, ...) and
434*4882a593Smuzhiyun  * try to retrieve EDID. The algorithm here comes from XFree's radeon
435*4882a593Smuzhiyun  * driver
436*4882a593Smuzhiyun  */
radeon_probe_screens(struct radeonfb_info * rinfo,const char * monitor_layout,int ignore_edid)437*4882a593Smuzhiyun void radeon_probe_screens(struct radeonfb_info *rinfo,
438*4882a593Smuzhiyun 			  const char *monitor_layout, int ignore_edid)
439*4882a593Smuzhiyun {
440*4882a593Smuzhiyun #ifdef CONFIG_FB_RADEON_I2C
441*4882a593Smuzhiyun 	int ddc_crt2_used = 0;
442*4882a593Smuzhiyun #endif
443*4882a593Smuzhiyun 	int tmp, i;
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun 	radeon_parse_connector_info(rinfo);
446*4882a593Smuzhiyun 
447*4882a593Smuzhiyun 	if (radeon_parse_monitor_layout(rinfo, monitor_layout)) {
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 		/*
450*4882a593Smuzhiyun 		 * If user specified a monitor_layout option, use it instead
451*4882a593Smuzhiyun 		 * of auto-detecting. Maybe we should only use this argument
452*4882a593Smuzhiyun 		 * on the first radeon card probed or provide a way to specify
453*4882a593Smuzhiyun 		 * a layout for each card ?
454*4882a593Smuzhiyun 		 */
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun 		pr_debug("Using specified monitor layout: %s", monitor_layout);
457*4882a593Smuzhiyun #ifdef CONFIG_FB_RADEON_I2C
458*4882a593Smuzhiyun 		if (!ignore_edid) {
459*4882a593Smuzhiyun 			if (rinfo->mon1_type != MT_NONE)
460*4882a593Smuzhiyun 				if (!radeon_probe_i2c_connector(rinfo, ddc_dvi, &rinfo->mon1_EDID)) {
461*4882a593Smuzhiyun 					radeon_probe_i2c_connector(rinfo, ddc_crt2, &rinfo->mon1_EDID);
462*4882a593Smuzhiyun 					ddc_crt2_used = 1;
463*4882a593Smuzhiyun 				}
464*4882a593Smuzhiyun 			if (rinfo->mon2_type != MT_NONE)
465*4882a593Smuzhiyun 				if (!radeon_probe_i2c_connector(rinfo, ddc_vga, &rinfo->mon2_EDID) &&
466*4882a593Smuzhiyun 				    !ddc_crt2_used)
467*4882a593Smuzhiyun 					radeon_probe_i2c_connector(rinfo, ddc_crt2, &rinfo->mon2_EDID);
468*4882a593Smuzhiyun 		}
469*4882a593Smuzhiyun #endif /* CONFIG_FB_RADEON_I2C */
470*4882a593Smuzhiyun 		if (rinfo->mon1_type == MT_NONE) {
471*4882a593Smuzhiyun 			if (rinfo->mon2_type != MT_NONE) {
472*4882a593Smuzhiyun 				rinfo->mon1_type = rinfo->mon2_type;
473*4882a593Smuzhiyun 				rinfo->mon1_EDID = rinfo->mon2_EDID;
474*4882a593Smuzhiyun 			} else {
475*4882a593Smuzhiyun 				rinfo->mon1_type = MT_CRT;
476*4882a593Smuzhiyun 				printk(KERN_INFO "radeonfb: No valid monitor, assuming CRT on first port\n");
477*4882a593Smuzhiyun 			}
478*4882a593Smuzhiyun 			rinfo->mon2_type = MT_NONE;
479*4882a593Smuzhiyun 			rinfo->mon2_EDID = NULL;
480*4882a593Smuzhiyun 		}
481*4882a593Smuzhiyun 	} else {
482*4882a593Smuzhiyun 		/*
483*4882a593Smuzhiyun 		 * Auto-detecting display type (well... trying to ...)
484*4882a593Smuzhiyun 		 */
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 		pr_debug("Starting monitor auto detection...\n");
487*4882a593Smuzhiyun 
488*4882a593Smuzhiyun #if defined(DEBUG) && defined(CONFIG_FB_RADEON_I2C)
489*4882a593Smuzhiyun 		{
490*4882a593Smuzhiyun 			u8 *EDIDs[4] = { NULL, NULL, NULL, NULL };
491*4882a593Smuzhiyun 			int mon_types[4] = {MT_NONE, MT_NONE, MT_NONE, MT_NONE};
492*4882a593Smuzhiyun 			int i;
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun 			for (i = 0; i < 4; i++)
495*4882a593Smuzhiyun 				mon_types[i] = radeon_probe_i2c_connector(rinfo,
496*4882a593Smuzhiyun 									  i+1, &EDIDs[i]);
497*4882a593Smuzhiyun 		}
498*4882a593Smuzhiyun #endif /* DEBUG */
499*4882a593Smuzhiyun 		/*
500*4882a593Smuzhiyun 		 * Old single head cards
501*4882a593Smuzhiyun 		 */
502*4882a593Smuzhiyun 		if (!rinfo->has_CRTC2) {
503*4882a593Smuzhiyun #if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
504*4882a593Smuzhiyun 			if (rinfo->mon1_type == MT_NONE)
505*4882a593Smuzhiyun 				rinfo->mon1_type = radeon_probe_OF_head(rinfo, 0,
506*4882a593Smuzhiyun 									&rinfo->mon1_EDID);
507*4882a593Smuzhiyun #endif /* CONFIG_PPC || CONFIG_SPARC */
508*4882a593Smuzhiyun #ifdef CONFIG_FB_RADEON_I2C
509*4882a593Smuzhiyun 			if (rinfo->mon1_type == MT_NONE)
510*4882a593Smuzhiyun 				rinfo->mon1_type =
511*4882a593Smuzhiyun 					radeon_probe_i2c_connector(rinfo, ddc_dvi,
512*4882a593Smuzhiyun 								   &rinfo->mon1_EDID);
513*4882a593Smuzhiyun 			if (rinfo->mon1_type == MT_NONE)
514*4882a593Smuzhiyun 				rinfo->mon1_type =
515*4882a593Smuzhiyun 					radeon_probe_i2c_connector(rinfo, ddc_vga,
516*4882a593Smuzhiyun 								   &rinfo->mon1_EDID);
517*4882a593Smuzhiyun 			if (rinfo->mon1_type == MT_NONE)
518*4882a593Smuzhiyun 				rinfo->mon1_type =
519*4882a593Smuzhiyun 					radeon_probe_i2c_connector(rinfo, ddc_crt2,
520*4882a593Smuzhiyun 								   &rinfo->mon1_EDID);
521*4882a593Smuzhiyun #endif /* CONFIG_FB_RADEON_I2C */
522*4882a593Smuzhiyun 			if (rinfo->mon1_type == MT_NONE)
523*4882a593Smuzhiyun 				rinfo->mon1_type = MT_CRT;
524*4882a593Smuzhiyun 			goto bail;
525*4882a593Smuzhiyun 		}
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun 		/*
528*4882a593Smuzhiyun 		 * Check for cards with reversed DACs or TMDS controllers using BIOS
529*4882a593Smuzhiyun 		 */
530*4882a593Smuzhiyun 		if (rinfo->bios_seg &&
531*4882a593Smuzhiyun 		    (tmp = BIOS_IN16(rinfo->fp_bios_start + 0x50))) {
532*4882a593Smuzhiyun 			for (i = 1; i < 4; i++) {
533*4882a593Smuzhiyun 				unsigned int tmp0;
534*4882a593Smuzhiyun 
535*4882a593Smuzhiyun 				if (!BIOS_IN8(tmp + i*2) && i > 1)
536*4882a593Smuzhiyun 					break;
537*4882a593Smuzhiyun 				tmp0 = BIOS_IN16(tmp + i*2);
538*4882a593Smuzhiyun 				if ((!(tmp0 & 0x01)) && (((tmp0 >> 8) & 0x0f) == ddc_dvi)) {
539*4882a593Smuzhiyun 					rinfo->reversed_DAC = 1;
540*4882a593Smuzhiyun 					printk(KERN_INFO "radeonfb: Reversed DACs detected\n");
541*4882a593Smuzhiyun 				}
542*4882a593Smuzhiyun 				if ((((tmp0 >> 8) & 0x0f) == ddc_dvi) && ((tmp0 >> 4) & 0x01)) {
543*4882a593Smuzhiyun 					rinfo->reversed_TMDS = 1;
544*4882a593Smuzhiyun 					printk(KERN_INFO "radeonfb: Reversed TMDS detected\n");
545*4882a593Smuzhiyun 				}
546*4882a593Smuzhiyun 			}
547*4882a593Smuzhiyun 		}
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun 		/*
550*4882a593Smuzhiyun 		 * Probe primary head (DVI or laptop internal panel)
551*4882a593Smuzhiyun 		 */
552*4882a593Smuzhiyun #if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
553*4882a593Smuzhiyun 		if (rinfo->mon1_type == MT_NONE)
554*4882a593Smuzhiyun 			rinfo->mon1_type = radeon_probe_OF_head(rinfo, 0,
555*4882a593Smuzhiyun 								&rinfo->mon1_EDID);
556*4882a593Smuzhiyun #endif /* CONFIG_PPC || CONFIG_SPARC */
557*4882a593Smuzhiyun #ifdef CONFIG_FB_RADEON_I2C
558*4882a593Smuzhiyun 		if (rinfo->mon1_type == MT_NONE)
559*4882a593Smuzhiyun 			rinfo->mon1_type = radeon_probe_i2c_connector(rinfo, ddc_dvi,
560*4882a593Smuzhiyun 								      &rinfo->mon1_EDID);
561*4882a593Smuzhiyun 		if (rinfo->mon1_type == MT_NONE) {
562*4882a593Smuzhiyun 			rinfo->mon1_type = radeon_probe_i2c_connector(rinfo, ddc_crt2,
563*4882a593Smuzhiyun 								      &rinfo->mon1_EDID);
564*4882a593Smuzhiyun 			if (rinfo->mon1_type != MT_NONE)
565*4882a593Smuzhiyun 				ddc_crt2_used = 1;
566*4882a593Smuzhiyun 		}
567*4882a593Smuzhiyun #endif /* CONFIG_FB_RADEON_I2C */
568*4882a593Smuzhiyun 		if (rinfo->mon1_type == MT_NONE && rinfo->is_mobility &&
569*4882a593Smuzhiyun 		    ((rinfo->bios_seg && (INREG(BIOS_4_SCRATCH) & 4))
570*4882a593Smuzhiyun 		     || (INREG(LVDS_GEN_CNTL) & LVDS_ON))) {
571*4882a593Smuzhiyun 			rinfo->mon1_type = MT_LCD;
572*4882a593Smuzhiyun 			printk("Non-DDC laptop panel detected\n");
573*4882a593Smuzhiyun 		}
574*4882a593Smuzhiyun 		if (rinfo->mon1_type == MT_NONE)
575*4882a593Smuzhiyun 			rinfo->mon1_type = radeon_crt_is_connected(rinfo, rinfo->reversed_DAC);
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun 		/*
578*4882a593Smuzhiyun 		 * Probe secondary head (mostly VGA, can be DVI)
579*4882a593Smuzhiyun 		 */
580*4882a593Smuzhiyun #if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
581*4882a593Smuzhiyun 		if (rinfo->mon2_type == MT_NONE)
582*4882a593Smuzhiyun 			rinfo->mon2_type = radeon_probe_OF_head(rinfo, 1,
583*4882a593Smuzhiyun 								&rinfo->mon2_EDID);
584*4882a593Smuzhiyun #endif /* CONFIG_PPC || defined(CONFIG_SPARC) */
585*4882a593Smuzhiyun #ifdef CONFIG_FB_RADEON_I2C
586*4882a593Smuzhiyun 		if (rinfo->mon2_type == MT_NONE)
587*4882a593Smuzhiyun 			rinfo->mon2_type = radeon_probe_i2c_connector(rinfo, ddc_vga,
588*4882a593Smuzhiyun 								      &rinfo->mon2_EDID);
589*4882a593Smuzhiyun 		if (rinfo->mon2_type == MT_NONE && !ddc_crt2_used)
590*4882a593Smuzhiyun 			rinfo->mon2_type = radeon_probe_i2c_connector(rinfo, ddc_crt2,
591*4882a593Smuzhiyun 								      &rinfo->mon2_EDID);
592*4882a593Smuzhiyun #endif /* CONFIG_FB_RADEON_I2C */
593*4882a593Smuzhiyun 		if (rinfo->mon2_type == MT_NONE)
594*4882a593Smuzhiyun 			rinfo->mon2_type = radeon_crt_is_connected(rinfo, !rinfo->reversed_DAC);
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun 		/*
597*4882a593Smuzhiyun 		 * If we only detected port 2, we swap them, if none detected,
598*4882a593Smuzhiyun 		 * assume CRT (maybe fallback to old BIOS_SCRATCH stuff ? or look
599*4882a593Smuzhiyun 		 * at FP registers ?)
600*4882a593Smuzhiyun 		 */
601*4882a593Smuzhiyun 		if (rinfo->mon1_type == MT_NONE) {
602*4882a593Smuzhiyun 			if (rinfo->mon2_type != MT_NONE) {
603*4882a593Smuzhiyun 				rinfo->mon1_type = rinfo->mon2_type;
604*4882a593Smuzhiyun 				rinfo->mon1_EDID = rinfo->mon2_EDID;
605*4882a593Smuzhiyun 			} else
606*4882a593Smuzhiyun 				rinfo->mon1_type = MT_CRT;
607*4882a593Smuzhiyun 			rinfo->mon2_type = MT_NONE;
608*4882a593Smuzhiyun 			rinfo->mon2_EDID = NULL;
609*4882a593Smuzhiyun 		}
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 		/*
612*4882a593Smuzhiyun 		 * Deal with reversed TMDS
613*4882a593Smuzhiyun 		 */
614*4882a593Smuzhiyun 		if (rinfo->reversed_TMDS) {
615*4882a593Smuzhiyun 			/* Always keep internal TMDS as primary head */
616*4882a593Smuzhiyun 			if (rinfo->mon1_type == MT_DFP || rinfo->mon2_type == MT_DFP) {
617*4882a593Smuzhiyun 				int tmp_type = rinfo->mon1_type;
618*4882a593Smuzhiyun 				u8 *tmp_EDID = rinfo->mon1_EDID;
619*4882a593Smuzhiyun 				rinfo->mon1_type = rinfo->mon2_type;
620*4882a593Smuzhiyun 				rinfo->mon1_EDID = rinfo->mon2_EDID;
621*4882a593Smuzhiyun 				rinfo->mon2_type = tmp_type;
622*4882a593Smuzhiyun 				rinfo->mon2_EDID = tmp_EDID;
623*4882a593Smuzhiyun 				if (rinfo->mon1_type == MT_CRT || rinfo->mon2_type == MT_CRT)
624*4882a593Smuzhiyun 					rinfo->reversed_DAC ^= 1;
625*4882a593Smuzhiyun 			}
626*4882a593Smuzhiyun 		}
627*4882a593Smuzhiyun 	}
628*4882a593Smuzhiyun 	if (ignore_edid) {
629*4882a593Smuzhiyun 		kfree(rinfo->mon1_EDID);
630*4882a593Smuzhiyun 		rinfo->mon1_EDID = NULL;
631*4882a593Smuzhiyun 		kfree(rinfo->mon2_EDID);
632*4882a593Smuzhiyun 		rinfo->mon2_EDID = NULL;
633*4882a593Smuzhiyun 	}
634*4882a593Smuzhiyun 
635*4882a593Smuzhiyun  bail:
636*4882a593Smuzhiyun 	printk(KERN_INFO "radeonfb: Monitor 1 type %s found\n",
637*4882a593Smuzhiyun 	       radeon_get_mon_name(rinfo->mon1_type));
638*4882a593Smuzhiyun 	if (rinfo->mon1_EDID)
639*4882a593Smuzhiyun 		printk(KERN_INFO "radeonfb: EDID probed\n");
640*4882a593Smuzhiyun 	if (!rinfo->has_CRTC2)
641*4882a593Smuzhiyun 		return;
642*4882a593Smuzhiyun 	printk(KERN_INFO "radeonfb: Monitor 2 type %s found\n",
643*4882a593Smuzhiyun 	       radeon_get_mon_name(rinfo->mon2_type));
644*4882a593Smuzhiyun 	if (rinfo->mon2_EDID)
645*4882a593Smuzhiyun 		printk(KERN_INFO "radeonfb: EDID probed\n");
646*4882a593Smuzhiyun }
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun 
649*4882a593Smuzhiyun /*
650*4882a593Smuzhiyun  * This function applies any arch/model/machine specific fixups
651*4882a593Smuzhiyun  * to the panel info. It may eventually alter EDID block as
652*4882a593Smuzhiyun  * well or whatever is specific to a given model and not probed
653*4882a593Smuzhiyun  * properly by the default code
654*4882a593Smuzhiyun  */
radeon_fixup_panel_info(struct radeonfb_info * rinfo)655*4882a593Smuzhiyun static void radeon_fixup_panel_info(struct radeonfb_info *rinfo)
656*4882a593Smuzhiyun {
657*4882a593Smuzhiyun #ifdef CONFIG_PPC
658*4882a593Smuzhiyun 	/*
659*4882a593Smuzhiyun 	 * LCD Flat panels should use fixed dividers, we enfore that on
660*4882a593Smuzhiyun 	 * PPC only for now...
661*4882a593Smuzhiyun 	 */
662*4882a593Smuzhiyun 	if (!rinfo->panel_info.use_bios_dividers && rinfo->mon1_type == MT_LCD
663*4882a593Smuzhiyun 	    && rinfo->is_mobility) {
664*4882a593Smuzhiyun 		int ppll_div_sel;
665*4882a593Smuzhiyun 		u32 ppll_divn;
666*4882a593Smuzhiyun 		ppll_div_sel = INREG8(CLOCK_CNTL_INDEX + 1) & 0x3;
667*4882a593Smuzhiyun 		radeon_pll_errata_after_index(rinfo);
668*4882a593Smuzhiyun 		ppll_divn = INPLL(PPLL_DIV_0 + ppll_div_sel);
669*4882a593Smuzhiyun 		rinfo->panel_info.ref_divider = rinfo->pll.ref_div;
670*4882a593Smuzhiyun 		rinfo->panel_info.fbk_divider = ppll_divn & 0x7ff;
671*4882a593Smuzhiyun 		rinfo->panel_info.post_divider = (ppll_divn >> 16) & 0x7;
672*4882a593Smuzhiyun 		rinfo->panel_info.use_bios_dividers = 1;
673*4882a593Smuzhiyun 
674*4882a593Smuzhiyun 		printk(KERN_DEBUG "radeonfb: Using Firmware dividers 0x%08x "
675*4882a593Smuzhiyun 		       "from PPLL %d\n",
676*4882a593Smuzhiyun 		       rinfo->panel_info.fbk_divider |
677*4882a593Smuzhiyun 		       (rinfo->panel_info.post_divider << 16),
678*4882a593Smuzhiyun 		       ppll_div_sel);
679*4882a593Smuzhiyun 	}
680*4882a593Smuzhiyun #endif /* CONFIG_PPC */
681*4882a593Smuzhiyun }
682*4882a593Smuzhiyun 
683*4882a593Smuzhiyun 
684*4882a593Smuzhiyun /*
685*4882a593Smuzhiyun  * Fill up panel infos from a mode definition, either returned by the EDID
686*4882a593Smuzhiyun  * or from the default mode when we can't do any better
687*4882a593Smuzhiyun  */
radeon_var_to_panel_info(struct radeonfb_info * rinfo,struct fb_var_screeninfo * var)688*4882a593Smuzhiyun static void radeon_var_to_panel_info(struct radeonfb_info *rinfo, struct fb_var_screeninfo *var)
689*4882a593Smuzhiyun {
690*4882a593Smuzhiyun 	rinfo->panel_info.xres = var->xres;
691*4882a593Smuzhiyun 	rinfo->panel_info.yres = var->yres;
692*4882a593Smuzhiyun 	rinfo->panel_info.clock = 100000000 / var->pixclock;
693*4882a593Smuzhiyun 	rinfo->panel_info.hOver_plus = var->right_margin;
694*4882a593Smuzhiyun 	rinfo->panel_info.hSync_width = var->hsync_len;
695*4882a593Smuzhiyun        	rinfo->panel_info.hblank = var->left_margin +
696*4882a593Smuzhiyun 		(var->right_margin + var->hsync_len);
697*4882a593Smuzhiyun 	rinfo->panel_info.vOver_plus = var->lower_margin;
698*4882a593Smuzhiyun 	rinfo->panel_info.vSync_width = var->vsync_len;
699*4882a593Smuzhiyun        	rinfo->panel_info.vblank = var->upper_margin +
700*4882a593Smuzhiyun 		(var->lower_margin + var->vsync_len);
701*4882a593Smuzhiyun 	rinfo->panel_info.hAct_high =
702*4882a593Smuzhiyun 		(var->sync & FB_SYNC_HOR_HIGH_ACT) != 0;
703*4882a593Smuzhiyun 	rinfo->panel_info.vAct_high =
704*4882a593Smuzhiyun 		(var->sync & FB_SYNC_VERT_HIGH_ACT) != 0;
705*4882a593Smuzhiyun 	rinfo->panel_info.valid = 1;
706*4882a593Smuzhiyun 	/* We use a default of 200ms for the panel power delay,
707*4882a593Smuzhiyun 	 * I need to have a real schedule() instead of mdelay's in the panel code.
708*4882a593Smuzhiyun 	 * we might be possible to figure out a better power delay either from
709*4882a593Smuzhiyun 	 * MacOS OF tree or from the EDID block (proprietary extensions ?)
710*4882a593Smuzhiyun 	 */
711*4882a593Smuzhiyun 	rinfo->panel_info.pwr_delay = 200;
712*4882a593Smuzhiyun }
713*4882a593Smuzhiyun 
radeon_videomode_to_var(struct fb_var_screeninfo * var,const struct fb_videomode * mode)714*4882a593Smuzhiyun static void radeon_videomode_to_var(struct fb_var_screeninfo *var,
715*4882a593Smuzhiyun 				    const struct fb_videomode *mode)
716*4882a593Smuzhiyun {
717*4882a593Smuzhiyun 	var->xres = mode->xres;
718*4882a593Smuzhiyun 	var->yres = mode->yres;
719*4882a593Smuzhiyun 	var->xres_virtual = mode->xres;
720*4882a593Smuzhiyun 	var->yres_virtual = mode->yres;
721*4882a593Smuzhiyun 	var->xoffset = 0;
722*4882a593Smuzhiyun 	var->yoffset = 0;
723*4882a593Smuzhiyun 	var->pixclock = mode->pixclock;
724*4882a593Smuzhiyun 	var->left_margin = mode->left_margin;
725*4882a593Smuzhiyun 	var->right_margin = mode->right_margin;
726*4882a593Smuzhiyun 	var->upper_margin = mode->upper_margin;
727*4882a593Smuzhiyun 	var->lower_margin = mode->lower_margin;
728*4882a593Smuzhiyun 	var->hsync_len = mode->hsync_len;
729*4882a593Smuzhiyun 	var->vsync_len = mode->vsync_len;
730*4882a593Smuzhiyun 	var->sync = mode->sync;
731*4882a593Smuzhiyun 	var->vmode = mode->vmode;
732*4882a593Smuzhiyun }
733*4882a593Smuzhiyun 
734*4882a593Smuzhiyun #ifdef CONFIG_PPC_PSERIES
is_powerblade(const char * model)735*4882a593Smuzhiyun static int is_powerblade(const char *model)
736*4882a593Smuzhiyun {
737*4882a593Smuzhiyun 	struct device_node *root;
738*4882a593Smuzhiyun 	const char* cp;
739*4882a593Smuzhiyun 	int len, l, rc = 0;
740*4882a593Smuzhiyun 
741*4882a593Smuzhiyun 	root = of_find_node_by_path("/");
742*4882a593Smuzhiyun 	if (root && model) {
743*4882a593Smuzhiyun 		l = strlen(model);
744*4882a593Smuzhiyun 		cp = of_get_property(root, "model", &len);
745*4882a593Smuzhiyun 		if (cp)
746*4882a593Smuzhiyun 			rc = memcmp(model, cp, min(len, l)) == 0;
747*4882a593Smuzhiyun 		of_node_put(root);
748*4882a593Smuzhiyun 	}
749*4882a593Smuzhiyun 	return rc;
750*4882a593Smuzhiyun }
751*4882a593Smuzhiyun #endif
752*4882a593Smuzhiyun 
753*4882a593Smuzhiyun /*
754*4882a593Smuzhiyun  * Build the modedb for head 1 (head 2 will come later), check panel infos
755*4882a593Smuzhiyun  * from either BIOS or EDID, and pick up the default mode
756*4882a593Smuzhiyun  */
radeon_check_modes(struct radeonfb_info * rinfo,const char * mode_option)757*4882a593Smuzhiyun void radeon_check_modes(struct radeonfb_info *rinfo, const char *mode_option)
758*4882a593Smuzhiyun {
759*4882a593Smuzhiyun 	struct fb_info * info = rinfo->info;
760*4882a593Smuzhiyun 	int has_default_mode = 0;
761*4882a593Smuzhiyun 
762*4882a593Smuzhiyun 	/*
763*4882a593Smuzhiyun 	 * Fill default var first
764*4882a593Smuzhiyun 	 */
765*4882a593Smuzhiyun 	info->var = radeonfb_default_var;
766*4882a593Smuzhiyun 	INIT_LIST_HEAD(&info->modelist);
767*4882a593Smuzhiyun 
768*4882a593Smuzhiyun 	/*
769*4882a593Smuzhiyun 	 * First check out what BIOS has to say
770*4882a593Smuzhiyun 	 */
771*4882a593Smuzhiyun 	if (rinfo->mon1_type == MT_LCD)
772*4882a593Smuzhiyun 		radeon_get_panel_info_BIOS(rinfo);
773*4882a593Smuzhiyun 
774*4882a593Smuzhiyun 	/*
775*4882a593Smuzhiyun 	 * Parse EDID detailed timings and deduce panel infos if any. Right now
776*4882a593Smuzhiyun 	 * we only deal with first entry returned by parse_EDID, we may do better
777*4882a593Smuzhiyun 	 * some day...
778*4882a593Smuzhiyun 	 */
779*4882a593Smuzhiyun 	if (!rinfo->panel_info.use_bios_dividers && rinfo->mon1_type != MT_CRT
780*4882a593Smuzhiyun 	    && rinfo->mon1_EDID) {
781*4882a593Smuzhiyun 		struct fb_var_screeninfo var;
782*4882a593Smuzhiyun 		pr_debug("Parsing EDID data for panel info\n");
783*4882a593Smuzhiyun 		if (fb_parse_edid(rinfo->mon1_EDID, &var) == 0) {
784*4882a593Smuzhiyun 			if (var.xres >= rinfo->panel_info.xres &&
785*4882a593Smuzhiyun 			    var.yres >= rinfo->panel_info.yres)
786*4882a593Smuzhiyun 				radeon_var_to_panel_info(rinfo, &var);
787*4882a593Smuzhiyun 		}
788*4882a593Smuzhiyun 	}
789*4882a593Smuzhiyun 
790*4882a593Smuzhiyun 	/*
791*4882a593Smuzhiyun 	 * Do any additional platform/arch fixups to the panel infos
792*4882a593Smuzhiyun 	 */
793*4882a593Smuzhiyun 	radeon_fixup_panel_info(rinfo);
794*4882a593Smuzhiyun 
795*4882a593Smuzhiyun 	/*
796*4882a593Smuzhiyun 	 * If we have some valid panel infos, we setup the default mode based on
797*4882a593Smuzhiyun 	 * those
798*4882a593Smuzhiyun 	 */
799*4882a593Smuzhiyun 	if (rinfo->mon1_type != MT_CRT && rinfo->panel_info.valid) {
800*4882a593Smuzhiyun 		struct fb_var_screeninfo *var = &info->var;
801*4882a593Smuzhiyun 
802*4882a593Smuzhiyun 		pr_debug("Setting up default mode based on panel info\n");
803*4882a593Smuzhiyun 		var->xres = rinfo->panel_info.xres;
804*4882a593Smuzhiyun 		var->yres = rinfo->panel_info.yres;
805*4882a593Smuzhiyun 		var->xres_virtual = rinfo->panel_info.xres;
806*4882a593Smuzhiyun 		var->yres_virtual = rinfo->panel_info.yres;
807*4882a593Smuzhiyun 		var->xoffset = var->yoffset = 0;
808*4882a593Smuzhiyun 		var->bits_per_pixel = 8;
809*4882a593Smuzhiyun 		var->pixclock = 100000000 / rinfo->panel_info.clock;
810*4882a593Smuzhiyun 		var->left_margin = (rinfo->panel_info.hblank - rinfo->panel_info.hOver_plus
811*4882a593Smuzhiyun 				    - rinfo->panel_info.hSync_width);
812*4882a593Smuzhiyun 		var->right_margin = rinfo->panel_info.hOver_plus;
813*4882a593Smuzhiyun 		var->upper_margin = (rinfo->panel_info.vblank - rinfo->panel_info.vOver_plus
814*4882a593Smuzhiyun 				     - rinfo->panel_info.vSync_width);
815*4882a593Smuzhiyun 		var->lower_margin = rinfo->panel_info.vOver_plus;
816*4882a593Smuzhiyun 		var->hsync_len = rinfo->panel_info.hSync_width;
817*4882a593Smuzhiyun 		var->vsync_len = rinfo->panel_info.vSync_width;
818*4882a593Smuzhiyun 		var->sync = 0;
819*4882a593Smuzhiyun 		if (rinfo->panel_info.hAct_high)
820*4882a593Smuzhiyun 			var->sync |= FB_SYNC_HOR_HIGH_ACT;
821*4882a593Smuzhiyun 		if (rinfo->panel_info.vAct_high)
822*4882a593Smuzhiyun 			var->sync |= FB_SYNC_VERT_HIGH_ACT;
823*4882a593Smuzhiyun 		var->vmode = 0;
824*4882a593Smuzhiyun 		has_default_mode = 1;
825*4882a593Smuzhiyun 	}
826*4882a593Smuzhiyun 
827*4882a593Smuzhiyun 	/*
828*4882a593Smuzhiyun 	 * Now build modedb from EDID
829*4882a593Smuzhiyun 	 */
830*4882a593Smuzhiyun 	if (rinfo->mon1_EDID) {
831*4882a593Smuzhiyun 		fb_edid_to_monspecs(rinfo->mon1_EDID, &info->monspecs);
832*4882a593Smuzhiyun 		fb_videomode_to_modelist(info->monspecs.modedb,
833*4882a593Smuzhiyun 					 info->monspecs.modedb_len,
834*4882a593Smuzhiyun 					 &info->modelist);
835*4882a593Smuzhiyun 		rinfo->mon1_modedb = info->monspecs.modedb;
836*4882a593Smuzhiyun 		rinfo->mon1_dbsize = info->monspecs.modedb_len;
837*4882a593Smuzhiyun 	}
838*4882a593Smuzhiyun 
839*4882a593Smuzhiyun 
840*4882a593Smuzhiyun 	/*
841*4882a593Smuzhiyun 	 * Finally, if we don't have panel infos we need to figure some (or
842*4882a593Smuzhiyun 	 * we try to read it from card), we try to pick a default mode
843*4882a593Smuzhiyun 	 * and create some panel infos. Whatever...
844*4882a593Smuzhiyun 	 */
845*4882a593Smuzhiyun 	if (rinfo->mon1_type != MT_CRT && !rinfo->panel_info.valid) {
846*4882a593Smuzhiyun 		struct fb_videomode	*modedb;
847*4882a593Smuzhiyun 		int			dbsize;
848*4882a593Smuzhiyun 		char			modename[32];
849*4882a593Smuzhiyun 
850*4882a593Smuzhiyun 		pr_debug("Guessing panel info...\n");
851*4882a593Smuzhiyun 		if (rinfo->panel_info.xres == 0 || rinfo->panel_info.yres == 0) {
852*4882a593Smuzhiyun 			u32 tmp = INREG(FP_HORZ_STRETCH) & HORZ_PANEL_SIZE;
853*4882a593Smuzhiyun 			rinfo->panel_info.xres = ((tmp >> HORZ_PANEL_SHIFT) + 1) * 8;
854*4882a593Smuzhiyun 			tmp = INREG(FP_VERT_STRETCH) & VERT_PANEL_SIZE;
855*4882a593Smuzhiyun 			rinfo->panel_info.yres = (tmp >> VERT_PANEL_SHIFT) + 1;
856*4882a593Smuzhiyun 		}
857*4882a593Smuzhiyun 		if (rinfo->panel_info.xres == 0 || rinfo->panel_info.yres == 0) {
858*4882a593Smuzhiyun 			printk(KERN_WARNING "radeonfb: Can't find panel size, going back to CRT\n");
859*4882a593Smuzhiyun 			rinfo->mon1_type = MT_CRT;
860*4882a593Smuzhiyun 			goto pickup_default;
861*4882a593Smuzhiyun 		}
862*4882a593Smuzhiyun 		printk(KERN_WARNING "radeonfb: Assuming panel size %dx%d\n",
863*4882a593Smuzhiyun 		       rinfo->panel_info.xres, rinfo->panel_info.yres);
864*4882a593Smuzhiyun 		modedb = rinfo->mon1_modedb;
865*4882a593Smuzhiyun 		dbsize = rinfo->mon1_dbsize;
866*4882a593Smuzhiyun 		snprintf(modename, 31, "%dx%d", rinfo->panel_info.xres, rinfo->panel_info.yres);
867*4882a593Smuzhiyun 		if (fb_find_mode(&info->var, info, modename,
868*4882a593Smuzhiyun 				 modedb, dbsize, NULL, 8) == 0) {
869*4882a593Smuzhiyun 			printk(KERN_WARNING "radeonfb: Can't find mode for panel size, going back to CRT\n");
870*4882a593Smuzhiyun 			rinfo->mon1_type = MT_CRT;
871*4882a593Smuzhiyun 			goto pickup_default;
872*4882a593Smuzhiyun 		}
873*4882a593Smuzhiyun 		has_default_mode = 1;
874*4882a593Smuzhiyun 		radeon_var_to_panel_info(rinfo, &info->var);
875*4882a593Smuzhiyun 	}
876*4882a593Smuzhiyun 
877*4882a593Smuzhiyun  pickup_default:
878*4882a593Smuzhiyun 	/*
879*4882a593Smuzhiyun 	 * Apply passed-in mode option if any
880*4882a593Smuzhiyun 	 */
881*4882a593Smuzhiyun 	if (mode_option) {
882*4882a593Smuzhiyun 		if (fb_find_mode(&info->var, info, mode_option,
883*4882a593Smuzhiyun 				 info->monspecs.modedb,
884*4882a593Smuzhiyun 				 info->monspecs.modedb_len, NULL, 8) != 0)
885*4882a593Smuzhiyun 			has_default_mode = 1;
886*4882a593Smuzhiyun  	}
887*4882a593Smuzhiyun 
888*4882a593Smuzhiyun #ifdef CONFIG_PPC_PSERIES
889*4882a593Smuzhiyun 	if (!has_default_mode && (
890*4882a593Smuzhiyun 		is_powerblade("IBM,8842") || /* JS20 */
891*4882a593Smuzhiyun 		is_powerblade("IBM,8844") || /* JS21 */
892*4882a593Smuzhiyun 		is_powerblade("IBM,7998") || /* JS12/JS21/JS22 */
893*4882a593Smuzhiyun 		is_powerblade("IBM,0792") || /* QS21 */
894*4882a593Smuzhiyun 		is_powerblade("IBM,0793")    /* QS22 */
895*4882a593Smuzhiyun 	    )) {
896*4882a593Smuzhiyun 		printk("Falling back to 800x600 on JSxx hardware\n");
897*4882a593Smuzhiyun 		if (fb_find_mode(&info->var, info, "800x600@60",
898*4882a593Smuzhiyun 				 info->monspecs.modedb,
899*4882a593Smuzhiyun 				 info->monspecs.modedb_len, NULL, 8) != 0)
900*4882a593Smuzhiyun 			has_default_mode = 1;
901*4882a593Smuzhiyun 	}
902*4882a593Smuzhiyun #endif
903*4882a593Smuzhiyun 
904*4882a593Smuzhiyun 	/*
905*4882a593Smuzhiyun 	 * Still no mode, let's pick up a default from the db
906*4882a593Smuzhiyun 	 */
907*4882a593Smuzhiyun 	if (!has_default_mode && info->monspecs.modedb != NULL) {
908*4882a593Smuzhiyun 		struct fb_monspecs *specs = &info->monspecs;
909*4882a593Smuzhiyun 		struct fb_videomode *modedb = NULL;
910*4882a593Smuzhiyun 
911*4882a593Smuzhiyun 		/* get preferred timing */
912*4882a593Smuzhiyun 		if (specs->misc & FB_MISC_1ST_DETAIL) {
913*4882a593Smuzhiyun 			int i;
914*4882a593Smuzhiyun 
915*4882a593Smuzhiyun 			for (i = 0; i < specs->modedb_len; i++) {
916*4882a593Smuzhiyun 				if (specs->modedb[i].flag & FB_MODE_IS_FIRST) {
917*4882a593Smuzhiyun 					modedb = &specs->modedb[i];
918*4882a593Smuzhiyun 					break;
919*4882a593Smuzhiyun 				}
920*4882a593Smuzhiyun 			}
921*4882a593Smuzhiyun 		} else {
922*4882a593Smuzhiyun 			/* otherwise, get first mode in database */
923*4882a593Smuzhiyun 			modedb = &specs->modedb[0];
924*4882a593Smuzhiyun 		}
925*4882a593Smuzhiyun 		if (modedb != NULL) {
926*4882a593Smuzhiyun 			info->var.bits_per_pixel = 8;
927*4882a593Smuzhiyun 			radeon_videomode_to_var(&info->var, modedb);
928*4882a593Smuzhiyun 			has_default_mode = 1;
929*4882a593Smuzhiyun 		}
930*4882a593Smuzhiyun 	}
931*4882a593Smuzhiyun 	if (1) {
932*4882a593Smuzhiyun 		struct fb_videomode mode;
933*4882a593Smuzhiyun 		/* Make sure that whatever mode got selected is actually in the
934*4882a593Smuzhiyun 		 * modelist or the kernel may die
935*4882a593Smuzhiyun 		 */
936*4882a593Smuzhiyun 		fb_var_to_videomode(&mode, &info->var);
937*4882a593Smuzhiyun 		fb_add_videomode(&mode, &info->modelist);
938*4882a593Smuzhiyun 	}
939*4882a593Smuzhiyun }
940*4882a593Smuzhiyun 
941*4882a593Smuzhiyun /*
942*4882a593Smuzhiyun  * The code below is used to pick up a mode in check_var and
943*4882a593Smuzhiyun  * set_var. It should be made generic
944*4882a593Smuzhiyun  */
945*4882a593Smuzhiyun 
946*4882a593Smuzhiyun /*
947*4882a593Smuzhiyun  * This is used when looking for modes. We assign a "distance" value
948*4882a593Smuzhiyun  * to a mode in the modedb depending how "close" it is from what we
949*4882a593Smuzhiyun  * are looking for.
950*4882a593Smuzhiyun  * Currently, we don't compare that much, we could do better but
951*4882a593Smuzhiyun  * the current fbcon doesn't quite mind ;)
952*4882a593Smuzhiyun  */
radeon_compare_modes(const struct fb_var_screeninfo * var,const struct fb_videomode * mode)953*4882a593Smuzhiyun static int radeon_compare_modes(const struct fb_var_screeninfo *var,
954*4882a593Smuzhiyun 				const struct fb_videomode *mode)
955*4882a593Smuzhiyun {
956*4882a593Smuzhiyun 	int distance = 0;
957*4882a593Smuzhiyun 
958*4882a593Smuzhiyun 	distance = mode->yres - var->yres;
959*4882a593Smuzhiyun 	distance += (mode->xres - var->xres)/2;
960*4882a593Smuzhiyun 	return distance;
961*4882a593Smuzhiyun }
962*4882a593Smuzhiyun 
963*4882a593Smuzhiyun /*
964*4882a593Smuzhiyun  * This function is called by check_var, it gets the passed in mode parameter, and
965*4882a593Smuzhiyun  * outputs a valid mode matching the passed-in one as closely as possible.
966*4882a593Smuzhiyun  * We need something better ultimately. Things like fbcon basically pass us out
967*4882a593Smuzhiyun  * current mode with xres/yres hacked, while things like XFree will actually
968*4882a593Smuzhiyun  * produce a full timing that we should respect as much as possible.
969*4882a593Smuzhiyun  *
970*4882a593Smuzhiyun  * This is why I added the FB_ACTIVATE_FIND that is used by fbcon. Without this,
971*4882a593Smuzhiyun  * we do a simple spec match, that's all. With it, we actually look for a mode in
972*4882a593Smuzhiyun  * either our monitor modedb or the vesa one if none
973*4882a593Smuzhiyun  *
974*4882a593Smuzhiyun  */
radeon_match_mode(struct radeonfb_info * rinfo,struct fb_var_screeninfo * dest,const struct fb_var_screeninfo * src)975*4882a593Smuzhiyun int  radeon_match_mode(struct radeonfb_info *rinfo,
976*4882a593Smuzhiyun 		       struct fb_var_screeninfo *dest,
977*4882a593Smuzhiyun 		       const struct fb_var_screeninfo *src)
978*4882a593Smuzhiyun {
979*4882a593Smuzhiyun 	const struct fb_videomode	*db = vesa_modes;
980*4882a593Smuzhiyun 	int				i, dbsize = 34;
981*4882a593Smuzhiyun 	int				has_rmx, native_db = 0;
982*4882a593Smuzhiyun 	int				distance = INT_MAX;
983*4882a593Smuzhiyun 	const struct fb_videomode	*candidate = NULL;
984*4882a593Smuzhiyun 
985*4882a593Smuzhiyun 	/* Start with a copy of the requested mode */
986*4882a593Smuzhiyun 	memcpy(dest, src, sizeof(struct fb_var_screeninfo));
987*4882a593Smuzhiyun 
988*4882a593Smuzhiyun 	/* Check if we have a modedb built from EDID */
989*4882a593Smuzhiyun 	if (rinfo->mon1_modedb) {
990*4882a593Smuzhiyun 		db = rinfo->mon1_modedb;
991*4882a593Smuzhiyun 		dbsize = rinfo->mon1_dbsize;
992*4882a593Smuzhiyun 		native_db = 1;
993*4882a593Smuzhiyun 	}
994*4882a593Smuzhiyun 
995*4882a593Smuzhiyun 	/* Check if we have a scaler allowing any fancy mode */
996*4882a593Smuzhiyun 	has_rmx = rinfo->mon1_type == MT_LCD || rinfo->mon1_type == MT_DFP;
997*4882a593Smuzhiyun 
998*4882a593Smuzhiyun 	/* If we have a scaler and are passed FB_ACTIVATE_TEST or
999*4882a593Smuzhiyun 	 * FB_ACTIVATE_NOW, just do basic checking and return if the
1000*4882a593Smuzhiyun 	 * mode match
1001*4882a593Smuzhiyun 	 */
1002*4882a593Smuzhiyun 	if ((src->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_TEST ||
1003*4882a593Smuzhiyun 	    (src->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) {
1004*4882a593Smuzhiyun 		/* We don't have an RMX, validate timings. If we don't have
1005*4882a593Smuzhiyun 	 	 * monspecs, we should be paranoid and not let use go above
1006*4882a593Smuzhiyun 		 * 640x480-60, but I assume userland knows what it's doing here
1007*4882a593Smuzhiyun 		 * (though I may be proven wrong...)
1008*4882a593Smuzhiyun 		 */
1009*4882a593Smuzhiyun 		if (has_rmx == 0 && rinfo->mon1_modedb)
1010*4882a593Smuzhiyun 			if (fb_validate_mode((struct fb_var_screeninfo *)src, rinfo->info))
1011*4882a593Smuzhiyun 				return -EINVAL;
1012*4882a593Smuzhiyun 		return 0;
1013*4882a593Smuzhiyun 	}
1014*4882a593Smuzhiyun 
1015*4882a593Smuzhiyun 	/* Now look for a mode in the database */
1016*4882a593Smuzhiyun 	while (db) {
1017*4882a593Smuzhiyun 		for (i = 0; i < dbsize; i++) {
1018*4882a593Smuzhiyun 			int d;
1019*4882a593Smuzhiyun 
1020*4882a593Smuzhiyun 			if (db[i].yres < src->yres)
1021*4882a593Smuzhiyun 				continue;
1022*4882a593Smuzhiyun 			if (db[i].xres < src->xres)
1023*4882a593Smuzhiyun 				continue;
1024*4882a593Smuzhiyun 			d = radeon_compare_modes(src, &db[i]);
1025*4882a593Smuzhiyun 			/* If the new mode is at least as good as the previous one,
1026*4882a593Smuzhiyun 			 * then it's our new candidate
1027*4882a593Smuzhiyun 			 */
1028*4882a593Smuzhiyun 			if (d < distance) {
1029*4882a593Smuzhiyun 				candidate = &db[i];
1030*4882a593Smuzhiyun 				distance = d;
1031*4882a593Smuzhiyun 			}
1032*4882a593Smuzhiyun 		}
1033*4882a593Smuzhiyun 		db = NULL;
1034*4882a593Smuzhiyun 		/* If we have a scaler, we allow any mode from the database */
1035*4882a593Smuzhiyun 		if (native_db && has_rmx) {
1036*4882a593Smuzhiyun 			db = vesa_modes;
1037*4882a593Smuzhiyun 			dbsize = 34;
1038*4882a593Smuzhiyun 			native_db = 0;
1039*4882a593Smuzhiyun 		}
1040*4882a593Smuzhiyun 	}
1041*4882a593Smuzhiyun 
1042*4882a593Smuzhiyun 	/* If we have found a match, return it */
1043*4882a593Smuzhiyun 	if (candidate != NULL) {
1044*4882a593Smuzhiyun 		radeon_videomode_to_var(dest, candidate);
1045*4882a593Smuzhiyun 		return 0;
1046*4882a593Smuzhiyun 	}
1047*4882a593Smuzhiyun 
1048*4882a593Smuzhiyun 	/* If we haven't and don't have a scaler, fail */
1049*4882a593Smuzhiyun 	if (!has_rmx)
1050*4882a593Smuzhiyun 		return -EINVAL;
1051*4882a593Smuzhiyun 
1052*4882a593Smuzhiyun 	return 0;
1053*4882a593Smuzhiyun }
1054