xref: /OK3568_Linux_fs/kernel/drivers/video/fbdev/aty/radeon_i2c.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun #include "radeonfb.h"
3*4882a593Smuzhiyun 
4*4882a593Smuzhiyun #include <linux/module.h>
5*4882a593Smuzhiyun #include <linux/kernel.h>
6*4882a593Smuzhiyun #include <linux/delay.h>
7*4882a593Smuzhiyun #include <linux/fb.h>
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/i2c.h>
11*4882a593Smuzhiyun #include <linux/i2c-algo-bit.h>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <asm/io.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include <video/radeon.h>
16*4882a593Smuzhiyun #include "../edid.h"
17*4882a593Smuzhiyun 
radeon_gpio_setscl(void * data,int state)18*4882a593Smuzhiyun static void radeon_gpio_setscl(void* data, int state)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun 	struct radeon_i2c_chan 	*chan = data;
21*4882a593Smuzhiyun 	struct radeonfb_info	*rinfo = chan->rinfo;
22*4882a593Smuzhiyun 	u32			val;
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun 	val = INREG(chan->ddc_reg) & ~(VGA_DDC_CLK_OUT_EN);
25*4882a593Smuzhiyun 	if (!state)
26*4882a593Smuzhiyun 		val |= VGA_DDC_CLK_OUT_EN;
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun 	OUTREG(chan->ddc_reg, val);
29*4882a593Smuzhiyun 	(void)INREG(chan->ddc_reg);
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun 
radeon_gpio_setsda(void * data,int state)32*4882a593Smuzhiyun static void radeon_gpio_setsda(void* data, int state)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun 	struct radeon_i2c_chan 	*chan = data;
35*4882a593Smuzhiyun 	struct radeonfb_info	*rinfo = chan->rinfo;
36*4882a593Smuzhiyun 	u32			val;
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	val = INREG(chan->ddc_reg) & ~(VGA_DDC_DATA_OUT_EN);
39*4882a593Smuzhiyun 	if (!state)
40*4882a593Smuzhiyun 		val |= VGA_DDC_DATA_OUT_EN;
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	OUTREG(chan->ddc_reg, val);
43*4882a593Smuzhiyun 	(void)INREG(chan->ddc_reg);
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun 
radeon_gpio_getscl(void * data)46*4882a593Smuzhiyun static int radeon_gpio_getscl(void* data)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun 	struct radeon_i2c_chan 	*chan = data;
49*4882a593Smuzhiyun 	struct radeonfb_info	*rinfo = chan->rinfo;
50*4882a593Smuzhiyun 	u32			val;
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	val = INREG(chan->ddc_reg);
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	return (val & VGA_DDC_CLK_INPUT) ? 1 : 0;
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun 
radeon_gpio_getsda(void * data)57*4882a593Smuzhiyun static int radeon_gpio_getsda(void* data)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun 	struct radeon_i2c_chan 	*chan = data;
60*4882a593Smuzhiyun 	struct radeonfb_info	*rinfo = chan->rinfo;
61*4882a593Smuzhiyun 	u32			val;
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	val = INREG(chan->ddc_reg);
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	return (val & VGA_DDC_DATA_INPUT) ? 1 : 0;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun 
radeon_setup_i2c_bus(struct radeon_i2c_chan * chan,const char * name)68*4882a593Smuzhiyun static int radeon_setup_i2c_bus(struct radeon_i2c_chan *chan, const char *name)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	int rc;
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	snprintf(chan->adapter.name, sizeof(chan->adapter.name),
73*4882a593Smuzhiyun 		 "radeonfb %s", name);
74*4882a593Smuzhiyun 	chan->adapter.owner		= THIS_MODULE;
75*4882a593Smuzhiyun 	chan->adapter.algo_data		= &chan->algo;
76*4882a593Smuzhiyun 	chan->adapter.dev.parent	= &chan->rinfo->pdev->dev;
77*4882a593Smuzhiyun 	chan->algo.setsda		= radeon_gpio_setsda;
78*4882a593Smuzhiyun 	chan->algo.setscl		= radeon_gpio_setscl;
79*4882a593Smuzhiyun 	chan->algo.getsda		= radeon_gpio_getsda;
80*4882a593Smuzhiyun 	chan->algo.getscl		= radeon_gpio_getscl;
81*4882a593Smuzhiyun 	chan->algo.udelay		= 10;
82*4882a593Smuzhiyun 	chan->algo.timeout		= 20;
83*4882a593Smuzhiyun 	chan->algo.data 		= chan;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	i2c_set_adapdata(&chan->adapter, chan);
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	/* Raise SCL and SDA */
88*4882a593Smuzhiyun 	radeon_gpio_setsda(chan, 1);
89*4882a593Smuzhiyun 	radeon_gpio_setscl(chan, 1);
90*4882a593Smuzhiyun 	udelay(20);
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	rc = i2c_bit_add_bus(&chan->adapter);
93*4882a593Smuzhiyun 	if (rc == 0)
94*4882a593Smuzhiyun 		dev_dbg(&chan->rinfo->pdev->dev, "I2C bus %s registered.\n", name);
95*4882a593Smuzhiyun 	else
96*4882a593Smuzhiyun 		dev_warn(&chan->rinfo->pdev->dev, "Failed to register I2C bus %s.\n", name);
97*4882a593Smuzhiyun 	return rc;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun 
radeon_create_i2c_busses(struct radeonfb_info * rinfo)100*4882a593Smuzhiyun void radeon_create_i2c_busses(struct radeonfb_info *rinfo)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun 	rinfo->i2c[0].rinfo	= rinfo;
103*4882a593Smuzhiyun 	rinfo->i2c[0].ddc_reg	= GPIO_MONID;
104*4882a593Smuzhiyun #ifndef CONFIG_PPC
105*4882a593Smuzhiyun 	rinfo->i2c[0].adapter.class = I2C_CLASS_HWMON;
106*4882a593Smuzhiyun #endif
107*4882a593Smuzhiyun 	radeon_setup_i2c_bus(&rinfo->i2c[0], "monid");
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	rinfo->i2c[1].rinfo	= rinfo;
110*4882a593Smuzhiyun 	rinfo->i2c[1].ddc_reg	= GPIO_DVI_DDC;
111*4882a593Smuzhiyun 	radeon_setup_i2c_bus(&rinfo->i2c[1], "dvi");
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	rinfo->i2c[2].rinfo	= rinfo;
114*4882a593Smuzhiyun 	rinfo->i2c[2].ddc_reg	= GPIO_VGA_DDC;
115*4882a593Smuzhiyun 	radeon_setup_i2c_bus(&rinfo->i2c[2], "vga");
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	rinfo->i2c[3].rinfo	= rinfo;
118*4882a593Smuzhiyun 	rinfo->i2c[3].ddc_reg	= GPIO_CRT2_DDC;
119*4882a593Smuzhiyun 	radeon_setup_i2c_bus(&rinfo->i2c[3], "crt2");
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun 
radeon_delete_i2c_busses(struct radeonfb_info * rinfo)122*4882a593Smuzhiyun void radeon_delete_i2c_busses(struct radeonfb_info *rinfo)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun 	if (rinfo->i2c[0].rinfo)
125*4882a593Smuzhiyun 		i2c_del_adapter(&rinfo->i2c[0].adapter);
126*4882a593Smuzhiyun 	rinfo->i2c[0].rinfo = NULL;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	if (rinfo->i2c[1].rinfo)
129*4882a593Smuzhiyun 		i2c_del_adapter(&rinfo->i2c[1].adapter);
130*4882a593Smuzhiyun 	rinfo->i2c[1].rinfo = NULL;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	if (rinfo->i2c[2].rinfo)
133*4882a593Smuzhiyun 		i2c_del_adapter(&rinfo->i2c[2].adapter);
134*4882a593Smuzhiyun 	rinfo->i2c[2].rinfo = NULL;
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	if (rinfo->i2c[3].rinfo)
137*4882a593Smuzhiyun 		i2c_del_adapter(&rinfo->i2c[3].adapter);
138*4882a593Smuzhiyun 	rinfo->i2c[3].rinfo = NULL;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun 
radeon_probe_i2c_connector(struct radeonfb_info * rinfo,int conn,u8 ** out_edid)141*4882a593Smuzhiyun int radeon_probe_i2c_connector(struct radeonfb_info *rinfo, int conn,
142*4882a593Smuzhiyun 			       u8 **out_edid)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun 	u8 *edid;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	edid = fb_ddc_read(&rinfo->i2c[conn-1].adapter);
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	if (out_edid)
149*4882a593Smuzhiyun 		*out_edid = edid;
150*4882a593Smuzhiyun 	if (!edid) {
151*4882a593Smuzhiyun 		pr_debug("radeonfb: I2C (port %d) ... not found\n", conn);
152*4882a593Smuzhiyun 		return MT_NONE;
153*4882a593Smuzhiyun 	}
154*4882a593Smuzhiyun 	if (edid[0x14] & 0x80) {
155*4882a593Smuzhiyun 		/* Fix detection using BIOS tables */
156*4882a593Smuzhiyun 		if (rinfo->is_mobility /*&& conn == ddc_dvi*/ &&
157*4882a593Smuzhiyun 		    (INREG(LVDS_GEN_CNTL) & LVDS_ON)) {
158*4882a593Smuzhiyun 			pr_debug("radeonfb: I2C (port %d) ... found LVDS panel\n", conn);
159*4882a593Smuzhiyun 			return MT_LCD;
160*4882a593Smuzhiyun 		} else {
161*4882a593Smuzhiyun 			pr_debug("radeonfb: I2C (port %d) ... found TMDS panel\n", conn);
162*4882a593Smuzhiyun 			return MT_DFP;
163*4882a593Smuzhiyun 		}
164*4882a593Smuzhiyun 	}
165*4882a593Smuzhiyun 	pr_debug("radeonfb: I2C (port %d) ... found CRT display\n", conn);
166*4882a593Smuzhiyun 	return MT_CRT;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun 
169