1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
4*4882a593Smuzhiyun * Author: Alex Williamson <alex.williamson@redhat.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Derived from original vfio:
7*4882a593Smuzhiyun * Copyright 2010 Cisco Systems, Inc. All rights reserved.
8*4882a593Smuzhiyun * Author: Tom Lyon, pugs@cisco.com
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/mutex.h>
12*4882a593Smuzhiyun #include <linux/pci.h>
13*4882a593Smuzhiyun #include <linux/irqbypass.h>
14*4882a593Smuzhiyun #include <linux/types.h>
15*4882a593Smuzhiyun #include <linux/uuid.h>
16*4882a593Smuzhiyun #include <linux/notifier.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #ifndef VFIO_PCI_PRIVATE_H
19*4882a593Smuzhiyun #define VFIO_PCI_PRIVATE_H
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define VFIO_PCI_OFFSET_SHIFT 40
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define VFIO_PCI_OFFSET_TO_INDEX(off) (off >> VFIO_PCI_OFFSET_SHIFT)
24*4882a593Smuzhiyun #define VFIO_PCI_INDEX_TO_OFFSET(index) ((u64)(index) << VFIO_PCI_OFFSET_SHIFT)
25*4882a593Smuzhiyun #define VFIO_PCI_OFFSET_MASK (((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1)
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /* Special capability IDs predefined access */
28*4882a593Smuzhiyun #define PCI_CAP_ID_INVALID 0xFF /* default raw access */
29*4882a593Smuzhiyun #define PCI_CAP_ID_INVALID_VIRT 0xFE /* default virt access */
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /* Cap maximum number of ioeventfds per device (arbitrary) */
32*4882a593Smuzhiyun #define VFIO_PCI_IOEVENTFD_MAX 1000
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun struct vfio_pci_ioeventfd {
35*4882a593Smuzhiyun struct list_head next;
36*4882a593Smuzhiyun struct vfio_pci_device *vdev;
37*4882a593Smuzhiyun struct virqfd *virqfd;
38*4882a593Smuzhiyun void __iomem *addr;
39*4882a593Smuzhiyun uint64_t data;
40*4882a593Smuzhiyun loff_t pos;
41*4882a593Smuzhiyun int bar;
42*4882a593Smuzhiyun int count;
43*4882a593Smuzhiyun bool test_mem;
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun struct vfio_pci_irq_ctx {
47*4882a593Smuzhiyun struct eventfd_ctx *trigger;
48*4882a593Smuzhiyun struct virqfd *unmask;
49*4882a593Smuzhiyun struct virqfd *mask;
50*4882a593Smuzhiyun char *name;
51*4882a593Smuzhiyun bool masked;
52*4882a593Smuzhiyun struct irq_bypass_producer producer;
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun struct vfio_pci_device;
56*4882a593Smuzhiyun struct vfio_pci_region;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun struct vfio_pci_regops {
59*4882a593Smuzhiyun size_t (*rw)(struct vfio_pci_device *vdev, char __user *buf,
60*4882a593Smuzhiyun size_t count, loff_t *ppos, bool iswrite);
61*4882a593Smuzhiyun void (*release)(struct vfio_pci_device *vdev,
62*4882a593Smuzhiyun struct vfio_pci_region *region);
63*4882a593Smuzhiyun int (*mmap)(struct vfio_pci_device *vdev,
64*4882a593Smuzhiyun struct vfio_pci_region *region,
65*4882a593Smuzhiyun struct vm_area_struct *vma);
66*4882a593Smuzhiyun int (*add_capability)(struct vfio_pci_device *vdev,
67*4882a593Smuzhiyun struct vfio_pci_region *region,
68*4882a593Smuzhiyun struct vfio_info_cap *caps);
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun struct vfio_pci_region {
72*4882a593Smuzhiyun u32 type;
73*4882a593Smuzhiyun u32 subtype;
74*4882a593Smuzhiyun const struct vfio_pci_regops *ops;
75*4882a593Smuzhiyun void *data;
76*4882a593Smuzhiyun size_t size;
77*4882a593Smuzhiyun u32 flags;
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun struct vfio_pci_dummy_resource {
81*4882a593Smuzhiyun struct resource resource;
82*4882a593Smuzhiyun int index;
83*4882a593Smuzhiyun struct list_head res_next;
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun struct vfio_pci_reflck {
87*4882a593Smuzhiyun struct kref kref;
88*4882a593Smuzhiyun struct mutex lock;
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun struct vfio_pci_vf_token {
92*4882a593Smuzhiyun struct mutex lock;
93*4882a593Smuzhiyun uuid_t uuid;
94*4882a593Smuzhiyun int users;
95*4882a593Smuzhiyun };
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun struct vfio_pci_mmap_vma {
98*4882a593Smuzhiyun struct vm_area_struct *vma;
99*4882a593Smuzhiyun struct list_head vma_next;
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun struct vfio_pci_device {
103*4882a593Smuzhiyun struct pci_dev *pdev;
104*4882a593Smuzhiyun void __iomem *barmap[PCI_STD_NUM_BARS];
105*4882a593Smuzhiyun bool bar_mmap_supported[PCI_STD_NUM_BARS];
106*4882a593Smuzhiyun u8 *pci_config_map;
107*4882a593Smuzhiyun u8 *vconfig;
108*4882a593Smuzhiyun struct perm_bits *msi_perm;
109*4882a593Smuzhiyun spinlock_t irqlock;
110*4882a593Smuzhiyun struct mutex igate;
111*4882a593Smuzhiyun struct vfio_pci_irq_ctx *ctx;
112*4882a593Smuzhiyun int num_ctx;
113*4882a593Smuzhiyun int irq_type;
114*4882a593Smuzhiyun int num_regions;
115*4882a593Smuzhiyun struct vfio_pci_region *region;
116*4882a593Smuzhiyun u8 msi_qmax;
117*4882a593Smuzhiyun u8 msix_bar;
118*4882a593Smuzhiyun u16 msix_size;
119*4882a593Smuzhiyun u32 msix_offset;
120*4882a593Smuzhiyun u32 rbar[7];
121*4882a593Smuzhiyun bool pci_2_3;
122*4882a593Smuzhiyun bool virq_disabled;
123*4882a593Smuzhiyun bool reset_works;
124*4882a593Smuzhiyun bool extended_caps;
125*4882a593Smuzhiyun bool bardirty;
126*4882a593Smuzhiyun bool has_vga;
127*4882a593Smuzhiyun bool needs_reset;
128*4882a593Smuzhiyun bool nointx;
129*4882a593Smuzhiyun bool needs_pm_restore;
130*4882a593Smuzhiyun struct pci_saved_state *pci_saved_state;
131*4882a593Smuzhiyun struct pci_saved_state *pm_save;
132*4882a593Smuzhiyun struct vfio_pci_reflck *reflck;
133*4882a593Smuzhiyun int refcnt;
134*4882a593Smuzhiyun int ioeventfds_nr;
135*4882a593Smuzhiyun struct eventfd_ctx *err_trigger;
136*4882a593Smuzhiyun struct eventfd_ctx *req_trigger;
137*4882a593Smuzhiyun struct list_head dummy_resources_list;
138*4882a593Smuzhiyun struct mutex ioeventfds_lock;
139*4882a593Smuzhiyun struct list_head ioeventfds_list;
140*4882a593Smuzhiyun struct vfio_pci_vf_token *vf_token;
141*4882a593Smuzhiyun struct notifier_block nb;
142*4882a593Smuzhiyun struct mutex vma_lock;
143*4882a593Smuzhiyun struct list_head vma_list;
144*4882a593Smuzhiyun struct rw_semaphore memory_lock;
145*4882a593Smuzhiyun };
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun #define is_intx(vdev) (vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX)
148*4882a593Smuzhiyun #define is_msi(vdev) (vdev->irq_type == VFIO_PCI_MSI_IRQ_INDEX)
149*4882a593Smuzhiyun #define is_msix(vdev) (vdev->irq_type == VFIO_PCI_MSIX_IRQ_INDEX)
150*4882a593Smuzhiyun #define is_irq_none(vdev) (!(is_intx(vdev) || is_msi(vdev) || is_msix(vdev)))
151*4882a593Smuzhiyun #define irq_is(vdev, type) (vdev->irq_type == type)
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun extern void vfio_pci_intx_mask(struct vfio_pci_device *vdev);
154*4882a593Smuzhiyun extern void vfio_pci_intx_unmask(struct vfio_pci_device *vdev);
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun extern int vfio_pci_set_irqs_ioctl(struct vfio_pci_device *vdev,
157*4882a593Smuzhiyun uint32_t flags, unsigned index,
158*4882a593Smuzhiyun unsigned start, unsigned count, void *data);
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun extern ssize_t vfio_pci_config_rw(struct vfio_pci_device *vdev,
161*4882a593Smuzhiyun char __user *buf, size_t count,
162*4882a593Smuzhiyun loff_t *ppos, bool iswrite);
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun extern ssize_t vfio_pci_bar_rw(struct vfio_pci_device *vdev, char __user *buf,
165*4882a593Smuzhiyun size_t count, loff_t *ppos, bool iswrite);
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun extern ssize_t vfio_pci_vga_rw(struct vfio_pci_device *vdev, char __user *buf,
168*4882a593Smuzhiyun size_t count, loff_t *ppos, bool iswrite);
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun extern long vfio_pci_ioeventfd(struct vfio_pci_device *vdev, loff_t offset,
171*4882a593Smuzhiyun uint64_t data, int count, int fd);
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun extern int vfio_pci_init_perm_bits(void);
174*4882a593Smuzhiyun extern void vfio_pci_uninit_perm_bits(void);
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun extern int vfio_config_init(struct vfio_pci_device *vdev);
177*4882a593Smuzhiyun extern void vfio_config_free(struct vfio_pci_device *vdev);
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun extern int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
180*4882a593Smuzhiyun unsigned int type, unsigned int subtype,
181*4882a593Smuzhiyun const struct vfio_pci_regops *ops,
182*4882a593Smuzhiyun size_t size, u32 flags, void *data);
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun extern int vfio_pci_set_power_state(struct vfio_pci_device *vdev,
185*4882a593Smuzhiyun pci_power_t state);
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun extern bool __vfio_pci_memory_enabled(struct vfio_pci_device *vdev);
188*4882a593Smuzhiyun extern void vfio_pci_zap_and_down_write_memory_lock(struct vfio_pci_device
189*4882a593Smuzhiyun *vdev);
190*4882a593Smuzhiyun extern u16 vfio_pci_memory_lock_and_enable(struct vfio_pci_device *vdev);
191*4882a593Smuzhiyun extern void vfio_pci_memory_unlock_and_restore(struct vfio_pci_device *vdev,
192*4882a593Smuzhiyun u16 cmd);
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun #ifdef CONFIG_VFIO_PCI_IGD
195*4882a593Smuzhiyun extern int vfio_pci_igd_init(struct vfio_pci_device *vdev);
196*4882a593Smuzhiyun #else
vfio_pci_igd_init(struct vfio_pci_device * vdev)197*4882a593Smuzhiyun static inline int vfio_pci_igd_init(struct vfio_pci_device *vdev)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun return -ENODEV;
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun #endif
202*4882a593Smuzhiyun #ifdef CONFIG_VFIO_PCI_NVLINK2
203*4882a593Smuzhiyun extern int vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device *vdev);
204*4882a593Smuzhiyun extern int vfio_pci_ibm_npu2_init(struct vfio_pci_device *vdev);
205*4882a593Smuzhiyun #else
vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device * vdev)206*4882a593Smuzhiyun static inline int vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device *vdev)
207*4882a593Smuzhiyun {
208*4882a593Smuzhiyun return -ENODEV;
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun
vfio_pci_ibm_npu2_init(struct vfio_pci_device * vdev)211*4882a593Smuzhiyun static inline int vfio_pci_ibm_npu2_init(struct vfio_pci_device *vdev)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun return -ENODEV;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun #endif
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun #ifdef CONFIG_VFIO_PCI_ZDEV
218*4882a593Smuzhiyun extern int vfio_pci_info_zdev_add_caps(struct vfio_pci_device *vdev,
219*4882a593Smuzhiyun struct vfio_info_cap *caps);
220*4882a593Smuzhiyun #else
vfio_pci_info_zdev_add_caps(struct vfio_pci_device * vdev,struct vfio_info_cap * caps)221*4882a593Smuzhiyun static inline int vfio_pci_info_zdev_add_caps(struct vfio_pci_device *vdev,
222*4882a593Smuzhiyun struct vfio_info_cap *caps)
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun return -ENODEV;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun #endif
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun #endif /* VFIO_PCI_PRIVATE_H */
229