1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #define SUSBCRequest_SetBaudRateParityAndStopBits 1 3*4882a593Smuzhiyun #define SUSBCR_SBR_MASK 0xFF00 4*4882a593Smuzhiyun #define SUSBCR_SBR_1200 0x0100 5*4882a593Smuzhiyun #define SUSBCR_SBR_9600 0x0200 6*4882a593Smuzhiyun #define SUSBCR_SBR_19200 0x0400 7*4882a593Smuzhiyun #define SUSBCR_SBR_28800 0x0800 8*4882a593Smuzhiyun #define SUSBCR_SBR_38400 0x1000 9*4882a593Smuzhiyun #define SUSBCR_SBR_57600 0x2000 10*4882a593Smuzhiyun #define SUSBCR_SBR_115200 0x4000 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define SUSBCR_SPASB_MASK 0x0070 13*4882a593Smuzhiyun #define SUSBCR_SPASB_NoParity 0x0010 14*4882a593Smuzhiyun #define SUSBCR_SPASB_OddParity 0x0020 15*4882a593Smuzhiyun #define SUSBCR_SPASB_EvenParity 0x0040 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define SUSBCR_SPASB_STPMASK 0x0003 18*4882a593Smuzhiyun #define SUSBCR_SPASB_1StopBit 0x0001 19*4882a593Smuzhiyun #define SUSBCR_SPASB_2StopBits 0x0002 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define SUSBCRequest_SetStatusLinesOrQueues 2 22*4882a593Smuzhiyun #define SUSBCR_SSL_SETRTS 0x0001 23*4882a593Smuzhiyun #define SUSBCR_SSL_CLRRTS 0x0002 24*4882a593Smuzhiyun #define SUSBCR_SSL_SETDTR 0x0004 25*4882a593Smuzhiyun #define SUSBCR_SSL_CLRDTR 0x0010 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* Kill the pending/current writes to the comm port. */ 28*4882a593Smuzhiyun #define SUSBCR_SSL_PURGE_TXABORT 0x0100 29*4882a593Smuzhiyun /* Kill the pending/current reads to the comm port. */ 30*4882a593Smuzhiyun #define SUSBCR_SSL_PURGE_RXABORT 0x0200 31*4882a593Smuzhiyun /* Kill the transmit queue if there. */ 32*4882a593Smuzhiyun #define SUSBCR_SSL_PURGE_TXCLEAR 0x0400 33*4882a593Smuzhiyun /* Kill the typeahead buffer if there. */ 34*4882a593Smuzhiyun #define SUSBCR_SSL_PURGE_RXCLEAR 0x0800 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #define SUSBCRequest_GetStatusLineState 4 37*4882a593Smuzhiyun /* Any Character received */ 38*4882a593Smuzhiyun #define SUSBCR_GSL_RXCHAR 0x0001 39*4882a593Smuzhiyun /* Transmitt Queue Empty */ 40*4882a593Smuzhiyun #define SUSBCR_GSL_TXEMPTY 0x0004 41*4882a593Smuzhiyun /* CTS changed state */ 42*4882a593Smuzhiyun #define SUSBCR_GSL_CTS 0x0008 43*4882a593Smuzhiyun /* DSR changed state */ 44*4882a593Smuzhiyun #define SUSBCR_GSL_DSR 0x0010 45*4882a593Smuzhiyun /* RLSD changed state */ 46*4882a593Smuzhiyun #define SUSBCR_GSL_RLSD 0x0020 47*4882a593Smuzhiyun /* BREAK received */ 48*4882a593Smuzhiyun #define SUSBCR_GSL_BREAK 0x0040 49*4882a593Smuzhiyun /* Line status error occurred */ 50*4882a593Smuzhiyun #define SUSBCR_GSL_ERR 0x0080 51*4882a593Smuzhiyun /* Ring signal detected */ 52*4882a593Smuzhiyun #define SUSBCR_GSL_RING 0x0100 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun #define SUSBCRequest_Misc 8 55*4882a593Smuzhiyun /* use a predefined reset sequence */ 56*4882a593Smuzhiyun #define SUSBCR_MSC_ResetReader 0x0001 57*4882a593Smuzhiyun /* use a predefined sequence to reset the internal queues */ 58*4882a593Smuzhiyun #define SUSBCR_MSC_ResetAllQueues 0x0002 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun #define SUSBCRequest_GetMisc 0x10 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun /* 63*4882a593Smuzhiyun * get the firmware version from device, coded like this 0xHHLLBBPP with 64*4882a593Smuzhiyun * HH = Firmware Version High Byte 65*4882a593Smuzhiyun * LL = Firmware Version Low Byte 66*4882a593Smuzhiyun * BB = Build Number 67*4882a593Smuzhiyun * PP = Further Attributes 68*4882a593Smuzhiyun */ 69*4882a593Smuzhiyun #define SUSBCR_MSC_GetFWVersion 0x0001 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun /* 72*4882a593Smuzhiyun * get the hardware version from device coded like this 0xHHLLPPRR with 73*4882a593Smuzhiyun * HH = Software Version High Byte 74*4882a593Smuzhiyun * LL = Software Version Low Byte 75*4882a593Smuzhiyun * PP = Further Attributes 76*4882a593Smuzhiyun * RR = Reserved for the hardware ID 77*4882a593Smuzhiyun */ 78*4882a593Smuzhiyun #define SUSBCR_MSC_GetHWVersion 0x0002 79