1*4882a593Smuzhiyun /* SPDX-License-Identifier: BSD-3-Clause */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun usa90msg.h 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun Copyright (c) 1998-2003 InnoSys Incorporated. All Rights Reserved 6*4882a593Smuzhiyun This file is available under a BSD-style copyright 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun Keyspan USB Async Message Formats for the USA19HS 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun Redistribution and use in source and binary forms, with or without 11*4882a593Smuzhiyun modification, are permitted provided that the following conditions are 12*4882a593Smuzhiyun met: 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun 1. Redistributions of source code must retain this licence text 15*4882a593Smuzhiyun without modification, this list of conditions, and the following 16*4882a593Smuzhiyun disclaimer. The following copyright notice must appear immediately at 17*4882a593Smuzhiyun the beginning of all source files: 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun Copyright (c) 1998-2003 InnoSys Incorporated. All Rights Reserved 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun This file is available under a BSD-style copyright 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun 2. The name of InnoSys Incorporated may not be used to endorse or promote 24*4882a593Smuzhiyun products derived from this software without specific prior written 25*4882a593Smuzhiyun permission. 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun THIS SOFTWARE IS PROVIDED BY INNOSYS CORP. ``AS IS'' AND ANY EXPRESS OR 28*4882a593Smuzhiyun IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 29*4882a593Smuzhiyun OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 30*4882a593Smuzhiyun NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 31*4882a593Smuzhiyun INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 32*4882a593Smuzhiyun (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 33*4882a593Smuzhiyun SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 34*4882a593Smuzhiyun CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35*4882a593Smuzhiyun LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36*4882a593Smuzhiyun OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37*4882a593Smuzhiyun SUCH DAMAGE. 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun Revisions: 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun 2003feb14 add setTxMode/txMode and cancelRxXoff to portControl 42*4882a593Smuzhiyun 2003mar21 change name of PARITY_0/1 to add MARK/SPACE 43*4882a593Smuzhiyun */ 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #ifndef __USA90MSG__ 46*4882a593Smuzhiyun #define __USA90MSG__ 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun struct keyspan_usa90_portControlMessage 49*4882a593Smuzhiyun { 50*4882a593Smuzhiyun /* 51*4882a593Smuzhiyun there are three types of "commands" sent in the control message: 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun 1. configuration changes which must be requested by setting 54*4882a593Smuzhiyun the corresponding "set" flag (and should only be requested 55*4882a593Smuzhiyun when necessary, to reduce overhead on the device): 56*4882a593Smuzhiyun */ 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun u8 setClocking, // host requests baud rate be set 59*4882a593Smuzhiyun baudLo, // host does baud divisor calculation 60*4882a593Smuzhiyun baudHi, // host does baud divisor calculation 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun setLcr, // host requests lcr be set 63*4882a593Smuzhiyun lcr, // use PARITY, STOPBITS, DATABITS below 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun setRxMode, // set receive mode 66*4882a593Smuzhiyun rxMode, // RXMODE_DMA or RXMODE_BYHAND 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun setTxMode, // set transmit mode 69*4882a593Smuzhiyun txMode, // TXMODE_DMA or TXMODE_BYHAND 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun setTxFlowControl, // host requests tx flow control be set 72*4882a593Smuzhiyun txFlowControl , // use TX_FLOW... bits below 73*4882a593Smuzhiyun setRxFlowControl, // host requests rx flow control be set 74*4882a593Smuzhiyun rxFlowControl, // use RX_FLOW... bits below 75*4882a593Smuzhiyun sendXoff, // host requests XOFF transmitted immediately 76*4882a593Smuzhiyun sendXon, // host requests XON char transmitted 77*4882a593Smuzhiyun xonChar, // specified in current character format 78*4882a593Smuzhiyun xoffChar, // specified in current character format 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun sendChar, // host requests char transmitted immediately 81*4882a593Smuzhiyun txChar, // character to send 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun setRts, // host requests RTS output be set 84*4882a593Smuzhiyun rts, // 1=on, 0=off 85*4882a593Smuzhiyun setDtr, // host requests DTR output be set 86*4882a593Smuzhiyun dtr; // 1=on, 0=off 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun /* 90*4882a593Smuzhiyun 2. configuration data which is simply used as is 91*4882a593Smuzhiyun and must be specified correctly in every host message. 92*4882a593Smuzhiyun */ 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun u8 rxForwardingLength, // forward when this number of chars available 95*4882a593Smuzhiyun rxForwardingTimeout, // (1-31 in ms) 96*4882a593Smuzhiyun txAckSetting; // 0=don't ack, 1=normal, 2-255 TBD... 97*4882a593Smuzhiyun /* 98*4882a593Smuzhiyun 3. Firmware states which cause actions if they change 99*4882a593Smuzhiyun and must be specified correctly in every host message. 100*4882a593Smuzhiyun */ 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun u8 portEnabled, // 0=disabled, 1=enabled 103*4882a593Smuzhiyun txFlush, // 0=normal, 1=toss outbound data 104*4882a593Smuzhiyun txBreak, // 0=break off, 1=break on 105*4882a593Smuzhiyun loopbackMode; // 0=no loopback, 1=loopback enabled 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun /* 108*4882a593Smuzhiyun 4. commands which are flags only; these are processed in order 109*4882a593Smuzhiyun (so that, e.g., if rxFlush and rxForward flags are set, the 110*4882a593Smuzhiyun port will have no data to forward); any non-zero value 111*4882a593Smuzhiyun is respected 112*4882a593Smuzhiyun */ 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun u8 rxFlush, // toss inbound data 115*4882a593Smuzhiyun rxForward, // forward all inbound data, NOW (as if fwdLen==1) 116*4882a593Smuzhiyun cancelRxXoff, // cancel any receive XOFF state (_txXoff) 117*4882a593Smuzhiyun returnStatus; // return current status NOW 118*4882a593Smuzhiyun }; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun // defines for bits in lcr 121*4882a593Smuzhiyun #define USA_DATABITS_5 0x00 122*4882a593Smuzhiyun #define USA_DATABITS_6 0x01 123*4882a593Smuzhiyun #define USA_DATABITS_7 0x02 124*4882a593Smuzhiyun #define USA_DATABITS_8 0x03 125*4882a593Smuzhiyun #define STOPBITS_5678_1 0x00 // 1 stop bit for all byte sizes 126*4882a593Smuzhiyun #define STOPBITS_5_1p5 0x04 // 1.5 stop bits for 5-bit byte 127*4882a593Smuzhiyun #define STOPBITS_678_2 0x04 // 2 stop bits for 6-8 bit byte 128*4882a593Smuzhiyun #define USA_PARITY_NONE 0x00 129*4882a593Smuzhiyun #define USA_PARITY_ODD 0x08 130*4882a593Smuzhiyun #define USA_PARITY_EVEN 0x18 131*4882a593Smuzhiyun #define PARITY_MARK_1 0x28 // force parity MARK 132*4882a593Smuzhiyun #define PARITY_SPACE_0 0x38 // force parity SPACE 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun #define TXFLOW_CTS 0x04 135*4882a593Smuzhiyun #define TXFLOW_DSR 0x08 136*4882a593Smuzhiyun #define TXFLOW_XOFF 0x01 137*4882a593Smuzhiyun #define TXFLOW_XOFF_ANY 0x02 138*4882a593Smuzhiyun #define TXFLOW_XOFF_BITS (TXFLOW_XOFF | TXFLOW_XOFF_ANY) 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun #define RXFLOW_XOFF 0x10 141*4882a593Smuzhiyun #define RXFLOW_RTS 0x20 142*4882a593Smuzhiyun #define RXFLOW_DTR 0x40 143*4882a593Smuzhiyun #define RXFLOW_DSR_SENSITIVITY 0x80 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun #define RXMODE_BYHAND 0x00 146*4882a593Smuzhiyun #define RXMODE_DMA 0x02 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun #define TXMODE_BYHAND 0x00 149*4882a593Smuzhiyun #define TXMODE_DMA 0x02 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun // all things called "StatusMessage" are sent on the status endpoint 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun struct keyspan_usa90_portStatusMessage 155*4882a593Smuzhiyun { 156*4882a593Smuzhiyun u8 msr, // reports the actual MSR register 157*4882a593Smuzhiyun cts, // reports CTS pin 158*4882a593Smuzhiyun dcd, // reports DCD pin 159*4882a593Smuzhiyun dsr, // reports DSR pin 160*4882a593Smuzhiyun ri, // reports RI pin 161*4882a593Smuzhiyun _txXoff, // port is in XOFF state (we received XOFF) 162*4882a593Smuzhiyun rxBreak, // reports break state 163*4882a593Smuzhiyun rxOverrun, // count of overrun errors (since last reported) 164*4882a593Smuzhiyun rxParity, // count of parity errors (since last reported) 165*4882a593Smuzhiyun rxFrame, // count of frame errors (since last reported) 166*4882a593Smuzhiyun portState, // PORTSTATE_xxx bits (useful for debugging) 167*4882a593Smuzhiyun messageAck, // message acknowledgement 168*4882a593Smuzhiyun charAck, // character acknowledgement 169*4882a593Smuzhiyun controlResponse; // (value = returnStatus) a control message has been processed 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun // bits in RX data message when STAT byte is included 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun #define RXERROR_OVERRUN 0x02 175*4882a593Smuzhiyun #define RXERROR_PARITY 0x04 176*4882a593Smuzhiyun #define RXERROR_FRAMING 0x08 177*4882a593Smuzhiyun #define RXERROR_BREAK 0x10 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun #define PORTSTATE_ENABLED 0x80 180*4882a593Smuzhiyun #define PORTSTATE_TXFLUSH 0x01 181*4882a593Smuzhiyun #define PORTSTATE_TXBREAK 0x02 182*4882a593Smuzhiyun #define PORTSTATE_LOOPBACK 0x04 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun // MSR bits 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun #define USA_MSR_dCTS 0x01 // CTS has changed since last report 187*4882a593Smuzhiyun #define USA_MSR_dDSR 0x02 188*4882a593Smuzhiyun #define USA_MSR_dRI 0x04 189*4882a593Smuzhiyun #define USA_MSR_dDCD 0x08 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun #define USA_MSR_CTS 0x10 // current state of CTS 192*4882a593Smuzhiyun #define USA_MSR_DSR 0x20 193*4882a593Smuzhiyun #define USA_USA_MSR_RI 0x40 194*4882a593Smuzhiyun #define MSR_DCD 0x80 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun // ie: the maximum length of an endpoint buffer 197*4882a593Smuzhiyun #define MAX_DATA_LEN 64 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun #endif 200