xref: /OK3568_Linux_fs/kernel/drivers/usb/serial/iuu_phoenix.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Infinity Unlimited USB Phoenix driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2007 Alain Degreffe (eczema@ecze.com)
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Original code taken from iuutool ( Copyright (C) 2006 Juan Carlos Borrás )
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  *  And tested with help of WB Electronics
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #define   IUU_USB_VENDOR_ID  0x104f
14*4882a593Smuzhiyun #define   IUU_USB_PRODUCT_ID  0x0004
15*4882a593Smuzhiyun #define   IUU_USB_OP_TIMEOUT  0x0200
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun /* Programmer commands */
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define IUU_NO_OPERATION   0x00
20*4882a593Smuzhiyun #define IUU_GET_FIRMWARE_VERSION   0x01
21*4882a593Smuzhiyun #define IUU_GET_PRODUCT_NAME   0x02
22*4882a593Smuzhiyun #define IUU_GET_STATE_REGISTER   0x03
23*4882a593Smuzhiyun #define IUU_SET_LED   0x04
24*4882a593Smuzhiyun #define IUU_WAIT_MUS   0x05
25*4882a593Smuzhiyun #define IUU_WAIT_MS   0x06
26*4882a593Smuzhiyun #define IUU_GET_LOADER_VERSION   0x50
27*4882a593Smuzhiyun #define IUU_RST_SET   0x52
28*4882a593Smuzhiyun #define IUU_RST_CLEAR   0x53
29*4882a593Smuzhiyun #define IUU_SET_VCC   0x59
30*4882a593Smuzhiyun #define IUU_UART_ENABLE   0x49
31*4882a593Smuzhiyun #define IUU_UART_DISABLE   0x4A
32*4882a593Smuzhiyun #define IUU_UART_WRITE_I2C   0x4C
33*4882a593Smuzhiyun #define IUU_UART_ESC   0x5E
34*4882a593Smuzhiyun #define IUU_UART_TRAP   0x54
35*4882a593Smuzhiyun #define IUU_UART_TRAP_BREAK   0x5B
36*4882a593Smuzhiyun #define IUU_UART_RX   0x56
37*4882a593Smuzhiyun #define IUU_AVR_ON   0x21
38*4882a593Smuzhiyun #define IUU_AVR_OFF   0x22
39*4882a593Smuzhiyun #define IUU_AVR_1CLK   0x23
40*4882a593Smuzhiyun #define IUU_AVR_RESET   0x24
41*4882a593Smuzhiyun #define IUU_AVR_RESET_PC   0x25
42*4882a593Smuzhiyun #define IUU_AVR_INC_PC   0x26
43*4882a593Smuzhiyun #define IUU_AVR_INCN_PC   0x27
44*4882a593Smuzhiyun #define IUU_AVR_PREAD   0x29
45*4882a593Smuzhiyun #define IUU_AVR_PREADN   0x2A
46*4882a593Smuzhiyun #define IUU_AVR_PWRITE   0x28
47*4882a593Smuzhiyun #define IUU_AVR_DREAD   0x2C
48*4882a593Smuzhiyun #define IUU_AVR_DREADN   0x2D
49*4882a593Smuzhiyun #define IUU_AVR_DWRITE   0x2B
50*4882a593Smuzhiyun #define IUU_AVR_PWRITEN   0x2E
51*4882a593Smuzhiyun #define IUU_EEPROM_ON   0x37
52*4882a593Smuzhiyun #define IUU_EEPROM_OFF   0x38
53*4882a593Smuzhiyun #define IUU_EEPROM_WRITE   0x39
54*4882a593Smuzhiyun #define IUU_EEPROM_WRITEX   0x3A
55*4882a593Smuzhiyun #define IUU_EEPROM_WRITE8   0x3B
56*4882a593Smuzhiyun #define IUU_EEPROM_WRITE16   0x3C
57*4882a593Smuzhiyun #define IUU_EEPROM_WRITEX32   0x3D
58*4882a593Smuzhiyun #define IUU_EEPROM_WRITEX64   0x3E
59*4882a593Smuzhiyun #define IUU_EEPROM_READ   0x3F
60*4882a593Smuzhiyun #define IUU_EEPROM_READX   0x40
61*4882a593Smuzhiyun #define IUU_EEPROM_BREAD   0x41
62*4882a593Smuzhiyun #define IUU_EEPROM_BREADX   0x42
63*4882a593Smuzhiyun #define IUU_PIC_CMD   0x0A
64*4882a593Smuzhiyun #define IUU_PIC_CMD_LOAD   0x0B
65*4882a593Smuzhiyun #define IUU_PIC_CMD_READ   0x0C
66*4882a593Smuzhiyun #define IUU_PIC_ON   0x0D
67*4882a593Smuzhiyun #define IUU_PIC_OFF   0x0E
68*4882a593Smuzhiyun #define IUU_PIC_RESET   0x16
69*4882a593Smuzhiyun #define IUU_PIC_INC_PC   0x0F
70*4882a593Smuzhiyun #define IUU_PIC_INCN_PC   0x10
71*4882a593Smuzhiyun #define IUU_PIC_PWRITE   0x11
72*4882a593Smuzhiyun #define IUU_PIC_PREAD   0x12
73*4882a593Smuzhiyun #define IUU_PIC_PREADN   0x13
74*4882a593Smuzhiyun #define IUU_PIC_DWRITE   0x14
75*4882a593Smuzhiyun #define IUU_PIC_DREAD   0x15
76*4882a593Smuzhiyun #define IUU_UART_NOP   0x00
77*4882a593Smuzhiyun #define IUU_UART_CHANGE   0x02
78*4882a593Smuzhiyun #define IUU_UART_TX   0x04
79*4882a593Smuzhiyun #define IUU_DELAY_MS   0x06
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun #define IUU_OPERATION_OK   0x00
82*4882a593Smuzhiyun #define IUU_DEVICE_NOT_FOUND   0x01
83*4882a593Smuzhiyun #define IUU_INVALID_HANDLE   0x02
84*4882a593Smuzhiyun #define IUU_INVALID_PARAMETER   0x03
85*4882a593Smuzhiyun #define IUU_INVALID_voidERFACE   0x04
86*4882a593Smuzhiyun #define IUU_INVALID_REQUEST_LENGTH   0x05
87*4882a593Smuzhiyun #define IUU_UART_NOT_ENABLED   0x06
88*4882a593Smuzhiyun #define IUU_WRITE_ERROR   0x07
89*4882a593Smuzhiyun #define IUU_READ_ERROR   0x08
90*4882a593Smuzhiyun #define IUU_TX_ERROR   0x09
91*4882a593Smuzhiyun #define IUU_RX_ERROR   0x0A
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun #define IUU_PARITY_NONE   0x00
94*4882a593Smuzhiyun #define IUU_PARITY_EVEN   0x01
95*4882a593Smuzhiyun #define IUU_PARITY_ODD   0x02
96*4882a593Smuzhiyun #define IUU_PARITY_MARK   0x03
97*4882a593Smuzhiyun #define IUU_PARITY_SPACE   0x04
98*4882a593Smuzhiyun #define IUU_SC_INSERTED   0x01
99*4882a593Smuzhiyun #define IUU_VERIFY_ERROR   0x02
100*4882a593Smuzhiyun #define IUU_SIM_INSERTED   0x04
101*4882a593Smuzhiyun #define IUU_TWO_STOP_BITS   0x00
102*4882a593Smuzhiyun #define IUU_ONE_STOP_BIT   0x20
103*4882a593Smuzhiyun #define IUU_BAUD_2400   0x0398
104*4882a593Smuzhiyun #define IUU_BAUD_9600   0x0298
105*4882a593Smuzhiyun #define IUU_BAUD_19200   0x0164
106*4882a593Smuzhiyun #define IUU_BAUD_28800   0x0198
107*4882a593Smuzhiyun #define IUU_BAUD_38400   0x01B2
108*4882a593Smuzhiyun #define IUU_BAUD_57600   0x0030
109*4882a593Smuzhiyun #define IUU_BAUD_115200   0x0098
110*4882a593Smuzhiyun #define IUU_CLK_3579000   3579000
111*4882a593Smuzhiyun #define IUU_CLK_3680000   3680000
112*4882a593Smuzhiyun #define IUU_CLK_6000000   6000000
113*4882a593Smuzhiyun #define IUU_FULLCARD_IN   0x01
114*4882a593Smuzhiyun #define IUU_DEV_ERROR   0x02
115*4882a593Smuzhiyun #define IUU_MINICARD_IN   0x04
116*4882a593Smuzhiyun #define IUU_VCC_5V   0x00
117*4882a593Smuzhiyun #define IUU_VCC_3V   0x01
118