1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ */ 2*4882a593Smuzhiyun /************************************************************************ 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * USBVEND.H Vendor-specific USB definitions 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * NOTE: This must be kept in sync with the Edgeport firmware and 7*4882a593Smuzhiyun * must be kept backward-compatible with older firmware. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun ************************************************************************ 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * Copyright (C) 1998 Inside Out Networks, Inc. 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun ************************************************************************/ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #if !defined(_USBVEND_H) 16*4882a593Smuzhiyun #define _USBVEND_H 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /************************************************************************ 19*4882a593Smuzhiyun * 20*4882a593Smuzhiyun * D e f i n e s / T y p e d e f s 21*4882a593Smuzhiyun * 22*4882a593Smuzhiyun ************************************************************************/ 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun // 25*4882a593Smuzhiyun // Definitions of USB product IDs 26*4882a593Smuzhiyun // 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define USB_VENDOR_ID_ION 0x1608 // Our VID 29*4882a593Smuzhiyun #define USB_VENDOR_ID_TI 0x0451 // TI VID 30*4882a593Smuzhiyun #define USB_VENDOR_ID_AXIOHM 0x05D9 /* Axiohm VID */ 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun // 33*4882a593Smuzhiyun // Definitions of USB product IDs (PID) 34*4882a593Smuzhiyun // We break the USB-defined PID into an OEM Id field (upper 6 bits) 35*4882a593Smuzhiyun // and a Device Id (bottom 10 bits). The Device Id defines what 36*4882a593Smuzhiyun // device this actually is regardless of what the OEM wants to 37*4882a593Smuzhiyun // call it. 38*4882a593Smuzhiyun // 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun // ION-device OEM IDs 41*4882a593Smuzhiyun #define ION_OEM_ID_ION 0 // 00h Inside Out Networks 42*4882a593Smuzhiyun #define ION_OEM_ID_NLYNX 1 // 01h NLynx Systems 43*4882a593Smuzhiyun #define ION_OEM_ID_GENERIC 2 // 02h Generic OEM 44*4882a593Smuzhiyun #define ION_OEM_ID_MAC 3 // 03h Mac Version 45*4882a593Smuzhiyun #define ION_OEM_ID_MEGAWOLF 4 // 04h Lupusb OEM Mac version (MegaWolf) 46*4882a593Smuzhiyun #define ION_OEM_ID_MULTITECH 5 // 05h Multitech Rapidports 47*4882a593Smuzhiyun #define ION_OEM_ID_AGILENT 6 // 06h AGILENT board 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun // ION-device Device IDs 51*4882a593Smuzhiyun // Product IDs - assigned to match middle digit of serial number (No longer true) 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #define ION_DEVICE_ID_80251_NETCHIP 0x020 // This bit is set in the PID if this edgeport hardware$ 54*4882a593Smuzhiyun // is based on the 80251+Netchip. 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun #define ION_DEVICE_ID_GENERATION_1 0x00 // Value for 930 based edgeports 57*4882a593Smuzhiyun #define ION_DEVICE_ID_GENERATION_2 0x01 // Value for 80251+Netchip. 58*4882a593Smuzhiyun #define ION_DEVICE_ID_GENERATION_3 0x02 // Value for Texas Instruments TUSB5052 chip 59*4882a593Smuzhiyun #define ION_DEVICE_ID_GENERATION_4 0x03 // Watchport Family of products 60*4882a593Smuzhiyun #define ION_GENERATION_MASK 0x03 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun #define ION_DEVICE_ID_HUB_MASK 0x0080 // This bit in the PID designates a HUB device 63*4882a593Smuzhiyun // for example 8C would be a 421 4 port hub 64*4882a593Smuzhiyun // and 8D would be a 2 port embedded hub 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun #define EDGEPORT_DEVICE_ID_MASK 0x0ff // Not including OEM or GENERATION fields 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun #define ION_DEVICE_ID_UNCONFIGURED_EDGE_DEVICE 0x000 // In manufacturing only 69*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_4 0x001 // Edgeport/4 RS232 70*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_8R 0x002 // Edgeport with RJ45 no Ring 71*4882a593Smuzhiyun #define ION_DEVICE_ID_RAPIDPORT_4 0x003 // Rapidport/4 72*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_4T 0x004 // Edgeport/4 RS232 for Telxon (aka "Fleetport") 73*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_2 0x005 // Edgeport/2 RS232 74*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_4I 0x006 // Edgeport/4 RS422 75*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_2I 0x007 // Edgeport/2 RS422/RS485 76*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_8RR 0x008 // Edgeport with RJ45 with Data and RTS/CTS only 77*4882a593Smuzhiyun // ION_DEVICE_ID_EDGEPORT_8_HANDBUILT 0x009 // Hand-built Edgeport/8 (Placeholder, used in middle digit of serial number only!) 78*4882a593Smuzhiyun // ION_DEVICE_ID_MULTIMODEM_4X56 0x00A // MultiTech version of RP/4 (Placeholder, used in middle digit of serial number only!) 79*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_PARALLEL_PORT 0x00B // Edgeport/(4)21 Parallel port (USS720) 80*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_421 0x00C // Edgeport/421 Hub+RS232+Parallel 81*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_21 0x00D // Edgeport/21 RS232+Parallel 82*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_8_DUAL_CPU 0x00E // Half of an Edgeport/8 (the kind with 2 EP/4s on 1 PCB) 83*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_8 0x00F // Edgeport/8 (single-CPU) 84*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_2_DIN 0x010 // Edgeport/2 RS232 with Apple DIN connector 85*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_4_DIN 0x011 // Edgeport/4 RS232 with Apple DIN connector 86*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_16_DUAL_CPU 0x012 // Half of an Edgeport/16 (the kind with 2 EP/8s) 87*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_COMPATIBLE 0x013 // Edgeport Compatible, for NCR, Axiohm etc. testing 88*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_8I 0x014 // Edgeport/8 RS422 (single-CPU) 89*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_1 0x015 // Edgeport/1 RS232 90*4882a593Smuzhiyun #define ION_DEVICE_ID_EPOS44 0x016 // Half of an EPOS/44 (TIUMP BASED) 91*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_42 0x017 // Edgeport/42 92*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_412_8 0x018 // Edgeport/412 8 port part 93*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_412_4 0x019 // Edgeport/412 4 port part 94*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_22I 0x01A // Edgeport/22I is an Edgeport/4 with ports 1&2 RS422 and ports 3&4 RS232 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun // Compact Form factor TI based devices 2c, 21c, 22c, 221c 97*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_2C 0x01B // Edgeport/2c is a TI based Edgeport/2 - Small I2c 98*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_221C 0x01C // Edgeport/221c is a TI based Edgeport/2 with lucent chip and 99*4882a593Smuzhiyun // 2 external hub ports - Large I2C 100*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_22C 0x01D // Edgeport/22c is a TI based Edgeport/2 with 101*4882a593Smuzhiyun // 2 external hub ports - Large I2C 102*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_21C 0x01E // Edgeport/21c is a TI based Edgeport/2 with lucent chip 103*4882a593Smuzhiyun // Small I2C 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun /* 107*4882a593Smuzhiyun * DANGER DANGER The 0x20 bit was used to indicate a 8251/netchip GEN 2 device. 108*4882a593Smuzhiyun * Since the MAC, Linux, and Optimal drivers still used the old code 109*4882a593Smuzhiyun * I suggest that you skip the 0x20 bit when creating new PIDs 110*4882a593Smuzhiyun */ 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun // Generation 3 devices -- 3410 based edgport/1 (256 byte I2C) 114*4882a593Smuzhiyun #define ION_DEVICE_ID_TI3410_EDGEPORT_1 0x040 // Edgeport/1 RS232 115*4882a593Smuzhiyun #define ION_DEVICE_ID_TI3410_EDGEPORT_1I 0x041 // Edgeport/1i- RS422 model 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun // Ti based software switchable RS232/RS422/RS485 devices 118*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_4S 0x042 // Edgeport/4s - software switchable model 119*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_8S 0x043 // Edgeport/8s - software switchable model 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun // Usb to Ethernet dongle 122*4882a593Smuzhiyun #define ION_DEVICE_ID_EDGEPORT_E 0x0E0 // Edgeport/E Usb to Ethernet 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun // Edgeport TI based devices 125*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_EDGEPORT_4 0x0201 // Edgeport/4 RS232 126*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_EDGEPORT_2 0x0205 // Edgeport/2 RS232 127*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_EDGEPORT_4I 0x0206 // Edgeport/4i RS422 128*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_EDGEPORT_2I 0x0207 // Edgeport/2i RS422/RS485 129*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_EDGEPORT_421 0x020C // Edgeport/421 4 hub 2 RS232 + Parallel (lucent on a different hub port) 130*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_EDGEPORT_21 0x020D // Edgeport/21 2 RS232 + Parallel (lucent on a different hub port) 131*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_EDGEPORT_416 0x0212 // Edgeport/416 132*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_EDGEPORT_1 0x0215 // Edgeport/1 RS232 133*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_EDGEPORT_42 0x0217 // Edgeport/42 4 hub 2 RS232 134*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_EDGEPORT_22I 0x021A // Edgeport/22I is an Edgeport/4 with ports 1&2 RS422 and ports 3&4 RS232 135*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_EDGEPORT_2C 0x021B // Edgeport/2c RS232 136*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_EDGEPORT_221C 0x021C // Edgeport/221c is a TI based Edgeport/2 with lucent chip and 137*4882a593Smuzhiyun // 2 external hub ports - Large I2C 138*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_EDGEPORT_22C 0x021D // Edgeport/22c is a TI based Edgeport/2 with 139*4882a593Smuzhiyun // 2 external hub ports - Large I2C 140*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_EDGEPORT_21C 0x021E // Edgeport/21c is a TI based Edgeport/2 with lucent chip 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun // Generation 3 devices -- 3410 based edgport/1 (256 byte I2C) 143*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_TI3410_EDGEPORT_1 0x0240 // Edgeport/1 RS232 144*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_TI3410_EDGEPORT_1I 0x0241 // Edgeport/1i- RS422 model 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun // Ti based software switchable RS232/RS422/RS485 devices 147*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_EDGEPORT_4S 0x0242 // Edgeport/4s - software switchable model 148*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_EDGEPORT_8S 0x0243 // Edgeport/8s - software switchable model 149*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_EDGEPORT_8 0x0244 // Edgeport/8 (single-CPU) 150*4882a593Smuzhiyun #define ION_DEVICE_ID_TI_EDGEPORT_416B 0x0247 // Edgeport/416 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun /************************************************************************ 154*4882a593Smuzhiyun * 155*4882a593Smuzhiyun * Generation 4 devices 156*4882a593Smuzhiyun * 157*4882a593Smuzhiyun ************************************************************************/ 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun // Watchport based on 3410 both 1-wire and binary products (16K I2C) 160*4882a593Smuzhiyun #define ION_DEVICE_ID_WP_UNSERIALIZED 0x300 // Watchport based on 3410 both 1-wire and binary products 161*4882a593Smuzhiyun #define ION_DEVICE_ID_WP_PROXIMITY 0x301 // Watchport/P Discontinued 162*4882a593Smuzhiyun #define ION_DEVICE_ID_WP_MOTION 0x302 // Watchport/M 163*4882a593Smuzhiyun #define ION_DEVICE_ID_WP_MOISTURE 0x303 // Watchport/W 164*4882a593Smuzhiyun #define ION_DEVICE_ID_WP_TEMPERATURE 0x304 // Watchport/T 165*4882a593Smuzhiyun #define ION_DEVICE_ID_WP_HUMIDITY 0x305 // Watchport/H 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun #define ION_DEVICE_ID_WP_POWER 0x306 // Watchport 168*4882a593Smuzhiyun #define ION_DEVICE_ID_WP_LIGHT 0x307 // Watchport 169*4882a593Smuzhiyun #define ION_DEVICE_ID_WP_RADIATION 0x308 // Watchport 170*4882a593Smuzhiyun #define ION_DEVICE_ID_WP_ACCELERATION 0x309 // Watchport/A 171*4882a593Smuzhiyun #define ION_DEVICE_ID_WP_DISTANCE 0x30A // Watchport/D Discontinued 172*4882a593Smuzhiyun #define ION_DEVICE_ID_WP_PROX_DIST 0x30B // Watchport/D uses distance sensor 173*4882a593Smuzhiyun // Default to /P function 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun #define ION_DEVICE_ID_PLUS_PWR_HP4CD 0x30C // 5052 Plus Power HubPort/4CD+ (for Dell) 176*4882a593Smuzhiyun #define ION_DEVICE_ID_PLUS_PWR_HP4C 0x30D // 5052 Plus Power HubPort/4C+ 177*4882a593Smuzhiyun #define ION_DEVICE_ID_PLUS_PWR_PCI 0x30E // 3410 Plus Power PCI Host Controller 4 port 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun // 181*4882a593Smuzhiyun // Definitions for AXIOHM USB product IDs 182*4882a593Smuzhiyun // 183*4882a593Smuzhiyun #define USB_VENDOR_ID_AXIOHM 0x05D9 // Axiohm VID 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun #define AXIOHM_DEVICE_ID_MASK 0xffff 186*4882a593Smuzhiyun #define AXIOHM_DEVICE_ID_EPIC_A758 0xA758 187*4882a593Smuzhiyun #define AXIOHM_DEVICE_ID_EPIC_A794 0xA794 188*4882a593Smuzhiyun #define AXIOHM_DEVICE_ID_EPIC_A225 0xA225 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun // 192*4882a593Smuzhiyun // Definitions for NCR USB product IDs 193*4882a593Smuzhiyun // 194*4882a593Smuzhiyun #define USB_VENDOR_ID_NCR 0x0404 // NCR VID 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun #define NCR_DEVICE_ID_MASK 0xffff 197*4882a593Smuzhiyun #define NCR_DEVICE_ID_EPIC_0202 0x0202 198*4882a593Smuzhiyun #define NCR_DEVICE_ID_EPIC_0203 0x0203 199*4882a593Smuzhiyun #define NCR_DEVICE_ID_EPIC_0310 0x0310 200*4882a593Smuzhiyun #define NCR_DEVICE_ID_EPIC_0311 0x0311 201*4882a593Smuzhiyun #define NCR_DEVICE_ID_EPIC_0312 0x0312 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun // 205*4882a593Smuzhiyun // Definitions for SYMBOL USB product IDs 206*4882a593Smuzhiyun // 207*4882a593Smuzhiyun #define USB_VENDOR_ID_SYMBOL 0x05E0 // Symbol VID 208*4882a593Smuzhiyun #define SYMBOL_DEVICE_ID_MASK 0xffff 209*4882a593Smuzhiyun #define SYMBOL_DEVICE_ID_KEYFOB 0x0700 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun // 213*4882a593Smuzhiyun // Definitions for other product IDs 214*4882a593Smuzhiyun #define ION_DEVICE_ID_MT4X56USB 0x1403 // OEM device 215*4882a593Smuzhiyun #define ION_DEVICE_ID_E5805A 0x1A01 // OEM device (rebranded Edgeport/4) 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun #define GENERATION_ID_FROM_USB_PRODUCT_ID(ProductId) \ 219*4882a593Smuzhiyun ((__u16) ((ProductId >> 8) & (ION_GENERATION_MASK))) 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun #define MAKE_USB_PRODUCT_ID(OemId, DeviceId) \ 222*4882a593Smuzhiyun ((__u16) (((OemId) << 10) || (DeviceId))) 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun #define DEVICE_ID_FROM_USB_PRODUCT_ID(ProductId) \ 225*4882a593Smuzhiyun ((__u16) ((ProductId) & (EDGEPORT_DEVICE_ID_MASK))) 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun #define OEM_ID_FROM_USB_PRODUCT_ID(ProductId) \ 228*4882a593Smuzhiyun ((__u16) (((ProductId) >> 10) & 0x3F)) 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun // 231*4882a593Smuzhiyun // Definitions of parameters for download code. Note that these are 232*4882a593Smuzhiyun // specific to a given version of download code and must change if the 233*4882a593Smuzhiyun // corresponding download code changes. 234*4882a593Smuzhiyun // 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun // TxCredits value below which driver won't bother sending (to prevent too many small writes). 237*4882a593Smuzhiyun // Send only if above 25% 238*4882a593Smuzhiyun #define EDGE_FW_GET_TX_CREDITS_SEND_THRESHOLD(InitialCredit, MaxPacketSize) (max(((InitialCredit) / 4), (MaxPacketSize))) 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun #define EDGE_FW_BULK_MAX_PACKET_SIZE 64 // Max Packet Size for Bulk In Endpoint (EP1) 241*4882a593Smuzhiyun #define EDGE_FW_BULK_READ_BUFFER_SIZE 1024 // Size to use for Bulk reads 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun #define EDGE_FW_INT_MAX_PACKET_SIZE 32 // Max Packet Size for Interrupt In Endpoint 244*4882a593Smuzhiyun // Note that many units were shipped with MPS=16, we 245*4882a593Smuzhiyun // force an upgrade to this value). 246*4882a593Smuzhiyun #define EDGE_FW_INT_INTERVAL 2 // 2ms polling on IntPipe 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun // 250*4882a593Smuzhiyun // Definitions of I/O Networks vendor-specific requests 251*4882a593Smuzhiyun // for default endpoint 252*4882a593Smuzhiyun // 253*4882a593Smuzhiyun // bmRequestType = 01000000 Set vendor-specific, to device 254*4882a593Smuzhiyun // bmRequestType = 11000000 Get vendor-specific, to device 255*4882a593Smuzhiyun // 256*4882a593Smuzhiyun // These are the definitions for the bRequest field for the 257*4882a593Smuzhiyun // above bmRequestTypes. 258*4882a593Smuzhiyun // 259*4882a593Smuzhiyun // For the read/write Edgeport memory commands, the parameters 260*4882a593Smuzhiyun // are as follows: 261*4882a593Smuzhiyun // wValue = 16-bit address 262*4882a593Smuzhiyun // wIndex = unused (though we could put segment 00: or FF: here) 263*4882a593Smuzhiyun // wLength = # bytes to read/write (max 64) 264*4882a593Smuzhiyun // 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun #define USB_REQUEST_ION_RESET_DEVICE 0 // Warm reboot Edgeport, retaining USB address 267*4882a593Smuzhiyun #define USB_REQUEST_ION_GET_EPIC_DESC 1 // Get Edgeport Compatibility Descriptor 268*4882a593Smuzhiyun // unused 2 // Unused, available 269*4882a593Smuzhiyun #define USB_REQUEST_ION_READ_RAM 3 // Read EdgePort RAM at specified addr 270*4882a593Smuzhiyun #define USB_REQUEST_ION_WRITE_RAM 4 // Write EdgePort RAM at specified addr 271*4882a593Smuzhiyun #define USB_REQUEST_ION_READ_ROM 5 // Read EdgePort ROM at specified addr 272*4882a593Smuzhiyun #define USB_REQUEST_ION_WRITE_ROM 6 // Write EdgePort ROM at specified addr 273*4882a593Smuzhiyun #define USB_REQUEST_ION_EXEC_DL_CODE 7 // Begin execution of RAM-based download 274*4882a593Smuzhiyun // code by jumping to address in wIndex:wValue 275*4882a593Smuzhiyun // 8 // Unused, available 276*4882a593Smuzhiyun #define USB_REQUEST_ION_ENABLE_SUSPEND 9 // Enable/Disable suspend feature 277*4882a593Smuzhiyun // (wValue != 0: Enable; wValue = 0: Disable) 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun #define USB_REQUEST_ION_SEND_IOSP 10 // Send an IOSP command to the edgeport over the control pipe 280*4882a593Smuzhiyun #define USB_REQUEST_ION_RECV_IOSP 11 // Receive an IOSP command from the edgeport over the control pipe 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun #define USB_REQUEST_ION_DIS_INT_TIMER 0x80 // Sent to Axiohm to enable/ disable 284*4882a593Smuzhiyun // interrupt token timer 285*4882a593Smuzhiyun // wValue = 1, enable (default) 286*4882a593Smuzhiyun // wValue = 0, disable 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun // 289*4882a593Smuzhiyun // Define parameter values for our vendor-specific commands 290*4882a593Smuzhiyun // 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun // 293*4882a593Smuzhiyun // Edgeport Compatibility Descriptor 294*4882a593Smuzhiyun // 295*4882a593Smuzhiyun // This descriptor is only returned by Edgeport-compatible devices 296*4882a593Smuzhiyun // supporting the EPiC spec. True ION devices do not return this 297*4882a593Smuzhiyun // descriptor, but instead return STALL on receipt of the 298*4882a593Smuzhiyun // GET_EPIC_DESC command. The driver interprets a STALL to mean that 299*4882a593Smuzhiyun // this is a "real" Edgeport. 300*4882a593Smuzhiyun // 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun struct edge_compatibility_bits { 303*4882a593Smuzhiyun // This __u32 defines which Vendor-specific commands/functionality 304*4882a593Smuzhiyun // the device supports on the default EP0 pipe. 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun __u32 VendEnableSuspend : 1; // 0001 Set if device supports ION_ENABLE_SUSPEND 307*4882a593Smuzhiyun __u32 VendUnused : 31; // Available for future expansion, must be 0 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun // This __u32 defines which IOSP commands are supported over the 310*4882a593Smuzhiyun // bulk pipe EP1. 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun // xxxx Set if device supports: 313*4882a593Smuzhiyun __u32 IOSPOpen : 1; // 0001 OPEN / OPEN_RSP (Currently must be 1) 314*4882a593Smuzhiyun __u32 IOSPClose : 1; // 0002 CLOSE 315*4882a593Smuzhiyun __u32 IOSPChase : 1; // 0004 CHASE / CHASE_RSP 316*4882a593Smuzhiyun __u32 IOSPSetRxFlow : 1; // 0008 SET_RX_FLOW 317*4882a593Smuzhiyun __u32 IOSPSetTxFlow : 1; // 0010 SET_TX_FLOW 318*4882a593Smuzhiyun __u32 IOSPSetXChar : 1; // 0020 SET_XON_CHAR/SET_XOFF_CHAR 319*4882a593Smuzhiyun __u32 IOSPRxCheck : 1; // 0040 RX_CHECK_REQ/RX_CHECK_RSP 320*4882a593Smuzhiyun __u32 IOSPSetClrBreak : 1; // 0080 SET_BREAK/CLEAR_BREAK 321*4882a593Smuzhiyun __u32 IOSPWriteMCR : 1; // 0100 MCR register writes (set/clr DTR/RTS) 322*4882a593Smuzhiyun __u32 IOSPWriteLCR : 1; // 0200 LCR register writes (wordlen/stop/parity) 323*4882a593Smuzhiyun __u32 IOSPSetBaudRate : 1; // 0400 setting Baud rate (writes to LCR.80h and DLL/DLM register) 324*4882a593Smuzhiyun __u32 IOSPDisableIntPipe : 1; // 0800 Do not use the interrupt pipe for TxCredits or RxButesAvailable 325*4882a593Smuzhiyun __u32 IOSPRxDataAvail : 1; // 1000 Return status of RX Fifo (Data available in Fifo) 326*4882a593Smuzhiyun __u32 IOSPTxPurge : 1; // 2000 Purge TXBuffer and/or Fifo in Edgeport hardware 327*4882a593Smuzhiyun __u32 IOSPUnused : 18; // Available for future expansion, must be 0 328*4882a593Smuzhiyun 329*4882a593Smuzhiyun // This __u32 defines which 'general' features are supported 330*4882a593Smuzhiyun 331*4882a593Smuzhiyun __u32 TrueEdgeport : 1; // 0001 Set if device is a 'real' Edgeport 332*4882a593Smuzhiyun // (Used only by driver, NEVER set by an EPiC device) 333*4882a593Smuzhiyun __u32 GenUnused : 31; // Available for future expansion, must be 0 334*4882a593Smuzhiyun }; 335*4882a593Smuzhiyun 336*4882a593Smuzhiyun #define EDGE_COMPATIBILITY_MASK0 0x0001 337*4882a593Smuzhiyun #define EDGE_COMPATIBILITY_MASK1 0x3FFF 338*4882a593Smuzhiyun #define EDGE_COMPATIBILITY_MASK2 0x0001 339*4882a593Smuzhiyun 340*4882a593Smuzhiyun struct edge_compatibility_descriptor { 341*4882a593Smuzhiyun __u8 Length; // Descriptor Length (per USB spec) 342*4882a593Smuzhiyun __u8 DescType; // Descriptor Type (per USB spec, =DEVICE type) 343*4882a593Smuzhiyun __u8 EpicVer; // Version of EPiC spec supported 344*4882a593Smuzhiyun // (Currently must be 1) 345*4882a593Smuzhiyun __u8 NumPorts; // Number of serial ports supported 346*4882a593Smuzhiyun __u8 iDownloadFile; // Index of string containing download code filename 347*4882a593Smuzhiyun // 0=no download, FF=download compiled into driver. 348*4882a593Smuzhiyun __u8 Unused[3]; // Available for future expansion, must be 0 349*4882a593Smuzhiyun // (Currently must be 0). 350*4882a593Smuzhiyun __u8 MajorVersion; // Firmware version: xx. 351*4882a593Smuzhiyun __u8 MinorVersion; // yy. 352*4882a593Smuzhiyun __le16 BuildNumber; // zzzz (LE format) 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun // The following structure contains __u32s, with each bit 355*4882a593Smuzhiyun // specifying whether the EPiC device supports the given 356*4882a593Smuzhiyun // command or functionality. 357*4882a593Smuzhiyun struct edge_compatibility_bits Supports; 358*4882a593Smuzhiyun }; 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun // Values for iDownloadFile 361*4882a593Smuzhiyun #define EDGE_DOWNLOAD_FILE_NONE 0 // No download requested 362*4882a593Smuzhiyun #define EDGE_DOWNLOAD_FILE_INTERNAL 0xFF // Download the file compiled into driver (930 version) 363*4882a593Smuzhiyun #define EDGE_DOWNLOAD_FILE_I930 0xFF // Download the file compiled into driver (930 version) 364*4882a593Smuzhiyun #define EDGE_DOWNLOAD_FILE_80251 0xFE // Download the file compiled into driver (80251 version) 365*4882a593Smuzhiyun 366*4882a593Smuzhiyun 367*4882a593Smuzhiyun 368*4882a593Smuzhiyun /* 369*4882a593Smuzhiyun * Special addresses for READ/WRITE_RAM/ROM 370*4882a593Smuzhiyun */ 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun // Version 1 (original) format of DeviceParams 373*4882a593Smuzhiyun #define EDGE_MANUF_DESC_ADDR_V1 0x00FF7F00 374*4882a593Smuzhiyun #define EDGE_MANUF_DESC_LEN_V1 sizeof(EDGE_MANUF_DESCRIPTOR_V1) 375*4882a593Smuzhiyun 376*4882a593Smuzhiyun // Version 2 format of DeviceParams. This format is longer (3C0h) 377*4882a593Smuzhiyun // and starts lower in memory, at the uppermost 1K in ROM. 378*4882a593Smuzhiyun #define EDGE_MANUF_DESC_ADDR 0x00FF7C00 379*4882a593Smuzhiyun #define EDGE_MANUF_DESC_LEN sizeof(struct edge_manuf_descriptor) 380*4882a593Smuzhiyun 381*4882a593Smuzhiyun // Boot params descriptor 382*4882a593Smuzhiyun #define EDGE_BOOT_DESC_ADDR 0x00FF7FC0 383*4882a593Smuzhiyun #define EDGE_BOOT_DESC_LEN sizeof(struct edge_boot_descriptor) 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun // Define the max block size that may be read or written 386*4882a593Smuzhiyun // in a read/write RAM/ROM command. 387*4882a593Smuzhiyun #define MAX_SIZE_REQ_ION_READ_MEM ((__u16)64) 388*4882a593Smuzhiyun #define MAX_SIZE_REQ_ION_WRITE_MEM ((__u16)64) 389*4882a593Smuzhiyun 390*4882a593Smuzhiyun 391*4882a593Smuzhiyun // 392*4882a593Smuzhiyun // Notes for the following two ION vendor-specific param descriptors: 393*4882a593Smuzhiyun // 394*4882a593Smuzhiyun // 1. These have a standard USB descriptor header so they look like a 395*4882a593Smuzhiyun // normal descriptor. 396*4882a593Smuzhiyun // 2. Any strings in the structures are in USB-defined string 397*4882a593Smuzhiyun // descriptor format, so that they may be separately retrieved, 398*4882a593Smuzhiyun // if necessary, with a minimum of work on the 930. This also 399*4882a593Smuzhiyun // requires them to be in UNICODE format, which, for English at 400*4882a593Smuzhiyun // least, simply means extending each __u8 into a __u16. 401*4882a593Smuzhiyun // 3. For all fields, 00 means 'uninitialized'. 402*4882a593Smuzhiyun // 4. All unused areas should be set to 00 for future expansion. 403*4882a593Smuzhiyun // 404*4882a593Smuzhiyun 405*4882a593Smuzhiyun // This structure is ver 2 format. It contains ALL USB descriptors as 406*4882a593Smuzhiyun // well as the configuration parameters that were in the original V1 407*4882a593Smuzhiyun // structure. It is NOT modified when new boot code is downloaded; rather, 408*4882a593Smuzhiyun // these values are set or modified by manufacturing. It is located at 409*4882a593Smuzhiyun // xC00-xFBF (length 3C0h) in the ROM. 410*4882a593Smuzhiyun // This structure is a superset of the v1 structure and is arranged so 411*4882a593Smuzhiyun // that all of the v1 fields remain at the same address. We are just 412*4882a593Smuzhiyun // adding more room to the front of the structure to hold the descriptors. 413*4882a593Smuzhiyun // 414*4882a593Smuzhiyun // The actual contents of this structure are defined in a 930 assembly 415*4882a593Smuzhiyun // file, converted to a binary image, and then written by the serialization 416*4882a593Smuzhiyun // program. The C definition of this structure just defines a dummy 417*4882a593Smuzhiyun // area for general USB descriptors and the descriptor tables (the root 418*4882a593Smuzhiyun // descriptor starts at xC00). At the bottom of the structure are the 419*4882a593Smuzhiyun // fields inherited from the v1 structure. 420*4882a593Smuzhiyun 421*4882a593Smuzhiyun #define MAX_SERIALNUMBER_LEN 12 422*4882a593Smuzhiyun #define MAX_ASSEMBLYNUMBER_LEN 14 423*4882a593Smuzhiyun 424*4882a593Smuzhiyun struct edge_manuf_descriptor { 425*4882a593Smuzhiyun 426*4882a593Smuzhiyun __u16 RootDescTable[0x10]; // C00 Root of descriptor tables (just a placeholder) 427*4882a593Smuzhiyun __u8 DescriptorArea[0x2E0]; // C20 Descriptors go here, up to 2E0h (just a placeholder) 428*4882a593Smuzhiyun 429*4882a593Smuzhiyun // Start of v1-compatible section 430*4882a593Smuzhiyun __u8 Length; // F00 Desc length for what follows, per USB (= C0h ) 431*4882a593Smuzhiyun __u8 DescType; // F01 Desc type, per USB (=DEVICE type) 432*4882a593Smuzhiyun __u8 DescVer; // F02 Desc version/format (currently 2) 433*4882a593Smuzhiyun __u8 NumRootDescEntries; // F03 # entries in RootDescTable 434*4882a593Smuzhiyun 435*4882a593Smuzhiyun __u8 RomSize; // F04 Size of ROM/E2PROM in K 436*4882a593Smuzhiyun __u8 RamSize; // F05 Size of external RAM in K 437*4882a593Smuzhiyun __u8 CpuRev; // F06 CPU revision level (chg only if s/w visible) 438*4882a593Smuzhiyun __u8 BoardRev; // F07 PCB revision level (chg only if s/w visible) 439*4882a593Smuzhiyun 440*4882a593Smuzhiyun __u8 NumPorts; // F08 Number of ports 441*4882a593Smuzhiyun __u8 DescDate[3]; // F09 MM/DD/YY when descriptor template was compiler, 442*4882a593Smuzhiyun // so host can track changes to USB-only descriptors. 443*4882a593Smuzhiyun 444*4882a593Smuzhiyun __u8 SerNumLength; // F0C USB string descriptor len 445*4882a593Smuzhiyun __u8 SerNumDescType; // F0D USB descriptor type (=STRING type) 446*4882a593Smuzhiyun __le16 SerialNumber[MAX_SERIALNUMBER_LEN]; // F0E "01-01-000100" Unicode Serial Number 447*4882a593Smuzhiyun 448*4882a593Smuzhiyun __u8 AssemblyNumLength; // F26 USB string descriptor len 449*4882a593Smuzhiyun __u8 AssemblyNumDescType; // F27 USB descriptor type (=STRING type) 450*4882a593Smuzhiyun __le16 AssemblyNumber[MAX_ASSEMBLYNUMBER_LEN]; // F28 "350-1000-01-A " assembly number 451*4882a593Smuzhiyun 452*4882a593Smuzhiyun __u8 OemAssyNumLength; // F44 USB string descriptor len 453*4882a593Smuzhiyun __u8 OemAssyNumDescType; // F45 USB descriptor type (=STRING type) 454*4882a593Smuzhiyun __le16 OemAssyNumber[MAX_ASSEMBLYNUMBER_LEN]; // F46 "xxxxxxxxxxxxxx" OEM assembly number 455*4882a593Smuzhiyun 456*4882a593Smuzhiyun __u8 ManufDateLength; // F62 USB string descriptor len 457*4882a593Smuzhiyun __u8 ManufDateDescType; // F63 USB descriptor type (=STRING type) 458*4882a593Smuzhiyun __le16 ManufDate[6]; // F64 "MMDDYY" manufacturing date 459*4882a593Smuzhiyun 460*4882a593Smuzhiyun __u8 Reserved3[0x4D]; // F70 -- unused, set to 0 -- 461*4882a593Smuzhiyun 462*4882a593Smuzhiyun __u8 UartType; // FBD Uart Type 463*4882a593Smuzhiyun __u8 IonPid; // FBE Product ID, == LSB of USB DevDesc.PID 464*4882a593Smuzhiyun // (Note: Edgeport/4s before 11/98 will have 465*4882a593Smuzhiyun // 00 here instead of 01) 466*4882a593Smuzhiyun __u8 IonConfig; // FBF Config byte for ION manufacturing use 467*4882a593Smuzhiyun // FBF end of structure, total len = 3C0h 468*4882a593Smuzhiyun 469*4882a593Smuzhiyun }; 470*4882a593Smuzhiyun 471*4882a593Smuzhiyun 472*4882a593Smuzhiyun #define MANUF_DESC_VER_1 1 // Original definition of MANUF_DESC 473*4882a593Smuzhiyun #define MANUF_DESC_VER_2 2 // Ver 2, starts at xC00h len 3C0h 474*4882a593Smuzhiyun 475*4882a593Smuzhiyun 476*4882a593Smuzhiyun // Uart Types 477*4882a593Smuzhiyun // Note: Since this field was added only recently, all Edgeport/4 units 478*4882a593Smuzhiyun // shipped before 11/98 will have 00 in this field. Therefore, 479*4882a593Smuzhiyun // both 00 and 01 values mean '654. 480*4882a593Smuzhiyun #define MANUF_UART_EXAR_654_EARLY 0 // Exar 16C654 in Edgeport/4s before 11/98 481*4882a593Smuzhiyun #define MANUF_UART_EXAR_654 1 // Exar 16C654 482*4882a593Smuzhiyun #define MANUF_UART_EXAR_2852 2 // Exar 16C2852 483*4882a593Smuzhiyun 484*4882a593Smuzhiyun // 485*4882a593Smuzhiyun // Note: The CpuRev and BoardRev values do not conform to manufacturing 486*4882a593Smuzhiyun // revisions; they are to be incremented only when the CPU or hardware 487*4882a593Smuzhiyun // changes in a software-visible way, such that the 930 software or 488*4882a593Smuzhiyun // the host driver needs to handle the hardware differently. 489*4882a593Smuzhiyun // 490*4882a593Smuzhiyun 491*4882a593Smuzhiyun // Values of bottom 5 bits of CpuRev & BoardRev for 492*4882a593Smuzhiyun // Implementation 0 (ie, 930-based) 493*4882a593Smuzhiyun #define MANUF_CPU_REV_AD4 1 // 930 AD4, with EP1 Rx bug (needs RXSPM) 494*4882a593Smuzhiyun #define MANUF_CPU_REV_AD5 2 // 930 AD5, with above bug (supposedly) fixed 495*4882a593Smuzhiyun #define MANUF_CPU_80251 0x20 // Intel 80251 496*4882a593Smuzhiyun 497*4882a593Smuzhiyun 498*4882a593Smuzhiyun #define MANUF_BOARD_REV_A 1 // Original version, == Manuf Rev A 499*4882a593Smuzhiyun #define MANUF_BOARD_REV_B 2 // Manuf Rev B, wakeup interrupt works 500*4882a593Smuzhiyun #define MANUF_BOARD_REV_C 3 // Manuf Rev C, 2/4 ports, rs232/rs422 501*4882a593Smuzhiyun #define MANUF_BOARD_REV_GENERATION_2 0x20 // Second generaiton edgeport 502*4882a593Smuzhiyun 503*4882a593Smuzhiyun 504*4882a593Smuzhiyun // Values of bottom 5 bits of CpuRev & BoardRev for 505*4882a593Smuzhiyun // Implementation 1 (ie, 251+Netchip-based) 506*4882a593Smuzhiyun #define MANUF_CPU_REV_1 1 // C251TB Rev 1 (Need actual Intel rev here) 507*4882a593Smuzhiyun 508*4882a593Smuzhiyun #define MANUF_BOARD_REV_A 1 // First rev of 251+Netchip design 509*4882a593Smuzhiyun 510*4882a593Smuzhiyun #define MANUF_SERNUM_LENGTH sizeof(((struct edge_manuf_descriptor *)0)->SerialNumber) 511*4882a593Smuzhiyun #define MANUF_ASSYNUM_LENGTH sizeof(((struct edge_manuf_descriptor *)0)->AssemblyNumber) 512*4882a593Smuzhiyun #define MANUF_OEMASSYNUM_LENGTH sizeof(((struct edge_manuf_descriptor *)0)->OemAssyNumber) 513*4882a593Smuzhiyun #define MANUF_MANUFDATE_LENGTH sizeof(((struct edge_manuf_descriptor *)0)->ManufDate) 514*4882a593Smuzhiyun 515*4882a593Smuzhiyun #define MANUF_ION_CONFIG_DIAG_NO_LOOP 0x20 // As below but no ext loopback test 516*4882a593Smuzhiyun #define MANUF_ION_CONFIG_DIAG 0x40 // 930 based device: 1=Run h/w diags, 0=norm 517*4882a593Smuzhiyun // TIUMP Device : 1=IONSERIAL needs to run Final Test 518*4882a593Smuzhiyun #define MANUF_ION_CONFIG_MASTER 0x80 // 930 based device: 1=Master mode, 0=Normal 519*4882a593Smuzhiyun // TIUMP Device : 1=First device on a multi TIUMP Device 520*4882a593Smuzhiyun 521*4882a593Smuzhiyun // 522*4882a593Smuzhiyun // This structure describes parameters for the boot code, and 523*4882a593Smuzhiyun // is programmed along with new boot code. These are values 524*4882a593Smuzhiyun // which are specific to a given build of the boot code. It 525*4882a593Smuzhiyun // is exactly 64 bytes long and is fixed at address FF:xFC0 526*4882a593Smuzhiyun // - FF:xFFF. Note that the 930-mandated UCONFIG bytes are 527*4882a593Smuzhiyun // included in this structure. 528*4882a593Smuzhiyun // 529*4882a593Smuzhiyun struct edge_boot_descriptor { 530*4882a593Smuzhiyun __u8 Length; // C0 Desc length, per USB (= 40h) 531*4882a593Smuzhiyun __u8 DescType; // C1 Desc type, per USB (= DEVICE type) 532*4882a593Smuzhiyun __u8 DescVer; // C2 Desc version/format 533*4882a593Smuzhiyun __u8 Reserved1; // C3 -- unused, set to 0 -- 534*4882a593Smuzhiyun 535*4882a593Smuzhiyun __le16 BootCodeLength; // C4 Boot code goes from FF:0000 to FF:(len-1) 536*4882a593Smuzhiyun // (LE format) 537*4882a593Smuzhiyun 538*4882a593Smuzhiyun __u8 MajorVersion; // C6 Firmware version: xx. 539*4882a593Smuzhiyun __u8 MinorVersion; // C7 yy. 540*4882a593Smuzhiyun __le16 BuildNumber; // C8 zzzz (LE format) 541*4882a593Smuzhiyun 542*4882a593Smuzhiyun __u16 EnumRootDescTable; // CA Root of ROM-based descriptor table 543*4882a593Smuzhiyun __u8 NumDescTypes; // CC Number of supported descriptor types 544*4882a593Smuzhiyun 545*4882a593Smuzhiyun __u8 Reserved4; // CD Fix Compiler Packing 546*4882a593Smuzhiyun 547*4882a593Smuzhiyun __le16 Capabilities; // CE-CF Capabilities flags (LE format) 548*4882a593Smuzhiyun __u8 Reserved2[0x28]; // D0 -- unused, set to 0 -- 549*4882a593Smuzhiyun __u8 UConfig0; // F8 930-defined CPU configuration byte 0 550*4882a593Smuzhiyun __u8 UConfig1; // F9 930-defined CPU configuration byte 1 551*4882a593Smuzhiyun __u8 Reserved3[6]; // FA -- unused, set to 0 -- 552*4882a593Smuzhiyun // FF end of structure, total len = 80 553*4882a593Smuzhiyun }; 554*4882a593Smuzhiyun 555*4882a593Smuzhiyun 556*4882a593Smuzhiyun #define BOOT_DESC_VER_1 1 // Original definition of BOOT_PARAMS 557*4882a593Smuzhiyun #define BOOT_DESC_VER_2 2 // 2nd definition, descriptors not included in boot 558*4882a593Smuzhiyun 559*4882a593Smuzhiyun 560*4882a593Smuzhiyun // Capabilities flags 561*4882a593Smuzhiyun 562*4882a593Smuzhiyun #define BOOT_CAP_RESET_CMD 0x0001 // If set, boot correctly supports ION_RESET_DEVICE 563*4882a593Smuzhiyun 564*4882a593Smuzhiyun 565*4882a593Smuzhiyun /************************************************************************ 566*4882a593Smuzhiyun T I U M P D E F I N I T I O N S 567*4882a593Smuzhiyun ***********************************************************************/ 568*4882a593Smuzhiyun 569*4882a593Smuzhiyun // Chip definitions in I2C 570*4882a593Smuzhiyun #define UMP5152 0x52 571*4882a593Smuzhiyun #define UMP3410 0x10 572*4882a593Smuzhiyun 573*4882a593Smuzhiyun 574*4882a593Smuzhiyun //************************************************************************ 575*4882a593Smuzhiyun // TI I2C Format Definitions 576*4882a593Smuzhiyun //************************************************************************ 577*4882a593Smuzhiyun #define I2C_DESC_TYPE_INFO_BASIC 0x01 578*4882a593Smuzhiyun #define I2C_DESC_TYPE_FIRMWARE_BASIC 0x02 579*4882a593Smuzhiyun #define I2C_DESC_TYPE_DEVICE 0x03 580*4882a593Smuzhiyun #define I2C_DESC_TYPE_CONFIG 0x04 581*4882a593Smuzhiyun #define I2C_DESC_TYPE_STRING 0x05 582*4882a593Smuzhiyun #define I2C_DESC_TYPE_FIRMWARE_AUTO 0x07 // for 3410 download 583*4882a593Smuzhiyun #define I2C_DESC_TYPE_CONFIG_KLUDGE 0x14 // for 3410 584*4882a593Smuzhiyun #define I2C_DESC_TYPE_WATCHPORT_VERSION 0x15 // firmware version number for watchport 585*4882a593Smuzhiyun #define I2C_DESC_TYPE_WATCHPORT_CALIBRATION_DATA 0x16 // Watchport Calibration Data 586*4882a593Smuzhiyun 587*4882a593Smuzhiyun #define I2C_DESC_TYPE_FIRMWARE_BLANK 0xf2 588*4882a593Smuzhiyun 589*4882a593Smuzhiyun // Special section defined by ION 590*4882a593Smuzhiyun #define I2C_DESC_TYPE_ION 0 // Not defined by TI 591*4882a593Smuzhiyun 592*4882a593Smuzhiyun 593*4882a593Smuzhiyun struct ti_i2c_desc { 594*4882a593Smuzhiyun __u8 Type; // Type of descriptor 595*4882a593Smuzhiyun __le16 Size; // Size of data only not including header 596*4882a593Smuzhiyun __u8 CheckSum; // Checksum (8 bit sum of data only) 597*4882a593Smuzhiyun __u8 Data[]; // Data starts here 598*4882a593Smuzhiyun } __attribute__((packed)); 599*4882a593Smuzhiyun 600*4882a593Smuzhiyun // for 5152 devices only (type 2 record) 601*4882a593Smuzhiyun // for 3410 the version is stored in the WATCHPORT_FIRMWARE_VERSION descriptor 602*4882a593Smuzhiyun struct ti_i2c_firmware_rec { 603*4882a593Smuzhiyun __u8 Ver_Major; // Firmware Major version number 604*4882a593Smuzhiyun __u8 Ver_Minor; // Firmware Minor version number 605*4882a593Smuzhiyun __u8 Data[]; // Download starts here 606*4882a593Smuzhiyun } __attribute__((packed)); 607*4882a593Smuzhiyun 608*4882a593Smuzhiyun 609*4882a593Smuzhiyun struct watchport_firmware_version { 610*4882a593Smuzhiyun // Added 2 bytes for version number 611*4882a593Smuzhiyun __u8 Version_Major; // Download Version (for Watchport) 612*4882a593Smuzhiyun __u8 Version_Minor; 613*4882a593Smuzhiyun } __attribute__((packed)); 614*4882a593Smuzhiyun 615*4882a593Smuzhiyun 616*4882a593Smuzhiyun // Structure of header of download image in fw_down.h 617*4882a593Smuzhiyun struct ti_i2c_image_header { 618*4882a593Smuzhiyun __le16 Length; 619*4882a593Smuzhiyun __u8 CheckSum; 620*4882a593Smuzhiyun } __attribute__((packed)); 621*4882a593Smuzhiyun 622*4882a593Smuzhiyun struct ti_basic_descriptor { 623*4882a593Smuzhiyun __u8 Power; // Self powered 624*4882a593Smuzhiyun // bit 7: 1 - power switching supported 625*4882a593Smuzhiyun // 0 - power switching not supported 626*4882a593Smuzhiyun // 627*4882a593Smuzhiyun // bit 0: 1 - self powered 628*4882a593Smuzhiyun // 0 - bus powered 629*4882a593Smuzhiyun // 630*4882a593Smuzhiyun // 631*4882a593Smuzhiyun __u16 HubVid; // VID HUB 632*4882a593Smuzhiyun __u16 HubPid; // PID HUB 633*4882a593Smuzhiyun __u16 DevPid; // PID Edgeport 634*4882a593Smuzhiyun __u8 HubTime; // Time for power on to power good 635*4882a593Smuzhiyun __u8 HubCurrent; // HUB Current = 100ma 636*4882a593Smuzhiyun } __attribute__((packed)); 637*4882a593Smuzhiyun 638*4882a593Smuzhiyun 639*4882a593Smuzhiyun // CPU / Board Rev Definitions 640*4882a593Smuzhiyun #define TI_CPU_REV_5052 2 // 5052 based edgeports 641*4882a593Smuzhiyun #define TI_CPU_REV_3410 3 // 3410 based edgeports 642*4882a593Smuzhiyun 643*4882a593Smuzhiyun #define TI_BOARD_REV_TI_EP 0 // Basic ti based edgeport 644*4882a593Smuzhiyun #define TI_BOARD_REV_COMPACT 1 // Compact board 645*4882a593Smuzhiyun #define TI_BOARD_REV_WATCHPORT 2 // Watchport 646*4882a593Smuzhiyun 647*4882a593Smuzhiyun 648*4882a593Smuzhiyun #define TI_GET_CPU_REVISION(x) (__u8)((((x)>>4)&0x0f)) 649*4882a593Smuzhiyun #define TI_GET_BOARD_REVISION(x) (__u8)(((x)&0x0f)) 650*4882a593Smuzhiyun 651*4882a593Smuzhiyun #define TI_I2C_SIZE_MASK 0x1f // 5 bits 652*4882a593Smuzhiyun #define TI_GET_I2C_SIZE(x) ((((x) & TI_I2C_SIZE_MASK)+1)*256) 653*4882a593Smuzhiyun 654*4882a593Smuzhiyun #define TI_MAX_I2C_SIZE (16 * 1024) 655*4882a593Smuzhiyun 656*4882a593Smuzhiyun #define TI_MANUF_VERSION_0 0 657*4882a593Smuzhiyun 658*4882a593Smuzhiyun // IonConig2 flags 659*4882a593Smuzhiyun #define TI_CONFIG2_RS232 0x01 660*4882a593Smuzhiyun #define TI_CONFIG2_RS422 0x02 661*4882a593Smuzhiyun #define TI_CONFIG2_RS485 0x04 662*4882a593Smuzhiyun #define TI_CONFIG2_SWITCHABLE 0x08 663*4882a593Smuzhiyun 664*4882a593Smuzhiyun #define TI_CONFIG2_WATCHPORT 0x10 665*4882a593Smuzhiyun 666*4882a593Smuzhiyun 667*4882a593Smuzhiyun struct edge_ti_manuf_descriptor { 668*4882a593Smuzhiyun __u8 IonConfig; // Config byte for ION manufacturing use 669*4882a593Smuzhiyun __u8 IonConfig2; // Expansion 670*4882a593Smuzhiyun __u8 Version; // Version 671*4882a593Smuzhiyun __u8 CpuRev_BoardRev; // CPU revision level (0xF0) and Board Rev Level (0x0F) 672*4882a593Smuzhiyun __u8 NumPorts; // Number of ports for this UMP 673*4882a593Smuzhiyun __u8 NumVirtualPorts; // Number of Virtual ports 674*4882a593Smuzhiyun __u8 HubConfig1; // Used to configure the Hub 675*4882a593Smuzhiyun __u8 HubConfig2; // Used to configure the Hub 676*4882a593Smuzhiyun __u8 TotalPorts; // Total Number of Com Ports for the entire device (All UMPs) 677*4882a593Smuzhiyun __u8 Reserved; // Reserved 678*4882a593Smuzhiyun } __attribute__((packed)); 679*4882a593Smuzhiyun 680*4882a593Smuzhiyun 681*4882a593Smuzhiyun #endif // if !defined(_USBVEND_H) 682