1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2009 by Bart Hartgers (bart.hartgers+ark3116@gmail.com)
4*4882a593Smuzhiyun * Original version:
5*4882a593Smuzhiyun * Copyright (C) 2006
6*4882a593Smuzhiyun * Simon Schulz (ark3116_driver <at> auctionant.de)
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * ark3116
9*4882a593Smuzhiyun * - implements a driver for the arkmicro ark3116 chipset (vendor=0x6547,
10*4882a593Smuzhiyun * productid=0x0232) (used in a datacable called KQ-U8A)
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * Supports full modem status lines, break, hardware flow control. Does not
13*4882a593Smuzhiyun * support software flow control, since I do not know how to enable it in hw.
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun * This driver is a essentially new implementation. I initially dug
16*4882a593Smuzhiyun * into the old ark3116.c driver and suddenly realized the ark3116 is
17*4882a593Smuzhiyun * a 16450 with a USB interface glued to it. See comments at the
18*4882a593Smuzhiyun * bottom of this file.
19*4882a593Smuzhiyun */
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include <linux/kernel.h>
22*4882a593Smuzhiyun #include <linux/ioctl.h>
23*4882a593Smuzhiyun #include <linux/tty.h>
24*4882a593Smuzhiyun #include <linux/slab.h>
25*4882a593Smuzhiyun #include <linux/tty_flip.h>
26*4882a593Smuzhiyun #include <linux/module.h>
27*4882a593Smuzhiyun #include <linux/usb.h>
28*4882a593Smuzhiyun #include <linux/usb/serial.h>
29*4882a593Smuzhiyun #include <linux/serial.h>
30*4882a593Smuzhiyun #include <linux/serial_reg.h>
31*4882a593Smuzhiyun #include <linux/uaccess.h>
32*4882a593Smuzhiyun #include <linux/mutex.h>
33*4882a593Smuzhiyun #include <linux/spinlock.h>
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define DRIVER_AUTHOR "Bart Hartgers <bart.hartgers+ark3116@gmail.com>"
36*4882a593Smuzhiyun #define DRIVER_DESC "USB ARK3116 serial/IrDA driver"
37*4882a593Smuzhiyun #define DRIVER_DEV_DESC "ARK3116 RS232/IrDA"
38*4882a593Smuzhiyun #define DRIVER_NAME "ark3116"
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /* usb timeout of 1 second */
41*4882a593Smuzhiyun #define ARK_TIMEOUT 1000
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun static const struct usb_device_id id_table[] = {
44*4882a593Smuzhiyun { USB_DEVICE(0x6547, 0x0232) },
45*4882a593Smuzhiyun { USB_DEVICE(0x18ec, 0x3118) }, /* USB to IrDA adapter */
46*4882a593Smuzhiyun { },
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun MODULE_DEVICE_TABLE(usb, id_table);
49*4882a593Smuzhiyun
is_irda(struct usb_serial * serial)50*4882a593Smuzhiyun static int is_irda(struct usb_serial *serial)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun struct usb_device *dev = serial->dev;
53*4882a593Smuzhiyun if (le16_to_cpu(dev->descriptor.idVendor) == 0x18ec &&
54*4882a593Smuzhiyun le16_to_cpu(dev->descriptor.idProduct) == 0x3118)
55*4882a593Smuzhiyun return 1;
56*4882a593Smuzhiyun return 0;
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun struct ark3116_private {
60*4882a593Smuzhiyun int irda; /* 1 for irda device */
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun /* protects hw register updates */
63*4882a593Smuzhiyun struct mutex hw_lock;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun int quot; /* baudrate divisor */
66*4882a593Smuzhiyun __u32 lcr; /* line control register value */
67*4882a593Smuzhiyun __u32 hcr; /* handshake control register (0x8)
68*4882a593Smuzhiyun * value */
69*4882a593Smuzhiyun __u32 mcr; /* modem control register value */
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /* protects the status values below */
72*4882a593Smuzhiyun spinlock_t status_lock;
73*4882a593Smuzhiyun __u32 msr; /* modem status register value */
74*4882a593Smuzhiyun __u32 lsr; /* line status register value */
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun
ark3116_write_reg(struct usb_serial * serial,unsigned reg,__u8 val)77*4882a593Smuzhiyun static int ark3116_write_reg(struct usb_serial *serial,
78*4882a593Smuzhiyun unsigned reg, __u8 val)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun int result;
81*4882a593Smuzhiyun /* 0xfe 0x40 are magic values taken from original driver */
82*4882a593Smuzhiyun result = usb_control_msg(serial->dev,
83*4882a593Smuzhiyun usb_sndctrlpipe(serial->dev, 0),
84*4882a593Smuzhiyun 0xfe, 0x40, val, reg,
85*4882a593Smuzhiyun NULL, 0, ARK_TIMEOUT);
86*4882a593Smuzhiyun if (result)
87*4882a593Smuzhiyun return result;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun return 0;
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
ark3116_read_reg(struct usb_serial * serial,unsigned reg,unsigned char * buf)92*4882a593Smuzhiyun static int ark3116_read_reg(struct usb_serial *serial,
93*4882a593Smuzhiyun unsigned reg, unsigned char *buf)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun int result;
96*4882a593Smuzhiyun /* 0xfe 0xc0 are magic values taken from original driver */
97*4882a593Smuzhiyun result = usb_control_msg(serial->dev,
98*4882a593Smuzhiyun usb_rcvctrlpipe(serial->dev, 0),
99*4882a593Smuzhiyun 0xfe, 0xc0, 0, reg,
100*4882a593Smuzhiyun buf, 1, ARK_TIMEOUT);
101*4882a593Smuzhiyun if (result < 1) {
102*4882a593Smuzhiyun dev_err(&serial->interface->dev,
103*4882a593Smuzhiyun "failed to read register %u: %d\n",
104*4882a593Smuzhiyun reg, result);
105*4882a593Smuzhiyun if (result >= 0)
106*4882a593Smuzhiyun result = -EIO;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun return result;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun return 0;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
calc_divisor(int bps)114*4882a593Smuzhiyun static inline int calc_divisor(int bps)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun /* Original ark3116 made some exceptions in rounding here
117*4882a593Smuzhiyun * because windows did the same. Assume that is not really
118*4882a593Smuzhiyun * necessary.
119*4882a593Smuzhiyun * Crystal is 12MHz, probably because of USB, but we divide by 4?
120*4882a593Smuzhiyun */
121*4882a593Smuzhiyun return (12000000 + 2*bps) / (4*bps);
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun
ark3116_port_probe(struct usb_serial_port * port)124*4882a593Smuzhiyun static int ark3116_port_probe(struct usb_serial_port *port)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun struct usb_serial *serial = port->serial;
127*4882a593Smuzhiyun struct ark3116_private *priv;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun priv = kzalloc(sizeof(*priv), GFP_KERNEL);
130*4882a593Smuzhiyun if (!priv)
131*4882a593Smuzhiyun return -ENOMEM;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun mutex_init(&priv->hw_lock);
134*4882a593Smuzhiyun spin_lock_init(&priv->status_lock);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun priv->irda = is_irda(serial);
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun usb_set_serial_port_data(port, priv);
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun /* setup the hardware */
141*4882a593Smuzhiyun ark3116_write_reg(serial, UART_IER, 0);
142*4882a593Smuzhiyun /* disable DMA */
143*4882a593Smuzhiyun ark3116_write_reg(serial, UART_FCR, 0);
144*4882a593Smuzhiyun /* handshake control */
145*4882a593Smuzhiyun priv->hcr = 0;
146*4882a593Smuzhiyun ark3116_write_reg(serial, 0x8 , 0);
147*4882a593Smuzhiyun /* modem control */
148*4882a593Smuzhiyun priv->mcr = 0;
149*4882a593Smuzhiyun ark3116_write_reg(serial, UART_MCR, 0);
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun if (!(priv->irda)) {
152*4882a593Smuzhiyun ark3116_write_reg(serial, 0xb , 0);
153*4882a593Smuzhiyun } else {
154*4882a593Smuzhiyun ark3116_write_reg(serial, 0xb , 1);
155*4882a593Smuzhiyun ark3116_write_reg(serial, 0xc , 0);
156*4882a593Smuzhiyun ark3116_write_reg(serial, 0xd , 0x41);
157*4882a593Smuzhiyun ark3116_write_reg(serial, 0xa , 1);
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun /* setup baudrate */
161*4882a593Smuzhiyun ark3116_write_reg(serial, UART_LCR, UART_LCR_DLAB);
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun /* setup for 9600 8N1 */
164*4882a593Smuzhiyun priv->quot = calc_divisor(9600);
165*4882a593Smuzhiyun ark3116_write_reg(serial, UART_DLL, priv->quot & 0xff);
166*4882a593Smuzhiyun ark3116_write_reg(serial, UART_DLM, (priv->quot>>8) & 0xff);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun priv->lcr = UART_LCR_WLEN8;
169*4882a593Smuzhiyun ark3116_write_reg(serial, UART_LCR, UART_LCR_WLEN8);
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun ark3116_write_reg(serial, 0xe, 0);
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun if (priv->irda)
174*4882a593Smuzhiyun ark3116_write_reg(serial, 0x9, 0);
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun dev_info(&port->dev, "using %s mode\n", priv->irda ? "IrDA" : "RS232");
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun return 0;
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun
ark3116_port_remove(struct usb_serial_port * port)181*4882a593Smuzhiyun static int ark3116_port_remove(struct usb_serial_port *port)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun struct ark3116_private *priv = usb_get_serial_port_data(port);
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun /* device is closed, so URBs and DMA should be down */
186*4882a593Smuzhiyun mutex_destroy(&priv->hw_lock);
187*4882a593Smuzhiyun kfree(priv);
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun return 0;
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun
ark3116_set_termios(struct tty_struct * tty,struct usb_serial_port * port,struct ktermios * old_termios)192*4882a593Smuzhiyun static void ark3116_set_termios(struct tty_struct *tty,
193*4882a593Smuzhiyun struct usb_serial_port *port,
194*4882a593Smuzhiyun struct ktermios *old_termios)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun struct usb_serial *serial = port->serial;
197*4882a593Smuzhiyun struct ark3116_private *priv = usb_get_serial_port_data(port);
198*4882a593Smuzhiyun struct ktermios *termios = &tty->termios;
199*4882a593Smuzhiyun unsigned int cflag = termios->c_cflag;
200*4882a593Smuzhiyun int bps = tty_get_baud_rate(tty);
201*4882a593Smuzhiyun int quot;
202*4882a593Smuzhiyun __u8 lcr, hcr, eval;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun /* set data bit count */
205*4882a593Smuzhiyun switch (cflag & CSIZE) {
206*4882a593Smuzhiyun case CS5:
207*4882a593Smuzhiyun lcr = UART_LCR_WLEN5;
208*4882a593Smuzhiyun break;
209*4882a593Smuzhiyun case CS6:
210*4882a593Smuzhiyun lcr = UART_LCR_WLEN6;
211*4882a593Smuzhiyun break;
212*4882a593Smuzhiyun case CS7:
213*4882a593Smuzhiyun lcr = UART_LCR_WLEN7;
214*4882a593Smuzhiyun break;
215*4882a593Smuzhiyun default:
216*4882a593Smuzhiyun case CS8:
217*4882a593Smuzhiyun lcr = UART_LCR_WLEN8;
218*4882a593Smuzhiyun break;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun if (cflag & CSTOPB)
221*4882a593Smuzhiyun lcr |= UART_LCR_STOP;
222*4882a593Smuzhiyun if (cflag & PARENB)
223*4882a593Smuzhiyun lcr |= UART_LCR_PARITY;
224*4882a593Smuzhiyun if (!(cflag & PARODD))
225*4882a593Smuzhiyun lcr |= UART_LCR_EPAR;
226*4882a593Smuzhiyun #ifdef CMSPAR
227*4882a593Smuzhiyun if (cflag & CMSPAR)
228*4882a593Smuzhiyun lcr |= UART_LCR_SPAR;
229*4882a593Smuzhiyun #endif
230*4882a593Smuzhiyun /* handshake control */
231*4882a593Smuzhiyun hcr = (cflag & CRTSCTS) ? 0x03 : 0x00;
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun /* calc baudrate */
234*4882a593Smuzhiyun dev_dbg(&port->dev, "%s - setting bps to %d\n", __func__, bps);
235*4882a593Smuzhiyun eval = 0;
236*4882a593Smuzhiyun switch (bps) {
237*4882a593Smuzhiyun case 0:
238*4882a593Smuzhiyun quot = calc_divisor(9600);
239*4882a593Smuzhiyun break;
240*4882a593Smuzhiyun default:
241*4882a593Smuzhiyun if ((bps < 75) || (bps > 3000000))
242*4882a593Smuzhiyun bps = 9600;
243*4882a593Smuzhiyun quot = calc_divisor(bps);
244*4882a593Smuzhiyun break;
245*4882a593Smuzhiyun case 460800:
246*4882a593Smuzhiyun eval = 1;
247*4882a593Smuzhiyun quot = calc_divisor(bps);
248*4882a593Smuzhiyun break;
249*4882a593Smuzhiyun case 921600:
250*4882a593Smuzhiyun eval = 2;
251*4882a593Smuzhiyun quot = calc_divisor(bps);
252*4882a593Smuzhiyun break;
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun /* Update state: synchronize */
256*4882a593Smuzhiyun mutex_lock(&priv->hw_lock);
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun /* keep old LCR_SBC bit */
259*4882a593Smuzhiyun lcr |= (priv->lcr & UART_LCR_SBC);
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun dev_dbg(&port->dev, "%s - setting hcr:0x%02x,lcr:0x%02x,quot:%d\n",
262*4882a593Smuzhiyun __func__, hcr, lcr, quot);
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun /* handshake control */
265*4882a593Smuzhiyun if (priv->hcr != hcr) {
266*4882a593Smuzhiyun priv->hcr = hcr;
267*4882a593Smuzhiyun ark3116_write_reg(serial, 0x8, hcr);
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun /* baudrate */
271*4882a593Smuzhiyun if (priv->quot != quot) {
272*4882a593Smuzhiyun priv->quot = quot;
273*4882a593Smuzhiyun priv->lcr = lcr; /* need to write lcr anyway */
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun /* disable DMA since transmit/receive is
276*4882a593Smuzhiyun * shadowed by UART_DLL
277*4882a593Smuzhiyun */
278*4882a593Smuzhiyun ark3116_write_reg(serial, UART_FCR, 0);
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun ark3116_write_reg(serial, UART_LCR,
281*4882a593Smuzhiyun lcr|UART_LCR_DLAB);
282*4882a593Smuzhiyun ark3116_write_reg(serial, UART_DLL, quot & 0xff);
283*4882a593Smuzhiyun ark3116_write_reg(serial, UART_DLM, (quot>>8) & 0xff);
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun /* restore lcr */
286*4882a593Smuzhiyun ark3116_write_reg(serial, UART_LCR, lcr);
287*4882a593Smuzhiyun /* magic baudrate thingy: not sure what it does,
288*4882a593Smuzhiyun * but windows does this as well.
289*4882a593Smuzhiyun */
290*4882a593Smuzhiyun ark3116_write_reg(serial, 0xe, eval);
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun /* enable DMA */
293*4882a593Smuzhiyun ark3116_write_reg(serial, UART_FCR, UART_FCR_DMA_SELECT);
294*4882a593Smuzhiyun } else if (priv->lcr != lcr) {
295*4882a593Smuzhiyun priv->lcr = lcr;
296*4882a593Smuzhiyun ark3116_write_reg(serial, UART_LCR, lcr);
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun mutex_unlock(&priv->hw_lock);
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun /* check for software flow control */
302*4882a593Smuzhiyun if (I_IXOFF(tty) || I_IXON(tty)) {
303*4882a593Smuzhiyun dev_warn(&port->dev,
304*4882a593Smuzhiyun "software flow control not implemented\n");
305*4882a593Smuzhiyun }
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun /* Don't rewrite B0 */
308*4882a593Smuzhiyun if (tty_termios_baud_rate(termios))
309*4882a593Smuzhiyun tty_termios_encode_baud_rate(termios, bps, bps);
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun
ark3116_close(struct usb_serial_port * port)312*4882a593Smuzhiyun static void ark3116_close(struct usb_serial_port *port)
313*4882a593Smuzhiyun {
314*4882a593Smuzhiyun struct usb_serial *serial = port->serial;
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun /* disable DMA */
317*4882a593Smuzhiyun ark3116_write_reg(serial, UART_FCR, 0);
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun /* deactivate interrupts */
320*4882a593Smuzhiyun ark3116_write_reg(serial, UART_IER, 0);
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun usb_serial_generic_close(port);
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun usb_kill_urb(port->interrupt_in_urb);
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun
ark3116_open(struct tty_struct * tty,struct usb_serial_port * port)327*4882a593Smuzhiyun static int ark3116_open(struct tty_struct *tty, struct usb_serial_port *port)
328*4882a593Smuzhiyun {
329*4882a593Smuzhiyun struct ark3116_private *priv = usb_get_serial_port_data(port);
330*4882a593Smuzhiyun struct usb_serial *serial = port->serial;
331*4882a593Smuzhiyun unsigned char *buf;
332*4882a593Smuzhiyun int result;
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun buf = kmalloc(1, GFP_KERNEL);
335*4882a593Smuzhiyun if (buf == NULL)
336*4882a593Smuzhiyun return -ENOMEM;
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun result = usb_serial_generic_open(tty, port);
339*4882a593Smuzhiyun if (result) {
340*4882a593Smuzhiyun dev_dbg(&port->dev,
341*4882a593Smuzhiyun "%s - usb_serial_generic_open failed: %d\n",
342*4882a593Smuzhiyun __func__, result);
343*4882a593Smuzhiyun goto err_free;
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun /* remove any data still left: also clears error state */
347*4882a593Smuzhiyun ark3116_read_reg(serial, UART_RX, buf);
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun /* read modem status */
350*4882a593Smuzhiyun result = ark3116_read_reg(serial, UART_MSR, buf);
351*4882a593Smuzhiyun if (result)
352*4882a593Smuzhiyun goto err_close;
353*4882a593Smuzhiyun priv->msr = *buf;
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun /* read line status */
356*4882a593Smuzhiyun result = ark3116_read_reg(serial, UART_LSR, buf);
357*4882a593Smuzhiyun if (result)
358*4882a593Smuzhiyun goto err_close;
359*4882a593Smuzhiyun priv->lsr = *buf;
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun result = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL);
362*4882a593Smuzhiyun if (result) {
363*4882a593Smuzhiyun dev_err(&port->dev, "submit irq_in urb failed %d\n",
364*4882a593Smuzhiyun result);
365*4882a593Smuzhiyun goto err_close;
366*4882a593Smuzhiyun }
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun /* activate interrupts */
369*4882a593Smuzhiyun ark3116_write_reg(port->serial, UART_IER, UART_IER_MSI|UART_IER_RLSI);
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun /* enable DMA */
372*4882a593Smuzhiyun ark3116_write_reg(port->serial, UART_FCR, UART_FCR_DMA_SELECT);
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun /* setup termios */
375*4882a593Smuzhiyun if (tty)
376*4882a593Smuzhiyun ark3116_set_termios(tty, port, NULL);
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun kfree(buf);
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun return 0;
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun err_close:
383*4882a593Smuzhiyun usb_serial_generic_close(port);
384*4882a593Smuzhiyun err_free:
385*4882a593Smuzhiyun kfree(buf);
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun return result;
388*4882a593Smuzhiyun }
389*4882a593Smuzhiyun
ark3116_get_serial_info(struct tty_struct * tty,struct serial_struct * ss)390*4882a593Smuzhiyun static int ark3116_get_serial_info(struct tty_struct *tty,
391*4882a593Smuzhiyun struct serial_struct *ss)
392*4882a593Smuzhiyun {
393*4882a593Smuzhiyun struct usb_serial_port *port = tty->driver_data;
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun ss->type = PORT_16654;
396*4882a593Smuzhiyun ss->line = port->minor;
397*4882a593Smuzhiyun ss->port = port->port_number;
398*4882a593Smuzhiyun ss->baud_base = 460800;
399*4882a593Smuzhiyun return 0;
400*4882a593Smuzhiyun }
401*4882a593Smuzhiyun
ark3116_tiocmget(struct tty_struct * tty)402*4882a593Smuzhiyun static int ark3116_tiocmget(struct tty_struct *tty)
403*4882a593Smuzhiyun {
404*4882a593Smuzhiyun struct usb_serial_port *port = tty->driver_data;
405*4882a593Smuzhiyun struct ark3116_private *priv = usb_get_serial_port_data(port);
406*4882a593Smuzhiyun __u32 status;
407*4882a593Smuzhiyun __u32 ctrl;
408*4882a593Smuzhiyun unsigned long flags;
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun mutex_lock(&priv->hw_lock);
411*4882a593Smuzhiyun ctrl = priv->mcr;
412*4882a593Smuzhiyun mutex_unlock(&priv->hw_lock);
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun spin_lock_irqsave(&priv->status_lock, flags);
415*4882a593Smuzhiyun status = priv->msr;
416*4882a593Smuzhiyun spin_unlock_irqrestore(&priv->status_lock, flags);
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun return (status & UART_MSR_DSR ? TIOCM_DSR : 0) |
419*4882a593Smuzhiyun (status & UART_MSR_CTS ? TIOCM_CTS : 0) |
420*4882a593Smuzhiyun (status & UART_MSR_RI ? TIOCM_RI : 0) |
421*4882a593Smuzhiyun (status & UART_MSR_DCD ? TIOCM_CD : 0) |
422*4882a593Smuzhiyun (ctrl & UART_MCR_DTR ? TIOCM_DTR : 0) |
423*4882a593Smuzhiyun (ctrl & UART_MCR_RTS ? TIOCM_RTS : 0) |
424*4882a593Smuzhiyun (ctrl & UART_MCR_OUT1 ? TIOCM_OUT1 : 0) |
425*4882a593Smuzhiyun (ctrl & UART_MCR_OUT2 ? TIOCM_OUT2 : 0);
426*4882a593Smuzhiyun }
427*4882a593Smuzhiyun
ark3116_tiocmset(struct tty_struct * tty,unsigned set,unsigned clr)428*4882a593Smuzhiyun static int ark3116_tiocmset(struct tty_struct *tty,
429*4882a593Smuzhiyun unsigned set, unsigned clr)
430*4882a593Smuzhiyun {
431*4882a593Smuzhiyun struct usb_serial_port *port = tty->driver_data;
432*4882a593Smuzhiyun struct ark3116_private *priv = usb_get_serial_port_data(port);
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun /* we need to take the mutex here, to make sure that the value
435*4882a593Smuzhiyun * in priv->mcr is actually the one that is in the hardware
436*4882a593Smuzhiyun */
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun mutex_lock(&priv->hw_lock);
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun if (set & TIOCM_RTS)
441*4882a593Smuzhiyun priv->mcr |= UART_MCR_RTS;
442*4882a593Smuzhiyun if (set & TIOCM_DTR)
443*4882a593Smuzhiyun priv->mcr |= UART_MCR_DTR;
444*4882a593Smuzhiyun if (set & TIOCM_OUT1)
445*4882a593Smuzhiyun priv->mcr |= UART_MCR_OUT1;
446*4882a593Smuzhiyun if (set & TIOCM_OUT2)
447*4882a593Smuzhiyun priv->mcr |= UART_MCR_OUT2;
448*4882a593Smuzhiyun if (clr & TIOCM_RTS)
449*4882a593Smuzhiyun priv->mcr &= ~UART_MCR_RTS;
450*4882a593Smuzhiyun if (clr & TIOCM_DTR)
451*4882a593Smuzhiyun priv->mcr &= ~UART_MCR_DTR;
452*4882a593Smuzhiyun if (clr & TIOCM_OUT1)
453*4882a593Smuzhiyun priv->mcr &= ~UART_MCR_OUT1;
454*4882a593Smuzhiyun if (clr & TIOCM_OUT2)
455*4882a593Smuzhiyun priv->mcr &= ~UART_MCR_OUT2;
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun ark3116_write_reg(port->serial, UART_MCR, priv->mcr);
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun mutex_unlock(&priv->hw_lock);
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun return 0;
462*4882a593Smuzhiyun }
463*4882a593Smuzhiyun
ark3116_break_ctl(struct tty_struct * tty,int break_state)464*4882a593Smuzhiyun static void ark3116_break_ctl(struct tty_struct *tty, int break_state)
465*4882a593Smuzhiyun {
466*4882a593Smuzhiyun struct usb_serial_port *port = tty->driver_data;
467*4882a593Smuzhiyun struct ark3116_private *priv = usb_get_serial_port_data(port);
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun /* LCR is also used for other things: protect access */
470*4882a593Smuzhiyun mutex_lock(&priv->hw_lock);
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun if (break_state)
473*4882a593Smuzhiyun priv->lcr |= UART_LCR_SBC;
474*4882a593Smuzhiyun else
475*4882a593Smuzhiyun priv->lcr &= ~UART_LCR_SBC;
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun ark3116_write_reg(port->serial, UART_LCR, priv->lcr);
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun mutex_unlock(&priv->hw_lock);
480*4882a593Smuzhiyun }
481*4882a593Smuzhiyun
ark3116_update_msr(struct usb_serial_port * port,__u8 msr)482*4882a593Smuzhiyun static void ark3116_update_msr(struct usb_serial_port *port, __u8 msr)
483*4882a593Smuzhiyun {
484*4882a593Smuzhiyun struct ark3116_private *priv = usb_get_serial_port_data(port);
485*4882a593Smuzhiyun unsigned long flags;
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun spin_lock_irqsave(&priv->status_lock, flags);
488*4882a593Smuzhiyun priv->msr = msr;
489*4882a593Smuzhiyun spin_unlock_irqrestore(&priv->status_lock, flags);
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun if (msr & UART_MSR_ANY_DELTA) {
492*4882a593Smuzhiyun /* update input line counters */
493*4882a593Smuzhiyun if (msr & UART_MSR_DCTS)
494*4882a593Smuzhiyun port->icount.cts++;
495*4882a593Smuzhiyun if (msr & UART_MSR_DDSR)
496*4882a593Smuzhiyun port->icount.dsr++;
497*4882a593Smuzhiyun if (msr & UART_MSR_DDCD)
498*4882a593Smuzhiyun port->icount.dcd++;
499*4882a593Smuzhiyun if (msr & UART_MSR_TERI)
500*4882a593Smuzhiyun port->icount.rng++;
501*4882a593Smuzhiyun wake_up_interruptible(&port->port.delta_msr_wait);
502*4882a593Smuzhiyun }
503*4882a593Smuzhiyun }
504*4882a593Smuzhiyun
ark3116_update_lsr(struct usb_serial_port * port,__u8 lsr)505*4882a593Smuzhiyun static void ark3116_update_lsr(struct usb_serial_port *port, __u8 lsr)
506*4882a593Smuzhiyun {
507*4882a593Smuzhiyun struct ark3116_private *priv = usb_get_serial_port_data(port);
508*4882a593Smuzhiyun unsigned long flags;
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun spin_lock_irqsave(&priv->status_lock, flags);
511*4882a593Smuzhiyun /* combine bits */
512*4882a593Smuzhiyun priv->lsr |= lsr;
513*4882a593Smuzhiyun spin_unlock_irqrestore(&priv->status_lock, flags);
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun if (lsr&UART_LSR_BRK_ERROR_BITS) {
516*4882a593Smuzhiyun if (lsr & UART_LSR_BI)
517*4882a593Smuzhiyun port->icount.brk++;
518*4882a593Smuzhiyun if (lsr & UART_LSR_FE)
519*4882a593Smuzhiyun port->icount.frame++;
520*4882a593Smuzhiyun if (lsr & UART_LSR_PE)
521*4882a593Smuzhiyun port->icount.parity++;
522*4882a593Smuzhiyun if (lsr & UART_LSR_OE)
523*4882a593Smuzhiyun port->icount.overrun++;
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun }
526*4882a593Smuzhiyun
ark3116_read_int_callback(struct urb * urb)527*4882a593Smuzhiyun static void ark3116_read_int_callback(struct urb *urb)
528*4882a593Smuzhiyun {
529*4882a593Smuzhiyun struct usb_serial_port *port = urb->context;
530*4882a593Smuzhiyun int status = urb->status;
531*4882a593Smuzhiyun const __u8 *data = urb->transfer_buffer;
532*4882a593Smuzhiyun int result;
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun switch (status) {
535*4882a593Smuzhiyun case -ECONNRESET:
536*4882a593Smuzhiyun case -ENOENT:
537*4882a593Smuzhiyun case -ESHUTDOWN:
538*4882a593Smuzhiyun /* this urb is terminated, clean up */
539*4882a593Smuzhiyun dev_dbg(&port->dev, "%s - urb shutting down with status: %d\n",
540*4882a593Smuzhiyun __func__, status);
541*4882a593Smuzhiyun return;
542*4882a593Smuzhiyun default:
543*4882a593Smuzhiyun dev_dbg(&port->dev, "%s - nonzero urb status received: %d\n",
544*4882a593Smuzhiyun __func__, status);
545*4882a593Smuzhiyun break;
546*4882a593Smuzhiyun case 0: /* success */
547*4882a593Smuzhiyun /* discovered this by trail and error... */
548*4882a593Smuzhiyun if ((urb->actual_length == 4) && (data[0] == 0xe8)) {
549*4882a593Smuzhiyun const __u8 id = data[1]&UART_IIR_ID;
550*4882a593Smuzhiyun dev_dbg(&port->dev, "%s: iir=%02x\n", __func__, data[1]);
551*4882a593Smuzhiyun if (id == UART_IIR_MSI) {
552*4882a593Smuzhiyun dev_dbg(&port->dev, "%s: msr=%02x\n",
553*4882a593Smuzhiyun __func__, data[3]);
554*4882a593Smuzhiyun ark3116_update_msr(port, data[3]);
555*4882a593Smuzhiyun break;
556*4882a593Smuzhiyun } else if (id == UART_IIR_RLSI) {
557*4882a593Smuzhiyun dev_dbg(&port->dev, "%s: lsr=%02x\n",
558*4882a593Smuzhiyun __func__, data[2]);
559*4882a593Smuzhiyun ark3116_update_lsr(port, data[2]);
560*4882a593Smuzhiyun break;
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun }
563*4882a593Smuzhiyun /*
564*4882a593Smuzhiyun * Not sure what this data meant...
565*4882a593Smuzhiyun */
566*4882a593Smuzhiyun usb_serial_debug_data(&port->dev, __func__,
567*4882a593Smuzhiyun urb->actual_length,
568*4882a593Smuzhiyun urb->transfer_buffer);
569*4882a593Smuzhiyun break;
570*4882a593Smuzhiyun }
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun result = usb_submit_urb(urb, GFP_ATOMIC);
573*4882a593Smuzhiyun if (result)
574*4882a593Smuzhiyun dev_err(&port->dev, "failed to resubmit interrupt urb: %d\n",
575*4882a593Smuzhiyun result);
576*4882a593Smuzhiyun }
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun
579*4882a593Smuzhiyun /* Data comes in via the bulk (data) URB, errors/interrupts via the int URB.
580*4882a593Smuzhiyun * This means that we cannot be sure which data byte has an associated error
581*4882a593Smuzhiyun * condition, so we report an error for all data in the next bulk read.
582*4882a593Smuzhiyun *
583*4882a593Smuzhiyun * Actually, there might even be a window between the bulk data leaving the
584*4882a593Smuzhiyun * ark and reading/resetting the lsr in the read_bulk_callback where an
585*4882a593Smuzhiyun * interrupt for the next data block could come in.
586*4882a593Smuzhiyun * Without somekind of ordering on the ark, we would have to report the
587*4882a593Smuzhiyun * error for the next block of data as well...
588*4882a593Smuzhiyun * For now, let's pretend this can't happen.
589*4882a593Smuzhiyun */
ark3116_process_read_urb(struct urb * urb)590*4882a593Smuzhiyun static void ark3116_process_read_urb(struct urb *urb)
591*4882a593Smuzhiyun {
592*4882a593Smuzhiyun struct usb_serial_port *port = urb->context;
593*4882a593Smuzhiyun struct ark3116_private *priv = usb_get_serial_port_data(port);
594*4882a593Smuzhiyun unsigned char *data = urb->transfer_buffer;
595*4882a593Smuzhiyun char tty_flag = TTY_NORMAL;
596*4882a593Smuzhiyun unsigned long flags;
597*4882a593Smuzhiyun __u32 lsr;
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun /* update line status */
600*4882a593Smuzhiyun spin_lock_irqsave(&priv->status_lock, flags);
601*4882a593Smuzhiyun lsr = priv->lsr;
602*4882a593Smuzhiyun priv->lsr &= ~UART_LSR_BRK_ERROR_BITS;
603*4882a593Smuzhiyun spin_unlock_irqrestore(&priv->status_lock, flags);
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun if (!urb->actual_length)
606*4882a593Smuzhiyun return;
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun if (lsr & UART_LSR_BRK_ERROR_BITS) {
609*4882a593Smuzhiyun if (lsr & UART_LSR_BI)
610*4882a593Smuzhiyun tty_flag = TTY_BREAK;
611*4882a593Smuzhiyun else if (lsr & UART_LSR_PE)
612*4882a593Smuzhiyun tty_flag = TTY_PARITY;
613*4882a593Smuzhiyun else if (lsr & UART_LSR_FE)
614*4882a593Smuzhiyun tty_flag = TTY_FRAME;
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun /* overrun is special, not associated with a char */
617*4882a593Smuzhiyun if (lsr & UART_LSR_OE)
618*4882a593Smuzhiyun tty_insert_flip_char(&port->port, 0, TTY_OVERRUN);
619*4882a593Smuzhiyun }
620*4882a593Smuzhiyun tty_insert_flip_string_fixed_flag(&port->port, data, tty_flag,
621*4882a593Smuzhiyun urb->actual_length);
622*4882a593Smuzhiyun tty_flip_buffer_push(&port->port);
623*4882a593Smuzhiyun }
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun static struct usb_serial_driver ark3116_device = {
626*4882a593Smuzhiyun .driver = {
627*4882a593Smuzhiyun .owner = THIS_MODULE,
628*4882a593Smuzhiyun .name = "ark3116",
629*4882a593Smuzhiyun },
630*4882a593Smuzhiyun .id_table = id_table,
631*4882a593Smuzhiyun .num_ports = 1,
632*4882a593Smuzhiyun .num_bulk_in = 1,
633*4882a593Smuzhiyun .num_bulk_out = 1,
634*4882a593Smuzhiyun .num_interrupt_in = 1,
635*4882a593Smuzhiyun .port_probe = ark3116_port_probe,
636*4882a593Smuzhiyun .port_remove = ark3116_port_remove,
637*4882a593Smuzhiyun .set_termios = ark3116_set_termios,
638*4882a593Smuzhiyun .get_serial = ark3116_get_serial_info,
639*4882a593Smuzhiyun .tiocmget = ark3116_tiocmget,
640*4882a593Smuzhiyun .tiocmset = ark3116_tiocmset,
641*4882a593Smuzhiyun .tiocmiwait = usb_serial_generic_tiocmiwait,
642*4882a593Smuzhiyun .get_icount = usb_serial_generic_get_icount,
643*4882a593Smuzhiyun .open = ark3116_open,
644*4882a593Smuzhiyun .close = ark3116_close,
645*4882a593Smuzhiyun .break_ctl = ark3116_break_ctl,
646*4882a593Smuzhiyun .read_int_callback = ark3116_read_int_callback,
647*4882a593Smuzhiyun .process_read_urb = ark3116_process_read_urb,
648*4882a593Smuzhiyun };
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun static struct usb_serial_driver * const serial_drivers[] = {
651*4882a593Smuzhiyun &ark3116_device, NULL
652*4882a593Smuzhiyun };
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun module_usb_serial_driver(serial_drivers, id_table);
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun MODULE_LICENSE("GPL");
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun MODULE_AUTHOR(DRIVER_AUTHOR);
659*4882a593Smuzhiyun MODULE_DESCRIPTION(DRIVER_DESC);
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun /*
662*4882a593Smuzhiyun * The following describes what I learned from studying the old
663*4882a593Smuzhiyun * ark3116.c driver, disassembling the windows driver, and some lucky
664*4882a593Smuzhiyun * guesses. Since I do not have any datasheet or other
665*4882a593Smuzhiyun * documentation, inaccuracies are almost guaranteed.
666*4882a593Smuzhiyun *
667*4882a593Smuzhiyun * Some specs for the ARK3116 can be found here:
668*4882a593Smuzhiyun * http://web.archive.org/web/20060318000438/
669*4882a593Smuzhiyun * www.arkmicro.com/en/products/view.php?id=10
670*4882a593Smuzhiyun * On that page, 2 GPIO pins are mentioned: I assume these are the
671*4882a593Smuzhiyun * OUT1 and OUT2 pins of the UART, so I added support for those
672*4882a593Smuzhiyun * through the MCR. Since the pins are not available on my hardware,
673*4882a593Smuzhiyun * I could not verify this.
674*4882a593Smuzhiyun * Also, it states there is "on-chip hardware flow control". I have
675*4882a593Smuzhiyun * discovered how to enable that. Unfortunately, I do not know how to
676*4882a593Smuzhiyun * enable XON/XOFF (software) flow control, which would need support
677*4882a593Smuzhiyun * from the chip as well to work. Because of the wording on the web
678*4882a593Smuzhiyun * page there is a real possibility the chip simply does not support
679*4882a593Smuzhiyun * software flow control.
680*4882a593Smuzhiyun *
681*4882a593Smuzhiyun * I got my ark3116 as part of a mobile phone adapter cable. On the
682*4882a593Smuzhiyun * PCB, the following numbered contacts are present:
683*4882a593Smuzhiyun *
684*4882a593Smuzhiyun * 1:- +5V
685*4882a593Smuzhiyun * 2:o DTR
686*4882a593Smuzhiyun * 3:i RX
687*4882a593Smuzhiyun * 4:i DCD
688*4882a593Smuzhiyun * 5:o RTS
689*4882a593Smuzhiyun * 6:o TX
690*4882a593Smuzhiyun * 7:i RI
691*4882a593Smuzhiyun * 8:i DSR
692*4882a593Smuzhiyun * 10:- 0V
693*4882a593Smuzhiyun * 11:i CTS
694*4882a593Smuzhiyun *
695*4882a593Smuzhiyun * On my chip, all signals seem to be 3.3V, but 5V tolerant. But that
696*4882a593Smuzhiyun * may be different for the one you have ;-).
697*4882a593Smuzhiyun *
698*4882a593Smuzhiyun * The windows driver limits the registers to 0-F, so I assume there
699*4882a593Smuzhiyun * are actually 16 present on the device.
700*4882a593Smuzhiyun *
701*4882a593Smuzhiyun * On an UART interrupt, 4 bytes of data come in on the interrupt
702*4882a593Smuzhiyun * endpoint. The bytes are 0xe8 IIR LSR MSR.
703*4882a593Smuzhiyun *
704*4882a593Smuzhiyun * The baudrate seems to be generated from the 12MHz crystal, using
705*4882a593Smuzhiyun * 4-times subsampling. So quot=12e6/(4*baud). Also see description
706*4882a593Smuzhiyun * of register E.
707*4882a593Smuzhiyun *
708*4882a593Smuzhiyun * Registers 0-7:
709*4882a593Smuzhiyun * These seem to be the same as for a regular 16450. The FCR is set
710*4882a593Smuzhiyun * to UART_FCR_DMA_SELECT (0x8), I guess to enable transfers between
711*4882a593Smuzhiyun * the UART and the USB bridge/DMA engine.
712*4882a593Smuzhiyun *
713*4882a593Smuzhiyun * Register 8:
714*4882a593Smuzhiyun * By trial and error, I found out that bit 0 enables hardware CTS,
715*4882a593Smuzhiyun * stopping TX when CTS is +5V. Bit 1 does the same for RTS, making
716*4882a593Smuzhiyun * RTS +5V when the 3116 cannot transfer the data to the USB bus
717*4882a593Smuzhiyun * (verified by disabling the reading URB). Note that as far as I can
718*4882a593Smuzhiyun * tell, the windows driver does NOT use this, so there might be some
719*4882a593Smuzhiyun * hardware bug or something.
720*4882a593Smuzhiyun *
721*4882a593Smuzhiyun * According to a patch provided here
722*4882a593Smuzhiyun * (http://lkml.org/lkml/2009/7/26/56), the ARK3116 can also be used
723*4882a593Smuzhiyun * as an IrDA dongle. Since I do not have such a thing, I could not
724*4882a593Smuzhiyun * investigate that aspect. However, I can speculate ;-).
725*4882a593Smuzhiyun *
726*4882a593Smuzhiyun * - IrDA encodes data differently than RS232. Most likely, one of
727*4882a593Smuzhiyun * the bits in registers 9..E enables the IR ENDEC (encoder/decoder).
728*4882a593Smuzhiyun * - Depending on the IR transceiver, the input and output need to be
729*4882a593Smuzhiyun * inverted, so there are probably bits for that as well.
730*4882a593Smuzhiyun * - IrDA is half-duplex, so there should be a bit for selecting that.
731*4882a593Smuzhiyun *
732*4882a593Smuzhiyun * This still leaves at least two registers unaccounted for. Perhaps
733*4882a593Smuzhiyun * The chip can do XON/XOFF or CRC in HW?
734*4882a593Smuzhiyun *
735*4882a593Smuzhiyun * Register 9:
736*4882a593Smuzhiyun * Set to 0x00 for IrDA, when the baudrate is initialised.
737*4882a593Smuzhiyun *
738*4882a593Smuzhiyun * Register A:
739*4882a593Smuzhiyun * Set to 0x01 for IrDA, at init.
740*4882a593Smuzhiyun *
741*4882a593Smuzhiyun * Register B:
742*4882a593Smuzhiyun * Set to 0x01 for IrDA, 0x00 for RS232, at init.
743*4882a593Smuzhiyun *
744*4882a593Smuzhiyun * Register C:
745*4882a593Smuzhiyun * Set to 00 for IrDA, at init.
746*4882a593Smuzhiyun *
747*4882a593Smuzhiyun * Register D:
748*4882a593Smuzhiyun * Set to 0x41 for IrDA, at init.
749*4882a593Smuzhiyun *
750*4882a593Smuzhiyun * Register E:
751*4882a593Smuzhiyun * Somekind of baudrate override. The windows driver seems to set
752*4882a593Smuzhiyun * this to 0x00 for normal baudrates, 0x01 for 460800, 0x02 for 921600.
753*4882a593Smuzhiyun * Since 460800 and 921600 cannot be obtained by dividing 3MHz by an integer,
754*4882a593Smuzhiyun * it could be somekind of subdivisor thingy.
755*4882a593Smuzhiyun * However,it does not seem to do anything: selecting 921600 (divisor 3,
756*4882a593Smuzhiyun * reg E=2), still gets 1 MHz. I also checked if registers 9, C or F would
757*4882a593Smuzhiyun * work, but they don't.
758*4882a593Smuzhiyun *
759*4882a593Smuzhiyun * Register F: unknown
760*4882a593Smuzhiyun */
761