1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * mtu3_qmu.h - Queue Management Unit driver header 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2016 MediaTek Inc. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Author: Chunfeng Yun <chunfeng.yun@mediatek.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef __MTK_QMU_H__ 11*4882a593Smuzhiyun #define __MTK_QMU_H__ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define MAX_GPD_NUM 64 14*4882a593Smuzhiyun #define QMU_GPD_SIZE (sizeof(struct qmu_gpd)) 15*4882a593Smuzhiyun #define QMU_GPD_RING_SIZE (MAX_GPD_NUM * QMU_GPD_SIZE) 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define GPD_BUF_SIZE 65532 18*4882a593Smuzhiyun #define GPD_BUF_SIZE_EL 1048572 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun void mtu3_qmu_stop(struct mtu3_ep *mep); 21*4882a593Smuzhiyun int mtu3_qmu_start(struct mtu3_ep *mep); 22*4882a593Smuzhiyun void mtu3_qmu_resume(struct mtu3_ep *mep); 23*4882a593Smuzhiyun void mtu3_qmu_flush(struct mtu3_ep *mep); 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun void mtu3_insert_gpd(struct mtu3_ep *mep, struct mtu3_request *mreq); 26*4882a593Smuzhiyun int mtu3_prepare_transfer(struct mtu3_ep *mep); 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun int mtu3_gpd_ring_alloc(struct mtu3_ep *mep); 29*4882a593Smuzhiyun void mtu3_gpd_ring_free(struct mtu3_ep *mep); 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun irqreturn_t mtu3_qmu_isr(struct mtu3 *mtu); 32*4882a593Smuzhiyun int mtu3_qmu_init(struct mtu3 *mtu); 33*4882a593Smuzhiyun void mtu3_qmu_exit(struct mtu3 *mtu); 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #endif 36