1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2014 Marvell
4*4882a593Smuzhiyun * Author: Gregory CLEMENT <gregory.clement@free-electrons.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/io.h>
8*4882a593Smuzhiyun #include <linux/mbus.h>
9*4882a593Smuzhiyun #include <linux/of.h>
10*4882a593Smuzhiyun #include <linux/platform_device.h>
11*4882a593Smuzhiyun #include <linux/phy/phy.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/usb.h>
14*4882a593Smuzhiyun #include <linux/usb/hcd.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include "xhci-mvebu.h"
17*4882a593Smuzhiyun #include "xhci.h"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #define USB3_MAX_WINDOWS 4
20*4882a593Smuzhiyun #define USB3_WIN_CTRL(w) (0x0 + ((w) * 8))
21*4882a593Smuzhiyun #define USB3_WIN_BASE(w) (0x4 + ((w) * 8))
22*4882a593Smuzhiyun
xhci_mvebu_mbus_config(void __iomem * base,const struct mbus_dram_target_info * dram)23*4882a593Smuzhiyun static void xhci_mvebu_mbus_config(void __iomem *base,
24*4882a593Smuzhiyun const struct mbus_dram_target_info *dram)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun int win;
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /* Clear all existing windows */
29*4882a593Smuzhiyun for (win = 0; win < USB3_MAX_WINDOWS; win++) {
30*4882a593Smuzhiyun writel(0, base + USB3_WIN_CTRL(win));
31*4882a593Smuzhiyun writel(0, base + USB3_WIN_BASE(win));
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun /* Program each DRAM CS in a seperate window */
35*4882a593Smuzhiyun for (win = 0; win < dram->num_cs; win++) {
36*4882a593Smuzhiyun const struct mbus_dram_window *cs = dram->cs + win;
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) |
39*4882a593Smuzhiyun (dram->mbus_dram_target_id << 4) | 1,
40*4882a593Smuzhiyun base + USB3_WIN_CTRL(win));
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun writel((cs->base & 0xffff0000), base + USB3_WIN_BASE(win));
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun
xhci_mvebu_mbus_init_quirk(struct usb_hcd * hcd)46*4882a593Smuzhiyun int xhci_mvebu_mbus_init_quirk(struct usb_hcd *hcd)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun struct device *dev = hcd->self.controller;
49*4882a593Smuzhiyun struct platform_device *pdev = to_platform_device(dev);
50*4882a593Smuzhiyun struct resource *res;
51*4882a593Smuzhiyun void __iomem *base;
52*4882a593Smuzhiyun const struct mbus_dram_target_info *dram;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
55*4882a593Smuzhiyun if (!res)
56*4882a593Smuzhiyun return -ENODEV;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun /*
59*4882a593Smuzhiyun * We don't use devm_ioremap() because this mapping should
60*4882a593Smuzhiyun * only exists for the duration of this probe function.
61*4882a593Smuzhiyun */
62*4882a593Smuzhiyun base = ioremap(res->start, resource_size(res));
63*4882a593Smuzhiyun if (!base)
64*4882a593Smuzhiyun return -ENODEV;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun dram = mv_mbus_dram_info();
67*4882a593Smuzhiyun xhci_mvebu_mbus_config(base, dram);
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun /*
70*4882a593Smuzhiyun * This memory area was only needed to configure the MBus
71*4882a593Smuzhiyun * windows, and is therefore no longer useful.
72*4882a593Smuzhiyun */
73*4882a593Smuzhiyun iounmap(base);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun return 0;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
xhci_mvebu_a3700_plat_setup(struct usb_hcd * hcd)78*4882a593Smuzhiyun int xhci_mvebu_a3700_plat_setup(struct usb_hcd *hcd)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun struct xhci_hcd *xhci = hcd_to_xhci(hcd);
81*4882a593Smuzhiyun struct device *dev = hcd->self.controller;
82*4882a593Smuzhiyun struct phy *phy;
83*4882a593Smuzhiyun int ret;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun /* Old bindings miss the PHY handle */
86*4882a593Smuzhiyun phy = of_phy_get(dev->of_node, "usb3-phy");
87*4882a593Smuzhiyun if (IS_ERR(phy) && PTR_ERR(phy) == -EPROBE_DEFER)
88*4882a593Smuzhiyun return -EPROBE_DEFER;
89*4882a593Smuzhiyun else if (IS_ERR(phy))
90*4882a593Smuzhiyun goto phy_out;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun ret = phy_init(phy);
93*4882a593Smuzhiyun if (ret)
94*4882a593Smuzhiyun goto phy_put;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun ret = phy_set_mode(phy, PHY_MODE_USB_HOST_SS);
97*4882a593Smuzhiyun if (ret)
98*4882a593Smuzhiyun goto phy_exit;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun ret = phy_power_on(phy);
101*4882a593Smuzhiyun if (ret == -EOPNOTSUPP) {
102*4882a593Smuzhiyun /* Skip initializatin of XHCI PHY when it is unsupported by firmware */
103*4882a593Smuzhiyun dev_warn(dev, "PHY unsupported by firmware\n");
104*4882a593Smuzhiyun xhci->quirks |= XHCI_SKIP_PHY_INIT;
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun if (ret)
107*4882a593Smuzhiyun goto phy_exit;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun phy_power_off(phy);
110*4882a593Smuzhiyun phy_exit:
111*4882a593Smuzhiyun phy_exit(phy);
112*4882a593Smuzhiyun phy_put:
113*4882a593Smuzhiyun of_phy_put(phy);
114*4882a593Smuzhiyun phy_out:
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun return 0;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
xhci_mvebu_a3700_init_quirk(struct usb_hcd * hcd)119*4882a593Smuzhiyun int xhci_mvebu_a3700_init_quirk(struct usb_hcd *hcd)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun struct xhci_hcd *xhci = hcd_to_xhci(hcd);
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun /* Without reset on resume, the HC won't work at all */
124*4882a593Smuzhiyun xhci->quirks |= XHCI_RESET_ON_RESUME;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun return 0;
127*4882a593Smuzhiyun }
128