1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * XHCI extended capability handling
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2017 Hans de Goede <hdegoede@redhat.com>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/platform_device.h>
9*4882a593Smuzhiyun #include <linux/property.h>
10*4882a593Smuzhiyun #include <linux/pci.h>
11*4882a593Smuzhiyun #include "xhci.h"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #define USB_SW_DRV_NAME "intel_xhci_usb_sw"
14*4882a593Smuzhiyun #define USB_SW_RESOURCE_SIZE 0x400
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI 0x22b5
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun static const struct property_entry role_switch_props[] = {
19*4882a593Smuzhiyun PROPERTY_ENTRY_BOOL("sw_switch_disable"),
20*4882a593Smuzhiyun {},
21*4882a593Smuzhiyun };
22*4882a593Smuzhiyun
xhci_intel_unregister_pdev(void * arg)23*4882a593Smuzhiyun static void xhci_intel_unregister_pdev(void *arg)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun platform_device_unregister(arg);
26*4882a593Smuzhiyun }
27*4882a593Smuzhiyun
xhci_create_intel_xhci_sw_pdev(struct xhci_hcd * xhci,u32 cap_offset)28*4882a593Smuzhiyun static int xhci_create_intel_xhci_sw_pdev(struct xhci_hcd *xhci, u32 cap_offset)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun struct usb_hcd *hcd = xhci_to_hcd(xhci);
31*4882a593Smuzhiyun struct device *dev = hcd->self.controller;
32*4882a593Smuzhiyun struct platform_device *pdev;
33*4882a593Smuzhiyun struct pci_dev *pci = to_pci_dev(dev);
34*4882a593Smuzhiyun struct resource res = { 0, };
35*4882a593Smuzhiyun int ret;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun pdev = platform_device_alloc(USB_SW_DRV_NAME, PLATFORM_DEVID_NONE);
38*4882a593Smuzhiyun if (!pdev) {
39*4882a593Smuzhiyun xhci_err(xhci, "couldn't allocate %s platform device\n",
40*4882a593Smuzhiyun USB_SW_DRV_NAME);
41*4882a593Smuzhiyun return -ENOMEM;
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun res.start = hcd->rsrc_start + cap_offset;
45*4882a593Smuzhiyun res.end = res.start + USB_SW_RESOURCE_SIZE - 1;
46*4882a593Smuzhiyun res.name = USB_SW_DRV_NAME;
47*4882a593Smuzhiyun res.flags = IORESOURCE_MEM;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun ret = platform_device_add_resources(pdev, &res, 1);
50*4882a593Smuzhiyun if (ret) {
51*4882a593Smuzhiyun dev_err(dev, "couldn't add resources to intel_xhci_usb_sw pdev\n");
52*4882a593Smuzhiyun platform_device_put(pdev);
53*4882a593Smuzhiyun return ret;
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun if (pci->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) {
57*4882a593Smuzhiyun ret = platform_device_add_properties(pdev, role_switch_props);
58*4882a593Smuzhiyun if (ret) {
59*4882a593Smuzhiyun dev_err(dev, "failed to register device properties\n");
60*4882a593Smuzhiyun platform_device_put(pdev);
61*4882a593Smuzhiyun return ret;
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun pdev->dev.parent = dev;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun ret = platform_device_add(pdev);
68*4882a593Smuzhiyun if (ret) {
69*4882a593Smuzhiyun dev_err(dev, "couldn't register intel_xhci_usb_sw pdev\n");
70*4882a593Smuzhiyun platform_device_put(pdev);
71*4882a593Smuzhiyun return ret;
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun ret = devm_add_action_or_reset(dev, xhci_intel_unregister_pdev, pdev);
75*4882a593Smuzhiyun if (ret) {
76*4882a593Smuzhiyun dev_err(dev, "couldn't add unregister action for intel_xhci_usb_sw pdev\n");
77*4882a593Smuzhiyun return ret;
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun return 0;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
xhci_ext_cap_init(struct xhci_hcd * xhci)83*4882a593Smuzhiyun int xhci_ext_cap_init(struct xhci_hcd *xhci)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun void __iomem *base = &xhci->cap_regs->hc_capbase;
86*4882a593Smuzhiyun u32 offset, val;
87*4882a593Smuzhiyun int ret;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun offset = xhci_find_next_ext_cap(base, 0, 0);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun while (offset) {
92*4882a593Smuzhiyun val = readl(base + offset);
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun switch (XHCI_EXT_CAPS_ID(val)) {
95*4882a593Smuzhiyun case XHCI_EXT_CAPS_VENDOR_INTEL:
96*4882a593Smuzhiyun if (xhci->quirks & XHCI_INTEL_USB_ROLE_SW) {
97*4882a593Smuzhiyun ret = xhci_create_intel_xhci_sw_pdev(xhci,
98*4882a593Smuzhiyun offset);
99*4882a593Smuzhiyun if (ret)
100*4882a593Smuzhiyun return ret;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun break;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun offset = xhci_find_next_ext_cap(base, offset, 0);
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun return 0;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(xhci_ext_cap_init);
110