xref: /OK3568_Linux_fs/kernel/drivers/usb/host/uhci-q.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Universal Host Controller Interface driver for USB.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * (C) Copyright 1999 Linus Torvalds
8*4882a593Smuzhiyun  * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
9*4882a593Smuzhiyun  * (C) Copyright 1999 Randy Dunlap
10*4882a593Smuzhiyun  * (C) Copyright 1999 Georg Acher, acher@in.tum.de
11*4882a593Smuzhiyun  * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
12*4882a593Smuzhiyun  * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
13*4882a593Smuzhiyun  * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
14*4882a593Smuzhiyun  * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
15*4882a593Smuzhiyun  *               support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
16*4882a593Smuzhiyun  * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
17*4882a593Smuzhiyun  * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
18*4882a593Smuzhiyun  */
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /*
22*4882a593Smuzhiyun  * Technically, updating td->status here is a race, but it's not really a
23*4882a593Smuzhiyun  * problem. The worst that can happen is that we set the IOC bit again
24*4882a593Smuzhiyun  * generating a spurious interrupt. We could fix this by creating another
25*4882a593Smuzhiyun  * QH and leaving the IOC bit always set, but then we would have to play
26*4882a593Smuzhiyun  * games with the FSBR code to make sure we get the correct order in all
27*4882a593Smuzhiyun  * the cases. I don't think it's worth the effort
28*4882a593Smuzhiyun  */
uhci_set_next_interrupt(struct uhci_hcd * uhci)29*4882a593Smuzhiyun static void uhci_set_next_interrupt(struct uhci_hcd *uhci)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun 	if (uhci->is_stopped)
32*4882a593Smuzhiyun 		mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
33*4882a593Smuzhiyun 	uhci->term_td->status |= cpu_to_hc32(uhci, TD_CTRL_IOC);
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun 
uhci_clear_next_interrupt(struct uhci_hcd * uhci)36*4882a593Smuzhiyun static inline void uhci_clear_next_interrupt(struct uhci_hcd *uhci)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun 	uhci->term_td->status &= ~cpu_to_hc32(uhci, TD_CTRL_IOC);
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun /*
43*4882a593Smuzhiyun  * Full-Speed Bandwidth Reclamation (FSBR).
44*4882a593Smuzhiyun  * We turn on FSBR whenever a queue that wants it is advancing,
45*4882a593Smuzhiyun  * and leave it on for a short time thereafter.
46*4882a593Smuzhiyun  */
uhci_fsbr_on(struct uhci_hcd * uhci)47*4882a593Smuzhiyun static void uhci_fsbr_on(struct uhci_hcd *uhci)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun 	struct uhci_qh *lqh;
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	/* The terminating skeleton QH always points back to the first
52*4882a593Smuzhiyun 	 * FSBR QH.  Make the last async QH point to the terminating
53*4882a593Smuzhiyun 	 * skeleton QH. */
54*4882a593Smuzhiyun 	uhci->fsbr_is_on = 1;
55*4882a593Smuzhiyun 	lqh = list_entry(uhci->skel_async_qh->node.prev,
56*4882a593Smuzhiyun 			struct uhci_qh, node);
57*4882a593Smuzhiyun 	lqh->link = LINK_TO_QH(uhci, uhci->skel_term_qh);
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun 
uhci_fsbr_off(struct uhci_hcd * uhci)60*4882a593Smuzhiyun static void uhci_fsbr_off(struct uhci_hcd *uhci)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun 	struct uhci_qh *lqh;
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	/* Remove the link from the last async QH to the terminating
65*4882a593Smuzhiyun 	 * skeleton QH. */
66*4882a593Smuzhiyun 	uhci->fsbr_is_on = 0;
67*4882a593Smuzhiyun 	lqh = list_entry(uhci->skel_async_qh->node.prev,
68*4882a593Smuzhiyun 			struct uhci_qh, node);
69*4882a593Smuzhiyun 	lqh->link = UHCI_PTR_TERM(uhci);
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun 
uhci_add_fsbr(struct uhci_hcd * uhci,struct urb * urb)72*4882a593Smuzhiyun static void uhci_add_fsbr(struct uhci_hcd *uhci, struct urb *urb)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun 	struct urb_priv *urbp = urb->hcpriv;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	urbp->fsbr = 1;
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun 
uhci_urbp_wants_fsbr(struct uhci_hcd * uhci,struct urb_priv * urbp)79*4882a593Smuzhiyun static void uhci_urbp_wants_fsbr(struct uhci_hcd *uhci, struct urb_priv *urbp)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun 	if (urbp->fsbr) {
82*4882a593Smuzhiyun 		uhci->fsbr_is_wanted = 1;
83*4882a593Smuzhiyun 		if (!uhci->fsbr_is_on)
84*4882a593Smuzhiyun 			uhci_fsbr_on(uhci);
85*4882a593Smuzhiyun 		else if (uhci->fsbr_expiring) {
86*4882a593Smuzhiyun 			uhci->fsbr_expiring = 0;
87*4882a593Smuzhiyun 			del_timer(&uhci->fsbr_timer);
88*4882a593Smuzhiyun 		}
89*4882a593Smuzhiyun 	}
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun 
uhci_fsbr_timeout(struct timer_list * t)92*4882a593Smuzhiyun static void uhci_fsbr_timeout(struct timer_list *t)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun 	struct uhci_hcd *uhci = from_timer(uhci, t, fsbr_timer);
95*4882a593Smuzhiyun 	unsigned long flags;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	spin_lock_irqsave(&uhci->lock, flags);
98*4882a593Smuzhiyun 	if (uhci->fsbr_expiring) {
99*4882a593Smuzhiyun 		uhci->fsbr_expiring = 0;
100*4882a593Smuzhiyun 		uhci_fsbr_off(uhci);
101*4882a593Smuzhiyun 	}
102*4882a593Smuzhiyun 	spin_unlock_irqrestore(&uhci->lock, flags);
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 
uhci_alloc_td(struct uhci_hcd * uhci)106*4882a593Smuzhiyun static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun 	dma_addr_t dma_handle;
109*4882a593Smuzhiyun 	struct uhci_td *td;
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	td = dma_pool_alloc(uhci->td_pool, GFP_ATOMIC, &dma_handle);
112*4882a593Smuzhiyun 	if (!td)
113*4882a593Smuzhiyun 		return NULL;
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	td->dma_handle = dma_handle;
116*4882a593Smuzhiyun 	td->frame = -1;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	INIT_LIST_HEAD(&td->list);
119*4882a593Smuzhiyun 	INIT_LIST_HEAD(&td->fl_list);
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	return td;
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun 
uhci_free_td(struct uhci_hcd * uhci,struct uhci_td * td)124*4882a593Smuzhiyun static void uhci_free_td(struct uhci_hcd *uhci, struct uhci_td *td)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun 	if (!list_empty(&td->list))
127*4882a593Smuzhiyun 		dev_WARN(uhci_dev(uhci), "td %p still in list!\n", td);
128*4882a593Smuzhiyun 	if (!list_empty(&td->fl_list))
129*4882a593Smuzhiyun 		dev_WARN(uhci_dev(uhci), "td %p still in fl_list!\n", td);
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	dma_pool_free(uhci->td_pool, td, td->dma_handle);
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun 
uhci_fill_td(struct uhci_hcd * uhci,struct uhci_td * td,u32 status,u32 token,u32 buffer)134*4882a593Smuzhiyun static inline void uhci_fill_td(struct uhci_hcd *uhci, struct uhci_td *td,
135*4882a593Smuzhiyun 		u32 status, u32 token, u32 buffer)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun 	td->status = cpu_to_hc32(uhci, status);
138*4882a593Smuzhiyun 	td->token = cpu_to_hc32(uhci, token);
139*4882a593Smuzhiyun 	td->buffer = cpu_to_hc32(uhci, buffer);
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun 
uhci_add_td_to_urbp(struct uhci_td * td,struct urb_priv * urbp)142*4882a593Smuzhiyun static void uhci_add_td_to_urbp(struct uhci_td *td, struct urb_priv *urbp)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun 	list_add_tail(&td->list, &urbp->td_list);
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun 
uhci_remove_td_from_urbp(struct uhci_td * td)147*4882a593Smuzhiyun static void uhci_remove_td_from_urbp(struct uhci_td *td)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun 	list_del_init(&td->list);
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun /*
153*4882a593Smuzhiyun  * We insert Isochronous URBs directly into the frame list at the beginning
154*4882a593Smuzhiyun  */
uhci_insert_td_in_frame_list(struct uhci_hcd * uhci,struct uhci_td * td,unsigned framenum)155*4882a593Smuzhiyun static inline void uhci_insert_td_in_frame_list(struct uhci_hcd *uhci,
156*4882a593Smuzhiyun 		struct uhci_td *td, unsigned framenum)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun 	framenum &= (UHCI_NUMFRAMES - 1);
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	td->frame = framenum;
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	/* Is there a TD already mapped there? */
163*4882a593Smuzhiyun 	if (uhci->frame_cpu[framenum]) {
164*4882a593Smuzhiyun 		struct uhci_td *ftd, *ltd;
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 		ftd = uhci->frame_cpu[framenum];
167*4882a593Smuzhiyun 		ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 		list_add_tail(&td->fl_list, &ftd->fl_list);
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 		td->link = ltd->link;
172*4882a593Smuzhiyun 		wmb();
173*4882a593Smuzhiyun 		ltd->link = LINK_TO_TD(uhci, td);
174*4882a593Smuzhiyun 	} else {
175*4882a593Smuzhiyun 		td->link = uhci->frame[framenum];
176*4882a593Smuzhiyun 		wmb();
177*4882a593Smuzhiyun 		uhci->frame[framenum] = LINK_TO_TD(uhci, td);
178*4882a593Smuzhiyun 		uhci->frame_cpu[framenum] = td;
179*4882a593Smuzhiyun 	}
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun 
uhci_remove_td_from_frame_list(struct uhci_hcd * uhci,struct uhci_td * td)182*4882a593Smuzhiyun static inline void uhci_remove_td_from_frame_list(struct uhci_hcd *uhci,
183*4882a593Smuzhiyun 		struct uhci_td *td)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun 	/* If it's not inserted, don't remove it */
186*4882a593Smuzhiyun 	if (td->frame == -1) {
187*4882a593Smuzhiyun 		WARN_ON(!list_empty(&td->fl_list));
188*4882a593Smuzhiyun 		return;
189*4882a593Smuzhiyun 	}
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	if (uhci->frame_cpu[td->frame] == td) {
192*4882a593Smuzhiyun 		if (list_empty(&td->fl_list)) {
193*4882a593Smuzhiyun 			uhci->frame[td->frame] = td->link;
194*4882a593Smuzhiyun 			uhci->frame_cpu[td->frame] = NULL;
195*4882a593Smuzhiyun 		} else {
196*4882a593Smuzhiyun 			struct uhci_td *ntd;
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 			ntd = list_entry(td->fl_list.next,
199*4882a593Smuzhiyun 					 struct uhci_td,
200*4882a593Smuzhiyun 					 fl_list);
201*4882a593Smuzhiyun 			uhci->frame[td->frame] = LINK_TO_TD(uhci, ntd);
202*4882a593Smuzhiyun 			uhci->frame_cpu[td->frame] = ntd;
203*4882a593Smuzhiyun 		}
204*4882a593Smuzhiyun 	} else {
205*4882a593Smuzhiyun 		struct uhci_td *ptd;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 		ptd = list_entry(td->fl_list.prev, struct uhci_td, fl_list);
208*4882a593Smuzhiyun 		ptd->link = td->link;
209*4882a593Smuzhiyun 	}
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	list_del_init(&td->fl_list);
212*4882a593Smuzhiyun 	td->frame = -1;
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun 
uhci_remove_tds_from_frame(struct uhci_hcd * uhci,unsigned int framenum)215*4882a593Smuzhiyun static inline void uhci_remove_tds_from_frame(struct uhci_hcd *uhci,
216*4882a593Smuzhiyun 		unsigned int framenum)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun 	struct uhci_td *ftd, *ltd;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	framenum &= (UHCI_NUMFRAMES - 1);
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	ftd = uhci->frame_cpu[framenum];
223*4882a593Smuzhiyun 	if (ftd) {
224*4882a593Smuzhiyun 		ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
225*4882a593Smuzhiyun 		uhci->frame[framenum] = ltd->link;
226*4882a593Smuzhiyun 		uhci->frame_cpu[framenum] = NULL;
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 		while (!list_empty(&ftd->fl_list))
229*4882a593Smuzhiyun 			list_del_init(ftd->fl_list.prev);
230*4882a593Smuzhiyun 	}
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun /*
234*4882a593Smuzhiyun  * Remove all the TDs for an Isochronous URB from the frame list
235*4882a593Smuzhiyun  */
uhci_unlink_isochronous_tds(struct uhci_hcd * uhci,struct urb * urb)236*4882a593Smuzhiyun static void uhci_unlink_isochronous_tds(struct uhci_hcd *uhci, struct urb *urb)
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun 	struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
239*4882a593Smuzhiyun 	struct uhci_td *td;
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 	list_for_each_entry(td, &urbp->td_list, list)
242*4882a593Smuzhiyun 		uhci_remove_td_from_frame_list(uhci, td);
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun 
uhci_alloc_qh(struct uhci_hcd * uhci,struct usb_device * udev,struct usb_host_endpoint * hep)245*4882a593Smuzhiyun static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci,
246*4882a593Smuzhiyun 		struct usb_device *udev, struct usb_host_endpoint *hep)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun 	dma_addr_t dma_handle;
249*4882a593Smuzhiyun 	struct uhci_qh *qh;
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	qh = dma_pool_zalloc(uhci->qh_pool, GFP_ATOMIC, &dma_handle);
252*4882a593Smuzhiyun 	if (!qh)
253*4882a593Smuzhiyun 		return NULL;
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	qh->dma_handle = dma_handle;
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	qh->element = UHCI_PTR_TERM(uhci);
258*4882a593Smuzhiyun 	qh->link = UHCI_PTR_TERM(uhci);
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	INIT_LIST_HEAD(&qh->queue);
261*4882a593Smuzhiyun 	INIT_LIST_HEAD(&qh->node);
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	if (udev) {		/* Normal QH */
264*4882a593Smuzhiyun 		qh->type = usb_endpoint_type(&hep->desc);
265*4882a593Smuzhiyun 		if (qh->type != USB_ENDPOINT_XFER_ISOC) {
266*4882a593Smuzhiyun 			qh->dummy_td = uhci_alloc_td(uhci);
267*4882a593Smuzhiyun 			if (!qh->dummy_td) {
268*4882a593Smuzhiyun 				dma_pool_free(uhci->qh_pool, qh, dma_handle);
269*4882a593Smuzhiyun 				return NULL;
270*4882a593Smuzhiyun 			}
271*4882a593Smuzhiyun 		}
272*4882a593Smuzhiyun 		qh->state = QH_STATE_IDLE;
273*4882a593Smuzhiyun 		qh->hep = hep;
274*4882a593Smuzhiyun 		qh->udev = udev;
275*4882a593Smuzhiyun 		hep->hcpriv = qh;
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 		if (qh->type == USB_ENDPOINT_XFER_INT ||
278*4882a593Smuzhiyun 				qh->type == USB_ENDPOINT_XFER_ISOC)
279*4882a593Smuzhiyun 			qh->load = usb_calc_bus_time(udev->speed,
280*4882a593Smuzhiyun 					usb_endpoint_dir_in(&hep->desc),
281*4882a593Smuzhiyun 					qh->type == USB_ENDPOINT_XFER_ISOC,
282*4882a593Smuzhiyun 					usb_endpoint_maxp(&hep->desc))
283*4882a593Smuzhiyun 				/ 1000 + 1;
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	} else {		/* Skeleton QH */
286*4882a593Smuzhiyun 		qh->state = QH_STATE_ACTIVE;
287*4882a593Smuzhiyun 		qh->type = -1;
288*4882a593Smuzhiyun 	}
289*4882a593Smuzhiyun 	return qh;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun 
uhci_free_qh(struct uhci_hcd * uhci,struct uhci_qh * qh)292*4882a593Smuzhiyun static void uhci_free_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun 	WARN_ON(qh->state != QH_STATE_IDLE && qh->udev);
295*4882a593Smuzhiyun 	if (!list_empty(&qh->queue))
296*4882a593Smuzhiyun 		dev_WARN(uhci_dev(uhci), "qh %p list not empty!\n", qh);
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	list_del(&qh->node);
299*4882a593Smuzhiyun 	if (qh->udev) {
300*4882a593Smuzhiyun 		qh->hep->hcpriv = NULL;
301*4882a593Smuzhiyun 		if (qh->dummy_td)
302*4882a593Smuzhiyun 			uhci_free_td(uhci, qh->dummy_td);
303*4882a593Smuzhiyun 	}
304*4882a593Smuzhiyun 	dma_pool_free(uhci->qh_pool, qh, qh->dma_handle);
305*4882a593Smuzhiyun }
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun /*
308*4882a593Smuzhiyun  * When a queue is stopped and a dequeued URB is given back, adjust
309*4882a593Smuzhiyun  * the previous TD link (if the URB isn't first on the queue) or
310*4882a593Smuzhiyun  * save its toggle value (if it is first and is currently executing).
311*4882a593Smuzhiyun  *
312*4882a593Smuzhiyun  * Returns 0 if the URB should not yet be given back, 1 otherwise.
313*4882a593Smuzhiyun  */
uhci_cleanup_queue(struct uhci_hcd * uhci,struct uhci_qh * qh,struct urb * urb)314*4882a593Smuzhiyun static int uhci_cleanup_queue(struct uhci_hcd *uhci, struct uhci_qh *qh,
315*4882a593Smuzhiyun 		struct urb *urb)
316*4882a593Smuzhiyun {
317*4882a593Smuzhiyun 	struct urb_priv *urbp = urb->hcpriv;
318*4882a593Smuzhiyun 	struct uhci_td *td;
319*4882a593Smuzhiyun 	int ret = 1;
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	/* Isochronous pipes don't use toggles and their TD link pointers
322*4882a593Smuzhiyun 	 * get adjusted during uhci_urb_dequeue().  But since their queues
323*4882a593Smuzhiyun 	 * cannot truly be stopped, we have to watch out for dequeues
324*4882a593Smuzhiyun 	 * occurring after the nominal unlink frame. */
325*4882a593Smuzhiyun 	if (qh->type == USB_ENDPOINT_XFER_ISOC) {
326*4882a593Smuzhiyun 		ret = (uhci->frame_number + uhci->is_stopped !=
327*4882a593Smuzhiyun 				qh->unlink_frame);
328*4882a593Smuzhiyun 		goto done;
329*4882a593Smuzhiyun 	}
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	/* If the URB isn't first on its queue, adjust the link pointer
332*4882a593Smuzhiyun 	 * of the last TD in the previous URB.  The toggle doesn't need
333*4882a593Smuzhiyun 	 * to be saved since this URB can't be executing yet. */
334*4882a593Smuzhiyun 	if (qh->queue.next != &urbp->node) {
335*4882a593Smuzhiyun 		struct urb_priv *purbp;
336*4882a593Smuzhiyun 		struct uhci_td *ptd;
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun 		purbp = list_entry(urbp->node.prev, struct urb_priv, node);
339*4882a593Smuzhiyun 		WARN_ON(list_empty(&purbp->td_list));
340*4882a593Smuzhiyun 		ptd = list_entry(purbp->td_list.prev, struct uhci_td,
341*4882a593Smuzhiyun 				list);
342*4882a593Smuzhiyun 		td = list_entry(urbp->td_list.prev, struct uhci_td,
343*4882a593Smuzhiyun 				list);
344*4882a593Smuzhiyun 		ptd->link = td->link;
345*4882a593Smuzhiyun 		goto done;
346*4882a593Smuzhiyun 	}
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	/* If the QH element pointer is UHCI_PTR_TERM then then currently
349*4882a593Smuzhiyun 	 * executing URB has already been unlinked, so this one isn't it. */
350*4882a593Smuzhiyun 	if (qh_element(qh) == UHCI_PTR_TERM(uhci))
351*4882a593Smuzhiyun 		goto done;
352*4882a593Smuzhiyun 	qh->element = UHCI_PTR_TERM(uhci);
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	/* Control pipes don't have to worry about toggles */
355*4882a593Smuzhiyun 	if (qh->type == USB_ENDPOINT_XFER_CONTROL)
356*4882a593Smuzhiyun 		goto done;
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	/* Save the next toggle value */
359*4882a593Smuzhiyun 	WARN_ON(list_empty(&urbp->td_list));
360*4882a593Smuzhiyun 	td = list_entry(urbp->td_list.next, struct uhci_td, list);
361*4882a593Smuzhiyun 	qh->needs_fixup = 1;
362*4882a593Smuzhiyun 	qh->initial_toggle = uhci_toggle(td_token(uhci, td));
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun done:
365*4882a593Smuzhiyun 	return ret;
366*4882a593Smuzhiyun }
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun /*
369*4882a593Smuzhiyun  * Fix up the data toggles for URBs in a queue, when one of them
370*4882a593Smuzhiyun  * terminates early (short transfer, error, or dequeued).
371*4882a593Smuzhiyun  */
uhci_fixup_toggles(struct uhci_hcd * uhci,struct uhci_qh * qh,int skip_first)372*4882a593Smuzhiyun static void uhci_fixup_toggles(struct uhci_hcd *uhci, struct uhci_qh *qh,
373*4882a593Smuzhiyun 			int skip_first)
374*4882a593Smuzhiyun {
375*4882a593Smuzhiyun 	struct urb_priv *urbp = NULL;
376*4882a593Smuzhiyun 	struct uhci_td *td;
377*4882a593Smuzhiyun 	unsigned int toggle = qh->initial_toggle;
378*4882a593Smuzhiyun 	unsigned int pipe;
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	/* Fixups for a short transfer start with the second URB in the
381*4882a593Smuzhiyun 	 * queue (the short URB is the first). */
382*4882a593Smuzhiyun 	if (skip_first)
383*4882a593Smuzhiyun 		urbp = list_entry(qh->queue.next, struct urb_priv, node);
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 	/* When starting with the first URB, if the QH element pointer is
386*4882a593Smuzhiyun 	 * still valid then we know the URB's toggles are okay. */
387*4882a593Smuzhiyun 	else if (qh_element(qh) != UHCI_PTR_TERM(uhci))
388*4882a593Smuzhiyun 		toggle = 2;
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 	/* Fix up the toggle for the URBs in the queue.  Normally this
391*4882a593Smuzhiyun 	 * loop won't run more than once: When an error or short transfer
392*4882a593Smuzhiyun 	 * occurs, the queue usually gets emptied. */
393*4882a593Smuzhiyun 	urbp = list_prepare_entry(urbp, &qh->queue, node);
394*4882a593Smuzhiyun 	list_for_each_entry_continue(urbp, &qh->queue, node) {
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun 		/* If the first TD has the right toggle value, we don't
397*4882a593Smuzhiyun 		 * need to change any toggles in this URB */
398*4882a593Smuzhiyun 		td = list_entry(urbp->td_list.next, struct uhci_td, list);
399*4882a593Smuzhiyun 		if (toggle > 1 || uhci_toggle(td_token(uhci, td)) == toggle) {
400*4882a593Smuzhiyun 			td = list_entry(urbp->td_list.prev, struct uhci_td,
401*4882a593Smuzhiyun 					list);
402*4882a593Smuzhiyun 			toggle = uhci_toggle(td_token(uhci, td)) ^ 1;
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun 		/* Otherwise all the toggles in the URB have to be switched */
405*4882a593Smuzhiyun 		} else {
406*4882a593Smuzhiyun 			list_for_each_entry(td, &urbp->td_list, list) {
407*4882a593Smuzhiyun 				td->token ^= cpu_to_hc32(uhci,
408*4882a593Smuzhiyun 							TD_TOKEN_TOGGLE);
409*4882a593Smuzhiyun 				toggle ^= 1;
410*4882a593Smuzhiyun 			}
411*4882a593Smuzhiyun 		}
412*4882a593Smuzhiyun 	}
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	wmb();
415*4882a593Smuzhiyun 	pipe = list_entry(qh->queue.next, struct urb_priv, node)->urb->pipe;
416*4882a593Smuzhiyun 	usb_settoggle(qh->udev, usb_pipeendpoint(pipe),
417*4882a593Smuzhiyun 			usb_pipeout(pipe), toggle);
418*4882a593Smuzhiyun 	qh->needs_fixup = 0;
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun /*
422*4882a593Smuzhiyun  * Link an Isochronous QH into its skeleton's list
423*4882a593Smuzhiyun  */
link_iso(struct uhci_hcd * uhci,struct uhci_qh * qh)424*4882a593Smuzhiyun static inline void link_iso(struct uhci_hcd *uhci, struct uhci_qh *qh)
425*4882a593Smuzhiyun {
426*4882a593Smuzhiyun 	list_add_tail(&qh->node, &uhci->skel_iso_qh->node);
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun 	/* Isochronous QHs aren't linked by the hardware */
429*4882a593Smuzhiyun }
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun /*
432*4882a593Smuzhiyun  * Link a high-period interrupt QH into the schedule at the end of its
433*4882a593Smuzhiyun  * skeleton's list
434*4882a593Smuzhiyun  */
link_interrupt(struct uhci_hcd * uhci,struct uhci_qh * qh)435*4882a593Smuzhiyun static void link_interrupt(struct uhci_hcd *uhci, struct uhci_qh *qh)
436*4882a593Smuzhiyun {
437*4882a593Smuzhiyun 	struct uhci_qh *pqh;
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun 	list_add_tail(&qh->node, &uhci->skelqh[qh->skel]->node);
440*4882a593Smuzhiyun 
441*4882a593Smuzhiyun 	pqh = list_entry(qh->node.prev, struct uhci_qh, node);
442*4882a593Smuzhiyun 	qh->link = pqh->link;
443*4882a593Smuzhiyun 	wmb();
444*4882a593Smuzhiyun 	pqh->link = LINK_TO_QH(uhci, qh);
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun 
447*4882a593Smuzhiyun /*
448*4882a593Smuzhiyun  * Link a period-1 interrupt or async QH into the schedule at the
449*4882a593Smuzhiyun  * correct spot in the async skeleton's list, and update the FSBR link
450*4882a593Smuzhiyun  */
link_async(struct uhci_hcd * uhci,struct uhci_qh * qh)451*4882a593Smuzhiyun static void link_async(struct uhci_hcd *uhci, struct uhci_qh *qh)
452*4882a593Smuzhiyun {
453*4882a593Smuzhiyun 	struct uhci_qh *pqh;
454*4882a593Smuzhiyun 	__hc32 link_to_new_qh;
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun 	/* Find the predecessor QH for our new one and insert it in the list.
457*4882a593Smuzhiyun 	 * The list of QHs is expected to be short, so linear search won't
458*4882a593Smuzhiyun 	 * take too long. */
459*4882a593Smuzhiyun 	list_for_each_entry_reverse(pqh, &uhci->skel_async_qh->node, node) {
460*4882a593Smuzhiyun 		if (pqh->skel <= qh->skel)
461*4882a593Smuzhiyun 			break;
462*4882a593Smuzhiyun 	}
463*4882a593Smuzhiyun 	list_add(&qh->node, &pqh->node);
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun 	/* Link it into the schedule */
466*4882a593Smuzhiyun 	qh->link = pqh->link;
467*4882a593Smuzhiyun 	wmb();
468*4882a593Smuzhiyun 	link_to_new_qh = LINK_TO_QH(uhci, qh);
469*4882a593Smuzhiyun 	pqh->link = link_to_new_qh;
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun 	/* If this is now the first FSBR QH, link the terminating skeleton
472*4882a593Smuzhiyun 	 * QH to it. */
473*4882a593Smuzhiyun 	if (pqh->skel < SKEL_FSBR && qh->skel >= SKEL_FSBR)
474*4882a593Smuzhiyun 		uhci->skel_term_qh->link = link_to_new_qh;
475*4882a593Smuzhiyun }
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun /*
478*4882a593Smuzhiyun  * Put a QH on the schedule in both hardware and software
479*4882a593Smuzhiyun  */
uhci_activate_qh(struct uhci_hcd * uhci,struct uhci_qh * qh)480*4882a593Smuzhiyun static void uhci_activate_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
481*4882a593Smuzhiyun {
482*4882a593Smuzhiyun 	WARN_ON(list_empty(&qh->queue));
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 	/* Set the element pointer if it isn't set already.
485*4882a593Smuzhiyun 	 * This isn't needed for Isochronous queues, but it doesn't hurt. */
486*4882a593Smuzhiyun 	if (qh_element(qh) == UHCI_PTR_TERM(uhci)) {
487*4882a593Smuzhiyun 		struct urb_priv *urbp = list_entry(qh->queue.next,
488*4882a593Smuzhiyun 				struct urb_priv, node);
489*4882a593Smuzhiyun 		struct uhci_td *td = list_entry(urbp->td_list.next,
490*4882a593Smuzhiyun 				struct uhci_td, list);
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun 		qh->element = LINK_TO_TD(uhci, td);
493*4882a593Smuzhiyun 	}
494*4882a593Smuzhiyun 
495*4882a593Smuzhiyun 	/* Treat the queue as if it has just advanced */
496*4882a593Smuzhiyun 	qh->wait_expired = 0;
497*4882a593Smuzhiyun 	qh->advance_jiffies = jiffies;
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 	if (qh->state == QH_STATE_ACTIVE)
500*4882a593Smuzhiyun 		return;
501*4882a593Smuzhiyun 	qh->state = QH_STATE_ACTIVE;
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun 	/* Move the QH from its old list to the correct spot in the appropriate
504*4882a593Smuzhiyun 	 * skeleton's list */
505*4882a593Smuzhiyun 	if (qh == uhci->next_qh)
506*4882a593Smuzhiyun 		uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
507*4882a593Smuzhiyun 				node);
508*4882a593Smuzhiyun 	list_del(&qh->node);
509*4882a593Smuzhiyun 
510*4882a593Smuzhiyun 	if (qh->skel == SKEL_ISO)
511*4882a593Smuzhiyun 		link_iso(uhci, qh);
512*4882a593Smuzhiyun 	else if (qh->skel < SKEL_ASYNC)
513*4882a593Smuzhiyun 		link_interrupt(uhci, qh);
514*4882a593Smuzhiyun 	else
515*4882a593Smuzhiyun 		link_async(uhci, qh);
516*4882a593Smuzhiyun }
517*4882a593Smuzhiyun 
518*4882a593Smuzhiyun /*
519*4882a593Smuzhiyun  * Unlink a high-period interrupt QH from the schedule
520*4882a593Smuzhiyun  */
unlink_interrupt(struct uhci_hcd * uhci,struct uhci_qh * qh)521*4882a593Smuzhiyun static void unlink_interrupt(struct uhci_hcd *uhci, struct uhci_qh *qh)
522*4882a593Smuzhiyun {
523*4882a593Smuzhiyun 	struct uhci_qh *pqh;
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 	pqh = list_entry(qh->node.prev, struct uhci_qh, node);
526*4882a593Smuzhiyun 	pqh->link = qh->link;
527*4882a593Smuzhiyun 	mb();
528*4882a593Smuzhiyun }
529*4882a593Smuzhiyun 
530*4882a593Smuzhiyun /*
531*4882a593Smuzhiyun  * Unlink a period-1 interrupt or async QH from the schedule
532*4882a593Smuzhiyun  */
unlink_async(struct uhci_hcd * uhci,struct uhci_qh * qh)533*4882a593Smuzhiyun static void unlink_async(struct uhci_hcd *uhci, struct uhci_qh *qh)
534*4882a593Smuzhiyun {
535*4882a593Smuzhiyun 	struct uhci_qh *pqh;
536*4882a593Smuzhiyun 	__hc32 link_to_next_qh = qh->link;
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun 	pqh = list_entry(qh->node.prev, struct uhci_qh, node);
539*4882a593Smuzhiyun 	pqh->link = link_to_next_qh;
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun 	/* If this was the old first FSBR QH, link the terminating skeleton
542*4882a593Smuzhiyun 	 * QH to the next (new first FSBR) QH. */
543*4882a593Smuzhiyun 	if (pqh->skel < SKEL_FSBR && qh->skel >= SKEL_FSBR)
544*4882a593Smuzhiyun 		uhci->skel_term_qh->link = link_to_next_qh;
545*4882a593Smuzhiyun 	mb();
546*4882a593Smuzhiyun }
547*4882a593Smuzhiyun 
548*4882a593Smuzhiyun /*
549*4882a593Smuzhiyun  * Take a QH off the hardware schedule
550*4882a593Smuzhiyun  */
uhci_unlink_qh(struct uhci_hcd * uhci,struct uhci_qh * qh)551*4882a593Smuzhiyun static void uhci_unlink_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
552*4882a593Smuzhiyun {
553*4882a593Smuzhiyun 	if (qh->state == QH_STATE_UNLINKING)
554*4882a593Smuzhiyun 		return;
555*4882a593Smuzhiyun 	WARN_ON(qh->state != QH_STATE_ACTIVE || !qh->udev);
556*4882a593Smuzhiyun 	qh->state = QH_STATE_UNLINKING;
557*4882a593Smuzhiyun 
558*4882a593Smuzhiyun 	/* Unlink the QH from the schedule and record when we did it */
559*4882a593Smuzhiyun 	if (qh->skel == SKEL_ISO)
560*4882a593Smuzhiyun 		;
561*4882a593Smuzhiyun 	else if (qh->skel < SKEL_ASYNC)
562*4882a593Smuzhiyun 		unlink_interrupt(uhci, qh);
563*4882a593Smuzhiyun 	else
564*4882a593Smuzhiyun 		unlink_async(uhci, qh);
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun 	uhci_get_current_frame_number(uhci);
567*4882a593Smuzhiyun 	qh->unlink_frame = uhci->frame_number;
568*4882a593Smuzhiyun 
569*4882a593Smuzhiyun 	/* Force an interrupt so we know when the QH is fully unlinked */
570*4882a593Smuzhiyun 	if (list_empty(&uhci->skel_unlink_qh->node) || uhci->is_stopped)
571*4882a593Smuzhiyun 		uhci_set_next_interrupt(uhci);
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun 	/* Move the QH from its old list to the end of the unlinking list */
574*4882a593Smuzhiyun 	if (qh == uhci->next_qh)
575*4882a593Smuzhiyun 		uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
576*4882a593Smuzhiyun 				node);
577*4882a593Smuzhiyun 	list_move_tail(&qh->node, &uhci->skel_unlink_qh->node);
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun 
580*4882a593Smuzhiyun /*
581*4882a593Smuzhiyun  * When we and the controller are through with a QH, it becomes IDLE.
582*4882a593Smuzhiyun  * This happens when a QH has been off the schedule (on the unlinking
583*4882a593Smuzhiyun  * list) for more than one frame, or when an error occurs while adding
584*4882a593Smuzhiyun  * the first URB onto a new QH.
585*4882a593Smuzhiyun  */
uhci_make_qh_idle(struct uhci_hcd * uhci,struct uhci_qh * qh)586*4882a593Smuzhiyun static void uhci_make_qh_idle(struct uhci_hcd *uhci, struct uhci_qh *qh)
587*4882a593Smuzhiyun {
588*4882a593Smuzhiyun 	WARN_ON(qh->state == QH_STATE_ACTIVE);
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun 	if (qh == uhci->next_qh)
591*4882a593Smuzhiyun 		uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
592*4882a593Smuzhiyun 				node);
593*4882a593Smuzhiyun 	list_move(&qh->node, &uhci->idle_qh_list);
594*4882a593Smuzhiyun 	qh->state = QH_STATE_IDLE;
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun 	/* Now that the QH is idle, its post_td isn't being used */
597*4882a593Smuzhiyun 	if (qh->post_td) {
598*4882a593Smuzhiyun 		uhci_free_td(uhci, qh->post_td);
599*4882a593Smuzhiyun 		qh->post_td = NULL;
600*4882a593Smuzhiyun 	}
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun 	/* If anyone is waiting for a QH to become idle, wake them up */
603*4882a593Smuzhiyun 	if (uhci->num_waiting)
604*4882a593Smuzhiyun 		wake_up_all(&uhci->waitqh);
605*4882a593Smuzhiyun }
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun /*
608*4882a593Smuzhiyun  * Find the highest existing bandwidth load for a given phase and period.
609*4882a593Smuzhiyun  */
uhci_highest_load(struct uhci_hcd * uhci,int phase,int period)610*4882a593Smuzhiyun static int uhci_highest_load(struct uhci_hcd *uhci, int phase, int period)
611*4882a593Smuzhiyun {
612*4882a593Smuzhiyun 	int highest_load = uhci->load[phase];
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun 	for (phase += period; phase < MAX_PHASE; phase += period)
615*4882a593Smuzhiyun 		highest_load = max_t(int, highest_load, uhci->load[phase]);
616*4882a593Smuzhiyun 	return highest_load;
617*4882a593Smuzhiyun }
618*4882a593Smuzhiyun 
619*4882a593Smuzhiyun /*
620*4882a593Smuzhiyun  * Set qh->phase to the optimal phase for a periodic transfer and
621*4882a593Smuzhiyun  * check whether the bandwidth requirement is acceptable.
622*4882a593Smuzhiyun  */
uhci_check_bandwidth(struct uhci_hcd * uhci,struct uhci_qh * qh)623*4882a593Smuzhiyun static int uhci_check_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
624*4882a593Smuzhiyun {
625*4882a593Smuzhiyun 	int minimax_load;
626*4882a593Smuzhiyun 
627*4882a593Smuzhiyun 	/* Find the optimal phase (unless it is already set) and get
628*4882a593Smuzhiyun 	 * its load value. */
629*4882a593Smuzhiyun 	if (qh->phase >= 0)
630*4882a593Smuzhiyun 		minimax_load = uhci_highest_load(uhci, qh->phase, qh->period);
631*4882a593Smuzhiyun 	else {
632*4882a593Smuzhiyun 		int phase, load;
633*4882a593Smuzhiyun 		int max_phase = min_t(int, MAX_PHASE, qh->period);
634*4882a593Smuzhiyun 
635*4882a593Smuzhiyun 		qh->phase = 0;
636*4882a593Smuzhiyun 		minimax_load = uhci_highest_load(uhci, qh->phase, qh->period);
637*4882a593Smuzhiyun 		for (phase = 1; phase < max_phase; ++phase) {
638*4882a593Smuzhiyun 			load = uhci_highest_load(uhci, phase, qh->period);
639*4882a593Smuzhiyun 			if (load < minimax_load) {
640*4882a593Smuzhiyun 				minimax_load = load;
641*4882a593Smuzhiyun 				qh->phase = phase;
642*4882a593Smuzhiyun 			}
643*4882a593Smuzhiyun 		}
644*4882a593Smuzhiyun 	}
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun 	/* Maximum allowable periodic bandwidth is 90%, or 900 us per frame */
647*4882a593Smuzhiyun 	if (minimax_load + qh->load > 900) {
648*4882a593Smuzhiyun 		dev_dbg(uhci_dev(uhci), "bandwidth allocation failed: "
649*4882a593Smuzhiyun 				"period %d, phase %d, %d + %d us\n",
650*4882a593Smuzhiyun 				qh->period, qh->phase, minimax_load, qh->load);
651*4882a593Smuzhiyun 		return -ENOSPC;
652*4882a593Smuzhiyun 	}
653*4882a593Smuzhiyun 	return 0;
654*4882a593Smuzhiyun }
655*4882a593Smuzhiyun 
656*4882a593Smuzhiyun /*
657*4882a593Smuzhiyun  * Reserve a periodic QH's bandwidth in the schedule
658*4882a593Smuzhiyun  */
uhci_reserve_bandwidth(struct uhci_hcd * uhci,struct uhci_qh * qh)659*4882a593Smuzhiyun static void uhci_reserve_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
660*4882a593Smuzhiyun {
661*4882a593Smuzhiyun 	int i;
662*4882a593Smuzhiyun 	int load = qh->load;
663*4882a593Smuzhiyun 	char *p = "??";
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun 	for (i = qh->phase; i < MAX_PHASE; i += qh->period) {
666*4882a593Smuzhiyun 		uhci->load[i] += load;
667*4882a593Smuzhiyun 		uhci->total_load += load;
668*4882a593Smuzhiyun 	}
669*4882a593Smuzhiyun 	uhci_to_hcd(uhci)->self.bandwidth_allocated =
670*4882a593Smuzhiyun 			uhci->total_load / MAX_PHASE;
671*4882a593Smuzhiyun 	switch (qh->type) {
672*4882a593Smuzhiyun 	case USB_ENDPOINT_XFER_INT:
673*4882a593Smuzhiyun 		++uhci_to_hcd(uhci)->self.bandwidth_int_reqs;
674*4882a593Smuzhiyun 		p = "INT";
675*4882a593Smuzhiyun 		break;
676*4882a593Smuzhiyun 	case USB_ENDPOINT_XFER_ISOC:
677*4882a593Smuzhiyun 		++uhci_to_hcd(uhci)->self.bandwidth_isoc_reqs;
678*4882a593Smuzhiyun 		p = "ISO";
679*4882a593Smuzhiyun 		break;
680*4882a593Smuzhiyun 	}
681*4882a593Smuzhiyun 	qh->bandwidth_reserved = 1;
682*4882a593Smuzhiyun 	dev_dbg(uhci_dev(uhci),
683*4882a593Smuzhiyun 			"%s dev %d ep%02x-%s, period %d, phase %d, %d us\n",
684*4882a593Smuzhiyun 			"reserve", qh->udev->devnum,
685*4882a593Smuzhiyun 			qh->hep->desc.bEndpointAddress, p,
686*4882a593Smuzhiyun 			qh->period, qh->phase, load);
687*4882a593Smuzhiyun }
688*4882a593Smuzhiyun 
689*4882a593Smuzhiyun /*
690*4882a593Smuzhiyun  * Release a periodic QH's bandwidth reservation
691*4882a593Smuzhiyun  */
uhci_release_bandwidth(struct uhci_hcd * uhci,struct uhci_qh * qh)692*4882a593Smuzhiyun static void uhci_release_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
693*4882a593Smuzhiyun {
694*4882a593Smuzhiyun 	int i;
695*4882a593Smuzhiyun 	int load = qh->load;
696*4882a593Smuzhiyun 	char *p = "??";
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun 	for (i = qh->phase; i < MAX_PHASE; i += qh->period) {
699*4882a593Smuzhiyun 		uhci->load[i] -= load;
700*4882a593Smuzhiyun 		uhci->total_load -= load;
701*4882a593Smuzhiyun 	}
702*4882a593Smuzhiyun 	uhci_to_hcd(uhci)->self.bandwidth_allocated =
703*4882a593Smuzhiyun 			uhci->total_load / MAX_PHASE;
704*4882a593Smuzhiyun 	switch (qh->type) {
705*4882a593Smuzhiyun 	case USB_ENDPOINT_XFER_INT:
706*4882a593Smuzhiyun 		--uhci_to_hcd(uhci)->self.bandwidth_int_reqs;
707*4882a593Smuzhiyun 		p = "INT";
708*4882a593Smuzhiyun 		break;
709*4882a593Smuzhiyun 	case USB_ENDPOINT_XFER_ISOC:
710*4882a593Smuzhiyun 		--uhci_to_hcd(uhci)->self.bandwidth_isoc_reqs;
711*4882a593Smuzhiyun 		p = "ISO";
712*4882a593Smuzhiyun 		break;
713*4882a593Smuzhiyun 	}
714*4882a593Smuzhiyun 	qh->bandwidth_reserved = 0;
715*4882a593Smuzhiyun 	dev_dbg(uhci_dev(uhci),
716*4882a593Smuzhiyun 			"%s dev %d ep%02x-%s, period %d, phase %d, %d us\n",
717*4882a593Smuzhiyun 			"release", qh->udev->devnum,
718*4882a593Smuzhiyun 			qh->hep->desc.bEndpointAddress, p,
719*4882a593Smuzhiyun 			qh->period, qh->phase, load);
720*4882a593Smuzhiyun }
721*4882a593Smuzhiyun 
uhci_alloc_urb_priv(struct uhci_hcd * uhci,struct urb * urb)722*4882a593Smuzhiyun static inline struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci,
723*4882a593Smuzhiyun 		struct urb *urb)
724*4882a593Smuzhiyun {
725*4882a593Smuzhiyun 	struct urb_priv *urbp;
726*4882a593Smuzhiyun 
727*4882a593Smuzhiyun 	urbp = kmem_cache_zalloc(uhci_up_cachep, GFP_ATOMIC);
728*4882a593Smuzhiyun 	if (!urbp)
729*4882a593Smuzhiyun 		return NULL;
730*4882a593Smuzhiyun 
731*4882a593Smuzhiyun 	urbp->urb = urb;
732*4882a593Smuzhiyun 	urb->hcpriv = urbp;
733*4882a593Smuzhiyun 
734*4882a593Smuzhiyun 	INIT_LIST_HEAD(&urbp->node);
735*4882a593Smuzhiyun 	INIT_LIST_HEAD(&urbp->td_list);
736*4882a593Smuzhiyun 
737*4882a593Smuzhiyun 	return urbp;
738*4882a593Smuzhiyun }
739*4882a593Smuzhiyun 
uhci_free_urb_priv(struct uhci_hcd * uhci,struct urb_priv * urbp)740*4882a593Smuzhiyun static void uhci_free_urb_priv(struct uhci_hcd *uhci,
741*4882a593Smuzhiyun 		struct urb_priv *urbp)
742*4882a593Smuzhiyun {
743*4882a593Smuzhiyun 	struct uhci_td *td, *tmp;
744*4882a593Smuzhiyun 
745*4882a593Smuzhiyun 	if (!list_empty(&urbp->node))
746*4882a593Smuzhiyun 		dev_WARN(uhci_dev(uhci), "urb %p still on QH's list!\n",
747*4882a593Smuzhiyun 				urbp->urb);
748*4882a593Smuzhiyun 
749*4882a593Smuzhiyun 	list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
750*4882a593Smuzhiyun 		uhci_remove_td_from_urbp(td);
751*4882a593Smuzhiyun 		uhci_free_td(uhci, td);
752*4882a593Smuzhiyun 	}
753*4882a593Smuzhiyun 
754*4882a593Smuzhiyun 	kmem_cache_free(uhci_up_cachep, urbp);
755*4882a593Smuzhiyun }
756*4882a593Smuzhiyun 
757*4882a593Smuzhiyun /*
758*4882a593Smuzhiyun  * Map status to standard result codes
759*4882a593Smuzhiyun  *
760*4882a593Smuzhiyun  * <status> is (td_status(uhci, td) & 0xF60000), a.k.a.
761*4882a593Smuzhiyun  * uhci_status_bits(td_status(uhci, td)).
762*4882a593Smuzhiyun  * Note: <status> does not include the TD_CTRL_NAK bit.
763*4882a593Smuzhiyun  * <dir_out> is True for output TDs and False for input TDs.
764*4882a593Smuzhiyun  */
uhci_map_status(int status,int dir_out)765*4882a593Smuzhiyun static int uhci_map_status(int status, int dir_out)
766*4882a593Smuzhiyun {
767*4882a593Smuzhiyun 	if (!status)
768*4882a593Smuzhiyun 		return 0;
769*4882a593Smuzhiyun 	if (status & TD_CTRL_BITSTUFF)			/* Bitstuff error */
770*4882a593Smuzhiyun 		return -EPROTO;
771*4882a593Smuzhiyun 	if (status & TD_CTRL_CRCTIMEO) {		/* CRC/Timeout */
772*4882a593Smuzhiyun 		if (dir_out)
773*4882a593Smuzhiyun 			return -EPROTO;
774*4882a593Smuzhiyun 		else
775*4882a593Smuzhiyun 			return -EILSEQ;
776*4882a593Smuzhiyun 	}
777*4882a593Smuzhiyun 	if (status & TD_CTRL_BABBLE)			/* Babble */
778*4882a593Smuzhiyun 		return -EOVERFLOW;
779*4882a593Smuzhiyun 	if (status & TD_CTRL_DBUFERR)			/* Buffer error */
780*4882a593Smuzhiyun 		return -ENOSR;
781*4882a593Smuzhiyun 	if (status & TD_CTRL_STALLED)			/* Stalled */
782*4882a593Smuzhiyun 		return -EPIPE;
783*4882a593Smuzhiyun 	return 0;
784*4882a593Smuzhiyun }
785*4882a593Smuzhiyun 
786*4882a593Smuzhiyun /*
787*4882a593Smuzhiyun  * Control transfers
788*4882a593Smuzhiyun  */
uhci_submit_control(struct uhci_hcd * uhci,struct urb * urb,struct uhci_qh * qh)789*4882a593Smuzhiyun static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb,
790*4882a593Smuzhiyun 		struct uhci_qh *qh)
791*4882a593Smuzhiyun {
792*4882a593Smuzhiyun 	struct uhci_td *td;
793*4882a593Smuzhiyun 	unsigned long destination, status;
794*4882a593Smuzhiyun 	int maxsze = usb_endpoint_maxp(&qh->hep->desc);
795*4882a593Smuzhiyun 	int len = urb->transfer_buffer_length;
796*4882a593Smuzhiyun 	dma_addr_t data = urb->transfer_dma;
797*4882a593Smuzhiyun 	__hc32 *plink;
798*4882a593Smuzhiyun 	struct urb_priv *urbp = urb->hcpriv;
799*4882a593Smuzhiyun 	int skel;
800*4882a593Smuzhiyun 
801*4882a593Smuzhiyun 	/* The "pipe" thing contains the destination in bits 8--18 */
802*4882a593Smuzhiyun 	destination = (urb->pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP;
803*4882a593Smuzhiyun 
804*4882a593Smuzhiyun 	/* 3 errors, dummy TD remains inactive */
805*4882a593Smuzhiyun 	status = uhci_maxerr(3);
806*4882a593Smuzhiyun 	if (urb->dev->speed == USB_SPEED_LOW)
807*4882a593Smuzhiyun 		status |= TD_CTRL_LS;
808*4882a593Smuzhiyun 
809*4882a593Smuzhiyun 	/*
810*4882a593Smuzhiyun 	 * Build the TD for the control request setup packet
811*4882a593Smuzhiyun 	 */
812*4882a593Smuzhiyun 	td = qh->dummy_td;
813*4882a593Smuzhiyun 	uhci_add_td_to_urbp(td, urbp);
814*4882a593Smuzhiyun 	uhci_fill_td(uhci, td, status, destination | uhci_explen(8),
815*4882a593Smuzhiyun 			urb->setup_dma);
816*4882a593Smuzhiyun 	plink = &td->link;
817*4882a593Smuzhiyun 	status |= TD_CTRL_ACTIVE;
818*4882a593Smuzhiyun 
819*4882a593Smuzhiyun 	/*
820*4882a593Smuzhiyun 	 * If direction is "send", change the packet ID from SETUP (0x2D)
821*4882a593Smuzhiyun 	 * to OUT (0xE1).  Else change it from SETUP to IN (0x69) and
822*4882a593Smuzhiyun 	 * set Short Packet Detect (SPD) for all data packets.
823*4882a593Smuzhiyun 	 *
824*4882a593Smuzhiyun 	 * 0-length transfers always get treated as "send".
825*4882a593Smuzhiyun 	 */
826*4882a593Smuzhiyun 	if (usb_pipeout(urb->pipe) || len == 0)
827*4882a593Smuzhiyun 		destination ^= (USB_PID_SETUP ^ USB_PID_OUT);
828*4882a593Smuzhiyun 	else {
829*4882a593Smuzhiyun 		destination ^= (USB_PID_SETUP ^ USB_PID_IN);
830*4882a593Smuzhiyun 		status |= TD_CTRL_SPD;
831*4882a593Smuzhiyun 	}
832*4882a593Smuzhiyun 
833*4882a593Smuzhiyun 	/*
834*4882a593Smuzhiyun 	 * Build the DATA TDs
835*4882a593Smuzhiyun 	 */
836*4882a593Smuzhiyun 	while (len > 0) {
837*4882a593Smuzhiyun 		int pktsze = maxsze;
838*4882a593Smuzhiyun 
839*4882a593Smuzhiyun 		if (len <= pktsze) {		/* The last data packet */
840*4882a593Smuzhiyun 			pktsze = len;
841*4882a593Smuzhiyun 			status &= ~TD_CTRL_SPD;
842*4882a593Smuzhiyun 		}
843*4882a593Smuzhiyun 
844*4882a593Smuzhiyun 		td = uhci_alloc_td(uhci);
845*4882a593Smuzhiyun 		if (!td)
846*4882a593Smuzhiyun 			goto nomem;
847*4882a593Smuzhiyun 		*plink = LINK_TO_TD(uhci, td);
848*4882a593Smuzhiyun 
849*4882a593Smuzhiyun 		/* Alternate Data0/1 (start with Data1) */
850*4882a593Smuzhiyun 		destination ^= TD_TOKEN_TOGGLE;
851*4882a593Smuzhiyun 
852*4882a593Smuzhiyun 		uhci_add_td_to_urbp(td, urbp);
853*4882a593Smuzhiyun 		uhci_fill_td(uhci, td, status,
854*4882a593Smuzhiyun 			destination | uhci_explen(pktsze), data);
855*4882a593Smuzhiyun 		plink = &td->link;
856*4882a593Smuzhiyun 
857*4882a593Smuzhiyun 		data += pktsze;
858*4882a593Smuzhiyun 		len -= pktsze;
859*4882a593Smuzhiyun 	}
860*4882a593Smuzhiyun 
861*4882a593Smuzhiyun 	/*
862*4882a593Smuzhiyun 	 * Build the final TD for control status
863*4882a593Smuzhiyun 	 */
864*4882a593Smuzhiyun 	td = uhci_alloc_td(uhci);
865*4882a593Smuzhiyun 	if (!td)
866*4882a593Smuzhiyun 		goto nomem;
867*4882a593Smuzhiyun 	*plink = LINK_TO_TD(uhci, td);
868*4882a593Smuzhiyun 
869*4882a593Smuzhiyun 	/* Change direction for the status transaction */
870*4882a593Smuzhiyun 	destination ^= (USB_PID_IN ^ USB_PID_OUT);
871*4882a593Smuzhiyun 	destination |= TD_TOKEN_TOGGLE;		/* End in Data1 */
872*4882a593Smuzhiyun 
873*4882a593Smuzhiyun 	uhci_add_td_to_urbp(td, urbp);
874*4882a593Smuzhiyun 	uhci_fill_td(uhci, td, status | TD_CTRL_IOC,
875*4882a593Smuzhiyun 			destination | uhci_explen(0), 0);
876*4882a593Smuzhiyun 	plink = &td->link;
877*4882a593Smuzhiyun 
878*4882a593Smuzhiyun 	/*
879*4882a593Smuzhiyun 	 * Build the new dummy TD and activate the old one
880*4882a593Smuzhiyun 	 */
881*4882a593Smuzhiyun 	td = uhci_alloc_td(uhci);
882*4882a593Smuzhiyun 	if (!td)
883*4882a593Smuzhiyun 		goto nomem;
884*4882a593Smuzhiyun 	*plink = LINK_TO_TD(uhci, td);
885*4882a593Smuzhiyun 
886*4882a593Smuzhiyun 	uhci_fill_td(uhci, td, 0, USB_PID_OUT | uhci_explen(0), 0);
887*4882a593Smuzhiyun 	wmb();
888*4882a593Smuzhiyun 	qh->dummy_td->status |= cpu_to_hc32(uhci, TD_CTRL_ACTIVE);
889*4882a593Smuzhiyun 	qh->dummy_td = td;
890*4882a593Smuzhiyun 
891*4882a593Smuzhiyun 	/* Low-speed transfers get a different queue, and won't hog the bus.
892*4882a593Smuzhiyun 	 * Also, some devices enumerate better without FSBR; the easiest way
893*4882a593Smuzhiyun 	 * to do that is to put URBs on the low-speed queue while the device
894*4882a593Smuzhiyun 	 * isn't in the CONFIGURED state. */
895*4882a593Smuzhiyun 	if (urb->dev->speed == USB_SPEED_LOW ||
896*4882a593Smuzhiyun 			urb->dev->state != USB_STATE_CONFIGURED)
897*4882a593Smuzhiyun 		skel = SKEL_LS_CONTROL;
898*4882a593Smuzhiyun 	else {
899*4882a593Smuzhiyun 		skel = SKEL_FS_CONTROL;
900*4882a593Smuzhiyun 		uhci_add_fsbr(uhci, urb);
901*4882a593Smuzhiyun 	}
902*4882a593Smuzhiyun 	if (qh->state != QH_STATE_ACTIVE)
903*4882a593Smuzhiyun 		qh->skel = skel;
904*4882a593Smuzhiyun 	return 0;
905*4882a593Smuzhiyun 
906*4882a593Smuzhiyun nomem:
907*4882a593Smuzhiyun 	/* Remove the dummy TD from the td_list so it doesn't get freed */
908*4882a593Smuzhiyun 	uhci_remove_td_from_urbp(qh->dummy_td);
909*4882a593Smuzhiyun 	return -ENOMEM;
910*4882a593Smuzhiyun }
911*4882a593Smuzhiyun 
912*4882a593Smuzhiyun /*
913*4882a593Smuzhiyun  * Common submit for bulk and interrupt
914*4882a593Smuzhiyun  */
uhci_submit_common(struct uhci_hcd * uhci,struct urb * urb,struct uhci_qh * qh)915*4882a593Smuzhiyun static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb,
916*4882a593Smuzhiyun 		struct uhci_qh *qh)
917*4882a593Smuzhiyun {
918*4882a593Smuzhiyun 	struct uhci_td *td;
919*4882a593Smuzhiyun 	unsigned long destination, status;
920*4882a593Smuzhiyun 	int maxsze = usb_endpoint_maxp(&qh->hep->desc);
921*4882a593Smuzhiyun 	int len = urb->transfer_buffer_length;
922*4882a593Smuzhiyun 	int this_sg_len;
923*4882a593Smuzhiyun 	dma_addr_t data;
924*4882a593Smuzhiyun 	__hc32 *plink;
925*4882a593Smuzhiyun 	struct urb_priv *urbp = urb->hcpriv;
926*4882a593Smuzhiyun 	unsigned int toggle;
927*4882a593Smuzhiyun 	struct scatterlist  *sg;
928*4882a593Smuzhiyun 	int i;
929*4882a593Smuzhiyun 
930*4882a593Smuzhiyun 	if (len < 0)
931*4882a593Smuzhiyun 		return -EINVAL;
932*4882a593Smuzhiyun 
933*4882a593Smuzhiyun 	/* The "pipe" thing contains the destination in bits 8--18 */
934*4882a593Smuzhiyun 	destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
935*4882a593Smuzhiyun 	toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
936*4882a593Smuzhiyun 			 usb_pipeout(urb->pipe));
937*4882a593Smuzhiyun 
938*4882a593Smuzhiyun 	/* 3 errors, dummy TD remains inactive */
939*4882a593Smuzhiyun 	status = uhci_maxerr(3);
940*4882a593Smuzhiyun 	if (urb->dev->speed == USB_SPEED_LOW)
941*4882a593Smuzhiyun 		status |= TD_CTRL_LS;
942*4882a593Smuzhiyun 	if (usb_pipein(urb->pipe))
943*4882a593Smuzhiyun 		status |= TD_CTRL_SPD;
944*4882a593Smuzhiyun 
945*4882a593Smuzhiyun 	i = urb->num_mapped_sgs;
946*4882a593Smuzhiyun 	if (len > 0 && i > 0) {
947*4882a593Smuzhiyun 		sg = urb->sg;
948*4882a593Smuzhiyun 		data = sg_dma_address(sg);
949*4882a593Smuzhiyun 
950*4882a593Smuzhiyun 		/* urb->transfer_buffer_length may be smaller than the
951*4882a593Smuzhiyun 		 * size of the scatterlist (or vice versa)
952*4882a593Smuzhiyun 		 */
953*4882a593Smuzhiyun 		this_sg_len = min_t(int, sg_dma_len(sg), len);
954*4882a593Smuzhiyun 	} else {
955*4882a593Smuzhiyun 		sg = NULL;
956*4882a593Smuzhiyun 		data = urb->transfer_dma;
957*4882a593Smuzhiyun 		this_sg_len = len;
958*4882a593Smuzhiyun 	}
959*4882a593Smuzhiyun 	/*
960*4882a593Smuzhiyun 	 * Build the DATA TDs
961*4882a593Smuzhiyun 	 */
962*4882a593Smuzhiyun 	plink = NULL;
963*4882a593Smuzhiyun 	td = qh->dummy_td;
964*4882a593Smuzhiyun 	for (;;) {	/* Allow zero length packets */
965*4882a593Smuzhiyun 		int pktsze = maxsze;
966*4882a593Smuzhiyun 
967*4882a593Smuzhiyun 		if (len <= pktsze) {		/* The last packet */
968*4882a593Smuzhiyun 			pktsze = len;
969*4882a593Smuzhiyun 			if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
970*4882a593Smuzhiyun 				status &= ~TD_CTRL_SPD;
971*4882a593Smuzhiyun 		}
972*4882a593Smuzhiyun 
973*4882a593Smuzhiyun 		if (plink) {
974*4882a593Smuzhiyun 			td = uhci_alloc_td(uhci);
975*4882a593Smuzhiyun 			if (!td)
976*4882a593Smuzhiyun 				goto nomem;
977*4882a593Smuzhiyun 			*plink = LINK_TO_TD(uhci, td);
978*4882a593Smuzhiyun 		}
979*4882a593Smuzhiyun 		uhci_add_td_to_urbp(td, urbp);
980*4882a593Smuzhiyun 		uhci_fill_td(uhci, td, status,
981*4882a593Smuzhiyun 				destination | uhci_explen(pktsze) |
982*4882a593Smuzhiyun 					(toggle << TD_TOKEN_TOGGLE_SHIFT),
983*4882a593Smuzhiyun 				data);
984*4882a593Smuzhiyun 		plink = &td->link;
985*4882a593Smuzhiyun 		status |= TD_CTRL_ACTIVE;
986*4882a593Smuzhiyun 
987*4882a593Smuzhiyun 		toggle ^= 1;
988*4882a593Smuzhiyun 		data += pktsze;
989*4882a593Smuzhiyun 		this_sg_len -= pktsze;
990*4882a593Smuzhiyun 		len -= maxsze;
991*4882a593Smuzhiyun 		if (this_sg_len <= 0) {
992*4882a593Smuzhiyun 			if (--i <= 0 || len <= 0)
993*4882a593Smuzhiyun 				break;
994*4882a593Smuzhiyun 			sg = sg_next(sg);
995*4882a593Smuzhiyun 			data = sg_dma_address(sg);
996*4882a593Smuzhiyun 			this_sg_len = min_t(int, sg_dma_len(sg), len);
997*4882a593Smuzhiyun 		}
998*4882a593Smuzhiyun 	}
999*4882a593Smuzhiyun 
1000*4882a593Smuzhiyun 	/*
1001*4882a593Smuzhiyun 	 * URB_ZERO_PACKET means adding a 0-length packet, if direction
1002*4882a593Smuzhiyun 	 * is OUT and the transfer_length was an exact multiple of maxsze,
1003*4882a593Smuzhiyun 	 * hence (len = transfer_length - N * maxsze) == 0
1004*4882a593Smuzhiyun 	 * however, if transfer_length == 0, the zero packet was already
1005*4882a593Smuzhiyun 	 * prepared above.
1006*4882a593Smuzhiyun 	 */
1007*4882a593Smuzhiyun 	if ((urb->transfer_flags & URB_ZERO_PACKET) &&
1008*4882a593Smuzhiyun 			usb_pipeout(urb->pipe) && len == 0 &&
1009*4882a593Smuzhiyun 			urb->transfer_buffer_length > 0) {
1010*4882a593Smuzhiyun 		td = uhci_alloc_td(uhci);
1011*4882a593Smuzhiyun 		if (!td)
1012*4882a593Smuzhiyun 			goto nomem;
1013*4882a593Smuzhiyun 		*plink = LINK_TO_TD(uhci, td);
1014*4882a593Smuzhiyun 
1015*4882a593Smuzhiyun 		uhci_add_td_to_urbp(td, urbp);
1016*4882a593Smuzhiyun 		uhci_fill_td(uhci, td, status,
1017*4882a593Smuzhiyun 				destination | uhci_explen(0) |
1018*4882a593Smuzhiyun 					(toggle << TD_TOKEN_TOGGLE_SHIFT),
1019*4882a593Smuzhiyun 				data);
1020*4882a593Smuzhiyun 		plink = &td->link;
1021*4882a593Smuzhiyun 
1022*4882a593Smuzhiyun 		toggle ^= 1;
1023*4882a593Smuzhiyun 	}
1024*4882a593Smuzhiyun 
1025*4882a593Smuzhiyun 	/* Set the interrupt-on-completion flag on the last packet.
1026*4882a593Smuzhiyun 	 * A more-or-less typical 4 KB URB (= size of one memory page)
1027*4882a593Smuzhiyun 	 * will require about 3 ms to transfer; that's a little on the
1028*4882a593Smuzhiyun 	 * fast side but not enough to justify delaying an interrupt
1029*4882a593Smuzhiyun 	 * more than 2 or 3 URBs, so we will ignore the URB_NO_INTERRUPT
1030*4882a593Smuzhiyun 	 * flag setting. */
1031*4882a593Smuzhiyun 	td->status |= cpu_to_hc32(uhci, TD_CTRL_IOC);
1032*4882a593Smuzhiyun 
1033*4882a593Smuzhiyun 	/*
1034*4882a593Smuzhiyun 	 * Build the new dummy TD and activate the old one
1035*4882a593Smuzhiyun 	 */
1036*4882a593Smuzhiyun 	td = uhci_alloc_td(uhci);
1037*4882a593Smuzhiyun 	if (!td)
1038*4882a593Smuzhiyun 		goto nomem;
1039*4882a593Smuzhiyun 	*plink = LINK_TO_TD(uhci, td);
1040*4882a593Smuzhiyun 
1041*4882a593Smuzhiyun 	uhci_fill_td(uhci, td, 0, USB_PID_OUT | uhci_explen(0), 0);
1042*4882a593Smuzhiyun 	wmb();
1043*4882a593Smuzhiyun 	qh->dummy_td->status |= cpu_to_hc32(uhci, TD_CTRL_ACTIVE);
1044*4882a593Smuzhiyun 	qh->dummy_td = td;
1045*4882a593Smuzhiyun 
1046*4882a593Smuzhiyun 	usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
1047*4882a593Smuzhiyun 			usb_pipeout(urb->pipe), toggle);
1048*4882a593Smuzhiyun 	return 0;
1049*4882a593Smuzhiyun 
1050*4882a593Smuzhiyun nomem:
1051*4882a593Smuzhiyun 	/* Remove the dummy TD from the td_list so it doesn't get freed */
1052*4882a593Smuzhiyun 	uhci_remove_td_from_urbp(qh->dummy_td);
1053*4882a593Smuzhiyun 	return -ENOMEM;
1054*4882a593Smuzhiyun }
1055*4882a593Smuzhiyun 
uhci_submit_bulk(struct uhci_hcd * uhci,struct urb * urb,struct uhci_qh * qh)1056*4882a593Smuzhiyun static int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb,
1057*4882a593Smuzhiyun 		struct uhci_qh *qh)
1058*4882a593Smuzhiyun {
1059*4882a593Smuzhiyun 	int ret;
1060*4882a593Smuzhiyun 
1061*4882a593Smuzhiyun 	/* Can't have low-speed bulk transfers */
1062*4882a593Smuzhiyun 	if (urb->dev->speed == USB_SPEED_LOW)
1063*4882a593Smuzhiyun 		return -EINVAL;
1064*4882a593Smuzhiyun 
1065*4882a593Smuzhiyun 	if (qh->state != QH_STATE_ACTIVE)
1066*4882a593Smuzhiyun 		qh->skel = SKEL_BULK;
1067*4882a593Smuzhiyun 	ret = uhci_submit_common(uhci, urb, qh);
1068*4882a593Smuzhiyun 	if (ret == 0)
1069*4882a593Smuzhiyun 		uhci_add_fsbr(uhci, urb);
1070*4882a593Smuzhiyun 	return ret;
1071*4882a593Smuzhiyun }
1072*4882a593Smuzhiyun 
uhci_submit_interrupt(struct uhci_hcd * uhci,struct urb * urb,struct uhci_qh * qh)1073*4882a593Smuzhiyun static int uhci_submit_interrupt(struct uhci_hcd *uhci, struct urb *urb,
1074*4882a593Smuzhiyun 		struct uhci_qh *qh)
1075*4882a593Smuzhiyun {
1076*4882a593Smuzhiyun 	int ret;
1077*4882a593Smuzhiyun 
1078*4882a593Smuzhiyun 	/* USB 1.1 interrupt transfers only involve one packet per interval.
1079*4882a593Smuzhiyun 	 * Drivers can submit URBs of any length, but longer ones will need
1080*4882a593Smuzhiyun 	 * multiple intervals to complete.
1081*4882a593Smuzhiyun 	 */
1082*4882a593Smuzhiyun 
1083*4882a593Smuzhiyun 	if (!qh->bandwidth_reserved) {
1084*4882a593Smuzhiyun 		int exponent;
1085*4882a593Smuzhiyun 
1086*4882a593Smuzhiyun 		/* Figure out which power-of-two queue to use */
1087*4882a593Smuzhiyun 		for (exponent = 7; exponent >= 0; --exponent) {
1088*4882a593Smuzhiyun 			if ((1 << exponent) <= urb->interval)
1089*4882a593Smuzhiyun 				break;
1090*4882a593Smuzhiyun 		}
1091*4882a593Smuzhiyun 		if (exponent < 0)
1092*4882a593Smuzhiyun 			return -EINVAL;
1093*4882a593Smuzhiyun 
1094*4882a593Smuzhiyun 		/* If the slot is full, try a lower period */
1095*4882a593Smuzhiyun 		do {
1096*4882a593Smuzhiyun 			qh->period = 1 << exponent;
1097*4882a593Smuzhiyun 			qh->skel = SKEL_INDEX(exponent);
1098*4882a593Smuzhiyun 
1099*4882a593Smuzhiyun 			/* For now, interrupt phase is fixed by the layout
1100*4882a593Smuzhiyun 			 * of the QH lists.
1101*4882a593Smuzhiyun 			 */
1102*4882a593Smuzhiyun 			qh->phase = (qh->period / 2) & (MAX_PHASE - 1);
1103*4882a593Smuzhiyun 			ret = uhci_check_bandwidth(uhci, qh);
1104*4882a593Smuzhiyun 		} while (ret != 0 && --exponent >= 0);
1105*4882a593Smuzhiyun 		if (ret)
1106*4882a593Smuzhiyun 			return ret;
1107*4882a593Smuzhiyun 	} else if (qh->period > urb->interval)
1108*4882a593Smuzhiyun 		return -EINVAL;		/* Can't decrease the period */
1109*4882a593Smuzhiyun 
1110*4882a593Smuzhiyun 	ret = uhci_submit_common(uhci, urb, qh);
1111*4882a593Smuzhiyun 	if (ret == 0) {
1112*4882a593Smuzhiyun 		urb->interval = qh->period;
1113*4882a593Smuzhiyun 		if (!qh->bandwidth_reserved)
1114*4882a593Smuzhiyun 			uhci_reserve_bandwidth(uhci, qh);
1115*4882a593Smuzhiyun 	}
1116*4882a593Smuzhiyun 	return ret;
1117*4882a593Smuzhiyun }
1118*4882a593Smuzhiyun 
1119*4882a593Smuzhiyun /*
1120*4882a593Smuzhiyun  * Fix up the data structures following a short transfer
1121*4882a593Smuzhiyun  */
uhci_fixup_short_transfer(struct uhci_hcd * uhci,struct uhci_qh * qh,struct urb_priv * urbp)1122*4882a593Smuzhiyun static int uhci_fixup_short_transfer(struct uhci_hcd *uhci,
1123*4882a593Smuzhiyun 		struct uhci_qh *qh, struct urb_priv *urbp)
1124*4882a593Smuzhiyun {
1125*4882a593Smuzhiyun 	struct uhci_td *td;
1126*4882a593Smuzhiyun 	struct list_head *tmp;
1127*4882a593Smuzhiyun 	int ret;
1128*4882a593Smuzhiyun 
1129*4882a593Smuzhiyun 	td = list_entry(urbp->td_list.prev, struct uhci_td, list);
1130*4882a593Smuzhiyun 	if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
1131*4882a593Smuzhiyun 
1132*4882a593Smuzhiyun 		/* When a control transfer is short, we have to restart
1133*4882a593Smuzhiyun 		 * the queue at the status stage transaction, which is
1134*4882a593Smuzhiyun 		 * the last TD. */
1135*4882a593Smuzhiyun 		WARN_ON(list_empty(&urbp->td_list));
1136*4882a593Smuzhiyun 		qh->element = LINK_TO_TD(uhci, td);
1137*4882a593Smuzhiyun 		tmp = td->list.prev;
1138*4882a593Smuzhiyun 		ret = -EINPROGRESS;
1139*4882a593Smuzhiyun 
1140*4882a593Smuzhiyun 	} else {
1141*4882a593Smuzhiyun 
1142*4882a593Smuzhiyun 		/* When a bulk/interrupt transfer is short, we have to
1143*4882a593Smuzhiyun 		 * fix up the toggles of the following URBs on the queue
1144*4882a593Smuzhiyun 		 * before restarting the queue at the next URB. */
1145*4882a593Smuzhiyun 		qh->initial_toggle =
1146*4882a593Smuzhiyun 			uhci_toggle(td_token(uhci, qh->post_td)) ^ 1;
1147*4882a593Smuzhiyun 		uhci_fixup_toggles(uhci, qh, 1);
1148*4882a593Smuzhiyun 
1149*4882a593Smuzhiyun 		if (list_empty(&urbp->td_list))
1150*4882a593Smuzhiyun 			td = qh->post_td;
1151*4882a593Smuzhiyun 		qh->element = td->link;
1152*4882a593Smuzhiyun 		tmp = urbp->td_list.prev;
1153*4882a593Smuzhiyun 		ret = 0;
1154*4882a593Smuzhiyun 	}
1155*4882a593Smuzhiyun 
1156*4882a593Smuzhiyun 	/* Remove all the TDs we skipped over, from tmp back to the start */
1157*4882a593Smuzhiyun 	while (tmp != &urbp->td_list) {
1158*4882a593Smuzhiyun 		td = list_entry(tmp, struct uhci_td, list);
1159*4882a593Smuzhiyun 		tmp = tmp->prev;
1160*4882a593Smuzhiyun 
1161*4882a593Smuzhiyun 		uhci_remove_td_from_urbp(td);
1162*4882a593Smuzhiyun 		uhci_free_td(uhci, td);
1163*4882a593Smuzhiyun 	}
1164*4882a593Smuzhiyun 	return ret;
1165*4882a593Smuzhiyun }
1166*4882a593Smuzhiyun 
1167*4882a593Smuzhiyun /*
1168*4882a593Smuzhiyun  * Common result for control, bulk, and interrupt
1169*4882a593Smuzhiyun  */
uhci_result_common(struct uhci_hcd * uhci,struct urb * urb)1170*4882a593Smuzhiyun static int uhci_result_common(struct uhci_hcd *uhci, struct urb *urb)
1171*4882a593Smuzhiyun {
1172*4882a593Smuzhiyun 	struct urb_priv *urbp = urb->hcpriv;
1173*4882a593Smuzhiyun 	struct uhci_qh *qh = urbp->qh;
1174*4882a593Smuzhiyun 	struct uhci_td *td, *tmp;
1175*4882a593Smuzhiyun 	unsigned status;
1176*4882a593Smuzhiyun 	int ret = 0;
1177*4882a593Smuzhiyun 
1178*4882a593Smuzhiyun 	list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
1179*4882a593Smuzhiyun 		unsigned int ctrlstat;
1180*4882a593Smuzhiyun 		int len;
1181*4882a593Smuzhiyun 
1182*4882a593Smuzhiyun 		ctrlstat = td_status(uhci, td);
1183*4882a593Smuzhiyun 		status = uhci_status_bits(ctrlstat);
1184*4882a593Smuzhiyun 		if (status & TD_CTRL_ACTIVE)
1185*4882a593Smuzhiyun 			return -EINPROGRESS;
1186*4882a593Smuzhiyun 
1187*4882a593Smuzhiyun 		len = uhci_actual_length(ctrlstat);
1188*4882a593Smuzhiyun 		urb->actual_length += len;
1189*4882a593Smuzhiyun 
1190*4882a593Smuzhiyun 		if (status) {
1191*4882a593Smuzhiyun 			ret = uhci_map_status(status,
1192*4882a593Smuzhiyun 					uhci_packetout(td_token(uhci, td)));
1193*4882a593Smuzhiyun 			if ((debug == 1 && ret != -EPIPE) || debug > 1) {
1194*4882a593Smuzhiyun 				/* Some debugging code */
1195*4882a593Smuzhiyun 				dev_dbg(&urb->dev->dev,
1196*4882a593Smuzhiyun 						"%s: failed with status %x\n",
1197*4882a593Smuzhiyun 						__func__, status);
1198*4882a593Smuzhiyun 
1199*4882a593Smuzhiyun 				if (debug > 1 && errbuf) {
1200*4882a593Smuzhiyun 					/* Print the chain for debugging */
1201*4882a593Smuzhiyun 					uhci_show_qh(uhci, urbp->qh, errbuf,
1202*4882a593Smuzhiyun 						ERRBUF_LEN - EXTRA_SPACE, 0);
1203*4882a593Smuzhiyun 					lprintk(errbuf);
1204*4882a593Smuzhiyun 				}
1205*4882a593Smuzhiyun 			}
1206*4882a593Smuzhiyun 
1207*4882a593Smuzhiyun 		/* Did we receive a short packet? */
1208*4882a593Smuzhiyun 		} else if (len < uhci_expected_length(td_token(uhci, td))) {
1209*4882a593Smuzhiyun 
1210*4882a593Smuzhiyun 			/* For control transfers, go to the status TD if
1211*4882a593Smuzhiyun 			 * this isn't already the last data TD */
1212*4882a593Smuzhiyun 			if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
1213*4882a593Smuzhiyun 				if (td->list.next != urbp->td_list.prev)
1214*4882a593Smuzhiyun 					ret = 1;
1215*4882a593Smuzhiyun 			}
1216*4882a593Smuzhiyun 
1217*4882a593Smuzhiyun 			/* For bulk and interrupt, this may be an error */
1218*4882a593Smuzhiyun 			else if (urb->transfer_flags & URB_SHORT_NOT_OK)
1219*4882a593Smuzhiyun 				ret = -EREMOTEIO;
1220*4882a593Smuzhiyun 
1221*4882a593Smuzhiyun 			/* Fixup needed only if this isn't the URB's last TD */
1222*4882a593Smuzhiyun 			else if (&td->list != urbp->td_list.prev)
1223*4882a593Smuzhiyun 				ret = 1;
1224*4882a593Smuzhiyun 		}
1225*4882a593Smuzhiyun 
1226*4882a593Smuzhiyun 		uhci_remove_td_from_urbp(td);
1227*4882a593Smuzhiyun 		if (qh->post_td)
1228*4882a593Smuzhiyun 			uhci_free_td(uhci, qh->post_td);
1229*4882a593Smuzhiyun 		qh->post_td = td;
1230*4882a593Smuzhiyun 
1231*4882a593Smuzhiyun 		if (ret != 0)
1232*4882a593Smuzhiyun 			goto err;
1233*4882a593Smuzhiyun 	}
1234*4882a593Smuzhiyun 	return ret;
1235*4882a593Smuzhiyun 
1236*4882a593Smuzhiyun err:
1237*4882a593Smuzhiyun 	if (ret < 0) {
1238*4882a593Smuzhiyun 		/* Note that the queue has stopped and save
1239*4882a593Smuzhiyun 		 * the next toggle value */
1240*4882a593Smuzhiyun 		qh->element = UHCI_PTR_TERM(uhci);
1241*4882a593Smuzhiyun 		qh->is_stopped = 1;
1242*4882a593Smuzhiyun 		qh->needs_fixup = (qh->type != USB_ENDPOINT_XFER_CONTROL);
1243*4882a593Smuzhiyun 		qh->initial_toggle = uhci_toggle(td_token(uhci, td)) ^
1244*4882a593Smuzhiyun 				(ret == -EREMOTEIO);
1245*4882a593Smuzhiyun 
1246*4882a593Smuzhiyun 	} else		/* Short packet received */
1247*4882a593Smuzhiyun 		ret = uhci_fixup_short_transfer(uhci, qh, urbp);
1248*4882a593Smuzhiyun 	return ret;
1249*4882a593Smuzhiyun }
1250*4882a593Smuzhiyun 
1251*4882a593Smuzhiyun /*
1252*4882a593Smuzhiyun  * Isochronous transfers
1253*4882a593Smuzhiyun  */
uhci_submit_isochronous(struct uhci_hcd * uhci,struct urb * urb,struct uhci_qh * qh)1254*4882a593Smuzhiyun static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb,
1255*4882a593Smuzhiyun 		struct uhci_qh *qh)
1256*4882a593Smuzhiyun {
1257*4882a593Smuzhiyun 	struct uhci_td *td = NULL;	/* Since urb->number_of_packets > 0 */
1258*4882a593Smuzhiyun 	int i;
1259*4882a593Smuzhiyun 	unsigned frame, next;
1260*4882a593Smuzhiyun 	unsigned long destination, status;
1261*4882a593Smuzhiyun 	struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
1262*4882a593Smuzhiyun 
1263*4882a593Smuzhiyun 	/* Values must not be too big (could overflow below) */
1264*4882a593Smuzhiyun 	if (urb->interval >= UHCI_NUMFRAMES ||
1265*4882a593Smuzhiyun 			urb->number_of_packets >= UHCI_NUMFRAMES)
1266*4882a593Smuzhiyun 		return -EFBIG;
1267*4882a593Smuzhiyun 
1268*4882a593Smuzhiyun 	uhci_get_current_frame_number(uhci);
1269*4882a593Smuzhiyun 
1270*4882a593Smuzhiyun 	/* Check the period and figure out the starting frame number */
1271*4882a593Smuzhiyun 	if (!qh->bandwidth_reserved) {
1272*4882a593Smuzhiyun 		qh->period = urb->interval;
1273*4882a593Smuzhiyun 		qh->phase = -1;		/* Find the best phase */
1274*4882a593Smuzhiyun 		i = uhci_check_bandwidth(uhci, qh);
1275*4882a593Smuzhiyun 		if (i)
1276*4882a593Smuzhiyun 			return i;
1277*4882a593Smuzhiyun 
1278*4882a593Smuzhiyun 		/* Allow a little time to allocate the TDs */
1279*4882a593Smuzhiyun 		next = uhci->frame_number + 10;
1280*4882a593Smuzhiyun 		frame = qh->phase;
1281*4882a593Smuzhiyun 
1282*4882a593Smuzhiyun 		/* Round up to the first available slot */
1283*4882a593Smuzhiyun 		frame += (next - frame + qh->period - 1) & -qh->period;
1284*4882a593Smuzhiyun 
1285*4882a593Smuzhiyun 	} else if (qh->period != urb->interval) {
1286*4882a593Smuzhiyun 		return -EINVAL;		/* Can't change the period */
1287*4882a593Smuzhiyun 
1288*4882a593Smuzhiyun 	} else {
1289*4882a593Smuzhiyun 		next = uhci->frame_number + 1;
1290*4882a593Smuzhiyun 
1291*4882a593Smuzhiyun 		/* Find the next unused frame */
1292*4882a593Smuzhiyun 		if (list_empty(&qh->queue)) {
1293*4882a593Smuzhiyun 			frame = qh->iso_frame;
1294*4882a593Smuzhiyun 		} else {
1295*4882a593Smuzhiyun 			struct urb *lurb;
1296*4882a593Smuzhiyun 
1297*4882a593Smuzhiyun 			lurb = list_entry(qh->queue.prev,
1298*4882a593Smuzhiyun 					struct urb_priv, node)->urb;
1299*4882a593Smuzhiyun 			frame = lurb->start_frame +
1300*4882a593Smuzhiyun 					lurb->number_of_packets *
1301*4882a593Smuzhiyun 					lurb->interval;
1302*4882a593Smuzhiyun 		}
1303*4882a593Smuzhiyun 
1304*4882a593Smuzhiyun 		/* Fell behind? */
1305*4882a593Smuzhiyun 		if (!uhci_frame_before_eq(next, frame)) {
1306*4882a593Smuzhiyun 
1307*4882a593Smuzhiyun 			/* USB_ISO_ASAP: Round up to the first available slot */
1308*4882a593Smuzhiyun 			if (urb->transfer_flags & URB_ISO_ASAP)
1309*4882a593Smuzhiyun 				frame += (next - frame + qh->period - 1) &
1310*4882a593Smuzhiyun 						-qh->period;
1311*4882a593Smuzhiyun 
1312*4882a593Smuzhiyun 			/*
1313*4882a593Smuzhiyun 			 * Not ASAP: Use the next slot in the stream,
1314*4882a593Smuzhiyun 			 * no matter what.
1315*4882a593Smuzhiyun 			 */
1316*4882a593Smuzhiyun 			else if (!uhci_frame_before_eq(next,
1317*4882a593Smuzhiyun 					frame + (urb->number_of_packets - 1) *
1318*4882a593Smuzhiyun 						qh->period))
1319*4882a593Smuzhiyun 				dev_dbg(uhci_dev(uhci), "iso underrun %p (%u+%u < %u)\n",
1320*4882a593Smuzhiyun 						urb, frame,
1321*4882a593Smuzhiyun 						(urb->number_of_packets - 1) *
1322*4882a593Smuzhiyun 							qh->period,
1323*4882a593Smuzhiyun 						next);
1324*4882a593Smuzhiyun 		}
1325*4882a593Smuzhiyun 	}
1326*4882a593Smuzhiyun 
1327*4882a593Smuzhiyun 	/* Make sure we won't have to go too far into the future */
1328*4882a593Smuzhiyun 	if (uhci_frame_before_eq(uhci->last_iso_frame + UHCI_NUMFRAMES,
1329*4882a593Smuzhiyun 			frame + urb->number_of_packets * urb->interval))
1330*4882a593Smuzhiyun 		return -EFBIG;
1331*4882a593Smuzhiyun 	urb->start_frame = frame;
1332*4882a593Smuzhiyun 
1333*4882a593Smuzhiyun 	status = TD_CTRL_ACTIVE | TD_CTRL_IOS;
1334*4882a593Smuzhiyun 	destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
1335*4882a593Smuzhiyun 
1336*4882a593Smuzhiyun 	for (i = 0; i < urb->number_of_packets; i++) {
1337*4882a593Smuzhiyun 		td = uhci_alloc_td(uhci);
1338*4882a593Smuzhiyun 		if (!td)
1339*4882a593Smuzhiyun 			return -ENOMEM;
1340*4882a593Smuzhiyun 
1341*4882a593Smuzhiyun 		uhci_add_td_to_urbp(td, urbp);
1342*4882a593Smuzhiyun 		uhci_fill_td(uhci, td, status, destination |
1343*4882a593Smuzhiyun 				uhci_explen(urb->iso_frame_desc[i].length),
1344*4882a593Smuzhiyun 				urb->transfer_dma +
1345*4882a593Smuzhiyun 					urb->iso_frame_desc[i].offset);
1346*4882a593Smuzhiyun 	}
1347*4882a593Smuzhiyun 
1348*4882a593Smuzhiyun 	/* Set the interrupt-on-completion flag on the last packet. */
1349*4882a593Smuzhiyun 	td->status |= cpu_to_hc32(uhci, TD_CTRL_IOC);
1350*4882a593Smuzhiyun 
1351*4882a593Smuzhiyun 	/* Add the TDs to the frame list */
1352*4882a593Smuzhiyun 	frame = urb->start_frame;
1353*4882a593Smuzhiyun 	list_for_each_entry(td, &urbp->td_list, list) {
1354*4882a593Smuzhiyun 		uhci_insert_td_in_frame_list(uhci, td, frame);
1355*4882a593Smuzhiyun 		frame += qh->period;
1356*4882a593Smuzhiyun 	}
1357*4882a593Smuzhiyun 
1358*4882a593Smuzhiyun 	if (list_empty(&qh->queue)) {
1359*4882a593Smuzhiyun 		qh->iso_packet_desc = &urb->iso_frame_desc[0];
1360*4882a593Smuzhiyun 		qh->iso_frame = urb->start_frame;
1361*4882a593Smuzhiyun 	}
1362*4882a593Smuzhiyun 
1363*4882a593Smuzhiyun 	qh->skel = SKEL_ISO;
1364*4882a593Smuzhiyun 	if (!qh->bandwidth_reserved)
1365*4882a593Smuzhiyun 		uhci_reserve_bandwidth(uhci, qh);
1366*4882a593Smuzhiyun 	return 0;
1367*4882a593Smuzhiyun }
1368*4882a593Smuzhiyun 
uhci_result_isochronous(struct uhci_hcd * uhci,struct urb * urb)1369*4882a593Smuzhiyun static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb)
1370*4882a593Smuzhiyun {
1371*4882a593Smuzhiyun 	struct uhci_td *td, *tmp;
1372*4882a593Smuzhiyun 	struct urb_priv *urbp = urb->hcpriv;
1373*4882a593Smuzhiyun 	struct uhci_qh *qh = urbp->qh;
1374*4882a593Smuzhiyun 
1375*4882a593Smuzhiyun 	list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
1376*4882a593Smuzhiyun 		unsigned int ctrlstat;
1377*4882a593Smuzhiyun 		int status;
1378*4882a593Smuzhiyun 		int actlength;
1379*4882a593Smuzhiyun 
1380*4882a593Smuzhiyun 		if (uhci_frame_before_eq(uhci->cur_iso_frame, qh->iso_frame))
1381*4882a593Smuzhiyun 			return -EINPROGRESS;
1382*4882a593Smuzhiyun 
1383*4882a593Smuzhiyun 		uhci_remove_tds_from_frame(uhci, qh->iso_frame);
1384*4882a593Smuzhiyun 
1385*4882a593Smuzhiyun 		ctrlstat = td_status(uhci, td);
1386*4882a593Smuzhiyun 		if (ctrlstat & TD_CTRL_ACTIVE) {
1387*4882a593Smuzhiyun 			status = -EXDEV;	/* TD was added too late? */
1388*4882a593Smuzhiyun 		} else {
1389*4882a593Smuzhiyun 			status = uhci_map_status(uhci_status_bits(ctrlstat),
1390*4882a593Smuzhiyun 					usb_pipeout(urb->pipe));
1391*4882a593Smuzhiyun 			actlength = uhci_actual_length(ctrlstat);
1392*4882a593Smuzhiyun 
1393*4882a593Smuzhiyun 			urb->actual_length += actlength;
1394*4882a593Smuzhiyun 			qh->iso_packet_desc->actual_length = actlength;
1395*4882a593Smuzhiyun 			qh->iso_packet_desc->status = status;
1396*4882a593Smuzhiyun 		}
1397*4882a593Smuzhiyun 		if (status)
1398*4882a593Smuzhiyun 			urb->error_count++;
1399*4882a593Smuzhiyun 
1400*4882a593Smuzhiyun 		uhci_remove_td_from_urbp(td);
1401*4882a593Smuzhiyun 		uhci_free_td(uhci, td);
1402*4882a593Smuzhiyun 		qh->iso_frame += qh->period;
1403*4882a593Smuzhiyun 		++qh->iso_packet_desc;
1404*4882a593Smuzhiyun 	}
1405*4882a593Smuzhiyun 	return 0;
1406*4882a593Smuzhiyun }
1407*4882a593Smuzhiyun 
uhci_urb_enqueue(struct usb_hcd * hcd,struct urb * urb,gfp_t mem_flags)1408*4882a593Smuzhiyun static int uhci_urb_enqueue(struct usb_hcd *hcd,
1409*4882a593Smuzhiyun 		struct urb *urb, gfp_t mem_flags)
1410*4882a593Smuzhiyun {
1411*4882a593Smuzhiyun 	int ret;
1412*4882a593Smuzhiyun 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1413*4882a593Smuzhiyun 	unsigned long flags;
1414*4882a593Smuzhiyun 	struct urb_priv *urbp;
1415*4882a593Smuzhiyun 	struct uhci_qh *qh;
1416*4882a593Smuzhiyun 
1417*4882a593Smuzhiyun 	spin_lock_irqsave(&uhci->lock, flags);
1418*4882a593Smuzhiyun 
1419*4882a593Smuzhiyun 	ret = usb_hcd_link_urb_to_ep(hcd, urb);
1420*4882a593Smuzhiyun 	if (ret)
1421*4882a593Smuzhiyun 		goto done_not_linked;
1422*4882a593Smuzhiyun 
1423*4882a593Smuzhiyun 	ret = -ENOMEM;
1424*4882a593Smuzhiyun 	urbp = uhci_alloc_urb_priv(uhci, urb);
1425*4882a593Smuzhiyun 	if (!urbp)
1426*4882a593Smuzhiyun 		goto done;
1427*4882a593Smuzhiyun 
1428*4882a593Smuzhiyun 	if (urb->ep->hcpriv)
1429*4882a593Smuzhiyun 		qh = urb->ep->hcpriv;
1430*4882a593Smuzhiyun 	else {
1431*4882a593Smuzhiyun 		qh = uhci_alloc_qh(uhci, urb->dev, urb->ep);
1432*4882a593Smuzhiyun 		if (!qh)
1433*4882a593Smuzhiyun 			goto err_no_qh;
1434*4882a593Smuzhiyun 	}
1435*4882a593Smuzhiyun 	urbp->qh = qh;
1436*4882a593Smuzhiyun 
1437*4882a593Smuzhiyun 	switch (qh->type) {
1438*4882a593Smuzhiyun 	case USB_ENDPOINT_XFER_CONTROL:
1439*4882a593Smuzhiyun 		ret = uhci_submit_control(uhci, urb, qh);
1440*4882a593Smuzhiyun 		break;
1441*4882a593Smuzhiyun 	case USB_ENDPOINT_XFER_BULK:
1442*4882a593Smuzhiyun 		ret = uhci_submit_bulk(uhci, urb, qh);
1443*4882a593Smuzhiyun 		break;
1444*4882a593Smuzhiyun 	case USB_ENDPOINT_XFER_INT:
1445*4882a593Smuzhiyun 		ret = uhci_submit_interrupt(uhci, urb, qh);
1446*4882a593Smuzhiyun 		break;
1447*4882a593Smuzhiyun 	case USB_ENDPOINT_XFER_ISOC:
1448*4882a593Smuzhiyun 		urb->error_count = 0;
1449*4882a593Smuzhiyun 		ret = uhci_submit_isochronous(uhci, urb, qh);
1450*4882a593Smuzhiyun 		break;
1451*4882a593Smuzhiyun 	}
1452*4882a593Smuzhiyun 	if (ret != 0)
1453*4882a593Smuzhiyun 		goto err_submit_failed;
1454*4882a593Smuzhiyun 
1455*4882a593Smuzhiyun 	/* Add this URB to the QH */
1456*4882a593Smuzhiyun 	list_add_tail(&urbp->node, &qh->queue);
1457*4882a593Smuzhiyun 
1458*4882a593Smuzhiyun 	/* If the new URB is the first and only one on this QH then either
1459*4882a593Smuzhiyun 	 * the QH is new and idle or else it's unlinked and waiting to
1460*4882a593Smuzhiyun 	 * become idle, so we can activate it right away.  But only if the
1461*4882a593Smuzhiyun 	 * queue isn't stopped. */
1462*4882a593Smuzhiyun 	if (qh->queue.next == &urbp->node && !qh->is_stopped) {
1463*4882a593Smuzhiyun 		uhci_activate_qh(uhci, qh);
1464*4882a593Smuzhiyun 		uhci_urbp_wants_fsbr(uhci, urbp);
1465*4882a593Smuzhiyun 	}
1466*4882a593Smuzhiyun 	goto done;
1467*4882a593Smuzhiyun 
1468*4882a593Smuzhiyun err_submit_failed:
1469*4882a593Smuzhiyun 	if (qh->state == QH_STATE_IDLE)
1470*4882a593Smuzhiyun 		uhci_make_qh_idle(uhci, qh);	/* Reclaim unused QH */
1471*4882a593Smuzhiyun err_no_qh:
1472*4882a593Smuzhiyun 	uhci_free_urb_priv(uhci, urbp);
1473*4882a593Smuzhiyun done:
1474*4882a593Smuzhiyun 	if (ret)
1475*4882a593Smuzhiyun 		usb_hcd_unlink_urb_from_ep(hcd, urb);
1476*4882a593Smuzhiyun done_not_linked:
1477*4882a593Smuzhiyun 	spin_unlock_irqrestore(&uhci->lock, flags);
1478*4882a593Smuzhiyun 	return ret;
1479*4882a593Smuzhiyun }
1480*4882a593Smuzhiyun 
uhci_urb_dequeue(struct usb_hcd * hcd,struct urb * urb,int status)1481*4882a593Smuzhiyun static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1482*4882a593Smuzhiyun {
1483*4882a593Smuzhiyun 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1484*4882a593Smuzhiyun 	unsigned long flags;
1485*4882a593Smuzhiyun 	struct uhci_qh *qh;
1486*4882a593Smuzhiyun 	int rc;
1487*4882a593Smuzhiyun 
1488*4882a593Smuzhiyun 	spin_lock_irqsave(&uhci->lock, flags);
1489*4882a593Smuzhiyun 	rc = usb_hcd_check_unlink_urb(hcd, urb, status);
1490*4882a593Smuzhiyun 	if (rc)
1491*4882a593Smuzhiyun 		goto done;
1492*4882a593Smuzhiyun 
1493*4882a593Smuzhiyun 	qh = ((struct urb_priv *) urb->hcpriv)->qh;
1494*4882a593Smuzhiyun 
1495*4882a593Smuzhiyun 	/* Remove Isochronous TDs from the frame list ASAP */
1496*4882a593Smuzhiyun 	if (qh->type == USB_ENDPOINT_XFER_ISOC) {
1497*4882a593Smuzhiyun 		uhci_unlink_isochronous_tds(uhci, urb);
1498*4882a593Smuzhiyun 		mb();
1499*4882a593Smuzhiyun 
1500*4882a593Smuzhiyun 		/* If the URB has already started, update the QH unlink time */
1501*4882a593Smuzhiyun 		uhci_get_current_frame_number(uhci);
1502*4882a593Smuzhiyun 		if (uhci_frame_before_eq(urb->start_frame, uhci->frame_number))
1503*4882a593Smuzhiyun 			qh->unlink_frame = uhci->frame_number;
1504*4882a593Smuzhiyun 	}
1505*4882a593Smuzhiyun 
1506*4882a593Smuzhiyun 	uhci_unlink_qh(uhci, qh);
1507*4882a593Smuzhiyun 
1508*4882a593Smuzhiyun done:
1509*4882a593Smuzhiyun 	spin_unlock_irqrestore(&uhci->lock, flags);
1510*4882a593Smuzhiyun 	return rc;
1511*4882a593Smuzhiyun }
1512*4882a593Smuzhiyun 
1513*4882a593Smuzhiyun /*
1514*4882a593Smuzhiyun  * Finish unlinking an URB and give it back
1515*4882a593Smuzhiyun  */
uhci_giveback_urb(struct uhci_hcd * uhci,struct uhci_qh * qh,struct urb * urb,int status)1516*4882a593Smuzhiyun static void uhci_giveback_urb(struct uhci_hcd *uhci, struct uhci_qh *qh,
1517*4882a593Smuzhiyun 		struct urb *urb, int status)
1518*4882a593Smuzhiyun __releases(uhci->lock)
1519*4882a593Smuzhiyun __acquires(uhci->lock)
1520*4882a593Smuzhiyun {
1521*4882a593Smuzhiyun 	struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
1522*4882a593Smuzhiyun 
1523*4882a593Smuzhiyun 	if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
1524*4882a593Smuzhiyun 
1525*4882a593Smuzhiyun 		/* Subtract off the length of the SETUP packet from
1526*4882a593Smuzhiyun 		 * urb->actual_length.
1527*4882a593Smuzhiyun 		 */
1528*4882a593Smuzhiyun 		urb->actual_length -= min_t(u32, 8, urb->actual_length);
1529*4882a593Smuzhiyun 	}
1530*4882a593Smuzhiyun 
1531*4882a593Smuzhiyun 	/* When giving back the first URB in an Isochronous queue,
1532*4882a593Smuzhiyun 	 * reinitialize the QH's iso-related members for the next URB. */
1533*4882a593Smuzhiyun 	else if (qh->type == USB_ENDPOINT_XFER_ISOC &&
1534*4882a593Smuzhiyun 			urbp->node.prev == &qh->queue &&
1535*4882a593Smuzhiyun 			urbp->node.next != &qh->queue) {
1536*4882a593Smuzhiyun 		struct urb *nurb = list_entry(urbp->node.next,
1537*4882a593Smuzhiyun 				struct urb_priv, node)->urb;
1538*4882a593Smuzhiyun 
1539*4882a593Smuzhiyun 		qh->iso_packet_desc = &nurb->iso_frame_desc[0];
1540*4882a593Smuzhiyun 		qh->iso_frame = nurb->start_frame;
1541*4882a593Smuzhiyun 	}
1542*4882a593Smuzhiyun 
1543*4882a593Smuzhiyun 	/* Take the URB off the QH's queue.  If the queue is now empty,
1544*4882a593Smuzhiyun 	 * this is a perfect time for a toggle fixup. */
1545*4882a593Smuzhiyun 	list_del_init(&urbp->node);
1546*4882a593Smuzhiyun 	if (list_empty(&qh->queue) && qh->needs_fixup) {
1547*4882a593Smuzhiyun 		usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
1548*4882a593Smuzhiyun 				usb_pipeout(urb->pipe), qh->initial_toggle);
1549*4882a593Smuzhiyun 		qh->needs_fixup = 0;
1550*4882a593Smuzhiyun 	}
1551*4882a593Smuzhiyun 
1552*4882a593Smuzhiyun 	uhci_free_urb_priv(uhci, urbp);
1553*4882a593Smuzhiyun 	usb_hcd_unlink_urb_from_ep(uhci_to_hcd(uhci), urb);
1554*4882a593Smuzhiyun 
1555*4882a593Smuzhiyun 	spin_unlock(&uhci->lock);
1556*4882a593Smuzhiyun 	usb_hcd_giveback_urb(uhci_to_hcd(uhci), urb, status);
1557*4882a593Smuzhiyun 	spin_lock(&uhci->lock);
1558*4882a593Smuzhiyun 
1559*4882a593Smuzhiyun 	/* If the queue is now empty, we can unlink the QH and give up its
1560*4882a593Smuzhiyun 	 * reserved bandwidth. */
1561*4882a593Smuzhiyun 	if (list_empty(&qh->queue)) {
1562*4882a593Smuzhiyun 		uhci_unlink_qh(uhci, qh);
1563*4882a593Smuzhiyun 		if (qh->bandwidth_reserved)
1564*4882a593Smuzhiyun 			uhci_release_bandwidth(uhci, qh);
1565*4882a593Smuzhiyun 	}
1566*4882a593Smuzhiyun }
1567*4882a593Smuzhiyun 
1568*4882a593Smuzhiyun /*
1569*4882a593Smuzhiyun  * Scan the URBs in a QH's queue
1570*4882a593Smuzhiyun  */
1571*4882a593Smuzhiyun #define QH_FINISHED_UNLINKING(qh)			\
1572*4882a593Smuzhiyun 		(qh->state == QH_STATE_UNLINKING &&	\
1573*4882a593Smuzhiyun 		uhci->frame_number + uhci->is_stopped != qh->unlink_frame)
1574*4882a593Smuzhiyun 
uhci_scan_qh(struct uhci_hcd * uhci,struct uhci_qh * qh)1575*4882a593Smuzhiyun static void uhci_scan_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
1576*4882a593Smuzhiyun {
1577*4882a593Smuzhiyun 	struct urb_priv *urbp;
1578*4882a593Smuzhiyun 	struct urb *urb;
1579*4882a593Smuzhiyun 	int status;
1580*4882a593Smuzhiyun 
1581*4882a593Smuzhiyun 	while (!list_empty(&qh->queue)) {
1582*4882a593Smuzhiyun 		urbp = list_entry(qh->queue.next, struct urb_priv, node);
1583*4882a593Smuzhiyun 		urb = urbp->urb;
1584*4882a593Smuzhiyun 
1585*4882a593Smuzhiyun 		if (qh->type == USB_ENDPOINT_XFER_ISOC)
1586*4882a593Smuzhiyun 			status = uhci_result_isochronous(uhci, urb);
1587*4882a593Smuzhiyun 		else
1588*4882a593Smuzhiyun 			status = uhci_result_common(uhci, urb);
1589*4882a593Smuzhiyun 		if (status == -EINPROGRESS)
1590*4882a593Smuzhiyun 			break;
1591*4882a593Smuzhiyun 
1592*4882a593Smuzhiyun 		/* Dequeued but completed URBs can't be given back unless
1593*4882a593Smuzhiyun 		 * the QH is stopped or has finished unlinking. */
1594*4882a593Smuzhiyun 		if (urb->unlinked) {
1595*4882a593Smuzhiyun 			if (QH_FINISHED_UNLINKING(qh))
1596*4882a593Smuzhiyun 				qh->is_stopped = 1;
1597*4882a593Smuzhiyun 			else if (!qh->is_stopped)
1598*4882a593Smuzhiyun 				return;
1599*4882a593Smuzhiyun 		}
1600*4882a593Smuzhiyun 
1601*4882a593Smuzhiyun 		uhci_giveback_urb(uhci, qh, urb, status);
1602*4882a593Smuzhiyun 		if (status < 0)
1603*4882a593Smuzhiyun 			break;
1604*4882a593Smuzhiyun 	}
1605*4882a593Smuzhiyun 
1606*4882a593Smuzhiyun 	/* If the QH is neither stopped nor finished unlinking (normal case),
1607*4882a593Smuzhiyun 	 * our work here is done. */
1608*4882a593Smuzhiyun 	if (QH_FINISHED_UNLINKING(qh))
1609*4882a593Smuzhiyun 		qh->is_stopped = 1;
1610*4882a593Smuzhiyun 	else if (!qh->is_stopped)
1611*4882a593Smuzhiyun 		return;
1612*4882a593Smuzhiyun 
1613*4882a593Smuzhiyun 	/* Otherwise give back each of the dequeued URBs */
1614*4882a593Smuzhiyun restart:
1615*4882a593Smuzhiyun 	list_for_each_entry(urbp, &qh->queue, node) {
1616*4882a593Smuzhiyun 		urb = urbp->urb;
1617*4882a593Smuzhiyun 		if (urb->unlinked) {
1618*4882a593Smuzhiyun 
1619*4882a593Smuzhiyun 			/* Fix up the TD links and save the toggles for
1620*4882a593Smuzhiyun 			 * non-Isochronous queues.  For Isochronous queues,
1621*4882a593Smuzhiyun 			 * test for too-recent dequeues. */
1622*4882a593Smuzhiyun 			if (!uhci_cleanup_queue(uhci, qh, urb)) {
1623*4882a593Smuzhiyun 				qh->is_stopped = 0;
1624*4882a593Smuzhiyun 				return;
1625*4882a593Smuzhiyun 			}
1626*4882a593Smuzhiyun 			uhci_giveback_urb(uhci, qh, urb, 0);
1627*4882a593Smuzhiyun 			goto restart;
1628*4882a593Smuzhiyun 		}
1629*4882a593Smuzhiyun 	}
1630*4882a593Smuzhiyun 	qh->is_stopped = 0;
1631*4882a593Smuzhiyun 
1632*4882a593Smuzhiyun 	/* There are no more dequeued URBs.  If there are still URBs on the
1633*4882a593Smuzhiyun 	 * queue, the QH can now be re-activated. */
1634*4882a593Smuzhiyun 	if (!list_empty(&qh->queue)) {
1635*4882a593Smuzhiyun 		if (qh->needs_fixup)
1636*4882a593Smuzhiyun 			uhci_fixup_toggles(uhci, qh, 0);
1637*4882a593Smuzhiyun 
1638*4882a593Smuzhiyun 		/* If the first URB on the queue wants FSBR but its time
1639*4882a593Smuzhiyun 		 * limit has expired, set the next TD to interrupt on
1640*4882a593Smuzhiyun 		 * completion before reactivating the QH. */
1641*4882a593Smuzhiyun 		urbp = list_entry(qh->queue.next, struct urb_priv, node);
1642*4882a593Smuzhiyun 		if (urbp->fsbr && qh->wait_expired) {
1643*4882a593Smuzhiyun 			struct uhci_td *td = list_entry(urbp->td_list.next,
1644*4882a593Smuzhiyun 					struct uhci_td, list);
1645*4882a593Smuzhiyun 
1646*4882a593Smuzhiyun 			td->status |= cpu_to_hc32(uhci, TD_CTRL_IOC);
1647*4882a593Smuzhiyun 		}
1648*4882a593Smuzhiyun 
1649*4882a593Smuzhiyun 		uhci_activate_qh(uhci, qh);
1650*4882a593Smuzhiyun 	}
1651*4882a593Smuzhiyun 
1652*4882a593Smuzhiyun 	/* The queue is empty.  The QH can become idle if it is fully
1653*4882a593Smuzhiyun 	 * unlinked. */
1654*4882a593Smuzhiyun 	else if (QH_FINISHED_UNLINKING(qh))
1655*4882a593Smuzhiyun 		uhci_make_qh_idle(uhci, qh);
1656*4882a593Smuzhiyun }
1657*4882a593Smuzhiyun 
1658*4882a593Smuzhiyun /*
1659*4882a593Smuzhiyun  * Check for queues that have made some forward progress.
1660*4882a593Smuzhiyun  * Returns 0 if the queue is not Isochronous, is ACTIVE, and
1661*4882a593Smuzhiyun  * has not advanced since last examined; 1 otherwise.
1662*4882a593Smuzhiyun  *
1663*4882a593Smuzhiyun  * Early Intel controllers have a bug which causes qh->element sometimes
1664*4882a593Smuzhiyun  * not to advance when a TD completes successfully.  The queue remains
1665*4882a593Smuzhiyun  * stuck on the inactive completed TD.  We detect such cases and advance
1666*4882a593Smuzhiyun  * the element pointer by hand.
1667*4882a593Smuzhiyun  */
uhci_advance_check(struct uhci_hcd * uhci,struct uhci_qh * qh)1668*4882a593Smuzhiyun static int uhci_advance_check(struct uhci_hcd *uhci, struct uhci_qh *qh)
1669*4882a593Smuzhiyun {
1670*4882a593Smuzhiyun 	struct urb_priv *urbp = NULL;
1671*4882a593Smuzhiyun 	struct uhci_td *td;
1672*4882a593Smuzhiyun 	int ret = 1;
1673*4882a593Smuzhiyun 	unsigned status;
1674*4882a593Smuzhiyun 
1675*4882a593Smuzhiyun 	if (qh->type == USB_ENDPOINT_XFER_ISOC)
1676*4882a593Smuzhiyun 		goto done;
1677*4882a593Smuzhiyun 
1678*4882a593Smuzhiyun 	/* Treat an UNLINKING queue as though it hasn't advanced.
1679*4882a593Smuzhiyun 	 * This is okay because reactivation will treat it as though
1680*4882a593Smuzhiyun 	 * it has advanced, and if it is going to become IDLE then
1681*4882a593Smuzhiyun 	 * this doesn't matter anyway.  Furthermore it's possible
1682*4882a593Smuzhiyun 	 * for an UNLINKING queue not to have any URBs at all, or
1683*4882a593Smuzhiyun 	 * for its first URB not to have any TDs (if it was dequeued
1684*4882a593Smuzhiyun 	 * just as it completed).  So it's not easy in any case to
1685*4882a593Smuzhiyun 	 * test whether such queues have advanced. */
1686*4882a593Smuzhiyun 	if (qh->state != QH_STATE_ACTIVE) {
1687*4882a593Smuzhiyun 		urbp = NULL;
1688*4882a593Smuzhiyun 		status = 0;
1689*4882a593Smuzhiyun 
1690*4882a593Smuzhiyun 	} else {
1691*4882a593Smuzhiyun 		urbp = list_entry(qh->queue.next, struct urb_priv, node);
1692*4882a593Smuzhiyun 		td = list_entry(urbp->td_list.next, struct uhci_td, list);
1693*4882a593Smuzhiyun 		status = td_status(uhci, td);
1694*4882a593Smuzhiyun 		if (!(status & TD_CTRL_ACTIVE)) {
1695*4882a593Smuzhiyun 
1696*4882a593Smuzhiyun 			/* We're okay, the queue has advanced */
1697*4882a593Smuzhiyun 			qh->wait_expired = 0;
1698*4882a593Smuzhiyun 			qh->advance_jiffies = jiffies;
1699*4882a593Smuzhiyun 			goto done;
1700*4882a593Smuzhiyun 		}
1701*4882a593Smuzhiyun 		ret = uhci->is_stopped;
1702*4882a593Smuzhiyun 	}
1703*4882a593Smuzhiyun 
1704*4882a593Smuzhiyun 	/* The queue hasn't advanced; check for timeout */
1705*4882a593Smuzhiyun 	if (qh->wait_expired)
1706*4882a593Smuzhiyun 		goto done;
1707*4882a593Smuzhiyun 
1708*4882a593Smuzhiyun 	if (time_after(jiffies, qh->advance_jiffies + QH_WAIT_TIMEOUT)) {
1709*4882a593Smuzhiyun 
1710*4882a593Smuzhiyun 		/* Detect the Intel bug and work around it */
1711*4882a593Smuzhiyun 		if (qh->post_td && qh_element(qh) ==
1712*4882a593Smuzhiyun 			LINK_TO_TD(uhci, qh->post_td)) {
1713*4882a593Smuzhiyun 			qh->element = qh->post_td->link;
1714*4882a593Smuzhiyun 			qh->advance_jiffies = jiffies;
1715*4882a593Smuzhiyun 			ret = 1;
1716*4882a593Smuzhiyun 			goto done;
1717*4882a593Smuzhiyun 		}
1718*4882a593Smuzhiyun 
1719*4882a593Smuzhiyun 		qh->wait_expired = 1;
1720*4882a593Smuzhiyun 
1721*4882a593Smuzhiyun 		/* If the current URB wants FSBR, unlink it temporarily
1722*4882a593Smuzhiyun 		 * so that we can safely set the next TD to interrupt on
1723*4882a593Smuzhiyun 		 * completion.  That way we'll know as soon as the queue
1724*4882a593Smuzhiyun 		 * starts moving again. */
1725*4882a593Smuzhiyun 		if (urbp && urbp->fsbr && !(status & TD_CTRL_IOC))
1726*4882a593Smuzhiyun 			uhci_unlink_qh(uhci, qh);
1727*4882a593Smuzhiyun 
1728*4882a593Smuzhiyun 	} else {
1729*4882a593Smuzhiyun 		/* Unmoving but not-yet-expired queues keep FSBR alive */
1730*4882a593Smuzhiyun 		if (urbp)
1731*4882a593Smuzhiyun 			uhci_urbp_wants_fsbr(uhci, urbp);
1732*4882a593Smuzhiyun 	}
1733*4882a593Smuzhiyun 
1734*4882a593Smuzhiyun done:
1735*4882a593Smuzhiyun 	return ret;
1736*4882a593Smuzhiyun }
1737*4882a593Smuzhiyun 
1738*4882a593Smuzhiyun /*
1739*4882a593Smuzhiyun  * Process events in the schedule, but only in one thread at a time
1740*4882a593Smuzhiyun  */
uhci_scan_schedule(struct uhci_hcd * uhci)1741*4882a593Smuzhiyun static void uhci_scan_schedule(struct uhci_hcd *uhci)
1742*4882a593Smuzhiyun {
1743*4882a593Smuzhiyun 	int i;
1744*4882a593Smuzhiyun 	struct uhci_qh *qh;
1745*4882a593Smuzhiyun 
1746*4882a593Smuzhiyun 	/* Don't allow re-entrant calls */
1747*4882a593Smuzhiyun 	if (uhci->scan_in_progress) {
1748*4882a593Smuzhiyun 		uhci->need_rescan = 1;
1749*4882a593Smuzhiyun 		return;
1750*4882a593Smuzhiyun 	}
1751*4882a593Smuzhiyun 	uhci->scan_in_progress = 1;
1752*4882a593Smuzhiyun rescan:
1753*4882a593Smuzhiyun 	uhci->need_rescan = 0;
1754*4882a593Smuzhiyun 	uhci->fsbr_is_wanted = 0;
1755*4882a593Smuzhiyun 
1756*4882a593Smuzhiyun 	uhci_clear_next_interrupt(uhci);
1757*4882a593Smuzhiyun 	uhci_get_current_frame_number(uhci);
1758*4882a593Smuzhiyun 	uhci->cur_iso_frame = uhci->frame_number;
1759*4882a593Smuzhiyun 
1760*4882a593Smuzhiyun 	/* Go through all the QH queues and process the URBs in each one */
1761*4882a593Smuzhiyun 	for (i = 0; i < UHCI_NUM_SKELQH - 1; ++i) {
1762*4882a593Smuzhiyun 		uhci->next_qh = list_entry(uhci->skelqh[i]->node.next,
1763*4882a593Smuzhiyun 				struct uhci_qh, node);
1764*4882a593Smuzhiyun 		while ((qh = uhci->next_qh) != uhci->skelqh[i]) {
1765*4882a593Smuzhiyun 			uhci->next_qh = list_entry(qh->node.next,
1766*4882a593Smuzhiyun 					struct uhci_qh, node);
1767*4882a593Smuzhiyun 
1768*4882a593Smuzhiyun 			if (uhci_advance_check(uhci, qh)) {
1769*4882a593Smuzhiyun 				uhci_scan_qh(uhci, qh);
1770*4882a593Smuzhiyun 				if (qh->state == QH_STATE_ACTIVE) {
1771*4882a593Smuzhiyun 					uhci_urbp_wants_fsbr(uhci,
1772*4882a593Smuzhiyun 	list_entry(qh->queue.next, struct urb_priv, node));
1773*4882a593Smuzhiyun 				}
1774*4882a593Smuzhiyun 			}
1775*4882a593Smuzhiyun 		}
1776*4882a593Smuzhiyun 	}
1777*4882a593Smuzhiyun 
1778*4882a593Smuzhiyun 	uhci->last_iso_frame = uhci->cur_iso_frame;
1779*4882a593Smuzhiyun 	if (uhci->need_rescan)
1780*4882a593Smuzhiyun 		goto rescan;
1781*4882a593Smuzhiyun 	uhci->scan_in_progress = 0;
1782*4882a593Smuzhiyun 
1783*4882a593Smuzhiyun 	if (uhci->fsbr_is_on && !uhci->fsbr_is_wanted &&
1784*4882a593Smuzhiyun 			!uhci->fsbr_expiring) {
1785*4882a593Smuzhiyun 		uhci->fsbr_expiring = 1;
1786*4882a593Smuzhiyun 		mod_timer(&uhci->fsbr_timer, jiffies + FSBR_OFF_DELAY);
1787*4882a593Smuzhiyun 	}
1788*4882a593Smuzhiyun 
1789*4882a593Smuzhiyun 	if (list_empty(&uhci->skel_unlink_qh->node))
1790*4882a593Smuzhiyun 		uhci_clear_next_interrupt(uhci);
1791*4882a593Smuzhiyun 	else
1792*4882a593Smuzhiyun 		uhci_set_next_interrupt(uhci);
1793*4882a593Smuzhiyun }
1794