1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * UHCI HCD (Host Controller Driver) PCI Bus Glue.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Extracted from uhci-hcd.c:
6*4882a593Smuzhiyun * Maintainer: Alan Stern <stern@rowland.harvard.edu>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * (C) Copyright 1999 Linus Torvalds
9*4882a593Smuzhiyun * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
10*4882a593Smuzhiyun * (C) Copyright 1999 Randy Dunlap
11*4882a593Smuzhiyun * (C) Copyright 1999 Georg Acher, acher@in.tum.de
12*4882a593Smuzhiyun * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
13*4882a593Smuzhiyun * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
14*4882a593Smuzhiyun * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
15*4882a593Smuzhiyun * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
16*4882a593Smuzhiyun * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
17*4882a593Smuzhiyun * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
18*4882a593Smuzhiyun * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
19*4882a593Smuzhiyun */
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include "pci-quirks.h"
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun /*
24*4882a593Smuzhiyun * Make sure the controller is completely inactive, unable to
25*4882a593Smuzhiyun * generate interrupts or do DMA.
26*4882a593Smuzhiyun */
uhci_pci_reset_hc(struct uhci_hcd * uhci)27*4882a593Smuzhiyun static void uhci_pci_reset_hc(struct uhci_hcd *uhci)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /*
33*4882a593Smuzhiyun * Initialize a controller that was newly discovered or has just been
34*4882a593Smuzhiyun * resumed. In either case we can't be sure of its previous state.
35*4882a593Smuzhiyun *
36*4882a593Smuzhiyun * Returns: 1 if the controller was reset, 0 otherwise.
37*4882a593Smuzhiyun */
uhci_pci_check_and_reset_hc(struct uhci_hcd * uhci)38*4882a593Smuzhiyun static int uhci_pci_check_and_reset_hc(struct uhci_hcd *uhci)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun return uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)),
41*4882a593Smuzhiyun uhci->io_addr);
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun /*
45*4882a593Smuzhiyun * Store the basic register settings needed by the controller.
46*4882a593Smuzhiyun * This function is called at the end of configure_hc in uhci-hcd.c.
47*4882a593Smuzhiyun */
uhci_pci_configure_hc(struct uhci_hcd * uhci)48*4882a593Smuzhiyun static void uhci_pci_configure_hc(struct uhci_hcd *uhci)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun /* Enable PIRQ */
53*4882a593Smuzhiyun pci_write_config_word(pdev, USBLEGSUP, USBLEGSUP_DEFAULT);
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /* Disable platform-specific non-PME# wakeup */
56*4882a593Smuzhiyun if (pdev->vendor == PCI_VENDOR_ID_INTEL)
57*4882a593Smuzhiyun pci_write_config_byte(pdev, USBRES_INTEL, 0);
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
uhci_pci_resume_detect_interrupts_are_broken(struct uhci_hcd * uhci)60*4882a593Smuzhiyun static int uhci_pci_resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun int port;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun switch (to_pci_dev(uhci_dev(uhci))->vendor) {
65*4882a593Smuzhiyun default:
66*4882a593Smuzhiyun break;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun case PCI_VENDOR_ID_GENESYS:
69*4882a593Smuzhiyun /* Genesys Logic's GL880S controllers don't generate
70*4882a593Smuzhiyun * resume-detect interrupts.
71*4882a593Smuzhiyun */
72*4882a593Smuzhiyun return 1;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun case PCI_VENDOR_ID_INTEL:
75*4882a593Smuzhiyun /* Some of Intel's USB controllers have a bug that causes
76*4882a593Smuzhiyun * resume-detect interrupts if any port has an over-current
77*4882a593Smuzhiyun * condition. To make matters worse, some motherboards
78*4882a593Smuzhiyun * hardwire unused USB ports' over-current inputs active!
79*4882a593Smuzhiyun * To prevent problems, we will not enable resume-detect
80*4882a593Smuzhiyun * interrupts if any ports are OC.
81*4882a593Smuzhiyun */
82*4882a593Smuzhiyun for (port = 0; port < uhci->rh_numports; ++port) {
83*4882a593Smuzhiyun if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
84*4882a593Smuzhiyun USBPORTSC_OC)
85*4882a593Smuzhiyun return 1;
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun break;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun return 0;
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
uhci_pci_global_suspend_mode_is_broken(struct uhci_hcd * uhci)92*4882a593Smuzhiyun static int uhci_pci_global_suspend_mode_is_broken(struct uhci_hcd *uhci)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun int port;
95*4882a593Smuzhiyun const char *sys_info;
96*4882a593Smuzhiyun static const char bad_Asus_board[] = "A7V8X";
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun /* One of Asus's motherboards has a bug which causes it to
99*4882a593Smuzhiyun * wake up immediately from suspend-to-RAM if any of the ports
100*4882a593Smuzhiyun * are connected. In such cases we will not set EGSM.
101*4882a593Smuzhiyun */
102*4882a593Smuzhiyun sys_info = dmi_get_system_info(DMI_BOARD_NAME);
103*4882a593Smuzhiyun if (sys_info && !strcmp(sys_info, bad_Asus_board)) {
104*4882a593Smuzhiyun for (port = 0; port < uhci->rh_numports; ++port) {
105*4882a593Smuzhiyun if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
106*4882a593Smuzhiyun USBPORTSC_CCS)
107*4882a593Smuzhiyun return 1;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun return 0;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
uhci_pci_init(struct usb_hcd * hcd)114*4882a593Smuzhiyun static int uhci_pci_init(struct usb_hcd *hcd)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun struct uhci_hcd *uhci = hcd_to_uhci(hcd);
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun uhci->io_addr = (unsigned long) hcd->rsrc_start;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun uhci->rh_numports = uhci_count_ports(hcd);
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun /* Intel controllers report the OverCurrent bit active on.
123*4882a593Smuzhiyun * VIA controllers report it active off, so we'll adjust the
124*4882a593Smuzhiyun * bit value. (It's not standardized in the UHCI spec.)
125*4882a593Smuzhiyun */
126*4882a593Smuzhiyun if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_VIA)
127*4882a593Smuzhiyun uhci->oc_low = 1;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun /* HP's server management chip requires a longer port reset delay. */
130*4882a593Smuzhiyun if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_HP)
131*4882a593Smuzhiyun uhci->wait_for_hp = 1;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun /* Intel controllers use non-PME wakeup signalling */
134*4882a593Smuzhiyun if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_INTEL)
135*4882a593Smuzhiyun device_set_wakeup_capable(uhci_dev(uhci), true);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun /* Set up pointers to PCI-specific functions */
138*4882a593Smuzhiyun uhci->reset_hc = uhci_pci_reset_hc;
139*4882a593Smuzhiyun uhci->check_and_reset_hc = uhci_pci_check_and_reset_hc;
140*4882a593Smuzhiyun uhci->configure_hc = uhci_pci_configure_hc;
141*4882a593Smuzhiyun uhci->resume_detect_interrupts_are_broken =
142*4882a593Smuzhiyun uhci_pci_resume_detect_interrupts_are_broken;
143*4882a593Smuzhiyun uhci->global_suspend_mode_is_broken =
144*4882a593Smuzhiyun uhci_pci_global_suspend_mode_is_broken;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun /* Kick BIOS off this hardware and reset if the controller
148*4882a593Smuzhiyun * isn't already safely quiescent.
149*4882a593Smuzhiyun */
150*4882a593Smuzhiyun check_and_reset_hc(uhci);
151*4882a593Smuzhiyun return 0;
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun /* Make sure the controller is quiescent and that we're not using it
155*4882a593Smuzhiyun * any more. This is mainly for the benefit of programs which, like kexec,
156*4882a593Smuzhiyun * expect the hardware to be idle: not doing DMA or generating IRQs.
157*4882a593Smuzhiyun *
158*4882a593Smuzhiyun * This routine may be called in a damaged or failing kernel. Hence we
159*4882a593Smuzhiyun * do not acquire the spinlock before shutting down the controller.
160*4882a593Smuzhiyun */
uhci_shutdown(struct pci_dev * pdev)161*4882a593Smuzhiyun static void uhci_shutdown(struct pci_dev *pdev)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun struct usb_hcd *hcd = pci_get_drvdata(pdev);
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun uhci_hc_died(hcd_to_uhci(hcd));
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun #ifdef CONFIG_PM
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated);
171*4882a593Smuzhiyun
uhci_pci_suspend(struct usb_hcd * hcd,bool do_wakeup)172*4882a593Smuzhiyun static int uhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun struct uhci_hcd *uhci = hcd_to_uhci(hcd);
175*4882a593Smuzhiyun struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
176*4882a593Smuzhiyun int rc = 0;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun dev_dbg(uhci_dev(uhci), "%s\n", __func__);
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun spin_lock_irq(&uhci->lock);
181*4882a593Smuzhiyun if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead)
182*4882a593Smuzhiyun goto done_okay; /* Already suspended or dead */
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun /* All PCI host controllers are required to disable IRQ generation
185*4882a593Smuzhiyun * at the source, so we must turn off PIRQ.
186*4882a593Smuzhiyun */
187*4882a593Smuzhiyun pci_write_config_word(pdev, USBLEGSUP, 0);
188*4882a593Smuzhiyun clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun /* Enable platform-specific non-PME# wakeup */
191*4882a593Smuzhiyun if (do_wakeup) {
192*4882a593Smuzhiyun if (pdev->vendor == PCI_VENDOR_ID_INTEL)
193*4882a593Smuzhiyun pci_write_config_byte(pdev, USBRES_INTEL,
194*4882a593Smuzhiyun USBPORT1EN | USBPORT2EN);
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun done_okay:
198*4882a593Smuzhiyun clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
199*4882a593Smuzhiyun spin_unlock_irq(&uhci->lock);
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun synchronize_irq(hcd->irq);
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun /* Check for race with a wakeup request */
204*4882a593Smuzhiyun if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
205*4882a593Smuzhiyun uhci_pci_resume(hcd, false);
206*4882a593Smuzhiyun rc = -EBUSY;
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun return rc;
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun
uhci_pci_resume(struct usb_hcd * hcd,bool hibernated)211*4882a593Smuzhiyun static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun struct uhci_hcd *uhci = hcd_to_uhci(hcd);
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun dev_dbg(uhci_dev(uhci), "%s\n", __func__);
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun /* Since we aren't in D3 any more, it's safe to set this flag
218*4882a593Smuzhiyun * even if the controller was dead.
219*4882a593Smuzhiyun */
220*4882a593Smuzhiyun set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun spin_lock_irq(&uhci->lock);
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun /* Make sure resume from hibernation re-enumerates everything */
225*4882a593Smuzhiyun if (hibernated) {
226*4882a593Smuzhiyun uhci->reset_hc(uhci);
227*4882a593Smuzhiyun finish_reset(uhci);
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun /* The firmware may have changed the controller settings during
231*4882a593Smuzhiyun * a system wakeup. Check it and reconfigure to avoid problems.
232*4882a593Smuzhiyun */
233*4882a593Smuzhiyun else {
234*4882a593Smuzhiyun check_and_reset_hc(uhci);
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun configure_hc(uhci);
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun /* Tell the core if the controller had to be reset */
239*4882a593Smuzhiyun if (uhci->rh_state == UHCI_RH_RESET)
240*4882a593Smuzhiyun usb_root_hub_lost_power(hcd->self.root_hub);
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun spin_unlock_irq(&uhci->lock);
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun /* If interrupts don't work and remote wakeup is enabled then
245*4882a593Smuzhiyun * the suspended root hub needs to be polled.
246*4882a593Smuzhiyun */
247*4882a593Smuzhiyun if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup)
248*4882a593Smuzhiyun set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun /* Does the root hub have a port wakeup pending? */
251*4882a593Smuzhiyun usb_hcd_poll_rh_status(hcd);
252*4882a593Smuzhiyun return 0;
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun #endif
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun static const struct hc_driver uhci_driver = {
258*4882a593Smuzhiyun .description = hcd_name,
259*4882a593Smuzhiyun .product_desc = "UHCI Host Controller",
260*4882a593Smuzhiyun .hcd_priv_size = sizeof(struct uhci_hcd),
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun /* Generic hardware linkage */
263*4882a593Smuzhiyun .irq = uhci_irq,
264*4882a593Smuzhiyun .flags = HCD_DMA | HCD_USB11,
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun /* Basic lifecycle operations */
267*4882a593Smuzhiyun .reset = uhci_pci_init,
268*4882a593Smuzhiyun .start = uhci_start,
269*4882a593Smuzhiyun #ifdef CONFIG_PM
270*4882a593Smuzhiyun .pci_suspend = uhci_pci_suspend,
271*4882a593Smuzhiyun .pci_resume = uhci_pci_resume,
272*4882a593Smuzhiyun .bus_suspend = uhci_rh_suspend,
273*4882a593Smuzhiyun .bus_resume = uhci_rh_resume,
274*4882a593Smuzhiyun #endif
275*4882a593Smuzhiyun .stop = uhci_stop,
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun .urb_enqueue = uhci_urb_enqueue,
278*4882a593Smuzhiyun .urb_dequeue = uhci_urb_dequeue,
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun .endpoint_disable = uhci_hcd_endpoint_disable,
281*4882a593Smuzhiyun .get_frame_number = uhci_hcd_get_frame_number,
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun .hub_status_data = uhci_hub_status_data,
284*4882a593Smuzhiyun .hub_control = uhci_hub_control,
285*4882a593Smuzhiyun };
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun static const struct pci_device_id uhci_pci_ids[] = { {
288*4882a593Smuzhiyun /* handle any USB UHCI controller */
289*4882a593Smuzhiyun PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
290*4882a593Smuzhiyun }, { /* end: all zeroes */ }
291*4882a593Smuzhiyun };
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
294*4882a593Smuzhiyun
uhci_pci_probe(struct pci_dev * dev,const struct pci_device_id * id)295*4882a593Smuzhiyun static int uhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
296*4882a593Smuzhiyun {
297*4882a593Smuzhiyun return usb_hcd_pci_probe(dev, id, &uhci_driver);
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun static struct pci_driver uhci_pci_driver = {
301*4882a593Smuzhiyun .name = hcd_name,
302*4882a593Smuzhiyun .id_table = uhci_pci_ids,
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun .probe = uhci_pci_probe,
305*4882a593Smuzhiyun .remove = usb_hcd_pci_remove,
306*4882a593Smuzhiyun .shutdown = uhci_shutdown,
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun #ifdef CONFIG_PM
309*4882a593Smuzhiyun .driver = {
310*4882a593Smuzhiyun .pm = &usb_hcd_pci_pm_ops
311*4882a593Smuzhiyun },
312*4882a593Smuzhiyun #endif
313*4882a593Smuzhiyun };
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun MODULE_SOFTDEP("pre: ehci_pci");
316