1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * MAX3421 Host Controller driver for USB.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Author: David Mosberger-Tang <davidm@egauge.net>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * (C) Copyright 2014 David Mosberger-Tang <davidm@egauge.net>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * MAX3421 is a chip implementing a USB 2.0 Full-/Low-Speed host
10*4882a593Smuzhiyun * controller on a SPI bus.
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * Based on:
13*4882a593Smuzhiyun * o MAX3421E datasheet
14*4882a593Smuzhiyun * https://datasheets.maximintegrated.com/en/ds/MAX3421E.pdf
15*4882a593Smuzhiyun * o MAX3421E Programming Guide
16*4882a593Smuzhiyun * https://www.hdl.co.jp/ftpdata/utl-001/AN3785.pdf
17*4882a593Smuzhiyun * o gadget/dummy_hcd.c
18*4882a593Smuzhiyun * For USB HCD implementation.
19*4882a593Smuzhiyun * o Arduino MAX3421 driver
20*4882a593Smuzhiyun * https://github.com/felis/USB_Host_Shield_2.0/blob/master/Usb.cpp
21*4882a593Smuzhiyun *
22*4882a593Smuzhiyun * This file is licenced under the GPL v2.
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * Important note on worst-case (full-speed) packet size constraints
25*4882a593Smuzhiyun * (See USB 2.0 Section 5.6.3 and following):
26*4882a593Smuzhiyun *
27*4882a593Smuzhiyun * - control: 64 bytes
28*4882a593Smuzhiyun * - isochronous: 1023 bytes
29*4882a593Smuzhiyun * - interrupt: 64 bytes
30*4882a593Smuzhiyun * - bulk: 64 bytes
31*4882a593Smuzhiyun *
32*4882a593Smuzhiyun * Since the MAX3421 FIFO size is 64 bytes, we do not have to work about
33*4882a593Smuzhiyun * multi-FIFO writes/reads for a single USB packet *except* for isochronous
34*4882a593Smuzhiyun * transfers. We don't support isochronous transfers at this time, so we
35*4882a593Smuzhiyun * just assume that a USB packet always fits into a single FIFO buffer.
36*4882a593Smuzhiyun *
37*4882a593Smuzhiyun * NOTE: The June 2006 version of "MAX3421E Programming Guide"
38*4882a593Smuzhiyun * (AN3785) has conflicting info for the RCVDAVIRQ bit:
39*4882a593Smuzhiyun *
40*4882a593Smuzhiyun * The description of RCVDAVIRQ says "The CPU *must* clear
41*4882a593Smuzhiyun * this IRQ bit (by writing a 1 to it) before reading the
42*4882a593Smuzhiyun * RCVFIFO data.
43*4882a593Smuzhiyun *
44*4882a593Smuzhiyun * However, the earlier section on "Programming BULK-IN
45*4882a593Smuzhiyun * Transfers" says * that:
46*4882a593Smuzhiyun *
47*4882a593Smuzhiyun * After the CPU retrieves the data, it clears the
48*4882a593Smuzhiyun * RCVDAVIRQ bit.
49*4882a593Smuzhiyun *
50*4882a593Smuzhiyun * The December 2006 version has been corrected and it consistently
51*4882a593Smuzhiyun * states the second behavior is the correct one.
52*4882a593Smuzhiyun *
53*4882a593Smuzhiyun * Synchronous SPI transactions sleep so we can't perform any such
54*4882a593Smuzhiyun * transactions while holding a spin-lock (and/or while interrupts are
55*4882a593Smuzhiyun * masked). To achieve this, all SPI transactions are issued from a
56*4882a593Smuzhiyun * single thread (max3421_spi_thread).
57*4882a593Smuzhiyun */
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun #include <linux/jiffies.h>
60*4882a593Smuzhiyun #include <linux/module.h>
61*4882a593Smuzhiyun #include <linux/spi/spi.h>
62*4882a593Smuzhiyun #include <linux/usb.h>
63*4882a593Smuzhiyun #include <linux/usb/hcd.h>
64*4882a593Smuzhiyun #include <linux/of.h>
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun #include <linux/platform_data/max3421-hcd.h>
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun #define DRIVER_DESC "MAX3421 USB Host-Controller Driver"
69*4882a593Smuzhiyun #define DRIVER_VERSION "1.0"
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /* 11-bit counter that wraps around (USB 2.0 Section 8.3.3): */
72*4882a593Smuzhiyun #define USB_MAX_FRAME_NUMBER 0x7ff
73*4882a593Smuzhiyun #define USB_MAX_RETRIES 3 /* # of retries before error is reported */
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun /*
76*4882a593Smuzhiyun * Max. # of times we're willing to retransmit a request immediately in
77*4882a593Smuzhiyun * resposne to a NAK. Afterwards, we fall back on trying once a frame.
78*4882a593Smuzhiyun */
79*4882a593Smuzhiyun #define NAK_MAX_FAST_RETRANSMITS 2
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun #define POWER_BUDGET 500 /* in mA; use 8 for low-power port testing */
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun /* Port-change mask: */
84*4882a593Smuzhiyun #define PORT_C_MASK ((USB_PORT_STAT_C_CONNECTION | \
85*4882a593Smuzhiyun USB_PORT_STAT_C_ENABLE | \
86*4882a593Smuzhiyun USB_PORT_STAT_C_SUSPEND | \
87*4882a593Smuzhiyun USB_PORT_STAT_C_OVERCURRENT | \
88*4882a593Smuzhiyun USB_PORT_STAT_C_RESET) << 16)
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun #define MAX3421_GPOUT_COUNT 8
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun enum max3421_rh_state {
93*4882a593Smuzhiyun MAX3421_RH_RESET,
94*4882a593Smuzhiyun MAX3421_RH_SUSPENDED,
95*4882a593Smuzhiyun MAX3421_RH_RUNNING
96*4882a593Smuzhiyun };
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun enum pkt_state {
99*4882a593Smuzhiyun PKT_STATE_SETUP, /* waiting to send setup packet to ctrl pipe */
100*4882a593Smuzhiyun PKT_STATE_TRANSFER, /* waiting to xfer transfer_buffer */
101*4882a593Smuzhiyun PKT_STATE_TERMINATE /* waiting to terminate control transfer */
102*4882a593Smuzhiyun };
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun enum scheduling_pass {
105*4882a593Smuzhiyun SCHED_PASS_PERIODIC,
106*4882a593Smuzhiyun SCHED_PASS_NON_PERIODIC,
107*4882a593Smuzhiyun SCHED_PASS_DONE
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun /* Bit numbers for max3421_hcd->todo: */
111*4882a593Smuzhiyun enum {
112*4882a593Smuzhiyun ENABLE_IRQ = 0,
113*4882a593Smuzhiyun RESET_HCD,
114*4882a593Smuzhiyun RESET_PORT,
115*4882a593Smuzhiyun CHECK_UNLINK,
116*4882a593Smuzhiyun IOPIN_UPDATE
117*4882a593Smuzhiyun };
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun struct max3421_dma_buf {
120*4882a593Smuzhiyun u8 data[2];
121*4882a593Smuzhiyun };
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun struct max3421_hcd {
124*4882a593Smuzhiyun spinlock_t lock;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun struct task_struct *spi_thread;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun enum max3421_rh_state rh_state;
129*4882a593Smuzhiyun /* lower 16 bits contain port status, upper 16 bits the change mask: */
130*4882a593Smuzhiyun u32 port_status;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun unsigned active:1;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun struct list_head ep_list; /* list of EP's with work */
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun /*
137*4882a593Smuzhiyun * The following are owned by spi_thread (may be accessed by
138*4882a593Smuzhiyun * SPI-thread without acquiring the HCD lock:
139*4882a593Smuzhiyun */
140*4882a593Smuzhiyun u8 rev; /* chip revision */
141*4882a593Smuzhiyun u16 frame_number;
142*4882a593Smuzhiyun /*
143*4882a593Smuzhiyun * kmalloc'd buffers guaranteed to be in separate (DMA)
144*4882a593Smuzhiyun * cache-lines:
145*4882a593Smuzhiyun */
146*4882a593Smuzhiyun struct max3421_dma_buf *tx;
147*4882a593Smuzhiyun struct max3421_dma_buf *rx;
148*4882a593Smuzhiyun /*
149*4882a593Smuzhiyun * URB we're currently processing. Must not be reset to NULL
150*4882a593Smuzhiyun * unless MAX3421E chip is idle:
151*4882a593Smuzhiyun */
152*4882a593Smuzhiyun struct urb *curr_urb;
153*4882a593Smuzhiyun enum scheduling_pass sched_pass;
154*4882a593Smuzhiyun int urb_done; /* > 0 -> no errors, < 0: errno */
155*4882a593Smuzhiyun size_t curr_len;
156*4882a593Smuzhiyun u8 hien;
157*4882a593Smuzhiyun u8 mode;
158*4882a593Smuzhiyun u8 iopins[2];
159*4882a593Smuzhiyun unsigned long todo;
160*4882a593Smuzhiyun #ifdef DEBUG
161*4882a593Smuzhiyun unsigned long err_stat[16];
162*4882a593Smuzhiyun #endif
163*4882a593Smuzhiyun };
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun struct max3421_ep {
166*4882a593Smuzhiyun struct usb_host_endpoint *ep;
167*4882a593Smuzhiyun struct list_head ep_list;
168*4882a593Smuzhiyun u32 naks;
169*4882a593Smuzhiyun u16 last_active; /* frame # this ep was last active */
170*4882a593Smuzhiyun enum pkt_state pkt_state;
171*4882a593Smuzhiyun u8 retries;
172*4882a593Smuzhiyun u8 retransmit; /* packet needs retransmission */
173*4882a593Smuzhiyun };
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun #define MAX3421_FIFO_SIZE 64
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun #define MAX3421_SPI_DIR_RD 0 /* read register from MAX3421 */
178*4882a593Smuzhiyun #define MAX3421_SPI_DIR_WR 1 /* write register to MAX3421 */
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun /* SPI commands: */
181*4882a593Smuzhiyun #define MAX3421_SPI_DIR_SHIFT 1
182*4882a593Smuzhiyun #define MAX3421_SPI_REG_SHIFT 3
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun #define MAX3421_REG_RCVFIFO 1
185*4882a593Smuzhiyun #define MAX3421_REG_SNDFIFO 2
186*4882a593Smuzhiyun #define MAX3421_REG_SUDFIFO 4
187*4882a593Smuzhiyun #define MAX3421_REG_RCVBC 6
188*4882a593Smuzhiyun #define MAX3421_REG_SNDBC 7
189*4882a593Smuzhiyun #define MAX3421_REG_USBIRQ 13
190*4882a593Smuzhiyun #define MAX3421_REG_USBIEN 14
191*4882a593Smuzhiyun #define MAX3421_REG_USBCTL 15
192*4882a593Smuzhiyun #define MAX3421_REG_CPUCTL 16
193*4882a593Smuzhiyun #define MAX3421_REG_PINCTL 17
194*4882a593Smuzhiyun #define MAX3421_REG_REVISION 18
195*4882a593Smuzhiyun #define MAX3421_REG_IOPINS1 20
196*4882a593Smuzhiyun #define MAX3421_REG_IOPINS2 21
197*4882a593Smuzhiyun #define MAX3421_REG_GPINIRQ 22
198*4882a593Smuzhiyun #define MAX3421_REG_GPINIEN 23
199*4882a593Smuzhiyun #define MAX3421_REG_GPINPOL 24
200*4882a593Smuzhiyun #define MAX3421_REG_HIRQ 25
201*4882a593Smuzhiyun #define MAX3421_REG_HIEN 26
202*4882a593Smuzhiyun #define MAX3421_REG_MODE 27
203*4882a593Smuzhiyun #define MAX3421_REG_PERADDR 28
204*4882a593Smuzhiyun #define MAX3421_REG_HCTL 29
205*4882a593Smuzhiyun #define MAX3421_REG_HXFR 30
206*4882a593Smuzhiyun #define MAX3421_REG_HRSL 31
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun enum {
209*4882a593Smuzhiyun MAX3421_USBIRQ_OSCOKIRQ_BIT = 0,
210*4882a593Smuzhiyun MAX3421_USBIRQ_NOVBUSIRQ_BIT = 5,
211*4882a593Smuzhiyun MAX3421_USBIRQ_VBUSIRQ_BIT
212*4882a593Smuzhiyun };
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun enum {
215*4882a593Smuzhiyun MAX3421_CPUCTL_IE_BIT = 0,
216*4882a593Smuzhiyun MAX3421_CPUCTL_PULSEWID0_BIT = 6,
217*4882a593Smuzhiyun MAX3421_CPUCTL_PULSEWID1_BIT
218*4882a593Smuzhiyun };
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun enum {
221*4882a593Smuzhiyun MAX3421_USBCTL_PWRDOWN_BIT = 4,
222*4882a593Smuzhiyun MAX3421_USBCTL_CHIPRES_BIT
223*4882a593Smuzhiyun };
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun enum {
226*4882a593Smuzhiyun MAX3421_PINCTL_GPXA_BIT = 0,
227*4882a593Smuzhiyun MAX3421_PINCTL_GPXB_BIT,
228*4882a593Smuzhiyun MAX3421_PINCTL_POSINT_BIT,
229*4882a593Smuzhiyun MAX3421_PINCTL_INTLEVEL_BIT,
230*4882a593Smuzhiyun MAX3421_PINCTL_FDUPSPI_BIT,
231*4882a593Smuzhiyun MAX3421_PINCTL_EP0INAK_BIT,
232*4882a593Smuzhiyun MAX3421_PINCTL_EP2INAK_BIT,
233*4882a593Smuzhiyun MAX3421_PINCTL_EP3INAK_BIT,
234*4882a593Smuzhiyun };
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun enum {
237*4882a593Smuzhiyun MAX3421_HI_BUSEVENT_BIT = 0, /* bus-reset/-resume */
238*4882a593Smuzhiyun MAX3421_HI_RWU_BIT, /* remote wakeup */
239*4882a593Smuzhiyun MAX3421_HI_RCVDAV_BIT, /* receive FIFO data available */
240*4882a593Smuzhiyun MAX3421_HI_SNDBAV_BIT, /* send buffer available */
241*4882a593Smuzhiyun MAX3421_HI_SUSDN_BIT, /* suspend operation done */
242*4882a593Smuzhiyun MAX3421_HI_CONDET_BIT, /* peripheral connect/disconnect */
243*4882a593Smuzhiyun MAX3421_HI_FRAME_BIT, /* frame generator */
244*4882a593Smuzhiyun MAX3421_HI_HXFRDN_BIT, /* host transfer done */
245*4882a593Smuzhiyun };
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun enum {
248*4882a593Smuzhiyun MAX3421_HCTL_BUSRST_BIT = 0,
249*4882a593Smuzhiyun MAX3421_HCTL_FRMRST_BIT,
250*4882a593Smuzhiyun MAX3421_HCTL_SAMPLEBUS_BIT,
251*4882a593Smuzhiyun MAX3421_HCTL_SIGRSM_BIT,
252*4882a593Smuzhiyun MAX3421_HCTL_RCVTOG0_BIT,
253*4882a593Smuzhiyun MAX3421_HCTL_RCVTOG1_BIT,
254*4882a593Smuzhiyun MAX3421_HCTL_SNDTOG0_BIT,
255*4882a593Smuzhiyun MAX3421_HCTL_SNDTOG1_BIT
256*4882a593Smuzhiyun };
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun enum {
259*4882a593Smuzhiyun MAX3421_MODE_HOST_BIT = 0,
260*4882a593Smuzhiyun MAX3421_MODE_LOWSPEED_BIT,
261*4882a593Smuzhiyun MAX3421_MODE_HUBPRE_BIT,
262*4882a593Smuzhiyun MAX3421_MODE_SOFKAENAB_BIT,
263*4882a593Smuzhiyun MAX3421_MODE_SEPIRQ_BIT,
264*4882a593Smuzhiyun MAX3421_MODE_DELAYISO_BIT,
265*4882a593Smuzhiyun MAX3421_MODE_DMPULLDN_BIT,
266*4882a593Smuzhiyun MAX3421_MODE_DPPULLDN_BIT
267*4882a593Smuzhiyun };
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun enum {
270*4882a593Smuzhiyun MAX3421_HRSL_OK = 0,
271*4882a593Smuzhiyun MAX3421_HRSL_BUSY,
272*4882a593Smuzhiyun MAX3421_HRSL_BADREQ,
273*4882a593Smuzhiyun MAX3421_HRSL_UNDEF,
274*4882a593Smuzhiyun MAX3421_HRSL_NAK,
275*4882a593Smuzhiyun MAX3421_HRSL_STALL,
276*4882a593Smuzhiyun MAX3421_HRSL_TOGERR,
277*4882a593Smuzhiyun MAX3421_HRSL_WRONGPID,
278*4882a593Smuzhiyun MAX3421_HRSL_BADBC,
279*4882a593Smuzhiyun MAX3421_HRSL_PIDERR,
280*4882a593Smuzhiyun MAX3421_HRSL_PKTERR,
281*4882a593Smuzhiyun MAX3421_HRSL_CRCERR,
282*4882a593Smuzhiyun MAX3421_HRSL_KERR,
283*4882a593Smuzhiyun MAX3421_HRSL_JERR,
284*4882a593Smuzhiyun MAX3421_HRSL_TIMEOUT,
285*4882a593Smuzhiyun MAX3421_HRSL_BABBLE,
286*4882a593Smuzhiyun MAX3421_HRSL_RESULT_MASK = 0xf,
287*4882a593Smuzhiyun MAX3421_HRSL_RCVTOGRD_BIT = 4,
288*4882a593Smuzhiyun MAX3421_HRSL_SNDTOGRD_BIT,
289*4882a593Smuzhiyun MAX3421_HRSL_KSTATUS_BIT,
290*4882a593Smuzhiyun MAX3421_HRSL_JSTATUS_BIT
291*4882a593Smuzhiyun };
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun /* Return same error-codes as ohci.h:cc_to_error: */
294*4882a593Smuzhiyun static const int hrsl_to_error[] = {
295*4882a593Smuzhiyun [MAX3421_HRSL_OK] = 0,
296*4882a593Smuzhiyun [MAX3421_HRSL_BUSY] = -EINVAL,
297*4882a593Smuzhiyun [MAX3421_HRSL_BADREQ] = -EINVAL,
298*4882a593Smuzhiyun [MAX3421_HRSL_UNDEF] = -EINVAL,
299*4882a593Smuzhiyun [MAX3421_HRSL_NAK] = -EAGAIN,
300*4882a593Smuzhiyun [MAX3421_HRSL_STALL] = -EPIPE,
301*4882a593Smuzhiyun [MAX3421_HRSL_TOGERR] = -EILSEQ,
302*4882a593Smuzhiyun [MAX3421_HRSL_WRONGPID] = -EPROTO,
303*4882a593Smuzhiyun [MAX3421_HRSL_BADBC] = -EREMOTEIO,
304*4882a593Smuzhiyun [MAX3421_HRSL_PIDERR] = -EPROTO,
305*4882a593Smuzhiyun [MAX3421_HRSL_PKTERR] = -EPROTO,
306*4882a593Smuzhiyun [MAX3421_HRSL_CRCERR] = -EILSEQ,
307*4882a593Smuzhiyun [MAX3421_HRSL_KERR] = -EIO,
308*4882a593Smuzhiyun [MAX3421_HRSL_JERR] = -EIO,
309*4882a593Smuzhiyun [MAX3421_HRSL_TIMEOUT] = -ETIME,
310*4882a593Smuzhiyun [MAX3421_HRSL_BABBLE] = -EOVERFLOW
311*4882a593Smuzhiyun };
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun /*
314*4882a593Smuzhiyun * See https://www.beyondlogic.org/usbnutshell/usb4.shtml#Control for a
315*4882a593Smuzhiyun * reasonable overview of how control transfers use the the IN/OUT
316*4882a593Smuzhiyun * tokens.
317*4882a593Smuzhiyun */
318*4882a593Smuzhiyun #define MAX3421_HXFR_BULK_IN(ep) (0x00 | (ep)) /* bulk or interrupt */
319*4882a593Smuzhiyun #define MAX3421_HXFR_SETUP 0x10
320*4882a593Smuzhiyun #define MAX3421_HXFR_BULK_OUT(ep) (0x20 | (ep)) /* bulk or interrupt */
321*4882a593Smuzhiyun #define MAX3421_HXFR_ISO_IN(ep) (0x40 | (ep))
322*4882a593Smuzhiyun #define MAX3421_HXFR_ISO_OUT(ep) (0x60 | (ep))
323*4882a593Smuzhiyun #define MAX3421_HXFR_HS_IN 0x80 /* handshake in */
324*4882a593Smuzhiyun #define MAX3421_HXFR_HS_OUT 0xa0 /* handshake out */
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun #define field(val, bit) ((val) << (bit))
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun static inline s16
frame_diff(u16 left,u16 right)329*4882a593Smuzhiyun frame_diff(u16 left, u16 right)
330*4882a593Smuzhiyun {
331*4882a593Smuzhiyun return ((unsigned) (left - right)) % (USB_MAX_FRAME_NUMBER + 1);
332*4882a593Smuzhiyun }
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun static inline struct max3421_hcd *
hcd_to_max3421(struct usb_hcd * hcd)335*4882a593Smuzhiyun hcd_to_max3421(struct usb_hcd *hcd)
336*4882a593Smuzhiyun {
337*4882a593Smuzhiyun return (struct max3421_hcd *) hcd->hcd_priv;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun static inline struct usb_hcd *
max3421_to_hcd(struct max3421_hcd * max3421_hcd)341*4882a593Smuzhiyun max3421_to_hcd(struct max3421_hcd *max3421_hcd)
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun return container_of((void *) max3421_hcd, struct usb_hcd, hcd_priv);
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun static u8
spi_rd8(struct usb_hcd * hcd,unsigned int reg)347*4882a593Smuzhiyun spi_rd8(struct usb_hcd *hcd, unsigned int reg)
348*4882a593Smuzhiyun {
349*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
350*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(hcd->self.controller);
351*4882a593Smuzhiyun struct spi_transfer transfer;
352*4882a593Smuzhiyun struct spi_message msg;
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun memset(&transfer, 0, sizeof(transfer));
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun spi_message_init(&msg);
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun max3421_hcd->tx->data[0] =
359*4882a593Smuzhiyun (field(reg, MAX3421_SPI_REG_SHIFT) |
360*4882a593Smuzhiyun field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun transfer.tx_buf = max3421_hcd->tx->data;
363*4882a593Smuzhiyun transfer.rx_buf = max3421_hcd->rx->data;
364*4882a593Smuzhiyun transfer.len = 2;
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun spi_message_add_tail(&transfer, &msg);
367*4882a593Smuzhiyun spi_sync(spi, &msg);
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun return max3421_hcd->rx->data[1];
370*4882a593Smuzhiyun }
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun static void
spi_wr8(struct usb_hcd * hcd,unsigned int reg,u8 val)373*4882a593Smuzhiyun spi_wr8(struct usb_hcd *hcd, unsigned int reg, u8 val)
374*4882a593Smuzhiyun {
375*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(hcd->self.controller);
376*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
377*4882a593Smuzhiyun struct spi_transfer transfer;
378*4882a593Smuzhiyun struct spi_message msg;
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun memset(&transfer, 0, sizeof(transfer));
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun spi_message_init(&msg);
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun max3421_hcd->tx->data[0] =
385*4882a593Smuzhiyun (field(reg, MAX3421_SPI_REG_SHIFT) |
386*4882a593Smuzhiyun field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
387*4882a593Smuzhiyun max3421_hcd->tx->data[1] = val;
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun transfer.tx_buf = max3421_hcd->tx->data;
390*4882a593Smuzhiyun transfer.len = 2;
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun spi_message_add_tail(&transfer, &msg);
393*4882a593Smuzhiyun spi_sync(spi, &msg);
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun static void
spi_rd_buf(struct usb_hcd * hcd,unsigned int reg,void * buf,size_t len)397*4882a593Smuzhiyun spi_rd_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
398*4882a593Smuzhiyun {
399*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(hcd->self.controller);
400*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
401*4882a593Smuzhiyun struct spi_transfer transfer[2];
402*4882a593Smuzhiyun struct spi_message msg;
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun memset(transfer, 0, sizeof(transfer));
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun spi_message_init(&msg);
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun max3421_hcd->tx->data[0] =
409*4882a593Smuzhiyun (field(reg, MAX3421_SPI_REG_SHIFT) |
410*4882a593Smuzhiyun field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
411*4882a593Smuzhiyun transfer[0].tx_buf = max3421_hcd->tx->data;
412*4882a593Smuzhiyun transfer[0].len = 1;
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun transfer[1].rx_buf = buf;
415*4882a593Smuzhiyun transfer[1].len = len;
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun spi_message_add_tail(&transfer[0], &msg);
418*4882a593Smuzhiyun spi_message_add_tail(&transfer[1], &msg);
419*4882a593Smuzhiyun spi_sync(spi, &msg);
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun static void
spi_wr_buf(struct usb_hcd * hcd,unsigned int reg,void * buf,size_t len)423*4882a593Smuzhiyun spi_wr_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
424*4882a593Smuzhiyun {
425*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(hcd->self.controller);
426*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
427*4882a593Smuzhiyun struct spi_transfer transfer[2];
428*4882a593Smuzhiyun struct spi_message msg;
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun memset(transfer, 0, sizeof(transfer));
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun spi_message_init(&msg);
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun max3421_hcd->tx->data[0] =
435*4882a593Smuzhiyun (field(reg, MAX3421_SPI_REG_SHIFT) |
436*4882a593Smuzhiyun field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun transfer[0].tx_buf = max3421_hcd->tx->data;
439*4882a593Smuzhiyun transfer[0].len = 1;
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun transfer[1].tx_buf = buf;
442*4882a593Smuzhiyun transfer[1].len = len;
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun spi_message_add_tail(&transfer[0], &msg);
445*4882a593Smuzhiyun spi_message_add_tail(&transfer[1], &msg);
446*4882a593Smuzhiyun spi_sync(spi, &msg);
447*4882a593Smuzhiyun }
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun /*
450*4882a593Smuzhiyun * Figure out the correct setting for the LOWSPEED and HUBPRE mode
451*4882a593Smuzhiyun * bits. The HUBPRE bit needs to be set when MAX3421E operates at
452*4882a593Smuzhiyun * full speed, but it's talking to a low-speed device (i.e., through a
453*4882a593Smuzhiyun * hub). Setting that bit ensures that every low-speed packet is
454*4882a593Smuzhiyun * preceded by a full-speed PRE PID. Possible configurations:
455*4882a593Smuzhiyun *
456*4882a593Smuzhiyun * Hub speed: Device speed: => LOWSPEED bit: HUBPRE bit:
457*4882a593Smuzhiyun * FULL FULL => 0 0
458*4882a593Smuzhiyun * FULL LOW => 1 1
459*4882a593Smuzhiyun * LOW LOW => 1 0
460*4882a593Smuzhiyun * LOW FULL => 1 0
461*4882a593Smuzhiyun */
462*4882a593Smuzhiyun static void
max3421_set_speed(struct usb_hcd * hcd,struct usb_device * dev)463*4882a593Smuzhiyun max3421_set_speed(struct usb_hcd *hcd, struct usb_device *dev)
464*4882a593Smuzhiyun {
465*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
466*4882a593Smuzhiyun u8 mode_lowspeed, mode_hubpre, mode = max3421_hcd->mode;
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun mode_lowspeed = BIT(MAX3421_MODE_LOWSPEED_BIT);
469*4882a593Smuzhiyun mode_hubpre = BIT(MAX3421_MODE_HUBPRE_BIT);
470*4882a593Smuzhiyun if (max3421_hcd->port_status & USB_PORT_STAT_LOW_SPEED) {
471*4882a593Smuzhiyun mode |= mode_lowspeed;
472*4882a593Smuzhiyun mode &= ~mode_hubpre;
473*4882a593Smuzhiyun } else if (dev->speed == USB_SPEED_LOW) {
474*4882a593Smuzhiyun mode |= mode_lowspeed | mode_hubpre;
475*4882a593Smuzhiyun } else {
476*4882a593Smuzhiyun mode &= ~(mode_lowspeed | mode_hubpre);
477*4882a593Smuzhiyun }
478*4882a593Smuzhiyun if (mode != max3421_hcd->mode) {
479*4882a593Smuzhiyun max3421_hcd->mode = mode;
480*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun }
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun /*
486*4882a593Smuzhiyun * Caller must NOT hold HCD spinlock.
487*4882a593Smuzhiyun */
488*4882a593Smuzhiyun static void
max3421_set_address(struct usb_hcd * hcd,struct usb_device * dev,int epnum)489*4882a593Smuzhiyun max3421_set_address(struct usb_hcd *hcd, struct usb_device *dev, int epnum)
490*4882a593Smuzhiyun {
491*4882a593Smuzhiyun int rcvtog, sndtog;
492*4882a593Smuzhiyun u8 hctl;
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun /* setup new endpoint's toggle bits: */
495*4882a593Smuzhiyun rcvtog = usb_gettoggle(dev, epnum, 0);
496*4882a593Smuzhiyun sndtog = usb_gettoggle(dev, epnum, 1);
497*4882a593Smuzhiyun hctl = (BIT(rcvtog + MAX3421_HCTL_RCVTOG0_BIT) |
498*4882a593Smuzhiyun BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_HCTL, hctl);
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun /*
503*4882a593Smuzhiyun * Note: devnum for one and the same device can change during
504*4882a593Smuzhiyun * address-assignment so it's best to just always load the
505*4882a593Smuzhiyun * address whenever the end-point changed/was forced.
506*4882a593Smuzhiyun */
507*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_PERADDR, dev->devnum);
508*4882a593Smuzhiyun }
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun static int
max3421_ctrl_setup(struct usb_hcd * hcd,struct urb * urb)511*4882a593Smuzhiyun max3421_ctrl_setup(struct usb_hcd *hcd, struct urb *urb)
512*4882a593Smuzhiyun {
513*4882a593Smuzhiyun spi_wr_buf(hcd, MAX3421_REG_SUDFIFO, urb->setup_packet, 8);
514*4882a593Smuzhiyun return MAX3421_HXFR_SETUP;
515*4882a593Smuzhiyun }
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun static int
max3421_transfer_in(struct usb_hcd * hcd,struct urb * urb)518*4882a593Smuzhiyun max3421_transfer_in(struct usb_hcd *hcd, struct urb *urb)
519*4882a593Smuzhiyun {
520*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
521*4882a593Smuzhiyun int epnum = usb_pipeendpoint(urb->pipe);
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun max3421_hcd->curr_len = 0;
524*4882a593Smuzhiyun max3421_hcd->hien |= BIT(MAX3421_HI_RCVDAV_BIT);
525*4882a593Smuzhiyun return MAX3421_HXFR_BULK_IN(epnum);
526*4882a593Smuzhiyun }
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun static int
max3421_transfer_out(struct usb_hcd * hcd,struct urb * urb,int fast_retransmit)529*4882a593Smuzhiyun max3421_transfer_out(struct usb_hcd *hcd, struct urb *urb, int fast_retransmit)
530*4882a593Smuzhiyun {
531*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(hcd->self.controller);
532*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
533*4882a593Smuzhiyun int epnum = usb_pipeendpoint(urb->pipe);
534*4882a593Smuzhiyun u32 max_packet;
535*4882a593Smuzhiyun void *src;
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun src = urb->transfer_buffer + urb->actual_length;
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun if (fast_retransmit) {
540*4882a593Smuzhiyun if (max3421_hcd->rev == 0x12) {
541*4882a593Smuzhiyun /* work around rev 0x12 bug: */
542*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
543*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_SNDFIFO, ((u8 *) src)[0]);
544*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun return MAX3421_HXFR_BULK_OUT(epnum);
547*4882a593Smuzhiyun }
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun max_packet = usb_maxpacket(urb->dev, urb->pipe, 1);
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun if (max_packet > MAX3421_FIFO_SIZE) {
552*4882a593Smuzhiyun /*
553*4882a593Smuzhiyun * We do not support isochronous transfers at this
554*4882a593Smuzhiyun * time.
555*4882a593Smuzhiyun */
556*4882a593Smuzhiyun dev_err(&spi->dev,
557*4882a593Smuzhiyun "%s: packet-size of %u too big (limit is %u bytes)",
558*4882a593Smuzhiyun __func__, max_packet, MAX3421_FIFO_SIZE);
559*4882a593Smuzhiyun max3421_hcd->urb_done = -EMSGSIZE;
560*4882a593Smuzhiyun return -EMSGSIZE;
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun max3421_hcd->curr_len = min((urb->transfer_buffer_length -
563*4882a593Smuzhiyun urb->actual_length), max_packet);
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun spi_wr_buf(hcd, MAX3421_REG_SNDFIFO, src, max3421_hcd->curr_len);
566*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
567*4882a593Smuzhiyun return MAX3421_HXFR_BULK_OUT(epnum);
568*4882a593Smuzhiyun }
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun /*
571*4882a593Smuzhiyun * Issue the next host-transfer command.
572*4882a593Smuzhiyun * Caller must NOT hold HCD spinlock.
573*4882a593Smuzhiyun */
574*4882a593Smuzhiyun static void
max3421_next_transfer(struct usb_hcd * hcd,int fast_retransmit)575*4882a593Smuzhiyun max3421_next_transfer(struct usb_hcd *hcd, int fast_retransmit)
576*4882a593Smuzhiyun {
577*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
578*4882a593Smuzhiyun struct urb *urb = max3421_hcd->curr_urb;
579*4882a593Smuzhiyun struct max3421_ep *max3421_ep;
580*4882a593Smuzhiyun int cmd = -EINVAL;
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun if (!urb)
583*4882a593Smuzhiyun return; /* nothing to do */
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun max3421_ep = urb->ep->hcpriv;
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun switch (max3421_ep->pkt_state) {
588*4882a593Smuzhiyun case PKT_STATE_SETUP:
589*4882a593Smuzhiyun cmd = max3421_ctrl_setup(hcd, urb);
590*4882a593Smuzhiyun break;
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun case PKT_STATE_TRANSFER:
593*4882a593Smuzhiyun if (usb_urb_dir_in(urb))
594*4882a593Smuzhiyun cmd = max3421_transfer_in(hcd, urb);
595*4882a593Smuzhiyun else
596*4882a593Smuzhiyun cmd = max3421_transfer_out(hcd, urb, fast_retransmit);
597*4882a593Smuzhiyun break;
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun case PKT_STATE_TERMINATE:
600*4882a593Smuzhiyun /*
601*4882a593Smuzhiyun * IN transfers are terminated with HS_OUT token,
602*4882a593Smuzhiyun * OUT transfers with HS_IN:
603*4882a593Smuzhiyun */
604*4882a593Smuzhiyun if (usb_urb_dir_in(urb))
605*4882a593Smuzhiyun cmd = MAX3421_HXFR_HS_OUT;
606*4882a593Smuzhiyun else
607*4882a593Smuzhiyun cmd = MAX3421_HXFR_HS_IN;
608*4882a593Smuzhiyun break;
609*4882a593Smuzhiyun }
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun if (cmd < 0)
612*4882a593Smuzhiyun return;
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun /* issue the command and wait for host-xfer-done interrupt: */
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_HXFR, cmd);
617*4882a593Smuzhiyun max3421_hcd->hien |= BIT(MAX3421_HI_HXFRDN_BIT);
618*4882a593Smuzhiyun }
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun /*
621*4882a593Smuzhiyun * Find the next URB to process and start its execution.
622*4882a593Smuzhiyun *
623*4882a593Smuzhiyun * At this time, we do not anticipate ever connecting a USB hub to the
624*4882a593Smuzhiyun * MAX3421 chip, so at most USB device can be connected and we can use
625*4882a593Smuzhiyun * a simplistic scheduler: at the start of a frame, schedule all
626*4882a593Smuzhiyun * periodic transfers. Once that is done, use the remainder of the
627*4882a593Smuzhiyun * frame to process non-periodic (bulk & control) transfers.
628*4882a593Smuzhiyun *
629*4882a593Smuzhiyun * Preconditions:
630*4882a593Smuzhiyun * o Caller must NOT hold HCD spinlock.
631*4882a593Smuzhiyun * o max3421_hcd->curr_urb MUST BE NULL.
632*4882a593Smuzhiyun * o MAX3421E chip must be idle.
633*4882a593Smuzhiyun */
634*4882a593Smuzhiyun static int
max3421_select_and_start_urb(struct usb_hcd * hcd)635*4882a593Smuzhiyun max3421_select_and_start_urb(struct usb_hcd *hcd)
636*4882a593Smuzhiyun {
637*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(hcd->self.controller);
638*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
639*4882a593Smuzhiyun struct urb *urb, *curr_urb = NULL;
640*4882a593Smuzhiyun struct max3421_ep *max3421_ep;
641*4882a593Smuzhiyun int epnum;
642*4882a593Smuzhiyun struct usb_host_endpoint *ep;
643*4882a593Smuzhiyun struct list_head *pos;
644*4882a593Smuzhiyun unsigned long flags;
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun spin_lock_irqsave(&max3421_hcd->lock, flags);
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun for (;
649*4882a593Smuzhiyun max3421_hcd->sched_pass < SCHED_PASS_DONE;
650*4882a593Smuzhiyun ++max3421_hcd->sched_pass)
651*4882a593Smuzhiyun list_for_each(pos, &max3421_hcd->ep_list) {
652*4882a593Smuzhiyun urb = NULL;
653*4882a593Smuzhiyun max3421_ep = container_of(pos, struct max3421_ep,
654*4882a593Smuzhiyun ep_list);
655*4882a593Smuzhiyun ep = max3421_ep->ep;
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun switch (usb_endpoint_type(&ep->desc)) {
658*4882a593Smuzhiyun case USB_ENDPOINT_XFER_ISOC:
659*4882a593Smuzhiyun case USB_ENDPOINT_XFER_INT:
660*4882a593Smuzhiyun if (max3421_hcd->sched_pass !=
661*4882a593Smuzhiyun SCHED_PASS_PERIODIC)
662*4882a593Smuzhiyun continue;
663*4882a593Smuzhiyun break;
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun case USB_ENDPOINT_XFER_CONTROL:
666*4882a593Smuzhiyun case USB_ENDPOINT_XFER_BULK:
667*4882a593Smuzhiyun if (max3421_hcd->sched_pass !=
668*4882a593Smuzhiyun SCHED_PASS_NON_PERIODIC)
669*4882a593Smuzhiyun continue;
670*4882a593Smuzhiyun break;
671*4882a593Smuzhiyun }
672*4882a593Smuzhiyun
673*4882a593Smuzhiyun if (list_empty(&ep->urb_list))
674*4882a593Smuzhiyun continue; /* nothing to do */
675*4882a593Smuzhiyun urb = list_first_entry(&ep->urb_list, struct urb,
676*4882a593Smuzhiyun urb_list);
677*4882a593Smuzhiyun if (urb->unlinked) {
678*4882a593Smuzhiyun dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
679*4882a593Smuzhiyun __func__, urb, urb->unlinked);
680*4882a593Smuzhiyun max3421_hcd->curr_urb = urb;
681*4882a593Smuzhiyun max3421_hcd->urb_done = 1;
682*4882a593Smuzhiyun spin_unlock_irqrestore(&max3421_hcd->lock,
683*4882a593Smuzhiyun flags);
684*4882a593Smuzhiyun return 1;
685*4882a593Smuzhiyun }
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun switch (usb_endpoint_type(&ep->desc)) {
688*4882a593Smuzhiyun case USB_ENDPOINT_XFER_CONTROL:
689*4882a593Smuzhiyun /*
690*4882a593Smuzhiyun * Allow one control transaction per
691*4882a593Smuzhiyun * frame per endpoint:
692*4882a593Smuzhiyun */
693*4882a593Smuzhiyun if (frame_diff(max3421_ep->last_active,
694*4882a593Smuzhiyun max3421_hcd->frame_number) == 0)
695*4882a593Smuzhiyun continue;
696*4882a593Smuzhiyun break;
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun case USB_ENDPOINT_XFER_BULK:
699*4882a593Smuzhiyun if (max3421_ep->retransmit
700*4882a593Smuzhiyun && (frame_diff(max3421_ep->last_active,
701*4882a593Smuzhiyun max3421_hcd->frame_number)
702*4882a593Smuzhiyun == 0))
703*4882a593Smuzhiyun /*
704*4882a593Smuzhiyun * We already tried this EP
705*4882a593Smuzhiyun * during this frame and got a
706*4882a593Smuzhiyun * NAK or error; wait for next frame
707*4882a593Smuzhiyun */
708*4882a593Smuzhiyun continue;
709*4882a593Smuzhiyun break;
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun case USB_ENDPOINT_XFER_ISOC:
712*4882a593Smuzhiyun case USB_ENDPOINT_XFER_INT:
713*4882a593Smuzhiyun if (frame_diff(max3421_hcd->frame_number,
714*4882a593Smuzhiyun max3421_ep->last_active)
715*4882a593Smuzhiyun < urb->interval)
716*4882a593Smuzhiyun /*
717*4882a593Smuzhiyun * We already processed this
718*4882a593Smuzhiyun * end-point in the current
719*4882a593Smuzhiyun * frame
720*4882a593Smuzhiyun */
721*4882a593Smuzhiyun continue;
722*4882a593Smuzhiyun break;
723*4882a593Smuzhiyun }
724*4882a593Smuzhiyun
725*4882a593Smuzhiyun /* move current ep to tail: */
726*4882a593Smuzhiyun list_move_tail(pos, &max3421_hcd->ep_list);
727*4882a593Smuzhiyun curr_urb = urb;
728*4882a593Smuzhiyun goto done;
729*4882a593Smuzhiyun }
730*4882a593Smuzhiyun done:
731*4882a593Smuzhiyun if (!curr_urb) {
732*4882a593Smuzhiyun spin_unlock_irqrestore(&max3421_hcd->lock, flags);
733*4882a593Smuzhiyun return 0;
734*4882a593Smuzhiyun }
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun urb = max3421_hcd->curr_urb = curr_urb;
737*4882a593Smuzhiyun epnum = usb_endpoint_num(&urb->ep->desc);
738*4882a593Smuzhiyun if (max3421_ep->retransmit)
739*4882a593Smuzhiyun /* restart (part of) a USB transaction: */
740*4882a593Smuzhiyun max3421_ep->retransmit = 0;
741*4882a593Smuzhiyun else {
742*4882a593Smuzhiyun /* start USB transaction: */
743*4882a593Smuzhiyun if (usb_endpoint_xfer_control(&ep->desc)) {
744*4882a593Smuzhiyun /*
745*4882a593Smuzhiyun * See USB 2.0 spec section 8.6.1
746*4882a593Smuzhiyun * Initialization via SETUP Token:
747*4882a593Smuzhiyun */
748*4882a593Smuzhiyun usb_settoggle(urb->dev, epnum, 0, 1);
749*4882a593Smuzhiyun usb_settoggle(urb->dev, epnum, 1, 1);
750*4882a593Smuzhiyun max3421_ep->pkt_state = PKT_STATE_SETUP;
751*4882a593Smuzhiyun } else
752*4882a593Smuzhiyun max3421_ep->pkt_state = PKT_STATE_TRANSFER;
753*4882a593Smuzhiyun }
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun spin_unlock_irqrestore(&max3421_hcd->lock, flags);
756*4882a593Smuzhiyun
757*4882a593Smuzhiyun max3421_ep->last_active = max3421_hcd->frame_number;
758*4882a593Smuzhiyun max3421_set_address(hcd, urb->dev, epnum);
759*4882a593Smuzhiyun max3421_set_speed(hcd, urb->dev);
760*4882a593Smuzhiyun max3421_next_transfer(hcd, 0);
761*4882a593Smuzhiyun return 1;
762*4882a593Smuzhiyun }
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun /*
765*4882a593Smuzhiyun * Check all endpoints for URBs that got unlinked.
766*4882a593Smuzhiyun *
767*4882a593Smuzhiyun * Caller must NOT hold HCD spinlock.
768*4882a593Smuzhiyun */
769*4882a593Smuzhiyun static int
max3421_check_unlink(struct usb_hcd * hcd)770*4882a593Smuzhiyun max3421_check_unlink(struct usb_hcd *hcd)
771*4882a593Smuzhiyun {
772*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(hcd->self.controller);
773*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
774*4882a593Smuzhiyun struct max3421_ep *max3421_ep;
775*4882a593Smuzhiyun struct usb_host_endpoint *ep;
776*4882a593Smuzhiyun struct urb *urb, *next;
777*4882a593Smuzhiyun unsigned long flags;
778*4882a593Smuzhiyun int retval = 0;
779*4882a593Smuzhiyun
780*4882a593Smuzhiyun spin_lock_irqsave(&max3421_hcd->lock, flags);
781*4882a593Smuzhiyun list_for_each_entry(max3421_ep, &max3421_hcd->ep_list, ep_list) {
782*4882a593Smuzhiyun ep = max3421_ep->ep;
783*4882a593Smuzhiyun list_for_each_entry_safe(urb, next, &ep->urb_list, urb_list) {
784*4882a593Smuzhiyun if (urb->unlinked) {
785*4882a593Smuzhiyun retval = 1;
786*4882a593Smuzhiyun dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
787*4882a593Smuzhiyun __func__, urb, urb->unlinked);
788*4882a593Smuzhiyun usb_hcd_unlink_urb_from_ep(hcd, urb);
789*4882a593Smuzhiyun spin_unlock_irqrestore(&max3421_hcd->lock,
790*4882a593Smuzhiyun flags);
791*4882a593Smuzhiyun usb_hcd_giveback_urb(hcd, urb, 0);
792*4882a593Smuzhiyun spin_lock_irqsave(&max3421_hcd->lock, flags);
793*4882a593Smuzhiyun }
794*4882a593Smuzhiyun }
795*4882a593Smuzhiyun }
796*4882a593Smuzhiyun spin_unlock_irqrestore(&max3421_hcd->lock, flags);
797*4882a593Smuzhiyun return retval;
798*4882a593Smuzhiyun }
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun /*
801*4882a593Smuzhiyun * Caller must NOT hold HCD spinlock.
802*4882a593Smuzhiyun */
803*4882a593Smuzhiyun static void
max3421_slow_retransmit(struct usb_hcd * hcd)804*4882a593Smuzhiyun max3421_slow_retransmit(struct usb_hcd *hcd)
805*4882a593Smuzhiyun {
806*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
807*4882a593Smuzhiyun struct urb *urb = max3421_hcd->curr_urb;
808*4882a593Smuzhiyun struct max3421_ep *max3421_ep;
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun max3421_ep = urb->ep->hcpriv;
811*4882a593Smuzhiyun max3421_ep->retransmit = 1;
812*4882a593Smuzhiyun max3421_hcd->curr_urb = NULL;
813*4882a593Smuzhiyun }
814*4882a593Smuzhiyun
815*4882a593Smuzhiyun /*
816*4882a593Smuzhiyun * Caller must NOT hold HCD spinlock.
817*4882a593Smuzhiyun */
818*4882a593Smuzhiyun static void
max3421_recv_data_available(struct usb_hcd * hcd)819*4882a593Smuzhiyun max3421_recv_data_available(struct usb_hcd *hcd)
820*4882a593Smuzhiyun {
821*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
822*4882a593Smuzhiyun struct urb *urb = max3421_hcd->curr_urb;
823*4882a593Smuzhiyun size_t remaining, transfer_size;
824*4882a593Smuzhiyun u8 rcvbc;
825*4882a593Smuzhiyun
826*4882a593Smuzhiyun rcvbc = spi_rd8(hcd, MAX3421_REG_RCVBC);
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun if (rcvbc > MAX3421_FIFO_SIZE)
829*4882a593Smuzhiyun rcvbc = MAX3421_FIFO_SIZE;
830*4882a593Smuzhiyun if (urb->actual_length >= urb->transfer_buffer_length)
831*4882a593Smuzhiyun remaining = 0;
832*4882a593Smuzhiyun else
833*4882a593Smuzhiyun remaining = urb->transfer_buffer_length - urb->actual_length;
834*4882a593Smuzhiyun transfer_size = rcvbc;
835*4882a593Smuzhiyun if (transfer_size > remaining)
836*4882a593Smuzhiyun transfer_size = remaining;
837*4882a593Smuzhiyun if (transfer_size > 0) {
838*4882a593Smuzhiyun void *dst = urb->transfer_buffer + urb->actual_length;
839*4882a593Smuzhiyun
840*4882a593Smuzhiyun spi_rd_buf(hcd, MAX3421_REG_RCVFIFO, dst, transfer_size);
841*4882a593Smuzhiyun urb->actual_length += transfer_size;
842*4882a593Smuzhiyun max3421_hcd->curr_len = transfer_size;
843*4882a593Smuzhiyun }
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun /* ack the RCVDAV irq now that the FIFO has been read: */
846*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_HIRQ, BIT(MAX3421_HI_RCVDAV_BIT));
847*4882a593Smuzhiyun }
848*4882a593Smuzhiyun
849*4882a593Smuzhiyun static void
max3421_handle_error(struct usb_hcd * hcd,u8 hrsl)850*4882a593Smuzhiyun max3421_handle_error(struct usb_hcd *hcd, u8 hrsl)
851*4882a593Smuzhiyun {
852*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(hcd->self.controller);
853*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
854*4882a593Smuzhiyun u8 result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
855*4882a593Smuzhiyun struct urb *urb = max3421_hcd->curr_urb;
856*4882a593Smuzhiyun struct max3421_ep *max3421_ep = urb->ep->hcpriv;
857*4882a593Smuzhiyun int switch_sndfifo;
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun /*
860*4882a593Smuzhiyun * If an OUT command results in any response other than OK
861*4882a593Smuzhiyun * (i.e., error or NAK), we have to perform a dummy-write to
862*4882a593Smuzhiyun * SNDBC so the FIFO gets switched back to us. Otherwise, we
863*4882a593Smuzhiyun * get out of sync with the SNDFIFO double buffer.
864*4882a593Smuzhiyun */
865*4882a593Smuzhiyun switch_sndfifo = (max3421_ep->pkt_state == PKT_STATE_TRANSFER &&
866*4882a593Smuzhiyun usb_urb_dir_out(urb));
867*4882a593Smuzhiyun
868*4882a593Smuzhiyun switch (result_code) {
869*4882a593Smuzhiyun case MAX3421_HRSL_OK:
870*4882a593Smuzhiyun return; /* this shouldn't happen */
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun case MAX3421_HRSL_WRONGPID: /* received wrong PID */
873*4882a593Smuzhiyun case MAX3421_HRSL_BUSY: /* SIE busy */
874*4882a593Smuzhiyun case MAX3421_HRSL_BADREQ: /* bad val in HXFR */
875*4882a593Smuzhiyun case MAX3421_HRSL_UNDEF: /* reserved */
876*4882a593Smuzhiyun case MAX3421_HRSL_KERR: /* K-state instead of response */
877*4882a593Smuzhiyun case MAX3421_HRSL_JERR: /* J-state instead of response */
878*4882a593Smuzhiyun /*
879*4882a593Smuzhiyun * packet experienced an error that we cannot recover
880*4882a593Smuzhiyun * from; report error
881*4882a593Smuzhiyun */
882*4882a593Smuzhiyun max3421_hcd->urb_done = hrsl_to_error[result_code];
883*4882a593Smuzhiyun dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
884*4882a593Smuzhiyun __func__, hrsl);
885*4882a593Smuzhiyun break;
886*4882a593Smuzhiyun
887*4882a593Smuzhiyun case MAX3421_HRSL_TOGERR:
888*4882a593Smuzhiyun if (usb_urb_dir_in(urb))
889*4882a593Smuzhiyun ; /* don't do anything (device will switch toggle) */
890*4882a593Smuzhiyun else {
891*4882a593Smuzhiyun /* flip the send toggle bit: */
892*4882a593Smuzhiyun int sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
893*4882a593Smuzhiyun
894*4882a593Smuzhiyun sndtog ^= 1;
895*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_HCTL,
896*4882a593Smuzhiyun BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
897*4882a593Smuzhiyun }
898*4882a593Smuzhiyun fallthrough;
899*4882a593Smuzhiyun case MAX3421_HRSL_BADBC: /* bad byte count */
900*4882a593Smuzhiyun case MAX3421_HRSL_PIDERR: /* received PID is corrupted */
901*4882a593Smuzhiyun case MAX3421_HRSL_PKTERR: /* packet error (stuff, EOP) */
902*4882a593Smuzhiyun case MAX3421_HRSL_CRCERR: /* CRC error */
903*4882a593Smuzhiyun case MAX3421_HRSL_BABBLE: /* device talked too long */
904*4882a593Smuzhiyun case MAX3421_HRSL_TIMEOUT:
905*4882a593Smuzhiyun if (max3421_ep->retries++ < USB_MAX_RETRIES)
906*4882a593Smuzhiyun /* retry the packet again in the next frame */
907*4882a593Smuzhiyun max3421_slow_retransmit(hcd);
908*4882a593Smuzhiyun else {
909*4882a593Smuzhiyun /* Based on ohci.h cc_to_err[]: */
910*4882a593Smuzhiyun max3421_hcd->urb_done = hrsl_to_error[result_code];
911*4882a593Smuzhiyun dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
912*4882a593Smuzhiyun __func__, hrsl);
913*4882a593Smuzhiyun }
914*4882a593Smuzhiyun break;
915*4882a593Smuzhiyun
916*4882a593Smuzhiyun case MAX3421_HRSL_STALL:
917*4882a593Smuzhiyun dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
918*4882a593Smuzhiyun __func__, hrsl);
919*4882a593Smuzhiyun max3421_hcd->urb_done = hrsl_to_error[result_code];
920*4882a593Smuzhiyun break;
921*4882a593Smuzhiyun
922*4882a593Smuzhiyun case MAX3421_HRSL_NAK:
923*4882a593Smuzhiyun /*
924*4882a593Smuzhiyun * Device wasn't ready for data or has no data
925*4882a593Smuzhiyun * available: retry the packet again.
926*4882a593Smuzhiyun */
927*4882a593Smuzhiyun if (max3421_ep->naks++ < NAK_MAX_FAST_RETRANSMITS) {
928*4882a593Smuzhiyun max3421_next_transfer(hcd, 1);
929*4882a593Smuzhiyun switch_sndfifo = 0;
930*4882a593Smuzhiyun } else
931*4882a593Smuzhiyun max3421_slow_retransmit(hcd);
932*4882a593Smuzhiyun break;
933*4882a593Smuzhiyun }
934*4882a593Smuzhiyun if (switch_sndfifo)
935*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
936*4882a593Smuzhiyun }
937*4882a593Smuzhiyun
938*4882a593Smuzhiyun /*
939*4882a593Smuzhiyun * Caller must NOT hold HCD spinlock.
940*4882a593Smuzhiyun */
941*4882a593Smuzhiyun static int
max3421_transfer_in_done(struct usb_hcd * hcd,struct urb * urb)942*4882a593Smuzhiyun max3421_transfer_in_done(struct usb_hcd *hcd, struct urb *urb)
943*4882a593Smuzhiyun {
944*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(hcd->self.controller);
945*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
946*4882a593Smuzhiyun u32 max_packet;
947*4882a593Smuzhiyun
948*4882a593Smuzhiyun if (urb->actual_length >= urb->transfer_buffer_length)
949*4882a593Smuzhiyun return 1; /* read is complete, so we're done */
950*4882a593Smuzhiyun
951*4882a593Smuzhiyun /*
952*4882a593Smuzhiyun * USB 2.0 Section 5.3.2 Pipes: packets must be full size
953*4882a593Smuzhiyun * except for last one.
954*4882a593Smuzhiyun */
955*4882a593Smuzhiyun max_packet = usb_maxpacket(urb->dev, urb->pipe, 0);
956*4882a593Smuzhiyun if (max_packet > MAX3421_FIFO_SIZE) {
957*4882a593Smuzhiyun /*
958*4882a593Smuzhiyun * We do not support isochronous transfers at this
959*4882a593Smuzhiyun * time...
960*4882a593Smuzhiyun */
961*4882a593Smuzhiyun dev_err(&spi->dev,
962*4882a593Smuzhiyun "%s: packet-size of %u too big (limit is %u bytes)",
963*4882a593Smuzhiyun __func__, max_packet, MAX3421_FIFO_SIZE);
964*4882a593Smuzhiyun return -EINVAL;
965*4882a593Smuzhiyun }
966*4882a593Smuzhiyun
967*4882a593Smuzhiyun if (max3421_hcd->curr_len < max_packet) {
968*4882a593Smuzhiyun if (urb->transfer_flags & URB_SHORT_NOT_OK) {
969*4882a593Smuzhiyun /*
970*4882a593Smuzhiyun * remaining > 0 and received an
971*4882a593Smuzhiyun * unexpected partial packet ->
972*4882a593Smuzhiyun * error
973*4882a593Smuzhiyun */
974*4882a593Smuzhiyun return -EREMOTEIO;
975*4882a593Smuzhiyun } else
976*4882a593Smuzhiyun /* short read, but it's OK */
977*4882a593Smuzhiyun return 1;
978*4882a593Smuzhiyun }
979*4882a593Smuzhiyun return 0; /* not done */
980*4882a593Smuzhiyun }
981*4882a593Smuzhiyun
982*4882a593Smuzhiyun /*
983*4882a593Smuzhiyun * Caller must NOT hold HCD spinlock.
984*4882a593Smuzhiyun */
985*4882a593Smuzhiyun static int
max3421_transfer_out_done(struct usb_hcd * hcd,struct urb * urb)986*4882a593Smuzhiyun max3421_transfer_out_done(struct usb_hcd *hcd, struct urb *urb)
987*4882a593Smuzhiyun {
988*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
989*4882a593Smuzhiyun
990*4882a593Smuzhiyun urb->actual_length += max3421_hcd->curr_len;
991*4882a593Smuzhiyun if (urb->actual_length < urb->transfer_buffer_length)
992*4882a593Smuzhiyun return 0;
993*4882a593Smuzhiyun if (urb->transfer_flags & URB_ZERO_PACKET) {
994*4882a593Smuzhiyun /*
995*4882a593Smuzhiyun * Some hardware needs a zero-size packet at the end
996*4882a593Smuzhiyun * of a bulk-out transfer if the last transfer was a
997*4882a593Smuzhiyun * full-sized packet (i.e., such hardware use <
998*4882a593Smuzhiyun * max_packet as an indicator that the end of the
999*4882a593Smuzhiyun * packet has been reached).
1000*4882a593Smuzhiyun */
1001*4882a593Smuzhiyun u32 max_packet = usb_maxpacket(urb->dev, urb->pipe, 1);
1002*4882a593Smuzhiyun
1003*4882a593Smuzhiyun if (max3421_hcd->curr_len == max_packet)
1004*4882a593Smuzhiyun return 0;
1005*4882a593Smuzhiyun }
1006*4882a593Smuzhiyun return 1;
1007*4882a593Smuzhiyun }
1008*4882a593Smuzhiyun
1009*4882a593Smuzhiyun /*
1010*4882a593Smuzhiyun * Caller must NOT hold HCD spinlock.
1011*4882a593Smuzhiyun */
1012*4882a593Smuzhiyun static void
max3421_host_transfer_done(struct usb_hcd * hcd)1013*4882a593Smuzhiyun max3421_host_transfer_done(struct usb_hcd *hcd)
1014*4882a593Smuzhiyun {
1015*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1016*4882a593Smuzhiyun struct urb *urb = max3421_hcd->curr_urb;
1017*4882a593Smuzhiyun struct max3421_ep *max3421_ep;
1018*4882a593Smuzhiyun u8 result_code, hrsl;
1019*4882a593Smuzhiyun int urb_done = 0;
1020*4882a593Smuzhiyun
1021*4882a593Smuzhiyun max3421_hcd->hien &= ~(BIT(MAX3421_HI_HXFRDN_BIT) |
1022*4882a593Smuzhiyun BIT(MAX3421_HI_RCVDAV_BIT));
1023*4882a593Smuzhiyun
1024*4882a593Smuzhiyun hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
1025*4882a593Smuzhiyun result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
1026*4882a593Smuzhiyun
1027*4882a593Smuzhiyun #ifdef DEBUG
1028*4882a593Smuzhiyun ++max3421_hcd->err_stat[result_code];
1029*4882a593Smuzhiyun #endif
1030*4882a593Smuzhiyun
1031*4882a593Smuzhiyun max3421_ep = urb->ep->hcpriv;
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun if (unlikely(result_code != MAX3421_HRSL_OK)) {
1034*4882a593Smuzhiyun max3421_handle_error(hcd, hrsl);
1035*4882a593Smuzhiyun return;
1036*4882a593Smuzhiyun }
1037*4882a593Smuzhiyun
1038*4882a593Smuzhiyun max3421_ep->naks = 0;
1039*4882a593Smuzhiyun max3421_ep->retries = 0;
1040*4882a593Smuzhiyun switch (max3421_ep->pkt_state) {
1041*4882a593Smuzhiyun
1042*4882a593Smuzhiyun case PKT_STATE_SETUP:
1043*4882a593Smuzhiyun if (urb->transfer_buffer_length > 0)
1044*4882a593Smuzhiyun max3421_ep->pkt_state = PKT_STATE_TRANSFER;
1045*4882a593Smuzhiyun else
1046*4882a593Smuzhiyun max3421_ep->pkt_state = PKT_STATE_TERMINATE;
1047*4882a593Smuzhiyun break;
1048*4882a593Smuzhiyun
1049*4882a593Smuzhiyun case PKT_STATE_TRANSFER:
1050*4882a593Smuzhiyun if (usb_urb_dir_in(urb))
1051*4882a593Smuzhiyun urb_done = max3421_transfer_in_done(hcd, urb);
1052*4882a593Smuzhiyun else
1053*4882a593Smuzhiyun urb_done = max3421_transfer_out_done(hcd, urb);
1054*4882a593Smuzhiyun if (urb_done > 0 && usb_pipetype(urb->pipe) == PIPE_CONTROL) {
1055*4882a593Smuzhiyun /*
1056*4882a593Smuzhiyun * We aren't really done - we still need to
1057*4882a593Smuzhiyun * terminate the control transfer:
1058*4882a593Smuzhiyun */
1059*4882a593Smuzhiyun max3421_hcd->urb_done = urb_done = 0;
1060*4882a593Smuzhiyun max3421_ep->pkt_state = PKT_STATE_TERMINATE;
1061*4882a593Smuzhiyun }
1062*4882a593Smuzhiyun break;
1063*4882a593Smuzhiyun
1064*4882a593Smuzhiyun case PKT_STATE_TERMINATE:
1065*4882a593Smuzhiyun urb_done = 1;
1066*4882a593Smuzhiyun break;
1067*4882a593Smuzhiyun }
1068*4882a593Smuzhiyun
1069*4882a593Smuzhiyun if (urb_done)
1070*4882a593Smuzhiyun max3421_hcd->urb_done = urb_done;
1071*4882a593Smuzhiyun else
1072*4882a593Smuzhiyun max3421_next_transfer(hcd, 0);
1073*4882a593Smuzhiyun }
1074*4882a593Smuzhiyun
1075*4882a593Smuzhiyun /*
1076*4882a593Smuzhiyun * Caller must NOT hold HCD spinlock.
1077*4882a593Smuzhiyun */
1078*4882a593Smuzhiyun static void
max3421_detect_conn(struct usb_hcd * hcd)1079*4882a593Smuzhiyun max3421_detect_conn(struct usb_hcd *hcd)
1080*4882a593Smuzhiyun {
1081*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1082*4882a593Smuzhiyun unsigned int jk, have_conn = 0;
1083*4882a593Smuzhiyun u32 old_port_status, chg;
1084*4882a593Smuzhiyun unsigned long flags;
1085*4882a593Smuzhiyun u8 hrsl, mode;
1086*4882a593Smuzhiyun
1087*4882a593Smuzhiyun hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
1088*4882a593Smuzhiyun
1089*4882a593Smuzhiyun jk = ((((hrsl >> MAX3421_HRSL_JSTATUS_BIT) & 1) << 0) |
1090*4882a593Smuzhiyun (((hrsl >> MAX3421_HRSL_KSTATUS_BIT) & 1) << 1));
1091*4882a593Smuzhiyun
1092*4882a593Smuzhiyun mode = max3421_hcd->mode;
1093*4882a593Smuzhiyun
1094*4882a593Smuzhiyun switch (jk) {
1095*4882a593Smuzhiyun case 0x0: /* SE0: disconnect */
1096*4882a593Smuzhiyun /*
1097*4882a593Smuzhiyun * Turn off SOFKAENAB bit to avoid getting interrupt
1098*4882a593Smuzhiyun * every milli-second:
1099*4882a593Smuzhiyun */
1100*4882a593Smuzhiyun mode &= ~BIT(MAX3421_MODE_SOFKAENAB_BIT);
1101*4882a593Smuzhiyun break;
1102*4882a593Smuzhiyun
1103*4882a593Smuzhiyun case 0x1: /* J=0,K=1: low-speed (in full-speed or vice versa) */
1104*4882a593Smuzhiyun case 0x2: /* J=1,K=0: full-speed (in full-speed or vice versa) */
1105*4882a593Smuzhiyun if (jk == 0x2)
1106*4882a593Smuzhiyun /* need to switch to the other speed: */
1107*4882a593Smuzhiyun mode ^= BIT(MAX3421_MODE_LOWSPEED_BIT);
1108*4882a593Smuzhiyun /* turn on SOFKAENAB bit: */
1109*4882a593Smuzhiyun mode |= BIT(MAX3421_MODE_SOFKAENAB_BIT);
1110*4882a593Smuzhiyun have_conn = 1;
1111*4882a593Smuzhiyun break;
1112*4882a593Smuzhiyun
1113*4882a593Smuzhiyun case 0x3: /* illegal */
1114*4882a593Smuzhiyun break;
1115*4882a593Smuzhiyun }
1116*4882a593Smuzhiyun
1117*4882a593Smuzhiyun max3421_hcd->mode = mode;
1118*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
1119*4882a593Smuzhiyun
1120*4882a593Smuzhiyun spin_lock_irqsave(&max3421_hcd->lock, flags);
1121*4882a593Smuzhiyun old_port_status = max3421_hcd->port_status;
1122*4882a593Smuzhiyun if (have_conn)
1123*4882a593Smuzhiyun max3421_hcd->port_status |= USB_PORT_STAT_CONNECTION;
1124*4882a593Smuzhiyun else
1125*4882a593Smuzhiyun max3421_hcd->port_status &= ~USB_PORT_STAT_CONNECTION;
1126*4882a593Smuzhiyun if (mode & BIT(MAX3421_MODE_LOWSPEED_BIT))
1127*4882a593Smuzhiyun max3421_hcd->port_status |= USB_PORT_STAT_LOW_SPEED;
1128*4882a593Smuzhiyun else
1129*4882a593Smuzhiyun max3421_hcd->port_status &= ~USB_PORT_STAT_LOW_SPEED;
1130*4882a593Smuzhiyun chg = (old_port_status ^ max3421_hcd->port_status);
1131*4882a593Smuzhiyun max3421_hcd->port_status |= chg << 16;
1132*4882a593Smuzhiyun spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1133*4882a593Smuzhiyun }
1134*4882a593Smuzhiyun
1135*4882a593Smuzhiyun static irqreturn_t
max3421_irq_handler(int irq,void * dev_id)1136*4882a593Smuzhiyun max3421_irq_handler(int irq, void *dev_id)
1137*4882a593Smuzhiyun {
1138*4882a593Smuzhiyun struct usb_hcd *hcd = dev_id;
1139*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(hcd->self.controller);
1140*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1141*4882a593Smuzhiyun
1142*4882a593Smuzhiyun if (max3421_hcd->spi_thread &&
1143*4882a593Smuzhiyun max3421_hcd->spi_thread->state != TASK_RUNNING)
1144*4882a593Smuzhiyun wake_up_process(max3421_hcd->spi_thread);
1145*4882a593Smuzhiyun if (!test_and_set_bit(ENABLE_IRQ, &max3421_hcd->todo))
1146*4882a593Smuzhiyun disable_irq_nosync(spi->irq);
1147*4882a593Smuzhiyun return IRQ_HANDLED;
1148*4882a593Smuzhiyun }
1149*4882a593Smuzhiyun
1150*4882a593Smuzhiyun #ifdef DEBUG
1151*4882a593Smuzhiyun
1152*4882a593Smuzhiyun static void
dump_eps(struct usb_hcd * hcd)1153*4882a593Smuzhiyun dump_eps(struct usb_hcd *hcd)
1154*4882a593Smuzhiyun {
1155*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1156*4882a593Smuzhiyun struct max3421_ep *max3421_ep;
1157*4882a593Smuzhiyun struct usb_host_endpoint *ep;
1158*4882a593Smuzhiyun char ubuf[512], *dp, *end;
1159*4882a593Smuzhiyun unsigned long flags;
1160*4882a593Smuzhiyun struct urb *urb;
1161*4882a593Smuzhiyun int epnum, ret;
1162*4882a593Smuzhiyun
1163*4882a593Smuzhiyun spin_lock_irqsave(&max3421_hcd->lock, flags);
1164*4882a593Smuzhiyun list_for_each_entry(max3421_ep, &max3421_hcd->ep_list, ep_list) {
1165*4882a593Smuzhiyun ep = max3421_ep->ep;
1166*4882a593Smuzhiyun
1167*4882a593Smuzhiyun dp = ubuf;
1168*4882a593Smuzhiyun end = dp + sizeof(ubuf);
1169*4882a593Smuzhiyun *dp = '\0';
1170*4882a593Smuzhiyun list_for_each_entry(urb, &ep->urb_list, urb_list) {
1171*4882a593Smuzhiyun ret = snprintf(dp, end - dp, " %p(%d.%s %d/%d)", urb,
1172*4882a593Smuzhiyun usb_pipetype(urb->pipe),
1173*4882a593Smuzhiyun usb_urb_dir_in(urb) ? "IN" : "OUT",
1174*4882a593Smuzhiyun urb->actual_length,
1175*4882a593Smuzhiyun urb->transfer_buffer_length);
1176*4882a593Smuzhiyun if (ret < 0 || ret >= end - dp)
1177*4882a593Smuzhiyun break; /* error or buffer full */
1178*4882a593Smuzhiyun dp += ret;
1179*4882a593Smuzhiyun }
1180*4882a593Smuzhiyun
1181*4882a593Smuzhiyun epnum = usb_endpoint_num(&ep->desc);
1182*4882a593Smuzhiyun pr_info("EP%0u %u lst %04u rtr %u nak %6u rxmt %u: %s\n",
1183*4882a593Smuzhiyun epnum, max3421_ep->pkt_state, max3421_ep->last_active,
1184*4882a593Smuzhiyun max3421_ep->retries, max3421_ep->naks,
1185*4882a593Smuzhiyun max3421_ep->retransmit, ubuf);
1186*4882a593Smuzhiyun }
1187*4882a593Smuzhiyun spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1188*4882a593Smuzhiyun }
1189*4882a593Smuzhiyun
1190*4882a593Smuzhiyun #endif /* DEBUG */
1191*4882a593Smuzhiyun
1192*4882a593Smuzhiyun /* Return zero if no work was performed, 1 otherwise. */
1193*4882a593Smuzhiyun static int
max3421_handle_irqs(struct usb_hcd * hcd)1194*4882a593Smuzhiyun max3421_handle_irqs(struct usb_hcd *hcd)
1195*4882a593Smuzhiyun {
1196*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1197*4882a593Smuzhiyun u32 chg, old_port_status;
1198*4882a593Smuzhiyun unsigned long flags;
1199*4882a593Smuzhiyun u8 hirq;
1200*4882a593Smuzhiyun
1201*4882a593Smuzhiyun /*
1202*4882a593Smuzhiyun * Read and ack pending interrupts (CPU must never
1203*4882a593Smuzhiyun * clear SNDBAV directly and RCVDAV must be cleared by
1204*4882a593Smuzhiyun * max3421_recv_data_available()!):
1205*4882a593Smuzhiyun */
1206*4882a593Smuzhiyun hirq = spi_rd8(hcd, MAX3421_REG_HIRQ);
1207*4882a593Smuzhiyun hirq &= max3421_hcd->hien;
1208*4882a593Smuzhiyun if (!hirq)
1209*4882a593Smuzhiyun return 0;
1210*4882a593Smuzhiyun
1211*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_HIRQ,
1212*4882a593Smuzhiyun hirq & ~(BIT(MAX3421_HI_SNDBAV_BIT) |
1213*4882a593Smuzhiyun BIT(MAX3421_HI_RCVDAV_BIT)));
1214*4882a593Smuzhiyun
1215*4882a593Smuzhiyun if (hirq & BIT(MAX3421_HI_FRAME_BIT)) {
1216*4882a593Smuzhiyun max3421_hcd->frame_number = ((max3421_hcd->frame_number + 1)
1217*4882a593Smuzhiyun & USB_MAX_FRAME_NUMBER);
1218*4882a593Smuzhiyun max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
1219*4882a593Smuzhiyun }
1220*4882a593Smuzhiyun
1221*4882a593Smuzhiyun if (hirq & BIT(MAX3421_HI_RCVDAV_BIT))
1222*4882a593Smuzhiyun max3421_recv_data_available(hcd);
1223*4882a593Smuzhiyun
1224*4882a593Smuzhiyun if (hirq & BIT(MAX3421_HI_HXFRDN_BIT))
1225*4882a593Smuzhiyun max3421_host_transfer_done(hcd);
1226*4882a593Smuzhiyun
1227*4882a593Smuzhiyun if (hirq & BIT(MAX3421_HI_CONDET_BIT))
1228*4882a593Smuzhiyun max3421_detect_conn(hcd);
1229*4882a593Smuzhiyun
1230*4882a593Smuzhiyun /*
1231*4882a593Smuzhiyun * Now process interrupts that may affect HCD state
1232*4882a593Smuzhiyun * other than the end-points:
1233*4882a593Smuzhiyun */
1234*4882a593Smuzhiyun spin_lock_irqsave(&max3421_hcd->lock, flags);
1235*4882a593Smuzhiyun
1236*4882a593Smuzhiyun old_port_status = max3421_hcd->port_status;
1237*4882a593Smuzhiyun if (hirq & BIT(MAX3421_HI_BUSEVENT_BIT)) {
1238*4882a593Smuzhiyun if (max3421_hcd->port_status & USB_PORT_STAT_RESET) {
1239*4882a593Smuzhiyun /* BUSEVENT due to completion of Bus Reset */
1240*4882a593Smuzhiyun max3421_hcd->port_status &= ~USB_PORT_STAT_RESET;
1241*4882a593Smuzhiyun max3421_hcd->port_status |= USB_PORT_STAT_ENABLE;
1242*4882a593Smuzhiyun } else {
1243*4882a593Smuzhiyun /* BUSEVENT due to completion of Bus Resume */
1244*4882a593Smuzhiyun pr_info("%s: BUSEVENT Bus Resume Done\n", __func__);
1245*4882a593Smuzhiyun }
1246*4882a593Smuzhiyun }
1247*4882a593Smuzhiyun if (hirq & BIT(MAX3421_HI_RWU_BIT))
1248*4882a593Smuzhiyun pr_info("%s: RWU\n", __func__);
1249*4882a593Smuzhiyun if (hirq & BIT(MAX3421_HI_SUSDN_BIT))
1250*4882a593Smuzhiyun pr_info("%s: SUSDN\n", __func__);
1251*4882a593Smuzhiyun
1252*4882a593Smuzhiyun chg = (old_port_status ^ max3421_hcd->port_status);
1253*4882a593Smuzhiyun max3421_hcd->port_status |= chg << 16;
1254*4882a593Smuzhiyun
1255*4882a593Smuzhiyun spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1256*4882a593Smuzhiyun
1257*4882a593Smuzhiyun #ifdef DEBUG
1258*4882a593Smuzhiyun {
1259*4882a593Smuzhiyun static unsigned long last_time;
1260*4882a593Smuzhiyun char sbuf[16 * 16], *dp, *end;
1261*4882a593Smuzhiyun int i;
1262*4882a593Smuzhiyun
1263*4882a593Smuzhiyun if (time_after(jiffies, last_time + 5*HZ)) {
1264*4882a593Smuzhiyun dp = sbuf;
1265*4882a593Smuzhiyun end = sbuf + sizeof(sbuf);
1266*4882a593Smuzhiyun *dp = '\0';
1267*4882a593Smuzhiyun for (i = 0; i < 16; ++i) {
1268*4882a593Smuzhiyun int ret = snprintf(dp, end - dp, " %lu",
1269*4882a593Smuzhiyun max3421_hcd->err_stat[i]);
1270*4882a593Smuzhiyun if (ret < 0 || ret >= end - dp)
1271*4882a593Smuzhiyun break; /* error or buffer full */
1272*4882a593Smuzhiyun dp += ret;
1273*4882a593Smuzhiyun }
1274*4882a593Smuzhiyun pr_info("%s: hrsl_stats %s\n", __func__, sbuf);
1275*4882a593Smuzhiyun memset(max3421_hcd->err_stat, 0,
1276*4882a593Smuzhiyun sizeof(max3421_hcd->err_stat));
1277*4882a593Smuzhiyun last_time = jiffies;
1278*4882a593Smuzhiyun
1279*4882a593Smuzhiyun dump_eps(hcd);
1280*4882a593Smuzhiyun }
1281*4882a593Smuzhiyun }
1282*4882a593Smuzhiyun #endif
1283*4882a593Smuzhiyun return 1;
1284*4882a593Smuzhiyun }
1285*4882a593Smuzhiyun
1286*4882a593Smuzhiyun static int
max3421_reset_hcd(struct usb_hcd * hcd)1287*4882a593Smuzhiyun max3421_reset_hcd(struct usb_hcd *hcd)
1288*4882a593Smuzhiyun {
1289*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(hcd->self.controller);
1290*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1291*4882a593Smuzhiyun int timeout;
1292*4882a593Smuzhiyun
1293*4882a593Smuzhiyun /* perform a chip reset and wait for OSCIRQ signal to appear: */
1294*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_USBCTL, BIT(MAX3421_USBCTL_CHIPRES_BIT));
1295*4882a593Smuzhiyun /* clear reset: */
1296*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_USBCTL, 0);
1297*4882a593Smuzhiyun timeout = 1000;
1298*4882a593Smuzhiyun while (1) {
1299*4882a593Smuzhiyun if (spi_rd8(hcd, MAX3421_REG_USBIRQ)
1300*4882a593Smuzhiyun & BIT(MAX3421_USBIRQ_OSCOKIRQ_BIT))
1301*4882a593Smuzhiyun break;
1302*4882a593Smuzhiyun if (--timeout < 0) {
1303*4882a593Smuzhiyun dev_err(&spi->dev,
1304*4882a593Smuzhiyun "timed out waiting for oscillator OK signal");
1305*4882a593Smuzhiyun return 1;
1306*4882a593Smuzhiyun }
1307*4882a593Smuzhiyun cond_resched();
1308*4882a593Smuzhiyun }
1309*4882a593Smuzhiyun
1310*4882a593Smuzhiyun /*
1311*4882a593Smuzhiyun * Turn on host mode, automatic generation of SOF packets, and
1312*4882a593Smuzhiyun * enable pull-down registers on DM/DP:
1313*4882a593Smuzhiyun */
1314*4882a593Smuzhiyun max3421_hcd->mode = (BIT(MAX3421_MODE_HOST_BIT) |
1315*4882a593Smuzhiyun BIT(MAX3421_MODE_SOFKAENAB_BIT) |
1316*4882a593Smuzhiyun BIT(MAX3421_MODE_DMPULLDN_BIT) |
1317*4882a593Smuzhiyun BIT(MAX3421_MODE_DPPULLDN_BIT));
1318*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
1319*4882a593Smuzhiyun
1320*4882a593Smuzhiyun /* reset frame-number: */
1321*4882a593Smuzhiyun max3421_hcd->frame_number = USB_MAX_FRAME_NUMBER;
1322*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_FRMRST_BIT));
1323*4882a593Smuzhiyun
1324*4882a593Smuzhiyun /* sample the state of the D+ and D- lines */
1325*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_SAMPLEBUS_BIT));
1326*4882a593Smuzhiyun max3421_detect_conn(hcd);
1327*4882a593Smuzhiyun
1328*4882a593Smuzhiyun /* enable frame, connection-detected, and bus-event interrupts: */
1329*4882a593Smuzhiyun max3421_hcd->hien = (BIT(MAX3421_HI_FRAME_BIT) |
1330*4882a593Smuzhiyun BIT(MAX3421_HI_CONDET_BIT) |
1331*4882a593Smuzhiyun BIT(MAX3421_HI_BUSEVENT_BIT));
1332*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
1333*4882a593Smuzhiyun
1334*4882a593Smuzhiyun /* enable interrupts: */
1335*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_CPUCTL, BIT(MAX3421_CPUCTL_IE_BIT));
1336*4882a593Smuzhiyun return 1;
1337*4882a593Smuzhiyun }
1338*4882a593Smuzhiyun
1339*4882a593Smuzhiyun static int
max3421_urb_done(struct usb_hcd * hcd)1340*4882a593Smuzhiyun max3421_urb_done(struct usb_hcd *hcd)
1341*4882a593Smuzhiyun {
1342*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1343*4882a593Smuzhiyun unsigned long flags;
1344*4882a593Smuzhiyun struct urb *urb;
1345*4882a593Smuzhiyun int status;
1346*4882a593Smuzhiyun
1347*4882a593Smuzhiyun status = max3421_hcd->urb_done;
1348*4882a593Smuzhiyun max3421_hcd->urb_done = 0;
1349*4882a593Smuzhiyun if (status > 0)
1350*4882a593Smuzhiyun status = 0;
1351*4882a593Smuzhiyun urb = max3421_hcd->curr_urb;
1352*4882a593Smuzhiyun if (urb) {
1353*4882a593Smuzhiyun /* save the old end-points toggles: */
1354*4882a593Smuzhiyun u8 hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
1355*4882a593Smuzhiyun int rcvtog = (hrsl >> MAX3421_HRSL_RCVTOGRD_BIT) & 1;
1356*4882a593Smuzhiyun int sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
1357*4882a593Smuzhiyun int epnum = usb_endpoint_num(&urb->ep->desc);
1358*4882a593Smuzhiyun
1359*4882a593Smuzhiyun /* no locking: HCD (i.e., we) own toggles, don't we? */
1360*4882a593Smuzhiyun usb_settoggle(urb->dev, epnum, 0, rcvtog);
1361*4882a593Smuzhiyun usb_settoggle(urb->dev, epnum, 1, sndtog);
1362*4882a593Smuzhiyun
1363*4882a593Smuzhiyun max3421_hcd->curr_urb = NULL;
1364*4882a593Smuzhiyun spin_lock_irqsave(&max3421_hcd->lock, flags);
1365*4882a593Smuzhiyun usb_hcd_unlink_urb_from_ep(hcd, urb);
1366*4882a593Smuzhiyun spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1367*4882a593Smuzhiyun
1368*4882a593Smuzhiyun /* must be called without the HCD spinlock: */
1369*4882a593Smuzhiyun usb_hcd_giveback_urb(hcd, urb, status);
1370*4882a593Smuzhiyun }
1371*4882a593Smuzhiyun return 1;
1372*4882a593Smuzhiyun }
1373*4882a593Smuzhiyun
1374*4882a593Smuzhiyun static int
max3421_spi_thread(void * dev_id)1375*4882a593Smuzhiyun max3421_spi_thread(void *dev_id)
1376*4882a593Smuzhiyun {
1377*4882a593Smuzhiyun struct usb_hcd *hcd = dev_id;
1378*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(hcd->self.controller);
1379*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1380*4882a593Smuzhiyun int i, i_worked = 1;
1381*4882a593Smuzhiyun
1382*4882a593Smuzhiyun /* set full-duplex SPI mode, low-active interrupt pin: */
1383*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_PINCTL,
1384*4882a593Smuzhiyun (BIT(MAX3421_PINCTL_FDUPSPI_BIT) | /* full-duplex */
1385*4882a593Smuzhiyun BIT(MAX3421_PINCTL_INTLEVEL_BIT))); /* low-active irq */
1386*4882a593Smuzhiyun
1387*4882a593Smuzhiyun while (!kthread_should_stop()) {
1388*4882a593Smuzhiyun max3421_hcd->rev = spi_rd8(hcd, MAX3421_REG_REVISION);
1389*4882a593Smuzhiyun if (max3421_hcd->rev == 0x12 || max3421_hcd->rev == 0x13)
1390*4882a593Smuzhiyun break;
1391*4882a593Smuzhiyun dev_err(&spi->dev, "bad rev 0x%02x", max3421_hcd->rev);
1392*4882a593Smuzhiyun msleep(10000);
1393*4882a593Smuzhiyun }
1394*4882a593Smuzhiyun dev_info(&spi->dev, "rev 0x%x, SPI clk %dHz, bpw %u, irq %d\n",
1395*4882a593Smuzhiyun max3421_hcd->rev, spi->max_speed_hz, spi->bits_per_word,
1396*4882a593Smuzhiyun spi->irq);
1397*4882a593Smuzhiyun
1398*4882a593Smuzhiyun while (!kthread_should_stop()) {
1399*4882a593Smuzhiyun if (!i_worked) {
1400*4882a593Smuzhiyun /*
1401*4882a593Smuzhiyun * We'll be waiting for wakeups from the hard
1402*4882a593Smuzhiyun * interrupt handler, so now is a good time to
1403*4882a593Smuzhiyun * sync our hien with the chip:
1404*4882a593Smuzhiyun */
1405*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
1406*4882a593Smuzhiyun
1407*4882a593Smuzhiyun set_current_state(TASK_INTERRUPTIBLE);
1408*4882a593Smuzhiyun if (test_and_clear_bit(ENABLE_IRQ, &max3421_hcd->todo))
1409*4882a593Smuzhiyun enable_irq(spi->irq);
1410*4882a593Smuzhiyun schedule();
1411*4882a593Smuzhiyun __set_current_state(TASK_RUNNING);
1412*4882a593Smuzhiyun }
1413*4882a593Smuzhiyun
1414*4882a593Smuzhiyun i_worked = 0;
1415*4882a593Smuzhiyun
1416*4882a593Smuzhiyun if (max3421_hcd->urb_done)
1417*4882a593Smuzhiyun i_worked |= max3421_urb_done(hcd);
1418*4882a593Smuzhiyun else if (max3421_handle_irqs(hcd))
1419*4882a593Smuzhiyun i_worked = 1;
1420*4882a593Smuzhiyun else if (!max3421_hcd->curr_urb)
1421*4882a593Smuzhiyun i_worked |= max3421_select_and_start_urb(hcd);
1422*4882a593Smuzhiyun
1423*4882a593Smuzhiyun if (test_and_clear_bit(RESET_HCD, &max3421_hcd->todo))
1424*4882a593Smuzhiyun /* reset the HCD: */
1425*4882a593Smuzhiyun i_worked |= max3421_reset_hcd(hcd);
1426*4882a593Smuzhiyun if (test_and_clear_bit(RESET_PORT, &max3421_hcd->todo)) {
1427*4882a593Smuzhiyun /* perform a USB bus reset: */
1428*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_HCTL,
1429*4882a593Smuzhiyun BIT(MAX3421_HCTL_BUSRST_BIT));
1430*4882a593Smuzhiyun i_worked = 1;
1431*4882a593Smuzhiyun }
1432*4882a593Smuzhiyun if (test_and_clear_bit(CHECK_UNLINK, &max3421_hcd->todo))
1433*4882a593Smuzhiyun i_worked |= max3421_check_unlink(hcd);
1434*4882a593Smuzhiyun if (test_and_clear_bit(IOPIN_UPDATE, &max3421_hcd->todo)) {
1435*4882a593Smuzhiyun /*
1436*4882a593Smuzhiyun * IOPINS1/IOPINS2 do not auto-increment, so we can't
1437*4882a593Smuzhiyun * use spi_wr_buf().
1438*4882a593Smuzhiyun */
1439*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(max3421_hcd->iopins); ++i) {
1440*4882a593Smuzhiyun u8 val = spi_rd8(hcd, MAX3421_REG_IOPINS1);
1441*4882a593Smuzhiyun
1442*4882a593Smuzhiyun val = ((val & 0xf0) |
1443*4882a593Smuzhiyun (max3421_hcd->iopins[i] & 0x0f));
1444*4882a593Smuzhiyun spi_wr8(hcd, MAX3421_REG_IOPINS1 + i, val);
1445*4882a593Smuzhiyun max3421_hcd->iopins[i] = val;
1446*4882a593Smuzhiyun }
1447*4882a593Smuzhiyun i_worked = 1;
1448*4882a593Smuzhiyun }
1449*4882a593Smuzhiyun }
1450*4882a593Smuzhiyun set_current_state(TASK_RUNNING);
1451*4882a593Smuzhiyun dev_info(&spi->dev, "SPI thread exiting");
1452*4882a593Smuzhiyun return 0;
1453*4882a593Smuzhiyun }
1454*4882a593Smuzhiyun
1455*4882a593Smuzhiyun static int
max3421_reset_port(struct usb_hcd * hcd)1456*4882a593Smuzhiyun max3421_reset_port(struct usb_hcd *hcd)
1457*4882a593Smuzhiyun {
1458*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1459*4882a593Smuzhiyun
1460*4882a593Smuzhiyun max3421_hcd->port_status &= ~(USB_PORT_STAT_ENABLE |
1461*4882a593Smuzhiyun USB_PORT_STAT_LOW_SPEED);
1462*4882a593Smuzhiyun max3421_hcd->port_status |= USB_PORT_STAT_RESET;
1463*4882a593Smuzhiyun set_bit(RESET_PORT, &max3421_hcd->todo);
1464*4882a593Smuzhiyun wake_up_process(max3421_hcd->spi_thread);
1465*4882a593Smuzhiyun return 0;
1466*4882a593Smuzhiyun }
1467*4882a593Smuzhiyun
1468*4882a593Smuzhiyun static int
max3421_reset(struct usb_hcd * hcd)1469*4882a593Smuzhiyun max3421_reset(struct usb_hcd *hcd)
1470*4882a593Smuzhiyun {
1471*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1472*4882a593Smuzhiyun
1473*4882a593Smuzhiyun hcd->self.sg_tablesize = 0;
1474*4882a593Smuzhiyun hcd->speed = HCD_USB2;
1475*4882a593Smuzhiyun hcd->self.root_hub->speed = USB_SPEED_FULL;
1476*4882a593Smuzhiyun set_bit(RESET_HCD, &max3421_hcd->todo);
1477*4882a593Smuzhiyun wake_up_process(max3421_hcd->spi_thread);
1478*4882a593Smuzhiyun return 0;
1479*4882a593Smuzhiyun }
1480*4882a593Smuzhiyun
1481*4882a593Smuzhiyun static int
max3421_start(struct usb_hcd * hcd)1482*4882a593Smuzhiyun max3421_start(struct usb_hcd *hcd)
1483*4882a593Smuzhiyun {
1484*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1485*4882a593Smuzhiyun
1486*4882a593Smuzhiyun spin_lock_init(&max3421_hcd->lock);
1487*4882a593Smuzhiyun max3421_hcd->rh_state = MAX3421_RH_RUNNING;
1488*4882a593Smuzhiyun
1489*4882a593Smuzhiyun INIT_LIST_HEAD(&max3421_hcd->ep_list);
1490*4882a593Smuzhiyun
1491*4882a593Smuzhiyun hcd->power_budget = POWER_BUDGET;
1492*4882a593Smuzhiyun hcd->state = HC_STATE_RUNNING;
1493*4882a593Smuzhiyun hcd->uses_new_polling = 1;
1494*4882a593Smuzhiyun return 0;
1495*4882a593Smuzhiyun }
1496*4882a593Smuzhiyun
1497*4882a593Smuzhiyun static void
max3421_stop(struct usb_hcd * hcd)1498*4882a593Smuzhiyun max3421_stop(struct usb_hcd *hcd)
1499*4882a593Smuzhiyun {
1500*4882a593Smuzhiyun }
1501*4882a593Smuzhiyun
1502*4882a593Smuzhiyun static int
max3421_urb_enqueue(struct usb_hcd * hcd,struct urb * urb,gfp_t mem_flags)1503*4882a593Smuzhiyun max3421_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1504*4882a593Smuzhiyun {
1505*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(hcd->self.controller);
1506*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1507*4882a593Smuzhiyun struct max3421_ep *max3421_ep;
1508*4882a593Smuzhiyun unsigned long flags;
1509*4882a593Smuzhiyun int retval;
1510*4882a593Smuzhiyun
1511*4882a593Smuzhiyun switch (usb_pipetype(urb->pipe)) {
1512*4882a593Smuzhiyun case PIPE_INTERRUPT:
1513*4882a593Smuzhiyun case PIPE_ISOCHRONOUS:
1514*4882a593Smuzhiyun if (urb->interval < 0) {
1515*4882a593Smuzhiyun dev_err(&spi->dev,
1516*4882a593Smuzhiyun "%s: interval=%d for intr-/iso-pipe; expected > 0\n",
1517*4882a593Smuzhiyun __func__, urb->interval);
1518*4882a593Smuzhiyun return -EINVAL;
1519*4882a593Smuzhiyun }
1520*4882a593Smuzhiyun default:
1521*4882a593Smuzhiyun break;
1522*4882a593Smuzhiyun }
1523*4882a593Smuzhiyun
1524*4882a593Smuzhiyun spin_lock_irqsave(&max3421_hcd->lock, flags);
1525*4882a593Smuzhiyun
1526*4882a593Smuzhiyun max3421_ep = urb->ep->hcpriv;
1527*4882a593Smuzhiyun if (!max3421_ep) {
1528*4882a593Smuzhiyun /* gets freed in max3421_endpoint_disable: */
1529*4882a593Smuzhiyun max3421_ep = kzalloc(sizeof(struct max3421_ep), GFP_ATOMIC);
1530*4882a593Smuzhiyun if (!max3421_ep) {
1531*4882a593Smuzhiyun retval = -ENOMEM;
1532*4882a593Smuzhiyun goto out;
1533*4882a593Smuzhiyun }
1534*4882a593Smuzhiyun max3421_ep->ep = urb->ep;
1535*4882a593Smuzhiyun max3421_ep->last_active = max3421_hcd->frame_number;
1536*4882a593Smuzhiyun urb->ep->hcpriv = max3421_ep;
1537*4882a593Smuzhiyun
1538*4882a593Smuzhiyun list_add_tail(&max3421_ep->ep_list, &max3421_hcd->ep_list);
1539*4882a593Smuzhiyun }
1540*4882a593Smuzhiyun
1541*4882a593Smuzhiyun retval = usb_hcd_link_urb_to_ep(hcd, urb);
1542*4882a593Smuzhiyun if (retval == 0) {
1543*4882a593Smuzhiyun /* Since we added to the queue, restart scheduling: */
1544*4882a593Smuzhiyun max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
1545*4882a593Smuzhiyun wake_up_process(max3421_hcd->spi_thread);
1546*4882a593Smuzhiyun }
1547*4882a593Smuzhiyun
1548*4882a593Smuzhiyun out:
1549*4882a593Smuzhiyun spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1550*4882a593Smuzhiyun return retval;
1551*4882a593Smuzhiyun }
1552*4882a593Smuzhiyun
1553*4882a593Smuzhiyun static int
max3421_urb_dequeue(struct usb_hcd * hcd,struct urb * urb,int status)1554*4882a593Smuzhiyun max3421_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1555*4882a593Smuzhiyun {
1556*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1557*4882a593Smuzhiyun unsigned long flags;
1558*4882a593Smuzhiyun int retval;
1559*4882a593Smuzhiyun
1560*4882a593Smuzhiyun spin_lock_irqsave(&max3421_hcd->lock, flags);
1561*4882a593Smuzhiyun
1562*4882a593Smuzhiyun /*
1563*4882a593Smuzhiyun * This will set urb->unlinked which in turn causes the entry
1564*4882a593Smuzhiyun * to be dropped at the next opportunity.
1565*4882a593Smuzhiyun */
1566*4882a593Smuzhiyun retval = usb_hcd_check_unlink_urb(hcd, urb, status);
1567*4882a593Smuzhiyun if (retval == 0) {
1568*4882a593Smuzhiyun set_bit(CHECK_UNLINK, &max3421_hcd->todo);
1569*4882a593Smuzhiyun wake_up_process(max3421_hcd->spi_thread);
1570*4882a593Smuzhiyun }
1571*4882a593Smuzhiyun spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1572*4882a593Smuzhiyun return retval;
1573*4882a593Smuzhiyun }
1574*4882a593Smuzhiyun
1575*4882a593Smuzhiyun static void
max3421_endpoint_disable(struct usb_hcd * hcd,struct usb_host_endpoint * ep)1576*4882a593Smuzhiyun max3421_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1577*4882a593Smuzhiyun {
1578*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1579*4882a593Smuzhiyun unsigned long flags;
1580*4882a593Smuzhiyun
1581*4882a593Smuzhiyun spin_lock_irqsave(&max3421_hcd->lock, flags);
1582*4882a593Smuzhiyun
1583*4882a593Smuzhiyun if (ep->hcpriv) {
1584*4882a593Smuzhiyun struct max3421_ep *max3421_ep = ep->hcpriv;
1585*4882a593Smuzhiyun
1586*4882a593Smuzhiyun /* remove myself from the ep_list: */
1587*4882a593Smuzhiyun if (!list_empty(&max3421_ep->ep_list))
1588*4882a593Smuzhiyun list_del(&max3421_ep->ep_list);
1589*4882a593Smuzhiyun kfree(max3421_ep);
1590*4882a593Smuzhiyun ep->hcpriv = NULL;
1591*4882a593Smuzhiyun }
1592*4882a593Smuzhiyun
1593*4882a593Smuzhiyun spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1594*4882a593Smuzhiyun }
1595*4882a593Smuzhiyun
1596*4882a593Smuzhiyun static int
max3421_get_frame_number(struct usb_hcd * hcd)1597*4882a593Smuzhiyun max3421_get_frame_number(struct usb_hcd *hcd)
1598*4882a593Smuzhiyun {
1599*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1600*4882a593Smuzhiyun return max3421_hcd->frame_number;
1601*4882a593Smuzhiyun }
1602*4882a593Smuzhiyun
1603*4882a593Smuzhiyun /*
1604*4882a593Smuzhiyun * Should return a non-zero value when any port is undergoing a resume
1605*4882a593Smuzhiyun * transition while the root hub is suspended.
1606*4882a593Smuzhiyun */
1607*4882a593Smuzhiyun static int
max3421_hub_status_data(struct usb_hcd * hcd,char * buf)1608*4882a593Smuzhiyun max3421_hub_status_data(struct usb_hcd *hcd, char *buf)
1609*4882a593Smuzhiyun {
1610*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1611*4882a593Smuzhiyun unsigned long flags;
1612*4882a593Smuzhiyun int retval = 0;
1613*4882a593Smuzhiyun
1614*4882a593Smuzhiyun spin_lock_irqsave(&max3421_hcd->lock, flags);
1615*4882a593Smuzhiyun if (!HCD_HW_ACCESSIBLE(hcd))
1616*4882a593Smuzhiyun goto done;
1617*4882a593Smuzhiyun
1618*4882a593Smuzhiyun *buf = 0;
1619*4882a593Smuzhiyun if ((max3421_hcd->port_status & PORT_C_MASK) != 0) {
1620*4882a593Smuzhiyun *buf = (1 << 1); /* a hub over-current condition exists */
1621*4882a593Smuzhiyun dev_dbg(hcd->self.controller,
1622*4882a593Smuzhiyun "port status 0x%08x has changes\n",
1623*4882a593Smuzhiyun max3421_hcd->port_status);
1624*4882a593Smuzhiyun retval = 1;
1625*4882a593Smuzhiyun if (max3421_hcd->rh_state == MAX3421_RH_SUSPENDED)
1626*4882a593Smuzhiyun usb_hcd_resume_root_hub(hcd);
1627*4882a593Smuzhiyun }
1628*4882a593Smuzhiyun done:
1629*4882a593Smuzhiyun spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1630*4882a593Smuzhiyun return retval;
1631*4882a593Smuzhiyun }
1632*4882a593Smuzhiyun
1633*4882a593Smuzhiyun static inline void
hub_descriptor(struct usb_hub_descriptor * desc)1634*4882a593Smuzhiyun hub_descriptor(struct usb_hub_descriptor *desc)
1635*4882a593Smuzhiyun {
1636*4882a593Smuzhiyun memset(desc, 0, sizeof(*desc));
1637*4882a593Smuzhiyun /*
1638*4882a593Smuzhiyun * See Table 11-13: Hub Descriptor in USB 2.0 spec.
1639*4882a593Smuzhiyun */
1640*4882a593Smuzhiyun desc->bDescriptorType = USB_DT_HUB; /* hub descriptor */
1641*4882a593Smuzhiyun desc->bDescLength = 9;
1642*4882a593Smuzhiyun desc->wHubCharacteristics = cpu_to_le16(HUB_CHAR_INDV_PORT_LPSM |
1643*4882a593Smuzhiyun HUB_CHAR_COMMON_OCPM);
1644*4882a593Smuzhiyun desc->bNbrPorts = 1;
1645*4882a593Smuzhiyun }
1646*4882a593Smuzhiyun
1647*4882a593Smuzhiyun /*
1648*4882a593Smuzhiyun * Set the MAX3421E general-purpose output with number PIN_NUMBER to
1649*4882a593Smuzhiyun * VALUE (0 or 1). PIN_NUMBER may be in the range from 1-8. For
1650*4882a593Smuzhiyun * any other value, this function acts as a no-op.
1651*4882a593Smuzhiyun */
1652*4882a593Smuzhiyun static void
max3421_gpout_set_value(struct usb_hcd * hcd,u8 pin_number,u8 value)1653*4882a593Smuzhiyun max3421_gpout_set_value(struct usb_hcd *hcd, u8 pin_number, u8 value)
1654*4882a593Smuzhiyun {
1655*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1656*4882a593Smuzhiyun u8 mask, idx;
1657*4882a593Smuzhiyun
1658*4882a593Smuzhiyun --pin_number;
1659*4882a593Smuzhiyun if (pin_number >= MAX3421_GPOUT_COUNT)
1660*4882a593Smuzhiyun return;
1661*4882a593Smuzhiyun
1662*4882a593Smuzhiyun mask = 1u << (pin_number % 4);
1663*4882a593Smuzhiyun idx = pin_number / 4;
1664*4882a593Smuzhiyun
1665*4882a593Smuzhiyun if (value)
1666*4882a593Smuzhiyun max3421_hcd->iopins[idx] |= mask;
1667*4882a593Smuzhiyun else
1668*4882a593Smuzhiyun max3421_hcd->iopins[idx] &= ~mask;
1669*4882a593Smuzhiyun set_bit(IOPIN_UPDATE, &max3421_hcd->todo);
1670*4882a593Smuzhiyun wake_up_process(max3421_hcd->spi_thread);
1671*4882a593Smuzhiyun }
1672*4882a593Smuzhiyun
1673*4882a593Smuzhiyun static int
max3421_hub_control(struct usb_hcd * hcd,u16 type_req,u16 value,u16 index,char * buf,u16 length)1674*4882a593Smuzhiyun max3421_hub_control(struct usb_hcd *hcd, u16 type_req, u16 value, u16 index,
1675*4882a593Smuzhiyun char *buf, u16 length)
1676*4882a593Smuzhiyun {
1677*4882a593Smuzhiyun struct spi_device *spi = to_spi_device(hcd->self.controller);
1678*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1679*4882a593Smuzhiyun struct max3421_hcd_platform_data *pdata;
1680*4882a593Smuzhiyun unsigned long flags;
1681*4882a593Smuzhiyun int retval = 0;
1682*4882a593Smuzhiyun
1683*4882a593Smuzhiyun pdata = spi->dev.platform_data;
1684*4882a593Smuzhiyun
1685*4882a593Smuzhiyun spin_lock_irqsave(&max3421_hcd->lock, flags);
1686*4882a593Smuzhiyun
1687*4882a593Smuzhiyun switch (type_req) {
1688*4882a593Smuzhiyun case ClearHubFeature:
1689*4882a593Smuzhiyun break;
1690*4882a593Smuzhiyun case ClearPortFeature:
1691*4882a593Smuzhiyun switch (value) {
1692*4882a593Smuzhiyun case USB_PORT_FEAT_SUSPEND:
1693*4882a593Smuzhiyun break;
1694*4882a593Smuzhiyun case USB_PORT_FEAT_POWER:
1695*4882a593Smuzhiyun dev_dbg(hcd->self.controller, "power-off\n");
1696*4882a593Smuzhiyun max3421_gpout_set_value(hcd, pdata->vbus_gpout,
1697*4882a593Smuzhiyun !pdata->vbus_active_level);
1698*4882a593Smuzhiyun fallthrough;
1699*4882a593Smuzhiyun default:
1700*4882a593Smuzhiyun max3421_hcd->port_status &= ~(1 << value);
1701*4882a593Smuzhiyun }
1702*4882a593Smuzhiyun break;
1703*4882a593Smuzhiyun case GetHubDescriptor:
1704*4882a593Smuzhiyun hub_descriptor((struct usb_hub_descriptor *) buf);
1705*4882a593Smuzhiyun break;
1706*4882a593Smuzhiyun
1707*4882a593Smuzhiyun case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
1708*4882a593Smuzhiyun case GetPortErrorCount:
1709*4882a593Smuzhiyun case SetHubDepth:
1710*4882a593Smuzhiyun /* USB3 only */
1711*4882a593Smuzhiyun goto error;
1712*4882a593Smuzhiyun
1713*4882a593Smuzhiyun case GetHubStatus:
1714*4882a593Smuzhiyun *(__le32 *) buf = cpu_to_le32(0);
1715*4882a593Smuzhiyun break;
1716*4882a593Smuzhiyun
1717*4882a593Smuzhiyun case GetPortStatus:
1718*4882a593Smuzhiyun if (index != 1) {
1719*4882a593Smuzhiyun retval = -EPIPE;
1720*4882a593Smuzhiyun goto error;
1721*4882a593Smuzhiyun }
1722*4882a593Smuzhiyun ((__le16 *) buf)[0] = cpu_to_le16(max3421_hcd->port_status);
1723*4882a593Smuzhiyun ((__le16 *) buf)[1] =
1724*4882a593Smuzhiyun cpu_to_le16(max3421_hcd->port_status >> 16);
1725*4882a593Smuzhiyun break;
1726*4882a593Smuzhiyun
1727*4882a593Smuzhiyun case SetHubFeature:
1728*4882a593Smuzhiyun retval = -EPIPE;
1729*4882a593Smuzhiyun break;
1730*4882a593Smuzhiyun
1731*4882a593Smuzhiyun case SetPortFeature:
1732*4882a593Smuzhiyun switch (value) {
1733*4882a593Smuzhiyun case USB_PORT_FEAT_LINK_STATE:
1734*4882a593Smuzhiyun case USB_PORT_FEAT_U1_TIMEOUT:
1735*4882a593Smuzhiyun case USB_PORT_FEAT_U2_TIMEOUT:
1736*4882a593Smuzhiyun case USB_PORT_FEAT_BH_PORT_RESET:
1737*4882a593Smuzhiyun goto error;
1738*4882a593Smuzhiyun case USB_PORT_FEAT_SUSPEND:
1739*4882a593Smuzhiyun if (max3421_hcd->active)
1740*4882a593Smuzhiyun max3421_hcd->port_status |=
1741*4882a593Smuzhiyun USB_PORT_STAT_SUSPEND;
1742*4882a593Smuzhiyun break;
1743*4882a593Smuzhiyun case USB_PORT_FEAT_POWER:
1744*4882a593Smuzhiyun dev_dbg(hcd->self.controller, "power-on\n");
1745*4882a593Smuzhiyun max3421_hcd->port_status |= USB_PORT_STAT_POWER;
1746*4882a593Smuzhiyun max3421_gpout_set_value(hcd, pdata->vbus_gpout,
1747*4882a593Smuzhiyun pdata->vbus_active_level);
1748*4882a593Smuzhiyun break;
1749*4882a593Smuzhiyun case USB_PORT_FEAT_RESET:
1750*4882a593Smuzhiyun max3421_reset_port(hcd);
1751*4882a593Smuzhiyun fallthrough;
1752*4882a593Smuzhiyun default:
1753*4882a593Smuzhiyun if ((max3421_hcd->port_status & USB_PORT_STAT_POWER)
1754*4882a593Smuzhiyun != 0)
1755*4882a593Smuzhiyun max3421_hcd->port_status |= (1 << value);
1756*4882a593Smuzhiyun }
1757*4882a593Smuzhiyun break;
1758*4882a593Smuzhiyun
1759*4882a593Smuzhiyun default:
1760*4882a593Smuzhiyun dev_dbg(hcd->self.controller,
1761*4882a593Smuzhiyun "hub control req%04x v%04x i%04x l%d\n",
1762*4882a593Smuzhiyun type_req, value, index, length);
1763*4882a593Smuzhiyun error: /* "protocol stall" on error */
1764*4882a593Smuzhiyun retval = -EPIPE;
1765*4882a593Smuzhiyun }
1766*4882a593Smuzhiyun
1767*4882a593Smuzhiyun spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1768*4882a593Smuzhiyun return retval;
1769*4882a593Smuzhiyun }
1770*4882a593Smuzhiyun
1771*4882a593Smuzhiyun static int
max3421_bus_suspend(struct usb_hcd * hcd)1772*4882a593Smuzhiyun max3421_bus_suspend(struct usb_hcd *hcd)
1773*4882a593Smuzhiyun {
1774*4882a593Smuzhiyun return -1;
1775*4882a593Smuzhiyun }
1776*4882a593Smuzhiyun
1777*4882a593Smuzhiyun static int
max3421_bus_resume(struct usb_hcd * hcd)1778*4882a593Smuzhiyun max3421_bus_resume(struct usb_hcd *hcd)
1779*4882a593Smuzhiyun {
1780*4882a593Smuzhiyun return -1;
1781*4882a593Smuzhiyun }
1782*4882a593Smuzhiyun
1783*4882a593Smuzhiyun static const struct hc_driver max3421_hcd_desc = {
1784*4882a593Smuzhiyun .description = "max3421",
1785*4882a593Smuzhiyun .product_desc = DRIVER_DESC,
1786*4882a593Smuzhiyun .hcd_priv_size = sizeof(struct max3421_hcd),
1787*4882a593Smuzhiyun .flags = HCD_USB11,
1788*4882a593Smuzhiyun .reset = max3421_reset,
1789*4882a593Smuzhiyun .start = max3421_start,
1790*4882a593Smuzhiyun .stop = max3421_stop,
1791*4882a593Smuzhiyun .get_frame_number = max3421_get_frame_number,
1792*4882a593Smuzhiyun .urb_enqueue = max3421_urb_enqueue,
1793*4882a593Smuzhiyun .urb_dequeue = max3421_urb_dequeue,
1794*4882a593Smuzhiyun .endpoint_disable = max3421_endpoint_disable,
1795*4882a593Smuzhiyun .hub_status_data = max3421_hub_status_data,
1796*4882a593Smuzhiyun .hub_control = max3421_hub_control,
1797*4882a593Smuzhiyun .bus_suspend = max3421_bus_suspend,
1798*4882a593Smuzhiyun .bus_resume = max3421_bus_resume,
1799*4882a593Smuzhiyun };
1800*4882a593Smuzhiyun
1801*4882a593Smuzhiyun static int
max3421_of_vbus_en_pin(struct device * dev,struct max3421_hcd_platform_data * pdata)1802*4882a593Smuzhiyun max3421_of_vbus_en_pin(struct device *dev, struct max3421_hcd_platform_data *pdata)
1803*4882a593Smuzhiyun {
1804*4882a593Smuzhiyun int retval;
1805*4882a593Smuzhiyun uint32_t value[2];
1806*4882a593Smuzhiyun
1807*4882a593Smuzhiyun if (!pdata)
1808*4882a593Smuzhiyun return -EINVAL;
1809*4882a593Smuzhiyun
1810*4882a593Smuzhiyun retval = of_property_read_u32_array(dev->of_node, "maxim,vbus-en-pin", value, 2);
1811*4882a593Smuzhiyun if (retval) {
1812*4882a593Smuzhiyun dev_err(dev, "device tree node property 'maxim,vbus-en-pin' is missing\n");
1813*4882a593Smuzhiyun return retval;
1814*4882a593Smuzhiyun }
1815*4882a593Smuzhiyun dev_info(dev, "property 'maxim,vbus-en-pin' value is <%d %d>\n", value[0], value[1]);
1816*4882a593Smuzhiyun
1817*4882a593Smuzhiyun pdata->vbus_gpout = value[0];
1818*4882a593Smuzhiyun pdata->vbus_active_level = value[1];
1819*4882a593Smuzhiyun
1820*4882a593Smuzhiyun return 0;
1821*4882a593Smuzhiyun }
1822*4882a593Smuzhiyun
1823*4882a593Smuzhiyun static int
max3421_probe(struct spi_device * spi)1824*4882a593Smuzhiyun max3421_probe(struct spi_device *spi)
1825*4882a593Smuzhiyun {
1826*4882a593Smuzhiyun struct device *dev = &spi->dev;
1827*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd;
1828*4882a593Smuzhiyun struct usb_hcd *hcd = NULL;
1829*4882a593Smuzhiyun struct max3421_hcd_platform_data *pdata = NULL;
1830*4882a593Smuzhiyun int retval;
1831*4882a593Smuzhiyun
1832*4882a593Smuzhiyun if (spi_setup(spi) < 0) {
1833*4882a593Smuzhiyun dev_err(&spi->dev, "Unable to setup SPI bus");
1834*4882a593Smuzhiyun return -EFAULT;
1835*4882a593Smuzhiyun }
1836*4882a593Smuzhiyun
1837*4882a593Smuzhiyun if (!spi->irq) {
1838*4882a593Smuzhiyun dev_err(dev, "Failed to get SPI IRQ");
1839*4882a593Smuzhiyun return -EFAULT;
1840*4882a593Smuzhiyun }
1841*4882a593Smuzhiyun
1842*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
1843*4882a593Smuzhiyun pdata = devm_kzalloc(&spi->dev, sizeof(*pdata), GFP_KERNEL);
1844*4882a593Smuzhiyun if (!pdata) {
1845*4882a593Smuzhiyun retval = -ENOMEM;
1846*4882a593Smuzhiyun goto error;
1847*4882a593Smuzhiyun }
1848*4882a593Smuzhiyun retval = max3421_of_vbus_en_pin(dev, pdata);
1849*4882a593Smuzhiyun if (retval)
1850*4882a593Smuzhiyun goto error;
1851*4882a593Smuzhiyun
1852*4882a593Smuzhiyun spi->dev.platform_data = pdata;
1853*4882a593Smuzhiyun }
1854*4882a593Smuzhiyun
1855*4882a593Smuzhiyun pdata = spi->dev.platform_data;
1856*4882a593Smuzhiyun if (!pdata) {
1857*4882a593Smuzhiyun dev_err(&spi->dev, "driver configuration data is not provided\n");
1858*4882a593Smuzhiyun retval = -EFAULT;
1859*4882a593Smuzhiyun goto error;
1860*4882a593Smuzhiyun }
1861*4882a593Smuzhiyun if (pdata->vbus_active_level > 1) {
1862*4882a593Smuzhiyun dev_err(&spi->dev, "vbus active level value %d is out of range (0/1)\n", pdata->vbus_active_level);
1863*4882a593Smuzhiyun retval = -EINVAL;
1864*4882a593Smuzhiyun goto error;
1865*4882a593Smuzhiyun }
1866*4882a593Smuzhiyun if (pdata->vbus_gpout < 1 || pdata->vbus_gpout > MAX3421_GPOUT_COUNT) {
1867*4882a593Smuzhiyun dev_err(&spi->dev, "vbus gpout value %d is out of range (1..8)\n", pdata->vbus_gpout);
1868*4882a593Smuzhiyun retval = -EINVAL;
1869*4882a593Smuzhiyun goto error;
1870*4882a593Smuzhiyun }
1871*4882a593Smuzhiyun
1872*4882a593Smuzhiyun retval = -ENOMEM;
1873*4882a593Smuzhiyun hcd = usb_create_hcd(&max3421_hcd_desc, &spi->dev,
1874*4882a593Smuzhiyun dev_name(&spi->dev));
1875*4882a593Smuzhiyun if (!hcd) {
1876*4882a593Smuzhiyun dev_err(&spi->dev, "failed to create HCD structure\n");
1877*4882a593Smuzhiyun goto error;
1878*4882a593Smuzhiyun }
1879*4882a593Smuzhiyun set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1880*4882a593Smuzhiyun max3421_hcd = hcd_to_max3421(hcd);
1881*4882a593Smuzhiyun INIT_LIST_HEAD(&max3421_hcd->ep_list);
1882*4882a593Smuzhiyun spi_set_drvdata(spi, max3421_hcd);
1883*4882a593Smuzhiyun
1884*4882a593Smuzhiyun max3421_hcd->tx = kmalloc(sizeof(*max3421_hcd->tx), GFP_KERNEL);
1885*4882a593Smuzhiyun if (!max3421_hcd->tx)
1886*4882a593Smuzhiyun goto error;
1887*4882a593Smuzhiyun max3421_hcd->rx = kmalloc(sizeof(*max3421_hcd->rx), GFP_KERNEL);
1888*4882a593Smuzhiyun if (!max3421_hcd->rx)
1889*4882a593Smuzhiyun goto error;
1890*4882a593Smuzhiyun
1891*4882a593Smuzhiyun max3421_hcd->spi_thread = kthread_run(max3421_spi_thread, hcd,
1892*4882a593Smuzhiyun "max3421_spi_thread");
1893*4882a593Smuzhiyun if (max3421_hcd->spi_thread == ERR_PTR(-ENOMEM)) {
1894*4882a593Smuzhiyun dev_err(&spi->dev,
1895*4882a593Smuzhiyun "failed to create SPI thread (out of memory)\n");
1896*4882a593Smuzhiyun goto error;
1897*4882a593Smuzhiyun }
1898*4882a593Smuzhiyun
1899*4882a593Smuzhiyun retval = usb_add_hcd(hcd, 0, 0);
1900*4882a593Smuzhiyun if (retval) {
1901*4882a593Smuzhiyun dev_err(&spi->dev, "failed to add HCD\n");
1902*4882a593Smuzhiyun goto error;
1903*4882a593Smuzhiyun }
1904*4882a593Smuzhiyun
1905*4882a593Smuzhiyun retval = request_irq(spi->irq, max3421_irq_handler,
1906*4882a593Smuzhiyun IRQF_TRIGGER_LOW, "max3421", hcd);
1907*4882a593Smuzhiyun if (retval < 0) {
1908*4882a593Smuzhiyun dev_err(&spi->dev, "failed to request irq %d\n", spi->irq);
1909*4882a593Smuzhiyun goto error;
1910*4882a593Smuzhiyun }
1911*4882a593Smuzhiyun return 0;
1912*4882a593Smuzhiyun
1913*4882a593Smuzhiyun error:
1914*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_OF) && dev->of_node && pdata) {
1915*4882a593Smuzhiyun devm_kfree(&spi->dev, pdata);
1916*4882a593Smuzhiyun spi->dev.platform_data = NULL;
1917*4882a593Smuzhiyun }
1918*4882a593Smuzhiyun
1919*4882a593Smuzhiyun if (hcd) {
1920*4882a593Smuzhiyun kfree(max3421_hcd->tx);
1921*4882a593Smuzhiyun kfree(max3421_hcd->rx);
1922*4882a593Smuzhiyun if (max3421_hcd->spi_thread)
1923*4882a593Smuzhiyun kthread_stop(max3421_hcd->spi_thread);
1924*4882a593Smuzhiyun usb_put_hcd(hcd);
1925*4882a593Smuzhiyun }
1926*4882a593Smuzhiyun return retval;
1927*4882a593Smuzhiyun }
1928*4882a593Smuzhiyun
1929*4882a593Smuzhiyun static int
max3421_remove(struct spi_device * spi)1930*4882a593Smuzhiyun max3421_remove(struct spi_device *spi)
1931*4882a593Smuzhiyun {
1932*4882a593Smuzhiyun struct max3421_hcd *max3421_hcd;
1933*4882a593Smuzhiyun struct usb_hcd *hcd;
1934*4882a593Smuzhiyun unsigned long flags;
1935*4882a593Smuzhiyun
1936*4882a593Smuzhiyun max3421_hcd = spi_get_drvdata(spi);
1937*4882a593Smuzhiyun hcd = max3421_to_hcd(max3421_hcd);
1938*4882a593Smuzhiyun
1939*4882a593Smuzhiyun usb_remove_hcd(hcd);
1940*4882a593Smuzhiyun
1941*4882a593Smuzhiyun spin_lock_irqsave(&max3421_hcd->lock, flags);
1942*4882a593Smuzhiyun
1943*4882a593Smuzhiyun kthread_stop(max3421_hcd->spi_thread);
1944*4882a593Smuzhiyun
1945*4882a593Smuzhiyun spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1946*4882a593Smuzhiyun
1947*4882a593Smuzhiyun free_irq(spi->irq, hcd);
1948*4882a593Smuzhiyun
1949*4882a593Smuzhiyun usb_put_hcd(hcd);
1950*4882a593Smuzhiyun return 0;
1951*4882a593Smuzhiyun }
1952*4882a593Smuzhiyun
1953*4882a593Smuzhiyun static const struct of_device_id max3421_of_match_table[] = {
1954*4882a593Smuzhiyun { .compatible = "maxim,max3421", },
1955*4882a593Smuzhiyun {},
1956*4882a593Smuzhiyun };
1957*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, max3421_of_match_table);
1958*4882a593Smuzhiyun
1959*4882a593Smuzhiyun static struct spi_driver max3421_driver = {
1960*4882a593Smuzhiyun .probe = max3421_probe,
1961*4882a593Smuzhiyun .remove = max3421_remove,
1962*4882a593Smuzhiyun .driver = {
1963*4882a593Smuzhiyun .name = "max3421-hcd",
1964*4882a593Smuzhiyun .of_match_table = of_match_ptr(max3421_of_match_table),
1965*4882a593Smuzhiyun },
1966*4882a593Smuzhiyun };
1967*4882a593Smuzhiyun
1968*4882a593Smuzhiyun module_spi_driver(max3421_driver);
1969*4882a593Smuzhiyun
1970*4882a593Smuzhiyun MODULE_DESCRIPTION(DRIVER_DESC);
1971*4882a593Smuzhiyun MODULE_AUTHOR("David Mosberger <davidm@egauge.net>");
1972*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1973