1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * linux/drivers/usb/gadget/s3c2410_udc.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Samsung S3C24xx series on-chip full speed USB device controllers
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
8*4882a593Smuzhiyun * Additional cleanups by Ben Dooks <ben-linux@fluff.org>
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #define pr_fmt(fmt) "s3c2410_udc: " fmt
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/ioport.h>
17*4882a593Smuzhiyun #include <linux/sched.h>
18*4882a593Smuzhiyun #include <linux/slab.h>
19*4882a593Smuzhiyun #include <linux/errno.h>
20*4882a593Smuzhiyun #include <linux/init.h>
21*4882a593Smuzhiyun #include <linux/timer.h>
22*4882a593Smuzhiyun #include <linux/list.h>
23*4882a593Smuzhiyun #include <linux/interrupt.h>
24*4882a593Smuzhiyun #include <linux/platform_device.h>
25*4882a593Smuzhiyun #include <linux/clk.h>
26*4882a593Smuzhiyun #include <linux/gpio.h>
27*4882a593Smuzhiyun #include <linux/prefetch.h>
28*4882a593Smuzhiyun #include <linux/io.h>
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #include <linux/debugfs.h>
31*4882a593Smuzhiyun #include <linux/seq_file.h>
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #include <linux/usb.h>
34*4882a593Smuzhiyun #include <linux/usb/gadget.h>
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #include <asm/byteorder.h>
37*4882a593Smuzhiyun #include <asm/irq.h>
38*4882a593Smuzhiyun #include <asm/unaligned.h>
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #include <linux/platform_data/usb-s3c2410_udc.h>
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun #include "s3c2410_udc.h"
43*4882a593Smuzhiyun #include "s3c2410_udc_regs.h"
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun #define DRIVER_DESC "S3C2410 USB Device Controller Gadget"
46*4882a593Smuzhiyun #define DRIVER_AUTHOR "Herbert Pötzl <herbert@13thfloor.at>, " \
47*4882a593Smuzhiyun "Arnaud Patard <arnaud.patard@rtp-net.org>"
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun static const char gadget_name[] = "s3c2410_udc";
50*4882a593Smuzhiyun static const char driver_desc[] = DRIVER_DESC;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun static struct s3c2410_udc *the_controller;
53*4882a593Smuzhiyun static struct clk *udc_clock;
54*4882a593Smuzhiyun static struct clk *usb_bus_clock;
55*4882a593Smuzhiyun static void __iomem *base_addr;
56*4882a593Smuzhiyun static int irq_usbd;
57*4882a593Smuzhiyun static struct dentry *s3c2410_udc_debugfs_root;
58*4882a593Smuzhiyun
udc_read(u32 reg)59*4882a593Smuzhiyun static inline u32 udc_read(u32 reg)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun return readb(base_addr + reg);
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun
udc_write(u32 value,u32 reg)64*4882a593Smuzhiyun static inline void udc_write(u32 value, u32 reg)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun writeb(value, base_addr + reg);
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
udc_writeb(void __iomem * base,u32 value,u32 reg)69*4882a593Smuzhiyun static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun writeb(value, base + reg);
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun static struct s3c2410_udc_mach_info *udc_info;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun /*************************** DEBUG FUNCTION ***************************/
77*4882a593Smuzhiyun #define DEBUG_NORMAL 1
78*4882a593Smuzhiyun #define DEBUG_VERBOSE 2
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun #ifdef CONFIG_USB_S3C2410_DEBUG
81*4882a593Smuzhiyun #define USB_S3C2410_DEBUG_LEVEL 0
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun static uint32_t s3c2410_ticks = 0;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun __printf(2, 3)
dprintk(int level,const char * fmt,...)86*4882a593Smuzhiyun static void dprintk(int level, const char *fmt, ...)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun static long prevticks;
89*4882a593Smuzhiyun static int invocation;
90*4882a593Smuzhiyun struct va_format vaf;
91*4882a593Smuzhiyun va_list args;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun if (level > USB_S3C2410_DEBUG_LEVEL)
94*4882a593Smuzhiyun return;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun va_start(args, fmt);
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun vaf.fmt = fmt;
99*4882a593Smuzhiyun vaf.va = &args;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun if (s3c2410_ticks != prevticks) {
102*4882a593Smuzhiyun prevticks = s3c2410_ticks;
103*4882a593Smuzhiyun invocation = 0;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun pr_debug("%1lu.%02d USB: %pV", prevticks, invocation++, &vaf);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun va_end(args);
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun #else
111*4882a593Smuzhiyun __printf(2, 3)
dprintk(int level,const char * fmt,...)112*4882a593Smuzhiyun static void dprintk(int level, const char *fmt, ...)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun #endif
116*4882a593Smuzhiyun
s3c2410_udc_debugfs_show(struct seq_file * m,void * p)117*4882a593Smuzhiyun static int s3c2410_udc_debugfs_show(struct seq_file *m, void *p)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun u32 addr_reg, pwr_reg, ep_int_reg, usb_int_reg;
120*4882a593Smuzhiyun u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
121*4882a593Smuzhiyun u32 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2;
122*4882a593Smuzhiyun u32 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun addr_reg = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
125*4882a593Smuzhiyun pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
126*4882a593Smuzhiyun ep_int_reg = udc_read(S3C2410_UDC_EP_INT_REG);
127*4882a593Smuzhiyun usb_int_reg = udc_read(S3C2410_UDC_USB_INT_REG);
128*4882a593Smuzhiyun ep_int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
129*4882a593Smuzhiyun usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
130*4882a593Smuzhiyun udc_write(0, S3C2410_UDC_INDEX_REG);
131*4882a593Smuzhiyun ep0_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
132*4882a593Smuzhiyun udc_write(1, S3C2410_UDC_INDEX_REG);
133*4882a593Smuzhiyun ep1_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
134*4882a593Smuzhiyun ep1_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
135*4882a593Smuzhiyun ep1_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
136*4882a593Smuzhiyun ep1_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
137*4882a593Smuzhiyun udc_write(2, S3C2410_UDC_INDEX_REG);
138*4882a593Smuzhiyun ep2_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
139*4882a593Smuzhiyun ep2_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
140*4882a593Smuzhiyun ep2_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
141*4882a593Smuzhiyun ep2_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun seq_printf(m, "FUNC_ADDR_REG : 0x%04X\n"
144*4882a593Smuzhiyun "PWR_REG : 0x%04X\n"
145*4882a593Smuzhiyun "EP_INT_REG : 0x%04X\n"
146*4882a593Smuzhiyun "USB_INT_REG : 0x%04X\n"
147*4882a593Smuzhiyun "EP_INT_EN_REG : 0x%04X\n"
148*4882a593Smuzhiyun "USB_INT_EN_REG : 0x%04X\n"
149*4882a593Smuzhiyun "EP0_CSR : 0x%04X\n"
150*4882a593Smuzhiyun "EP1_I_CSR1 : 0x%04X\n"
151*4882a593Smuzhiyun "EP1_I_CSR2 : 0x%04X\n"
152*4882a593Smuzhiyun "EP1_O_CSR1 : 0x%04X\n"
153*4882a593Smuzhiyun "EP1_O_CSR2 : 0x%04X\n"
154*4882a593Smuzhiyun "EP2_I_CSR1 : 0x%04X\n"
155*4882a593Smuzhiyun "EP2_I_CSR2 : 0x%04X\n"
156*4882a593Smuzhiyun "EP2_O_CSR1 : 0x%04X\n"
157*4882a593Smuzhiyun "EP2_O_CSR2 : 0x%04X\n",
158*4882a593Smuzhiyun addr_reg, pwr_reg, ep_int_reg, usb_int_reg,
159*4882a593Smuzhiyun ep_int_en_reg, usb_int_en_reg, ep0_csr,
160*4882a593Smuzhiyun ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2,
161*4882a593Smuzhiyun ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2
162*4882a593Smuzhiyun );
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun return 0;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun DEFINE_SHOW_ATTRIBUTE(s3c2410_udc_debugfs);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun /* io macros */
169*4882a593Smuzhiyun
s3c2410_udc_clear_ep0_opr(void __iomem * base)170*4882a593Smuzhiyun static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
173*4882a593Smuzhiyun udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
174*4882a593Smuzhiyun S3C2410_UDC_EP0_CSR_REG);
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
s3c2410_udc_clear_ep0_sst(void __iomem * base)177*4882a593Smuzhiyun static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
178*4882a593Smuzhiyun {
179*4882a593Smuzhiyun udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
180*4882a593Smuzhiyun writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun
s3c2410_udc_clear_ep0_se(void __iomem * base)183*4882a593Smuzhiyun static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
186*4882a593Smuzhiyun udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun
s3c2410_udc_set_ep0_ipr(void __iomem * base)189*4882a593Smuzhiyun static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
192*4882a593Smuzhiyun udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun
s3c2410_udc_set_ep0_de(void __iomem * base)195*4882a593Smuzhiyun static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
198*4882a593Smuzhiyun udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun
s3c2410_udc_set_ep0_ss(void __iomem * b)201*4882a593Smuzhiyun inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
204*4882a593Smuzhiyun udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun
s3c2410_udc_set_ep0_de_out(void __iomem * base)207*4882a593Smuzhiyun static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
212*4882a593Smuzhiyun | S3C2410_UDC_EP0_CSR_DE),
213*4882a593Smuzhiyun S3C2410_UDC_EP0_CSR_REG);
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
s3c2410_udc_set_ep0_de_in(void __iomem * base)216*4882a593Smuzhiyun static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
219*4882a593Smuzhiyun udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
220*4882a593Smuzhiyun | S3C2410_UDC_EP0_CSR_DE),
221*4882a593Smuzhiyun S3C2410_UDC_EP0_CSR_REG);
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun /*------------------------- I/O ----------------------------------*/
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun /*
227*4882a593Smuzhiyun * s3c2410_udc_done
228*4882a593Smuzhiyun */
s3c2410_udc_done(struct s3c2410_ep * ep,struct s3c2410_request * req,int status)229*4882a593Smuzhiyun static void s3c2410_udc_done(struct s3c2410_ep *ep,
230*4882a593Smuzhiyun struct s3c2410_request *req, int status)
231*4882a593Smuzhiyun {
232*4882a593Smuzhiyun unsigned halted = ep->halted;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun list_del_init(&req->queue);
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun if (likely(req->req.status == -EINPROGRESS))
237*4882a593Smuzhiyun req->req.status = status;
238*4882a593Smuzhiyun else
239*4882a593Smuzhiyun status = req->req.status;
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun ep->halted = 1;
242*4882a593Smuzhiyun usb_gadget_giveback_request(&ep->ep, &req->req);
243*4882a593Smuzhiyun ep->halted = halted;
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun
s3c2410_udc_nuke(struct s3c2410_udc * udc,struct s3c2410_ep * ep,int status)246*4882a593Smuzhiyun static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
247*4882a593Smuzhiyun struct s3c2410_ep *ep, int status)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun while (!list_empty(&ep->queue)) {
250*4882a593Smuzhiyun struct s3c2410_request *req;
251*4882a593Smuzhiyun req = list_entry(ep->queue.next, struct s3c2410_request,
252*4882a593Smuzhiyun queue);
253*4882a593Smuzhiyun s3c2410_udc_done(ep, req, status);
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun
s3c2410_udc_fifo_count_out(void)257*4882a593Smuzhiyun static inline int s3c2410_udc_fifo_count_out(void)
258*4882a593Smuzhiyun {
259*4882a593Smuzhiyun int tmp;
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
262*4882a593Smuzhiyun tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
263*4882a593Smuzhiyun return tmp;
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun /*
267*4882a593Smuzhiyun * s3c2410_udc_write_packet
268*4882a593Smuzhiyun */
s3c2410_udc_write_packet(int fifo,struct s3c2410_request * req,unsigned max)269*4882a593Smuzhiyun static inline int s3c2410_udc_write_packet(int fifo,
270*4882a593Smuzhiyun struct s3c2410_request *req,
271*4882a593Smuzhiyun unsigned max)
272*4882a593Smuzhiyun {
273*4882a593Smuzhiyun unsigned len = min(req->req.length - req->req.actual, max);
274*4882a593Smuzhiyun u8 *buf = req->req.buf + req->req.actual;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun prefetch(buf);
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
279*4882a593Smuzhiyun req->req.actual, req->req.length, len, req->req.actual + len);
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun req->req.actual += len;
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun udelay(5);
284*4882a593Smuzhiyun writesb(base_addr + fifo, buf, len);
285*4882a593Smuzhiyun return len;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun /*
289*4882a593Smuzhiyun * s3c2410_udc_write_fifo
290*4882a593Smuzhiyun *
291*4882a593Smuzhiyun * return: 0 = still running, 1 = completed, negative = errno
292*4882a593Smuzhiyun */
s3c2410_udc_write_fifo(struct s3c2410_ep * ep,struct s3c2410_request * req)293*4882a593Smuzhiyun static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
294*4882a593Smuzhiyun struct s3c2410_request *req)
295*4882a593Smuzhiyun {
296*4882a593Smuzhiyun unsigned count;
297*4882a593Smuzhiyun int is_last;
298*4882a593Smuzhiyun u32 idx;
299*4882a593Smuzhiyun int fifo_reg;
300*4882a593Smuzhiyun u32 ep_csr;
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun idx = ep->bEndpointAddress & 0x7F;
303*4882a593Smuzhiyun switch (idx) {
304*4882a593Smuzhiyun default:
305*4882a593Smuzhiyun idx = 0;
306*4882a593Smuzhiyun fallthrough;
307*4882a593Smuzhiyun case 0:
308*4882a593Smuzhiyun fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
309*4882a593Smuzhiyun break;
310*4882a593Smuzhiyun case 1:
311*4882a593Smuzhiyun fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
312*4882a593Smuzhiyun break;
313*4882a593Smuzhiyun case 2:
314*4882a593Smuzhiyun fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
315*4882a593Smuzhiyun break;
316*4882a593Smuzhiyun case 3:
317*4882a593Smuzhiyun fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
318*4882a593Smuzhiyun break;
319*4882a593Smuzhiyun case 4:
320*4882a593Smuzhiyun fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
321*4882a593Smuzhiyun break;
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun /* last packet is often short (sometimes a zlp) */
327*4882a593Smuzhiyun if (count != ep->ep.maxpacket)
328*4882a593Smuzhiyun is_last = 1;
329*4882a593Smuzhiyun else if (req->req.length != req->req.actual || req->req.zero)
330*4882a593Smuzhiyun is_last = 0;
331*4882a593Smuzhiyun else
332*4882a593Smuzhiyun is_last = 2;
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun /* Only ep0 debug messages are interesting */
335*4882a593Smuzhiyun if (idx == 0)
336*4882a593Smuzhiyun dprintk(DEBUG_NORMAL,
337*4882a593Smuzhiyun "Written ep%d %d.%d of %d b [last %d,z %d]\n",
338*4882a593Smuzhiyun idx, count, req->req.actual, req->req.length,
339*4882a593Smuzhiyun is_last, req->req.zero);
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun if (is_last) {
342*4882a593Smuzhiyun /* The order is important. It prevents sending 2 packets
343*4882a593Smuzhiyun * at the same time */
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun if (idx == 0) {
346*4882a593Smuzhiyun /* Reset signal => no need to say 'data sent' */
347*4882a593Smuzhiyun if (!(udc_read(S3C2410_UDC_USB_INT_REG)
348*4882a593Smuzhiyun & S3C2410_UDC_USBINT_RESET))
349*4882a593Smuzhiyun s3c2410_udc_set_ep0_de_in(base_addr);
350*4882a593Smuzhiyun ep->dev->ep0state = EP0_IDLE;
351*4882a593Smuzhiyun } else {
352*4882a593Smuzhiyun udc_write(idx, S3C2410_UDC_INDEX_REG);
353*4882a593Smuzhiyun ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
354*4882a593Smuzhiyun udc_write(idx, S3C2410_UDC_INDEX_REG);
355*4882a593Smuzhiyun udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
356*4882a593Smuzhiyun S3C2410_UDC_IN_CSR1_REG);
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun s3c2410_udc_done(ep, req, 0);
360*4882a593Smuzhiyun is_last = 1;
361*4882a593Smuzhiyun } else {
362*4882a593Smuzhiyun if (idx == 0) {
363*4882a593Smuzhiyun /* Reset signal => no need to say 'data sent' */
364*4882a593Smuzhiyun if (!(udc_read(S3C2410_UDC_USB_INT_REG)
365*4882a593Smuzhiyun & S3C2410_UDC_USBINT_RESET))
366*4882a593Smuzhiyun s3c2410_udc_set_ep0_ipr(base_addr);
367*4882a593Smuzhiyun } else {
368*4882a593Smuzhiyun udc_write(idx, S3C2410_UDC_INDEX_REG);
369*4882a593Smuzhiyun ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
370*4882a593Smuzhiyun udc_write(idx, S3C2410_UDC_INDEX_REG);
371*4882a593Smuzhiyun udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
372*4882a593Smuzhiyun S3C2410_UDC_IN_CSR1_REG);
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun return is_last;
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun
s3c2410_udc_read_packet(int fifo,u8 * buf,struct s3c2410_request * req,unsigned avail)379*4882a593Smuzhiyun static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
380*4882a593Smuzhiyun struct s3c2410_request *req, unsigned avail)
381*4882a593Smuzhiyun {
382*4882a593Smuzhiyun unsigned len;
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun len = min(req->req.length - req->req.actual, avail);
385*4882a593Smuzhiyun req->req.actual += len;
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun readsb(fifo + base_addr, buf, len);
388*4882a593Smuzhiyun return len;
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun /*
392*4882a593Smuzhiyun * return: 0 = still running, 1 = queue empty, negative = errno
393*4882a593Smuzhiyun */
s3c2410_udc_read_fifo(struct s3c2410_ep * ep,struct s3c2410_request * req)394*4882a593Smuzhiyun static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
395*4882a593Smuzhiyun struct s3c2410_request *req)
396*4882a593Smuzhiyun {
397*4882a593Smuzhiyun u8 *buf;
398*4882a593Smuzhiyun u32 ep_csr;
399*4882a593Smuzhiyun unsigned bufferspace;
400*4882a593Smuzhiyun int is_last = 1;
401*4882a593Smuzhiyun unsigned avail;
402*4882a593Smuzhiyun int fifo_count = 0;
403*4882a593Smuzhiyun u32 idx;
404*4882a593Smuzhiyun int fifo_reg;
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun idx = ep->bEndpointAddress & 0x7F;
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun switch (idx) {
409*4882a593Smuzhiyun default:
410*4882a593Smuzhiyun idx = 0;
411*4882a593Smuzhiyun fallthrough;
412*4882a593Smuzhiyun case 0:
413*4882a593Smuzhiyun fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
414*4882a593Smuzhiyun break;
415*4882a593Smuzhiyun case 1:
416*4882a593Smuzhiyun fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
417*4882a593Smuzhiyun break;
418*4882a593Smuzhiyun case 2:
419*4882a593Smuzhiyun fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
420*4882a593Smuzhiyun break;
421*4882a593Smuzhiyun case 3:
422*4882a593Smuzhiyun fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
423*4882a593Smuzhiyun break;
424*4882a593Smuzhiyun case 4:
425*4882a593Smuzhiyun fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
426*4882a593Smuzhiyun break;
427*4882a593Smuzhiyun }
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun if (!req->req.length)
430*4882a593Smuzhiyun return 1;
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun buf = req->req.buf + req->req.actual;
433*4882a593Smuzhiyun bufferspace = req->req.length - req->req.actual;
434*4882a593Smuzhiyun if (!bufferspace) {
435*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
436*4882a593Smuzhiyun return -1;
437*4882a593Smuzhiyun }
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun udc_write(idx, S3C2410_UDC_INDEX_REG);
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun fifo_count = s3c2410_udc_fifo_count_out();
442*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun if (fifo_count > ep->ep.maxpacket)
445*4882a593Smuzhiyun avail = ep->ep.maxpacket;
446*4882a593Smuzhiyun else
447*4882a593Smuzhiyun avail = fifo_count;
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun /* checking this with ep0 is not accurate as we already
452*4882a593Smuzhiyun * read a control request
453*4882a593Smuzhiyun **/
454*4882a593Smuzhiyun if (idx != 0 && fifo_count < ep->ep.maxpacket) {
455*4882a593Smuzhiyun is_last = 1;
456*4882a593Smuzhiyun /* overflowed this request? flush extra data */
457*4882a593Smuzhiyun if (fifo_count != avail)
458*4882a593Smuzhiyun req->req.status = -EOVERFLOW;
459*4882a593Smuzhiyun } else {
460*4882a593Smuzhiyun is_last = (req->req.length <= req->req.actual) ? 1 : 0;
461*4882a593Smuzhiyun }
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun udc_write(idx, S3C2410_UDC_INDEX_REG);
464*4882a593Smuzhiyun fifo_count = s3c2410_udc_fifo_count_out();
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun /* Only ep0 debug messages are interesting */
467*4882a593Smuzhiyun if (idx == 0)
468*4882a593Smuzhiyun dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
469*4882a593Smuzhiyun __func__, fifo_count, is_last);
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun if (is_last) {
472*4882a593Smuzhiyun if (idx == 0) {
473*4882a593Smuzhiyun s3c2410_udc_set_ep0_de_out(base_addr);
474*4882a593Smuzhiyun ep->dev->ep0state = EP0_IDLE;
475*4882a593Smuzhiyun } else {
476*4882a593Smuzhiyun udc_write(idx, S3C2410_UDC_INDEX_REG);
477*4882a593Smuzhiyun ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
478*4882a593Smuzhiyun udc_write(idx, S3C2410_UDC_INDEX_REG);
479*4882a593Smuzhiyun udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
480*4882a593Smuzhiyun S3C2410_UDC_OUT_CSR1_REG);
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun s3c2410_udc_done(ep, req, 0);
484*4882a593Smuzhiyun } else {
485*4882a593Smuzhiyun if (idx == 0) {
486*4882a593Smuzhiyun s3c2410_udc_clear_ep0_opr(base_addr);
487*4882a593Smuzhiyun } else {
488*4882a593Smuzhiyun udc_write(idx, S3C2410_UDC_INDEX_REG);
489*4882a593Smuzhiyun ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
490*4882a593Smuzhiyun udc_write(idx, S3C2410_UDC_INDEX_REG);
491*4882a593Smuzhiyun udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
492*4882a593Smuzhiyun S3C2410_UDC_OUT_CSR1_REG);
493*4882a593Smuzhiyun }
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun return is_last;
497*4882a593Smuzhiyun }
498*4882a593Smuzhiyun
s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest * crq)499*4882a593Smuzhiyun static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
500*4882a593Smuzhiyun {
501*4882a593Smuzhiyun unsigned char *outbuf = (unsigned char *)crq;
502*4882a593Smuzhiyun int bytes_read = 0;
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun udc_write(0, S3C2410_UDC_INDEX_REG);
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun bytes_read = s3c2410_udc_fifo_count_out();
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun if (bytes_read > sizeof(struct usb_ctrlrequest))
511*4882a593Smuzhiyun bytes_read = sizeof(struct usb_ctrlrequest);
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
516*4882a593Smuzhiyun bytes_read, crq->bRequest, crq->bRequestType,
517*4882a593Smuzhiyun crq->wValue, crq->wIndex, crq->wLength);
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun return bytes_read;
520*4882a593Smuzhiyun }
521*4882a593Smuzhiyun
s3c2410_udc_get_status(struct s3c2410_udc * dev,struct usb_ctrlrequest * crq)522*4882a593Smuzhiyun static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
523*4882a593Smuzhiyun struct usb_ctrlrequest *crq)
524*4882a593Smuzhiyun {
525*4882a593Smuzhiyun u16 status = 0;
526*4882a593Smuzhiyun u8 ep_num = crq->wIndex & 0x7F;
527*4882a593Smuzhiyun u8 is_in = crq->wIndex & USB_DIR_IN;
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun switch (crq->bRequestType & USB_RECIP_MASK) {
530*4882a593Smuzhiyun case USB_RECIP_INTERFACE:
531*4882a593Smuzhiyun break;
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun case USB_RECIP_DEVICE:
534*4882a593Smuzhiyun status = dev->devstatus;
535*4882a593Smuzhiyun break;
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun case USB_RECIP_ENDPOINT:
538*4882a593Smuzhiyun if (ep_num > 4 || crq->wLength > 2)
539*4882a593Smuzhiyun return 1;
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun if (ep_num == 0) {
542*4882a593Smuzhiyun udc_write(0, S3C2410_UDC_INDEX_REG);
543*4882a593Smuzhiyun status = udc_read(S3C2410_UDC_IN_CSR1_REG);
544*4882a593Smuzhiyun status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
545*4882a593Smuzhiyun } else {
546*4882a593Smuzhiyun udc_write(ep_num, S3C2410_UDC_INDEX_REG);
547*4882a593Smuzhiyun if (is_in) {
548*4882a593Smuzhiyun status = udc_read(S3C2410_UDC_IN_CSR1_REG);
549*4882a593Smuzhiyun status = status & S3C2410_UDC_ICSR1_SENDSTL;
550*4882a593Smuzhiyun } else {
551*4882a593Smuzhiyun status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
552*4882a593Smuzhiyun status = status & S3C2410_UDC_OCSR1_SENDSTL;
553*4882a593Smuzhiyun }
554*4882a593Smuzhiyun }
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun status = status ? 1 : 0;
557*4882a593Smuzhiyun break;
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun default:
560*4882a593Smuzhiyun return 1;
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun /* Seems to be needed to get it working. ouch :( */
564*4882a593Smuzhiyun udelay(5);
565*4882a593Smuzhiyun udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
566*4882a593Smuzhiyun udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
567*4882a593Smuzhiyun s3c2410_udc_set_ep0_de_in(base_addr);
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun return 0;
570*4882a593Smuzhiyun }
571*4882a593Smuzhiyun /*------------------------- usb state machine -------------------------------*/
572*4882a593Smuzhiyun static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
573*4882a593Smuzhiyun
s3c2410_udc_handle_ep0_idle(struct s3c2410_udc * dev,struct s3c2410_ep * ep,struct usb_ctrlrequest * crq,u32 ep0csr)574*4882a593Smuzhiyun static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
575*4882a593Smuzhiyun struct s3c2410_ep *ep,
576*4882a593Smuzhiyun struct usb_ctrlrequest *crq,
577*4882a593Smuzhiyun u32 ep0csr)
578*4882a593Smuzhiyun {
579*4882a593Smuzhiyun int len, ret, tmp;
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun /* start control request? */
582*4882a593Smuzhiyun if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
583*4882a593Smuzhiyun return;
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun s3c2410_udc_nuke(dev, ep, -EPROTO);
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun len = s3c2410_udc_read_fifo_crq(crq);
588*4882a593Smuzhiyun if (len != sizeof(*crq)) {
589*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
590*4882a593Smuzhiyun " wanted %d bytes got %d. Stalling out...\n",
591*4882a593Smuzhiyun sizeof(*crq), len);
592*4882a593Smuzhiyun s3c2410_udc_set_ep0_ss(base_addr);
593*4882a593Smuzhiyun return;
594*4882a593Smuzhiyun }
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
597*4882a593Smuzhiyun crq->bRequest, crq->bRequestType, crq->wLength);
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun /* cope with automagic for some standard requests. */
600*4882a593Smuzhiyun dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
601*4882a593Smuzhiyun == USB_TYPE_STANDARD;
602*4882a593Smuzhiyun dev->req_config = 0;
603*4882a593Smuzhiyun dev->req_pending = 1;
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun switch (crq->bRequest) {
606*4882a593Smuzhiyun case USB_REQ_SET_CONFIGURATION:
607*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ...\n");
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun if (crq->bRequestType == USB_RECIP_DEVICE) {
610*4882a593Smuzhiyun dev->req_config = 1;
611*4882a593Smuzhiyun s3c2410_udc_set_ep0_de_out(base_addr);
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun break;
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun case USB_REQ_SET_INTERFACE:
616*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ...\n");
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun if (crq->bRequestType == USB_RECIP_INTERFACE) {
619*4882a593Smuzhiyun dev->req_config = 1;
620*4882a593Smuzhiyun s3c2410_udc_set_ep0_de_out(base_addr);
621*4882a593Smuzhiyun }
622*4882a593Smuzhiyun break;
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun case USB_REQ_SET_ADDRESS:
625*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ...\n");
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun if (crq->bRequestType == USB_RECIP_DEVICE) {
628*4882a593Smuzhiyun tmp = crq->wValue & 0x7F;
629*4882a593Smuzhiyun dev->address = tmp;
630*4882a593Smuzhiyun udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
631*4882a593Smuzhiyun S3C2410_UDC_FUNC_ADDR_REG);
632*4882a593Smuzhiyun s3c2410_udc_set_ep0_de_out(base_addr);
633*4882a593Smuzhiyun return;
634*4882a593Smuzhiyun }
635*4882a593Smuzhiyun break;
636*4882a593Smuzhiyun
637*4882a593Smuzhiyun case USB_REQ_GET_STATUS:
638*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ...\n");
639*4882a593Smuzhiyun s3c2410_udc_clear_ep0_opr(base_addr);
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun if (dev->req_std) {
642*4882a593Smuzhiyun if (!s3c2410_udc_get_status(dev, crq))
643*4882a593Smuzhiyun return;
644*4882a593Smuzhiyun }
645*4882a593Smuzhiyun break;
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun case USB_REQ_CLEAR_FEATURE:
648*4882a593Smuzhiyun s3c2410_udc_clear_ep0_opr(base_addr);
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun if (crq->bRequestType != USB_RECIP_ENDPOINT)
651*4882a593Smuzhiyun break;
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
654*4882a593Smuzhiyun break;
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
657*4882a593Smuzhiyun s3c2410_udc_set_ep0_de_out(base_addr);
658*4882a593Smuzhiyun return;
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun case USB_REQ_SET_FEATURE:
661*4882a593Smuzhiyun s3c2410_udc_clear_ep0_opr(base_addr);
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun if (crq->bRequestType != USB_RECIP_ENDPOINT)
664*4882a593Smuzhiyun break;
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
667*4882a593Smuzhiyun break;
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
670*4882a593Smuzhiyun s3c2410_udc_set_ep0_de_out(base_addr);
671*4882a593Smuzhiyun return;
672*4882a593Smuzhiyun
673*4882a593Smuzhiyun default:
674*4882a593Smuzhiyun s3c2410_udc_clear_ep0_opr(base_addr);
675*4882a593Smuzhiyun break;
676*4882a593Smuzhiyun }
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun if (crq->bRequestType & USB_DIR_IN)
679*4882a593Smuzhiyun dev->ep0state = EP0_IN_DATA_PHASE;
680*4882a593Smuzhiyun else
681*4882a593Smuzhiyun dev->ep0state = EP0_OUT_DATA_PHASE;
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun if (!dev->driver)
684*4882a593Smuzhiyun return;
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun /* deliver the request to the gadget driver */
687*4882a593Smuzhiyun ret = dev->driver->setup(&dev->gadget, crq);
688*4882a593Smuzhiyun if (ret < 0) {
689*4882a593Smuzhiyun if (dev->req_config) {
690*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
691*4882a593Smuzhiyun crq->bRequest, ret);
692*4882a593Smuzhiyun return;
693*4882a593Smuzhiyun }
694*4882a593Smuzhiyun
695*4882a593Smuzhiyun if (ret == -EOPNOTSUPP)
696*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "Operation not supported\n");
697*4882a593Smuzhiyun else
698*4882a593Smuzhiyun dprintk(DEBUG_NORMAL,
699*4882a593Smuzhiyun "dev->driver->setup failed. (%d)\n", ret);
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun udelay(5);
702*4882a593Smuzhiyun s3c2410_udc_set_ep0_ss(base_addr);
703*4882a593Smuzhiyun s3c2410_udc_set_ep0_de_out(base_addr);
704*4882a593Smuzhiyun dev->ep0state = EP0_IDLE;
705*4882a593Smuzhiyun /* deferred i/o == no response yet */
706*4882a593Smuzhiyun } else if (dev->req_pending) {
707*4882a593Smuzhiyun dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
708*4882a593Smuzhiyun dev->req_pending = 0;
709*4882a593Smuzhiyun }
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
712*4882a593Smuzhiyun }
713*4882a593Smuzhiyun
s3c2410_udc_handle_ep0(struct s3c2410_udc * dev)714*4882a593Smuzhiyun static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
715*4882a593Smuzhiyun {
716*4882a593Smuzhiyun u32 ep0csr;
717*4882a593Smuzhiyun struct s3c2410_ep *ep = &dev->ep[0];
718*4882a593Smuzhiyun struct s3c2410_request *req;
719*4882a593Smuzhiyun struct usb_ctrlrequest crq;
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun if (list_empty(&ep->queue))
722*4882a593Smuzhiyun req = NULL;
723*4882a593Smuzhiyun else
724*4882a593Smuzhiyun req = list_entry(ep->queue.next, struct s3c2410_request, queue);
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
727*4882a593Smuzhiyun * S3C2410_UDC_EP0_CSR_REG when index is zero */
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun udc_write(0, S3C2410_UDC_INDEX_REG);
730*4882a593Smuzhiyun ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
731*4882a593Smuzhiyun
732*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
733*4882a593Smuzhiyun ep0csr, ep0states[dev->ep0state]);
734*4882a593Smuzhiyun
735*4882a593Smuzhiyun /* clear stall status */
736*4882a593Smuzhiyun if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
737*4882a593Smuzhiyun s3c2410_udc_nuke(dev, ep, -EPIPE);
738*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
739*4882a593Smuzhiyun s3c2410_udc_clear_ep0_sst(base_addr);
740*4882a593Smuzhiyun dev->ep0state = EP0_IDLE;
741*4882a593Smuzhiyun return;
742*4882a593Smuzhiyun }
743*4882a593Smuzhiyun
744*4882a593Smuzhiyun /* clear setup end */
745*4882a593Smuzhiyun if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
746*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
747*4882a593Smuzhiyun s3c2410_udc_nuke(dev, ep, 0);
748*4882a593Smuzhiyun s3c2410_udc_clear_ep0_se(base_addr);
749*4882a593Smuzhiyun dev->ep0state = EP0_IDLE;
750*4882a593Smuzhiyun }
751*4882a593Smuzhiyun
752*4882a593Smuzhiyun switch (dev->ep0state) {
753*4882a593Smuzhiyun case EP0_IDLE:
754*4882a593Smuzhiyun s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
755*4882a593Smuzhiyun break;
756*4882a593Smuzhiyun
757*4882a593Smuzhiyun case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
758*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
759*4882a593Smuzhiyun if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req)
760*4882a593Smuzhiyun s3c2410_udc_write_fifo(ep, req);
761*4882a593Smuzhiyun break;
762*4882a593Smuzhiyun
763*4882a593Smuzhiyun case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */
764*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
765*4882a593Smuzhiyun if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req)
766*4882a593Smuzhiyun s3c2410_udc_read_fifo(ep, req);
767*4882a593Smuzhiyun break;
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun case EP0_END_XFER:
770*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
771*4882a593Smuzhiyun dev->ep0state = EP0_IDLE;
772*4882a593Smuzhiyun break;
773*4882a593Smuzhiyun
774*4882a593Smuzhiyun case EP0_STALL:
775*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
776*4882a593Smuzhiyun dev->ep0state = EP0_IDLE;
777*4882a593Smuzhiyun break;
778*4882a593Smuzhiyun }
779*4882a593Smuzhiyun }
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun /*
782*4882a593Smuzhiyun * handle_ep - Manage I/O endpoints
783*4882a593Smuzhiyun */
784*4882a593Smuzhiyun
s3c2410_udc_handle_ep(struct s3c2410_ep * ep)785*4882a593Smuzhiyun static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
786*4882a593Smuzhiyun {
787*4882a593Smuzhiyun struct s3c2410_request *req;
788*4882a593Smuzhiyun int is_in = ep->bEndpointAddress & USB_DIR_IN;
789*4882a593Smuzhiyun u32 ep_csr1;
790*4882a593Smuzhiyun u32 idx;
791*4882a593Smuzhiyun
792*4882a593Smuzhiyun if (likely(!list_empty(&ep->queue)))
793*4882a593Smuzhiyun req = list_entry(ep->queue.next,
794*4882a593Smuzhiyun struct s3c2410_request, queue);
795*4882a593Smuzhiyun else
796*4882a593Smuzhiyun req = NULL;
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun idx = ep->bEndpointAddress & 0x7F;
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun if (is_in) {
801*4882a593Smuzhiyun udc_write(idx, S3C2410_UDC_INDEX_REG);
802*4882a593Smuzhiyun ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
803*4882a593Smuzhiyun dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
804*4882a593Smuzhiyun idx, ep_csr1, req ? 1 : 0);
805*4882a593Smuzhiyun
806*4882a593Smuzhiyun if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
807*4882a593Smuzhiyun dprintk(DEBUG_VERBOSE, "st\n");
808*4882a593Smuzhiyun udc_write(idx, S3C2410_UDC_INDEX_REG);
809*4882a593Smuzhiyun udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
810*4882a593Smuzhiyun S3C2410_UDC_IN_CSR1_REG);
811*4882a593Smuzhiyun return;
812*4882a593Smuzhiyun }
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req)
815*4882a593Smuzhiyun s3c2410_udc_write_fifo(ep, req);
816*4882a593Smuzhiyun } else {
817*4882a593Smuzhiyun udc_write(idx, S3C2410_UDC_INDEX_REG);
818*4882a593Smuzhiyun ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
819*4882a593Smuzhiyun dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
820*4882a593Smuzhiyun
821*4882a593Smuzhiyun if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
822*4882a593Smuzhiyun udc_write(idx, S3C2410_UDC_INDEX_REG);
823*4882a593Smuzhiyun udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
824*4882a593Smuzhiyun S3C2410_UDC_OUT_CSR1_REG);
825*4882a593Smuzhiyun return;
826*4882a593Smuzhiyun }
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req)
829*4882a593Smuzhiyun s3c2410_udc_read_fifo(ep, req);
830*4882a593Smuzhiyun }
831*4882a593Smuzhiyun }
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun /*
834*4882a593Smuzhiyun * s3c2410_udc_irq - interrupt handler
835*4882a593Smuzhiyun */
s3c2410_udc_irq(int dummy,void * _dev)836*4882a593Smuzhiyun static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
837*4882a593Smuzhiyun {
838*4882a593Smuzhiyun struct s3c2410_udc *dev = _dev;
839*4882a593Smuzhiyun int usb_status;
840*4882a593Smuzhiyun int usbd_status;
841*4882a593Smuzhiyun int pwr_reg;
842*4882a593Smuzhiyun int ep0csr;
843*4882a593Smuzhiyun int i;
844*4882a593Smuzhiyun u32 idx, idx2;
845*4882a593Smuzhiyun unsigned long flags;
846*4882a593Smuzhiyun
847*4882a593Smuzhiyun spin_lock_irqsave(&dev->lock, flags);
848*4882a593Smuzhiyun
849*4882a593Smuzhiyun /* Driver connected ? */
850*4882a593Smuzhiyun if (!dev->driver) {
851*4882a593Smuzhiyun /* Clear interrupts */
852*4882a593Smuzhiyun udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
853*4882a593Smuzhiyun S3C2410_UDC_USB_INT_REG);
854*4882a593Smuzhiyun udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
855*4882a593Smuzhiyun S3C2410_UDC_EP_INT_REG);
856*4882a593Smuzhiyun }
857*4882a593Smuzhiyun
858*4882a593Smuzhiyun /* Save index */
859*4882a593Smuzhiyun idx = udc_read(S3C2410_UDC_INDEX_REG);
860*4882a593Smuzhiyun
861*4882a593Smuzhiyun /* Read status registers */
862*4882a593Smuzhiyun usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
863*4882a593Smuzhiyun usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
864*4882a593Smuzhiyun pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
867*4882a593Smuzhiyun ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
868*4882a593Smuzhiyun
869*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
870*4882a593Smuzhiyun usb_status, usbd_status, pwr_reg, ep0csr);
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun /*
873*4882a593Smuzhiyun * Now, handle interrupts. There's two types :
874*4882a593Smuzhiyun * - Reset, Resume, Suspend coming -> usb_int_reg
875*4882a593Smuzhiyun * - EP -> ep_int_reg
876*4882a593Smuzhiyun */
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun /* RESET */
879*4882a593Smuzhiyun if (usb_status & S3C2410_UDC_USBINT_RESET) {
880*4882a593Smuzhiyun /* two kind of reset :
881*4882a593Smuzhiyun * - reset start -> pwr reg = 8
882*4882a593Smuzhiyun * - reset end -> pwr reg = 0
883*4882a593Smuzhiyun **/
884*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
885*4882a593Smuzhiyun ep0csr, pwr_reg);
886*4882a593Smuzhiyun
887*4882a593Smuzhiyun dev->gadget.speed = USB_SPEED_UNKNOWN;
888*4882a593Smuzhiyun udc_write(0x00, S3C2410_UDC_INDEX_REG);
889*4882a593Smuzhiyun udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
890*4882a593Smuzhiyun S3C2410_UDC_MAXP_REG);
891*4882a593Smuzhiyun dev->address = 0;
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun dev->ep0state = EP0_IDLE;
894*4882a593Smuzhiyun dev->gadget.speed = USB_SPEED_FULL;
895*4882a593Smuzhiyun
896*4882a593Smuzhiyun /* clear interrupt */
897*4882a593Smuzhiyun udc_write(S3C2410_UDC_USBINT_RESET,
898*4882a593Smuzhiyun S3C2410_UDC_USB_INT_REG);
899*4882a593Smuzhiyun
900*4882a593Smuzhiyun udc_write(idx, S3C2410_UDC_INDEX_REG);
901*4882a593Smuzhiyun spin_unlock_irqrestore(&dev->lock, flags);
902*4882a593Smuzhiyun return IRQ_HANDLED;
903*4882a593Smuzhiyun }
904*4882a593Smuzhiyun
905*4882a593Smuzhiyun /* RESUME */
906*4882a593Smuzhiyun if (usb_status & S3C2410_UDC_USBINT_RESUME) {
907*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "USB resume\n");
908*4882a593Smuzhiyun
909*4882a593Smuzhiyun /* clear interrupt */
910*4882a593Smuzhiyun udc_write(S3C2410_UDC_USBINT_RESUME,
911*4882a593Smuzhiyun S3C2410_UDC_USB_INT_REG);
912*4882a593Smuzhiyun
913*4882a593Smuzhiyun if (dev->gadget.speed != USB_SPEED_UNKNOWN
914*4882a593Smuzhiyun && dev->driver
915*4882a593Smuzhiyun && dev->driver->resume)
916*4882a593Smuzhiyun dev->driver->resume(&dev->gadget);
917*4882a593Smuzhiyun }
918*4882a593Smuzhiyun
919*4882a593Smuzhiyun /* SUSPEND */
920*4882a593Smuzhiyun if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
921*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "USB suspend\n");
922*4882a593Smuzhiyun
923*4882a593Smuzhiyun /* clear interrupt */
924*4882a593Smuzhiyun udc_write(S3C2410_UDC_USBINT_SUSPEND,
925*4882a593Smuzhiyun S3C2410_UDC_USB_INT_REG);
926*4882a593Smuzhiyun
927*4882a593Smuzhiyun if (dev->gadget.speed != USB_SPEED_UNKNOWN
928*4882a593Smuzhiyun && dev->driver
929*4882a593Smuzhiyun && dev->driver->suspend)
930*4882a593Smuzhiyun dev->driver->suspend(&dev->gadget);
931*4882a593Smuzhiyun
932*4882a593Smuzhiyun dev->ep0state = EP0_IDLE;
933*4882a593Smuzhiyun }
934*4882a593Smuzhiyun
935*4882a593Smuzhiyun /* EP */
936*4882a593Smuzhiyun /* control traffic */
937*4882a593Smuzhiyun /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
938*4882a593Smuzhiyun * generate an interrupt
939*4882a593Smuzhiyun */
940*4882a593Smuzhiyun if (usbd_status & S3C2410_UDC_INT_EP0) {
941*4882a593Smuzhiyun dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
942*4882a593Smuzhiyun /* Clear the interrupt bit by setting it to 1 */
943*4882a593Smuzhiyun udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
944*4882a593Smuzhiyun s3c2410_udc_handle_ep0(dev);
945*4882a593Smuzhiyun }
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun /* endpoint data transfers */
948*4882a593Smuzhiyun for (i = 1; i < S3C2410_ENDPOINTS; i++) {
949*4882a593Smuzhiyun u32 tmp = 1 << i;
950*4882a593Smuzhiyun if (usbd_status & tmp) {
951*4882a593Smuzhiyun dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
952*4882a593Smuzhiyun
953*4882a593Smuzhiyun /* Clear the interrupt bit by setting it to 1 */
954*4882a593Smuzhiyun udc_write(tmp, S3C2410_UDC_EP_INT_REG);
955*4882a593Smuzhiyun s3c2410_udc_handle_ep(&dev->ep[i]);
956*4882a593Smuzhiyun }
957*4882a593Smuzhiyun }
958*4882a593Smuzhiyun
959*4882a593Smuzhiyun /* what else causes this interrupt? a receive! who is it? */
960*4882a593Smuzhiyun if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) {
961*4882a593Smuzhiyun for (i = 1; i < S3C2410_ENDPOINTS; i++) {
962*4882a593Smuzhiyun idx2 = udc_read(S3C2410_UDC_INDEX_REG);
963*4882a593Smuzhiyun udc_write(i, S3C2410_UDC_INDEX_REG);
964*4882a593Smuzhiyun
965*4882a593Smuzhiyun if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1)
966*4882a593Smuzhiyun s3c2410_udc_handle_ep(&dev->ep[i]);
967*4882a593Smuzhiyun
968*4882a593Smuzhiyun /* restore index */
969*4882a593Smuzhiyun udc_write(idx2, S3C2410_UDC_INDEX_REG);
970*4882a593Smuzhiyun }
971*4882a593Smuzhiyun }
972*4882a593Smuzhiyun
973*4882a593Smuzhiyun dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", irq_usbd);
974*4882a593Smuzhiyun
975*4882a593Smuzhiyun /* Restore old index */
976*4882a593Smuzhiyun udc_write(idx, S3C2410_UDC_INDEX_REG);
977*4882a593Smuzhiyun
978*4882a593Smuzhiyun spin_unlock_irqrestore(&dev->lock, flags);
979*4882a593Smuzhiyun
980*4882a593Smuzhiyun return IRQ_HANDLED;
981*4882a593Smuzhiyun }
982*4882a593Smuzhiyun /*------------------------- s3c2410_ep_ops ----------------------------------*/
983*4882a593Smuzhiyun
to_s3c2410_ep(struct usb_ep * ep)984*4882a593Smuzhiyun static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
985*4882a593Smuzhiyun {
986*4882a593Smuzhiyun return container_of(ep, struct s3c2410_ep, ep);
987*4882a593Smuzhiyun }
988*4882a593Smuzhiyun
to_s3c2410_udc(struct usb_gadget * gadget)989*4882a593Smuzhiyun static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
990*4882a593Smuzhiyun {
991*4882a593Smuzhiyun return container_of(gadget, struct s3c2410_udc, gadget);
992*4882a593Smuzhiyun }
993*4882a593Smuzhiyun
to_s3c2410_req(struct usb_request * req)994*4882a593Smuzhiyun static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
995*4882a593Smuzhiyun {
996*4882a593Smuzhiyun return container_of(req, struct s3c2410_request, req);
997*4882a593Smuzhiyun }
998*4882a593Smuzhiyun
999*4882a593Smuzhiyun /*
1000*4882a593Smuzhiyun * s3c2410_udc_ep_enable
1001*4882a593Smuzhiyun */
s3c2410_udc_ep_enable(struct usb_ep * _ep,const struct usb_endpoint_descriptor * desc)1002*4882a593Smuzhiyun static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1003*4882a593Smuzhiyun const struct usb_endpoint_descriptor *desc)
1004*4882a593Smuzhiyun {
1005*4882a593Smuzhiyun struct s3c2410_udc *dev;
1006*4882a593Smuzhiyun struct s3c2410_ep *ep;
1007*4882a593Smuzhiyun u32 max, tmp;
1008*4882a593Smuzhiyun unsigned long flags;
1009*4882a593Smuzhiyun u32 csr1, csr2;
1010*4882a593Smuzhiyun u32 int_en_reg;
1011*4882a593Smuzhiyun
1012*4882a593Smuzhiyun ep = to_s3c2410_ep(_ep);
1013*4882a593Smuzhiyun
1014*4882a593Smuzhiyun if (!_ep || !desc
1015*4882a593Smuzhiyun || _ep->name == ep0name
1016*4882a593Smuzhiyun || desc->bDescriptorType != USB_DT_ENDPOINT)
1017*4882a593Smuzhiyun return -EINVAL;
1018*4882a593Smuzhiyun
1019*4882a593Smuzhiyun dev = ep->dev;
1020*4882a593Smuzhiyun if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1021*4882a593Smuzhiyun return -ESHUTDOWN;
1022*4882a593Smuzhiyun
1023*4882a593Smuzhiyun max = usb_endpoint_maxp(desc);
1024*4882a593Smuzhiyun
1025*4882a593Smuzhiyun local_irq_save(flags);
1026*4882a593Smuzhiyun _ep->maxpacket = max;
1027*4882a593Smuzhiyun ep->ep.desc = desc;
1028*4882a593Smuzhiyun ep->halted = 0;
1029*4882a593Smuzhiyun ep->bEndpointAddress = desc->bEndpointAddress;
1030*4882a593Smuzhiyun
1031*4882a593Smuzhiyun /* set max packet */
1032*4882a593Smuzhiyun udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1033*4882a593Smuzhiyun udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1034*4882a593Smuzhiyun
1035*4882a593Smuzhiyun /* set type, direction, address; reset fifo counters */
1036*4882a593Smuzhiyun if (desc->bEndpointAddress & USB_DIR_IN) {
1037*4882a593Smuzhiyun csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1038*4882a593Smuzhiyun csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1041*4882a593Smuzhiyun udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1042*4882a593Smuzhiyun udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1043*4882a593Smuzhiyun udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1044*4882a593Smuzhiyun } else {
1045*4882a593Smuzhiyun /* don't flush in fifo or it will cause endpoint interrupt */
1046*4882a593Smuzhiyun csr1 = S3C2410_UDC_ICSR1_CLRDT;
1047*4882a593Smuzhiyun csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1048*4882a593Smuzhiyun
1049*4882a593Smuzhiyun udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1050*4882a593Smuzhiyun udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1051*4882a593Smuzhiyun udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1052*4882a593Smuzhiyun udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1053*4882a593Smuzhiyun
1054*4882a593Smuzhiyun csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1055*4882a593Smuzhiyun csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1056*4882a593Smuzhiyun
1057*4882a593Smuzhiyun udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1058*4882a593Smuzhiyun udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1059*4882a593Smuzhiyun udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1060*4882a593Smuzhiyun udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1061*4882a593Smuzhiyun }
1062*4882a593Smuzhiyun
1063*4882a593Smuzhiyun /* enable irqs */
1064*4882a593Smuzhiyun int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1065*4882a593Smuzhiyun udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1066*4882a593Smuzhiyun
1067*4882a593Smuzhiyun /* print some debug message */
1068*4882a593Smuzhiyun tmp = desc->bEndpointAddress;
1069*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1070*4882a593Smuzhiyun _ep->name, ep->num, tmp,
1071*4882a593Smuzhiyun desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1072*4882a593Smuzhiyun
1073*4882a593Smuzhiyun local_irq_restore(flags);
1074*4882a593Smuzhiyun s3c2410_udc_set_halt(_ep, 0);
1075*4882a593Smuzhiyun
1076*4882a593Smuzhiyun return 0;
1077*4882a593Smuzhiyun }
1078*4882a593Smuzhiyun
1079*4882a593Smuzhiyun /*
1080*4882a593Smuzhiyun * s3c2410_udc_ep_disable
1081*4882a593Smuzhiyun */
s3c2410_udc_ep_disable(struct usb_ep * _ep)1082*4882a593Smuzhiyun static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1083*4882a593Smuzhiyun {
1084*4882a593Smuzhiyun struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1085*4882a593Smuzhiyun unsigned long flags;
1086*4882a593Smuzhiyun u32 int_en_reg;
1087*4882a593Smuzhiyun
1088*4882a593Smuzhiyun if (!_ep || !ep->ep.desc) {
1089*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "%s not enabled\n",
1090*4882a593Smuzhiyun _ep ? ep->ep.name : NULL);
1091*4882a593Smuzhiyun return -EINVAL;
1092*4882a593Smuzhiyun }
1093*4882a593Smuzhiyun
1094*4882a593Smuzhiyun local_irq_save(flags);
1095*4882a593Smuzhiyun
1096*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1097*4882a593Smuzhiyun
1098*4882a593Smuzhiyun ep->ep.desc = NULL;
1099*4882a593Smuzhiyun ep->halted = 1;
1100*4882a593Smuzhiyun
1101*4882a593Smuzhiyun s3c2410_udc_nuke(ep->dev, ep, -ESHUTDOWN);
1102*4882a593Smuzhiyun
1103*4882a593Smuzhiyun /* disable irqs */
1104*4882a593Smuzhiyun int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1105*4882a593Smuzhiyun udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1106*4882a593Smuzhiyun
1107*4882a593Smuzhiyun local_irq_restore(flags);
1108*4882a593Smuzhiyun
1109*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1110*4882a593Smuzhiyun
1111*4882a593Smuzhiyun return 0;
1112*4882a593Smuzhiyun }
1113*4882a593Smuzhiyun
1114*4882a593Smuzhiyun /*
1115*4882a593Smuzhiyun * s3c2410_udc_alloc_request
1116*4882a593Smuzhiyun */
1117*4882a593Smuzhiyun static struct usb_request *
s3c2410_udc_alloc_request(struct usb_ep * _ep,gfp_t mem_flags)1118*4882a593Smuzhiyun s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1119*4882a593Smuzhiyun {
1120*4882a593Smuzhiyun struct s3c2410_request *req;
1121*4882a593Smuzhiyun
1122*4882a593Smuzhiyun dprintk(DEBUG_VERBOSE, "%s(%p,%d)\n", __func__, _ep, mem_flags);
1123*4882a593Smuzhiyun
1124*4882a593Smuzhiyun if (!_ep)
1125*4882a593Smuzhiyun return NULL;
1126*4882a593Smuzhiyun
1127*4882a593Smuzhiyun req = kzalloc(sizeof(struct s3c2410_request), mem_flags);
1128*4882a593Smuzhiyun if (!req)
1129*4882a593Smuzhiyun return NULL;
1130*4882a593Smuzhiyun
1131*4882a593Smuzhiyun INIT_LIST_HEAD(&req->queue);
1132*4882a593Smuzhiyun return &req->req;
1133*4882a593Smuzhiyun }
1134*4882a593Smuzhiyun
1135*4882a593Smuzhiyun /*
1136*4882a593Smuzhiyun * s3c2410_udc_free_request
1137*4882a593Smuzhiyun */
1138*4882a593Smuzhiyun static void
s3c2410_udc_free_request(struct usb_ep * _ep,struct usb_request * _req)1139*4882a593Smuzhiyun s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1140*4882a593Smuzhiyun {
1141*4882a593Smuzhiyun struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1142*4882a593Smuzhiyun struct s3c2410_request *req = to_s3c2410_req(_req);
1143*4882a593Smuzhiyun
1144*4882a593Smuzhiyun dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1145*4882a593Smuzhiyun
1146*4882a593Smuzhiyun if (!ep || !_req || (!ep->ep.desc && _ep->name != ep0name))
1147*4882a593Smuzhiyun return;
1148*4882a593Smuzhiyun
1149*4882a593Smuzhiyun WARN_ON(!list_empty(&req->queue));
1150*4882a593Smuzhiyun kfree(req);
1151*4882a593Smuzhiyun }
1152*4882a593Smuzhiyun
1153*4882a593Smuzhiyun /*
1154*4882a593Smuzhiyun * s3c2410_udc_queue
1155*4882a593Smuzhiyun */
s3c2410_udc_queue(struct usb_ep * _ep,struct usb_request * _req,gfp_t gfp_flags)1156*4882a593Smuzhiyun static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1157*4882a593Smuzhiyun gfp_t gfp_flags)
1158*4882a593Smuzhiyun {
1159*4882a593Smuzhiyun struct s3c2410_request *req = to_s3c2410_req(_req);
1160*4882a593Smuzhiyun struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1161*4882a593Smuzhiyun struct s3c2410_udc *dev;
1162*4882a593Smuzhiyun u32 ep_csr = 0;
1163*4882a593Smuzhiyun int fifo_count = 0;
1164*4882a593Smuzhiyun unsigned long flags;
1165*4882a593Smuzhiyun
1166*4882a593Smuzhiyun if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1167*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1168*4882a593Smuzhiyun return -EINVAL;
1169*4882a593Smuzhiyun }
1170*4882a593Smuzhiyun
1171*4882a593Smuzhiyun dev = ep->dev;
1172*4882a593Smuzhiyun if (unlikely(!dev->driver
1173*4882a593Smuzhiyun || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1174*4882a593Smuzhiyun return -ESHUTDOWN;
1175*4882a593Smuzhiyun }
1176*4882a593Smuzhiyun
1177*4882a593Smuzhiyun local_irq_save(flags);
1178*4882a593Smuzhiyun
1179*4882a593Smuzhiyun if (unlikely(!_req || !_req->complete
1180*4882a593Smuzhiyun || !_req->buf || !list_empty(&req->queue))) {
1181*4882a593Smuzhiyun if (!_req)
1182*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1183*4882a593Smuzhiyun else {
1184*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1185*4882a593Smuzhiyun __func__, !_req->complete, !_req->buf,
1186*4882a593Smuzhiyun !list_empty(&req->queue));
1187*4882a593Smuzhiyun }
1188*4882a593Smuzhiyun
1189*4882a593Smuzhiyun local_irq_restore(flags);
1190*4882a593Smuzhiyun return -EINVAL;
1191*4882a593Smuzhiyun }
1192*4882a593Smuzhiyun
1193*4882a593Smuzhiyun _req->status = -EINPROGRESS;
1194*4882a593Smuzhiyun _req->actual = 0;
1195*4882a593Smuzhiyun
1196*4882a593Smuzhiyun dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1197*4882a593Smuzhiyun __func__, ep->bEndpointAddress, _req->length);
1198*4882a593Smuzhiyun
1199*4882a593Smuzhiyun if (ep->bEndpointAddress) {
1200*4882a593Smuzhiyun udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1201*4882a593Smuzhiyun
1202*4882a593Smuzhiyun ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1203*4882a593Smuzhiyun ? S3C2410_UDC_IN_CSR1_REG
1204*4882a593Smuzhiyun : S3C2410_UDC_OUT_CSR1_REG);
1205*4882a593Smuzhiyun fifo_count = s3c2410_udc_fifo_count_out();
1206*4882a593Smuzhiyun } else {
1207*4882a593Smuzhiyun udc_write(0, S3C2410_UDC_INDEX_REG);
1208*4882a593Smuzhiyun ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1209*4882a593Smuzhiyun fifo_count = s3c2410_udc_fifo_count_out();
1210*4882a593Smuzhiyun }
1211*4882a593Smuzhiyun
1212*4882a593Smuzhiyun /* kickstart this i/o queue? */
1213*4882a593Smuzhiyun if (list_empty(&ep->queue) && !ep->halted) {
1214*4882a593Smuzhiyun if (ep->bEndpointAddress == 0 /* ep0 */) {
1215*4882a593Smuzhiyun switch (dev->ep0state) {
1216*4882a593Smuzhiyun case EP0_IN_DATA_PHASE:
1217*4882a593Smuzhiyun if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1218*4882a593Smuzhiyun && s3c2410_udc_write_fifo(ep,
1219*4882a593Smuzhiyun req)) {
1220*4882a593Smuzhiyun dev->ep0state = EP0_IDLE;
1221*4882a593Smuzhiyun req = NULL;
1222*4882a593Smuzhiyun }
1223*4882a593Smuzhiyun break;
1224*4882a593Smuzhiyun
1225*4882a593Smuzhiyun case EP0_OUT_DATA_PHASE:
1226*4882a593Smuzhiyun if ((!_req->length)
1227*4882a593Smuzhiyun || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1228*4882a593Smuzhiyun && s3c2410_udc_read_fifo(ep,
1229*4882a593Smuzhiyun req))) {
1230*4882a593Smuzhiyun dev->ep0state = EP0_IDLE;
1231*4882a593Smuzhiyun req = NULL;
1232*4882a593Smuzhiyun }
1233*4882a593Smuzhiyun break;
1234*4882a593Smuzhiyun
1235*4882a593Smuzhiyun default:
1236*4882a593Smuzhiyun local_irq_restore(flags);
1237*4882a593Smuzhiyun return -EL2HLT;
1238*4882a593Smuzhiyun }
1239*4882a593Smuzhiyun } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1240*4882a593Smuzhiyun && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1241*4882a593Smuzhiyun && s3c2410_udc_write_fifo(ep, req)) {
1242*4882a593Smuzhiyun req = NULL;
1243*4882a593Smuzhiyun } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1244*4882a593Smuzhiyun && fifo_count
1245*4882a593Smuzhiyun && s3c2410_udc_read_fifo(ep, req)) {
1246*4882a593Smuzhiyun req = NULL;
1247*4882a593Smuzhiyun }
1248*4882a593Smuzhiyun }
1249*4882a593Smuzhiyun
1250*4882a593Smuzhiyun /* pio or dma irq handler advances the queue. */
1251*4882a593Smuzhiyun if (likely(req))
1252*4882a593Smuzhiyun list_add_tail(&req->queue, &ep->queue);
1253*4882a593Smuzhiyun
1254*4882a593Smuzhiyun local_irq_restore(flags);
1255*4882a593Smuzhiyun
1256*4882a593Smuzhiyun dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1257*4882a593Smuzhiyun return 0;
1258*4882a593Smuzhiyun }
1259*4882a593Smuzhiyun
1260*4882a593Smuzhiyun /*
1261*4882a593Smuzhiyun * s3c2410_udc_dequeue
1262*4882a593Smuzhiyun */
s3c2410_udc_dequeue(struct usb_ep * _ep,struct usb_request * _req)1263*4882a593Smuzhiyun static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1264*4882a593Smuzhiyun {
1265*4882a593Smuzhiyun struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1266*4882a593Smuzhiyun int retval = -EINVAL;
1267*4882a593Smuzhiyun unsigned long flags;
1268*4882a593Smuzhiyun struct s3c2410_request *req = NULL;
1269*4882a593Smuzhiyun
1270*4882a593Smuzhiyun dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1271*4882a593Smuzhiyun
1272*4882a593Smuzhiyun if (!the_controller->driver)
1273*4882a593Smuzhiyun return -ESHUTDOWN;
1274*4882a593Smuzhiyun
1275*4882a593Smuzhiyun if (!_ep || !_req)
1276*4882a593Smuzhiyun return retval;
1277*4882a593Smuzhiyun
1278*4882a593Smuzhiyun local_irq_save(flags);
1279*4882a593Smuzhiyun
1280*4882a593Smuzhiyun list_for_each_entry(req, &ep->queue, queue) {
1281*4882a593Smuzhiyun if (&req->req == _req) {
1282*4882a593Smuzhiyun list_del_init(&req->queue);
1283*4882a593Smuzhiyun _req->status = -ECONNRESET;
1284*4882a593Smuzhiyun retval = 0;
1285*4882a593Smuzhiyun break;
1286*4882a593Smuzhiyun }
1287*4882a593Smuzhiyun }
1288*4882a593Smuzhiyun
1289*4882a593Smuzhiyun if (retval == 0) {
1290*4882a593Smuzhiyun dprintk(DEBUG_VERBOSE,
1291*4882a593Smuzhiyun "dequeued req %p from %s, len %d buf %p\n",
1292*4882a593Smuzhiyun req, _ep->name, _req->length, _req->buf);
1293*4882a593Smuzhiyun
1294*4882a593Smuzhiyun s3c2410_udc_done(ep, req, -ECONNRESET);
1295*4882a593Smuzhiyun }
1296*4882a593Smuzhiyun
1297*4882a593Smuzhiyun local_irq_restore(flags);
1298*4882a593Smuzhiyun return retval;
1299*4882a593Smuzhiyun }
1300*4882a593Smuzhiyun
1301*4882a593Smuzhiyun /*
1302*4882a593Smuzhiyun * s3c2410_udc_set_halt
1303*4882a593Smuzhiyun */
s3c2410_udc_set_halt(struct usb_ep * _ep,int value)1304*4882a593Smuzhiyun static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1305*4882a593Smuzhiyun {
1306*4882a593Smuzhiyun struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1307*4882a593Smuzhiyun u32 ep_csr = 0;
1308*4882a593Smuzhiyun unsigned long flags;
1309*4882a593Smuzhiyun u32 idx;
1310*4882a593Smuzhiyun
1311*4882a593Smuzhiyun if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1312*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1313*4882a593Smuzhiyun return -EINVAL;
1314*4882a593Smuzhiyun }
1315*4882a593Smuzhiyun
1316*4882a593Smuzhiyun local_irq_save(flags);
1317*4882a593Smuzhiyun
1318*4882a593Smuzhiyun idx = ep->bEndpointAddress & 0x7F;
1319*4882a593Smuzhiyun
1320*4882a593Smuzhiyun if (idx == 0) {
1321*4882a593Smuzhiyun s3c2410_udc_set_ep0_ss(base_addr);
1322*4882a593Smuzhiyun s3c2410_udc_set_ep0_de_out(base_addr);
1323*4882a593Smuzhiyun } else {
1324*4882a593Smuzhiyun udc_write(idx, S3C2410_UDC_INDEX_REG);
1325*4882a593Smuzhiyun ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1326*4882a593Smuzhiyun ? S3C2410_UDC_IN_CSR1_REG
1327*4882a593Smuzhiyun : S3C2410_UDC_OUT_CSR1_REG);
1328*4882a593Smuzhiyun
1329*4882a593Smuzhiyun if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1330*4882a593Smuzhiyun if (value)
1331*4882a593Smuzhiyun udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1332*4882a593Smuzhiyun S3C2410_UDC_IN_CSR1_REG);
1333*4882a593Smuzhiyun else {
1334*4882a593Smuzhiyun ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1335*4882a593Smuzhiyun udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1336*4882a593Smuzhiyun ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1337*4882a593Smuzhiyun udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1338*4882a593Smuzhiyun }
1339*4882a593Smuzhiyun } else {
1340*4882a593Smuzhiyun if (value)
1341*4882a593Smuzhiyun udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1342*4882a593Smuzhiyun S3C2410_UDC_OUT_CSR1_REG);
1343*4882a593Smuzhiyun else {
1344*4882a593Smuzhiyun ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1345*4882a593Smuzhiyun udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1346*4882a593Smuzhiyun ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1347*4882a593Smuzhiyun udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1348*4882a593Smuzhiyun }
1349*4882a593Smuzhiyun }
1350*4882a593Smuzhiyun }
1351*4882a593Smuzhiyun
1352*4882a593Smuzhiyun ep->halted = value ? 1 : 0;
1353*4882a593Smuzhiyun local_irq_restore(flags);
1354*4882a593Smuzhiyun
1355*4882a593Smuzhiyun return 0;
1356*4882a593Smuzhiyun }
1357*4882a593Smuzhiyun
1358*4882a593Smuzhiyun static const struct usb_ep_ops s3c2410_ep_ops = {
1359*4882a593Smuzhiyun .enable = s3c2410_udc_ep_enable,
1360*4882a593Smuzhiyun .disable = s3c2410_udc_ep_disable,
1361*4882a593Smuzhiyun
1362*4882a593Smuzhiyun .alloc_request = s3c2410_udc_alloc_request,
1363*4882a593Smuzhiyun .free_request = s3c2410_udc_free_request,
1364*4882a593Smuzhiyun
1365*4882a593Smuzhiyun .queue = s3c2410_udc_queue,
1366*4882a593Smuzhiyun .dequeue = s3c2410_udc_dequeue,
1367*4882a593Smuzhiyun
1368*4882a593Smuzhiyun .set_halt = s3c2410_udc_set_halt,
1369*4882a593Smuzhiyun };
1370*4882a593Smuzhiyun
1371*4882a593Smuzhiyun /*------------------------- usb_gadget_ops ----------------------------------*/
1372*4882a593Smuzhiyun
1373*4882a593Smuzhiyun /*
1374*4882a593Smuzhiyun * s3c2410_udc_get_frame
1375*4882a593Smuzhiyun */
s3c2410_udc_get_frame(struct usb_gadget * _gadget)1376*4882a593Smuzhiyun static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1377*4882a593Smuzhiyun {
1378*4882a593Smuzhiyun int tmp;
1379*4882a593Smuzhiyun
1380*4882a593Smuzhiyun dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1381*4882a593Smuzhiyun
1382*4882a593Smuzhiyun tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1383*4882a593Smuzhiyun tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1384*4882a593Smuzhiyun return tmp;
1385*4882a593Smuzhiyun }
1386*4882a593Smuzhiyun
1387*4882a593Smuzhiyun /*
1388*4882a593Smuzhiyun * s3c2410_udc_wakeup
1389*4882a593Smuzhiyun */
s3c2410_udc_wakeup(struct usb_gadget * _gadget)1390*4882a593Smuzhiyun static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1391*4882a593Smuzhiyun {
1392*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1393*4882a593Smuzhiyun return 0;
1394*4882a593Smuzhiyun }
1395*4882a593Smuzhiyun
1396*4882a593Smuzhiyun /*
1397*4882a593Smuzhiyun * s3c2410_udc_set_selfpowered
1398*4882a593Smuzhiyun */
s3c2410_udc_set_selfpowered(struct usb_gadget * gadget,int value)1399*4882a593Smuzhiyun static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1400*4882a593Smuzhiyun {
1401*4882a593Smuzhiyun struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1402*4882a593Smuzhiyun
1403*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1404*4882a593Smuzhiyun
1405*4882a593Smuzhiyun gadget->is_selfpowered = (value != 0);
1406*4882a593Smuzhiyun if (value)
1407*4882a593Smuzhiyun udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1408*4882a593Smuzhiyun else
1409*4882a593Smuzhiyun udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1410*4882a593Smuzhiyun
1411*4882a593Smuzhiyun return 0;
1412*4882a593Smuzhiyun }
1413*4882a593Smuzhiyun
1414*4882a593Smuzhiyun static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1415*4882a593Smuzhiyun static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1416*4882a593Smuzhiyun
s3c2410_udc_set_pullup(struct s3c2410_udc * udc,int is_on)1417*4882a593Smuzhiyun static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1418*4882a593Smuzhiyun {
1419*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1420*4882a593Smuzhiyun
1421*4882a593Smuzhiyun if (udc_info && (udc_info->udc_command ||
1422*4882a593Smuzhiyun gpio_is_valid(udc_info->pullup_pin))) {
1423*4882a593Smuzhiyun
1424*4882a593Smuzhiyun if (is_on)
1425*4882a593Smuzhiyun s3c2410_udc_enable(udc);
1426*4882a593Smuzhiyun else {
1427*4882a593Smuzhiyun if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1428*4882a593Smuzhiyun if (udc->driver && udc->driver->disconnect)
1429*4882a593Smuzhiyun udc->driver->disconnect(&udc->gadget);
1430*4882a593Smuzhiyun
1431*4882a593Smuzhiyun }
1432*4882a593Smuzhiyun s3c2410_udc_disable(udc);
1433*4882a593Smuzhiyun }
1434*4882a593Smuzhiyun } else {
1435*4882a593Smuzhiyun return -EOPNOTSUPP;
1436*4882a593Smuzhiyun }
1437*4882a593Smuzhiyun
1438*4882a593Smuzhiyun return 0;
1439*4882a593Smuzhiyun }
1440*4882a593Smuzhiyun
s3c2410_udc_vbus_session(struct usb_gadget * gadget,int is_active)1441*4882a593Smuzhiyun static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1442*4882a593Smuzhiyun {
1443*4882a593Smuzhiyun struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1444*4882a593Smuzhiyun
1445*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1446*4882a593Smuzhiyun
1447*4882a593Smuzhiyun udc->vbus = (is_active != 0);
1448*4882a593Smuzhiyun s3c2410_udc_set_pullup(udc, is_active);
1449*4882a593Smuzhiyun return 0;
1450*4882a593Smuzhiyun }
1451*4882a593Smuzhiyun
s3c2410_udc_pullup(struct usb_gadget * gadget,int is_on)1452*4882a593Smuzhiyun static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1453*4882a593Smuzhiyun {
1454*4882a593Smuzhiyun struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1455*4882a593Smuzhiyun
1456*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1457*4882a593Smuzhiyun
1458*4882a593Smuzhiyun s3c2410_udc_set_pullup(udc, is_on);
1459*4882a593Smuzhiyun return 0;
1460*4882a593Smuzhiyun }
1461*4882a593Smuzhiyun
s3c2410_udc_vbus_irq(int irq,void * _dev)1462*4882a593Smuzhiyun static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1463*4882a593Smuzhiyun {
1464*4882a593Smuzhiyun struct s3c2410_udc *dev = _dev;
1465*4882a593Smuzhiyun unsigned int value;
1466*4882a593Smuzhiyun
1467*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1468*4882a593Smuzhiyun
1469*4882a593Smuzhiyun value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0;
1470*4882a593Smuzhiyun if (udc_info->vbus_pin_inverted)
1471*4882a593Smuzhiyun value = !value;
1472*4882a593Smuzhiyun
1473*4882a593Smuzhiyun if (value != dev->vbus)
1474*4882a593Smuzhiyun s3c2410_udc_vbus_session(&dev->gadget, value);
1475*4882a593Smuzhiyun
1476*4882a593Smuzhiyun return IRQ_HANDLED;
1477*4882a593Smuzhiyun }
1478*4882a593Smuzhiyun
s3c2410_vbus_draw(struct usb_gadget * _gadget,unsigned ma)1479*4882a593Smuzhiyun static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1480*4882a593Smuzhiyun {
1481*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1482*4882a593Smuzhiyun
1483*4882a593Smuzhiyun if (udc_info && udc_info->vbus_draw) {
1484*4882a593Smuzhiyun udc_info->vbus_draw(ma);
1485*4882a593Smuzhiyun return 0;
1486*4882a593Smuzhiyun }
1487*4882a593Smuzhiyun
1488*4882a593Smuzhiyun return -ENOTSUPP;
1489*4882a593Smuzhiyun }
1490*4882a593Smuzhiyun
1491*4882a593Smuzhiyun static int s3c2410_udc_start(struct usb_gadget *g,
1492*4882a593Smuzhiyun struct usb_gadget_driver *driver);
1493*4882a593Smuzhiyun static int s3c2410_udc_stop(struct usb_gadget *g);
1494*4882a593Smuzhiyun
1495*4882a593Smuzhiyun static const struct usb_gadget_ops s3c2410_ops = {
1496*4882a593Smuzhiyun .get_frame = s3c2410_udc_get_frame,
1497*4882a593Smuzhiyun .wakeup = s3c2410_udc_wakeup,
1498*4882a593Smuzhiyun .set_selfpowered = s3c2410_udc_set_selfpowered,
1499*4882a593Smuzhiyun .pullup = s3c2410_udc_pullup,
1500*4882a593Smuzhiyun .vbus_session = s3c2410_udc_vbus_session,
1501*4882a593Smuzhiyun .vbus_draw = s3c2410_vbus_draw,
1502*4882a593Smuzhiyun .udc_start = s3c2410_udc_start,
1503*4882a593Smuzhiyun .udc_stop = s3c2410_udc_stop,
1504*4882a593Smuzhiyun };
1505*4882a593Smuzhiyun
s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)1506*4882a593Smuzhiyun static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)
1507*4882a593Smuzhiyun {
1508*4882a593Smuzhiyun if (!udc_info)
1509*4882a593Smuzhiyun return;
1510*4882a593Smuzhiyun
1511*4882a593Smuzhiyun if (udc_info->udc_command) {
1512*4882a593Smuzhiyun udc_info->udc_command(cmd);
1513*4882a593Smuzhiyun } else if (gpio_is_valid(udc_info->pullup_pin)) {
1514*4882a593Smuzhiyun int value;
1515*4882a593Smuzhiyun
1516*4882a593Smuzhiyun switch (cmd) {
1517*4882a593Smuzhiyun case S3C2410_UDC_P_ENABLE:
1518*4882a593Smuzhiyun value = 1;
1519*4882a593Smuzhiyun break;
1520*4882a593Smuzhiyun case S3C2410_UDC_P_DISABLE:
1521*4882a593Smuzhiyun value = 0;
1522*4882a593Smuzhiyun break;
1523*4882a593Smuzhiyun default:
1524*4882a593Smuzhiyun return;
1525*4882a593Smuzhiyun }
1526*4882a593Smuzhiyun value ^= udc_info->pullup_pin_inverted;
1527*4882a593Smuzhiyun
1528*4882a593Smuzhiyun gpio_set_value(udc_info->pullup_pin, value);
1529*4882a593Smuzhiyun }
1530*4882a593Smuzhiyun }
1531*4882a593Smuzhiyun
1532*4882a593Smuzhiyun /*------------------------- gadget driver handling---------------------------*/
1533*4882a593Smuzhiyun /*
1534*4882a593Smuzhiyun * s3c2410_udc_disable
1535*4882a593Smuzhiyun */
s3c2410_udc_disable(struct s3c2410_udc * dev)1536*4882a593Smuzhiyun static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1537*4882a593Smuzhiyun {
1538*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1539*4882a593Smuzhiyun
1540*4882a593Smuzhiyun /* Disable all interrupts */
1541*4882a593Smuzhiyun udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1542*4882a593Smuzhiyun udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1543*4882a593Smuzhiyun
1544*4882a593Smuzhiyun /* Clear the interrupt registers */
1545*4882a593Smuzhiyun udc_write(S3C2410_UDC_USBINT_RESET
1546*4882a593Smuzhiyun | S3C2410_UDC_USBINT_RESUME
1547*4882a593Smuzhiyun | S3C2410_UDC_USBINT_SUSPEND,
1548*4882a593Smuzhiyun S3C2410_UDC_USB_INT_REG);
1549*4882a593Smuzhiyun
1550*4882a593Smuzhiyun udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1551*4882a593Smuzhiyun
1552*4882a593Smuzhiyun /* Good bye, cruel world */
1553*4882a593Smuzhiyun s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1554*4882a593Smuzhiyun
1555*4882a593Smuzhiyun /* Set speed to unknown */
1556*4882a593Smuzhiyun dev->gadget.speed = USB_SPEED_UNKNOWN;
1557*4882a593Smuzhiyun }
1558*4882a593Smuzhiyun
1559*4882a593Smuzhiyun /*
1560*4882a593Smuzhiyun * s3c2410_udc_reinit
1561*4882a593Smuzhiyun */
s3c2410_udc_reinit(struct s3c2410_udc * dev)1562*4882a593Smuzhiyun static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1563*4882a593Smuzhiyun {
1564*4882a593Smuzhiyun u32 i;
1565*4882a593Smuzhiyun
1566*4882a593Smuzhiyun /* device/ep0 records init */
1567*4882a593Smuzhiyun INIT_LIST_HEAD(&dev->gadget.ep_list);
1568*4882a593Smuzhiyun INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1569*4882a593Smuzhiyun dev->ep0state = EP0_IDLE;
1570*4882a593Smuzhiyun
1571*4882a593Smuzhiyun for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1572*4882a593Smuzhiyun struct s3c2410_ep *ep = &dev->ep[i];
1573*4882a593Smuzhiyun
1574*4882a593Smuzhiyun if (i != 0)
1575*4882a593Smuzhiyun list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
1576*4882a593Smuzhiyun
1577*4882a593Smuzhiyun ep->dev = dev;
1578*4882a593Smuzhiyun ep->ep.desc = NULL;
1579*4882a593Smuzhiyun ep->halted = 0;
1580*4882a593Smuzhiyun INIT_LIST_HEAD(&ep->queue);
1581*4882a593Smuzhiyun usb_ep_set_maxpacket_limit(&ep->ep, ep->ep.maxpacket);
1582*4882a593Smuzhiyun }
1583*4882a593Smuzhiyun }
1584*4882a593Smuzhiyun
1585*4882a593Smuzhiyun /*
1586*4882a593Smuzhiyun * s3c2410_udc_enable
1587*4882a593Smuzhiyun */
s3c2410_udc_enable(struct s3c2410_udc * dev)1588*4882a593Smuzhiyun static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1589*4882a593Smuzhiyun {
1590*4882a593Smuzhiyun int i;
1591*4882a593Smuzhiyun
1592*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1593*4882a593Smuzhiyun
1594*4882a593Smuzhiyun /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1595*4882a593Smuzhiyun dev->gadget.speed = USB_SPEED_FULL;
1596*4882a593Smuzhiyun
1597*4882a593Smuzhiyun /* Set MAXP for all endpoints */
1598*4882a593Smuzhiyun for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1599*4882a593Smuzhiyun udc_write(i, S3C2410_UDC_INDEX_REG);
1600*4882a593Smuzhiyun udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1601*4882a593Smuzhiyun S3C2410_UDC_MAXP_REG);
1602*4882a593Smuzhiyun }
1603*4882a593Smuzhiyun
1604*4882a593Smuzhiyun /* Set default power state */
1605*4882a593Smuzhiyun udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1606*4882a593Smuzhiyun
1607*4882a593Smuzhiyun /* Enable reset and suspend interrupt interrupts */
1608*4882a593Smuzhiyun udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1609*4882a593Smuzhiyun S3C2410_UDC_USB_INT_EN_REG);
1610*4882a593Smuzhiyun
1611*4882a593Smuzhiyun /* Enable ep0 interrupt */
1612*4882a593Smuzhiyun udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1613*4882a593Smuzhiyun
1614*4882a593Smuzhiyun /* time to say "hello, world" */
1615*4882a593Smuzhiyun s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1616*4882a593Smuzhiyun }
1617*4882a593Smuzhiyun
s3c2410_udc_start(struct usb_gadget * g,struct usb_gadget_driver * driver)1618*4882a593Smuzhiyun static int s3c2410_udc_start(struct usb_gadget *g,
1619*4882a593Smuzhiyun struct usb_gadget_driver *driver)
1620*4882a593Smuzhiyun {
1621*4882a593Smuzhiyun struct s3c2410_udc *udc = to_s3c2410(g);
1622*4882a593Smuzhiyun
1623*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name);
1624*4882a593Smuzhiyun
1625*4882a593Smuzhiyun /* Hook the driver */
1626*4882a593Smuzhiyun udc->driver = driver;
1627*4882a593Smuzhiyun
1628*4882a593Smuzhiyun /* Enable udc */
1629*4882a593Smuzhiyun s3c2410_udc_enable(udc);
1630*4882a593Smuzhiyun
1631*4882a593Smuzhiyun return 0;
1632*4882a593Smuzhiyun }
1633*4882a593Smuzhiyun
s3c2410_udc_stop(struct usb_gadget * g)1634*4882a593Smuzhiyun static int s3c2410_udc_stop(struct usb_gadget *g)
1635*4882a593Smuzhiyun {
1636*4882a593Smuzhiyun struct s3c2410_udc *udc = to_s3c2410(g);
1637*4882a593Smuzhiyun
1638*4882a593Smuzhiyun udc->driver = NULL;
1639*4882a593Smuzhiyun
1640*4882a593Smuzhiyun /* Disable udc */
1641*4882a593Smuzhiyun s3c2410_udc_disable(udc);
1642*4882a593Smuzhiyun
1643*4882a593Smuzhiyun return 0;
1644*4882a593Smuzhiyun }
1645*4882a593Smuzhiyun
1646*4882a593Smuzhiyun /*---------------------------------------------------------------------------*/
1647*4882a593Smuzhiyun static struct s3c2410_udc memory = {
1648*4882a593Smuzhiyun .gadget = {
1649*4882a593Smuzhiyun .ops = &s3c2410_ops,
1650*4882a593Smuzhiyun .ep0 = &memory.ep[0].ep,
1651*4882a593Smuzhiyun .name = gadget_name,
1652*4882a593Smuzhiyun .dev = {
1653*4882a593Smuzhiyun .init_name = "gadget",
1654*4882a593Smuzhiyun },
1655*4882a593Smuzhiyun },
1656*4882a593Smuzhiyun
1657*4882a593Smuzhiyun /* control endpoint */
1658*4882a593Smuzhiyun .ep[0] = {
1659*4882a593Smuzhiyun .num = 0,
1660*4882a593Smuzhiyun .ep = {
1661*4882a593Smuzhiyun .name = ep0name,
1662*4882a593Smuzhiyun .ops = &s3c2410_ep_ops,
1663*4882a593Smuzhiyun .maxpacket = EP0_FIFO_SIZE,
1664*4882a593Smuzhiyun .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL,
1665*4882a593Smuzhiyun USB_EP_CAPS_DIR_ALL),
1666*4882a593Smuzhiyun },
1667*4882a593Smuzhiyun .dev = &memory,
1668*4882a593Smuzhiyun },
1669*4882a593Smuzhiyun
1670*4882a593Smuzhiyun /* first group of endpoints */
1671*4882a593Smuzhiyun .ep[1] = {
1672*4882a593Smuzhiyun .num = 1,
1673*4882a593Smuzhiyun .ep = {
1674*4882a593Smuzhiyun .name = "ep1-bulk",
1675*4882a593Smuzhiyun .ops = &s3c2410_ep_ops,
1676*4882a593Smuzhiyun .maxpacket = EP_FIFO_SIZE,
1677*4882a593Smuzhiyun .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1678*4882a593Smuzhiyun USB_EP_CAPS_DIR_ALL),
1679*4882a593Smuzhiyun },
1680*4882a593Smuzhiyun .dev = &memory,
1681*4882a593Smuzhiyun .fifo_size = EP_FIFO_SIZE,
1682*4882a593Smuzhiyun .bEndpointAddress = 1,
1683*4882a593Smuzhiyun .bmAttributes = USB_ENDPOINT_XFER_BULK,
1684*4882a593Smuzhiyun },
1685*4882a593Smuzhiyun .ep[2] = {
1686*4882a593Smuzhiyun .num = 2,
1687*4882a593Smuzhiyun .ep = {
1688*4882a593Smuzhiyun .name = "ep2-bulk",
1689*4882a593Smuzhiyun .ops = &s3c2410_ep_ops,
1690*4882a593Smuzhiyun .maxpacket = EP_FIFO_SIZE,
1691*4882a593Smuzhiyun .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1692*4882a593Smuzhiyun USB_EP_CAPS_DIR_ALL),
1693*4882a593Smuzhiyun },
1694*4882a593Smuzhiyun .dev = &memory,
1695*4882a593Smuzhiyun .fifo_size = EP_FIFO_SIZE,
1696*4882a593Smuzhiyun .bEndpointAddress = 2,
1697*4882a593Smuzhiyun .bmAttributes = USB_ENDPOINT_XFER_BULK,
1698*4882a593Smuzhiyun },
1699*4882a593Smuzhiyun .ep[3] = {
1700*4882a593Smuzhiyun .num = 3,
1701*4882a593Smuzhiyun .ep = {
1702*4882a593Smuzhiyun .name = "ep3-bulk",
1703*4882a593Smuzhiyun .ops = &s3c2410_ep_ops,
1704*4882a593Smuzhiyun .maxpacket = EP_FIFO_SIZE,
1705*4882a593Smuzhiyun .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1706*4882a593Smuzhiyun USB_EP_CAPS_DIR_ALL),
1707*4882a593Smuzhiyun },
1708*4882a593Smuzhiyun .dev = &memory,
1709*4882a593Smuzhiyun .fifo_size = EP_FIFO_SIZE,
1710*4882a593Smuzhiyun .bEndpointAddress = 3,
1711*4882a593Smuzhiyun .bmAttributes = USB_ENDPOINT_XFER_BULK,
1712*4882a593Smuzhiyun },
1713*4882a593Smuzhiyun .ep[4] = {
1714*4882a593Smuzhiyun .num = 4,
1715*4882a593Smuzhiyun .ep = {
1716*4882a593Smuzhiyun .name = "ep4-bulk",
1717*4882a593Smuzhiyun .ops = &s3c2410_ep_ops,
1718*4882a593Smuzhiyun .maxpacket = EP_FIFO_SIZE,
1719*4882a593Smuzhiyun .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1720*4882a593Smuzhiyun USB_EP_CAPS_DIR_ALL),
1721*4882a593Smuzhiyun },
1722*4882a593Smuzhiyun .dev = &memory,
1723*4882a593Smuzhiyun .fifo_size = EP_FIFO_SIZE,
1724*4882a593Smuzhiyun .bEndpointAddress = 4,
1725*4882a593Smuzhiyun .bmAttributes = USB_ENDPOINT_XFER_BULK,
1726*4882a593Smuzhiyun }
1727*4882a593Smuzhiyun
1728*4882a593Smuzhiyun };
1729*4882a593Smuzhiyun
1730*4882a593Smuzhiyun /*
1731*4882a593Smuzhiyun * probe - binds to the platform device
1732*4882a593Smuzhiyun */
s3c2410_udc_probe(struct platform_device * pdev)1733*4882a593Smuzhiyun static int s3c2410_udc_probe(struct platform_device *pdev)
1734*4882a593Smuzhiyun {
1735*4882a593Smuzhiyun struct s3c2410_udc *udc = &memory;
1736*4882a593Smuzhiyun struct device *dev = &pdev->dev;
1737*4882a593Smuzhiyun int retval;
1738*4882a593Smuzhiyun int irq;
1739*4882a593Smuzhiyun
1740*4882a593Smuzhiyun dev_dbg(dev, "%s()\n", __func__);
1741*4882a593Smuzhiyun
1742*4882a593Smuzhiyun usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1743*4882a593Smuzhiyun if (IS_ERR(usb_bus_clock)) {
1744*4882a593Smuzhiyun dev_err(dev, "failed to get usb bus clock source\n");
1745*4882a593Smuzhiyun return PTR_ERR(usb_bus_clock);
1746*4882a593Smuzhiyun }
1747*4882a593Smuzhiyun
1748*4882a593Smuzhiyun clk_prepare_enable(usb_bus_clock);
1749*4882a593Smuzhiyun
1750*4882a593Smuzhiyun udc_clock = clk_get(NULL, "usb-device");
1751*4882a593Smuzhiyun if (IS_ERR(udc_clock)) {
1752*4882a593Smuzhiyun dev_err(dev, "failed to get udc clock source\n");
1753*4882a593Smuzhiyun retval = PTR_ERR(udc_clock);
1754*4882a593Smuzhiyun goto err_usb_bus_clk;
1755*4882a593Smuzhiyun }
1756*4882a593Smuzhiyun
1757*4882a593Smuzhiyun clk_prepare_enable(udc_clock);
1758*4882a593Smuzhiyun
1759*4882a593Smuzhiyun mdelay(10);
1760*4882a593Smuzhiyun
1761*4882a593Smuzhiyun dev_dbg(dev, "got and enabled clocks\n");
1762*4882a593Smuzhiyun
1763*4882a593Smuzhiyun if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1764*4882a593Smuzhiyun dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1765*4882a593Smuzhiyun memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1766*4882a593Smuzhiyun memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1767*4882a593Smuzhiyun memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1768*4882a593Smuzhiyun memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1769*4882a593Smuzhiyun }
1770*4882a593Smuzhiyun
1771*4882a593Smuzhiyun spin_lock_init(&udc->lock);
1772*4882a593Smuzhiyun udc_info = dev_get_platdata(&pdev->dev);
1773*4882a593Smuzhiyun
1774*4882a593Smuzhiyun base_addr = devm_platform_ioremap_resource(pdev, 0);
1775*4882a593Smuzhiyun if (IS_ERR(base_addr)) {
1776*4882a593Smuzhiyun retval = PTR_ERR(base_addr);
1777*4882a593Smuzhiyun goto err_udc_clk;
1778*4882a593Smuzhiyun }
1779*4882a593Smuzhiyun
1780*4882a593Smuzhiyun the_controller = udc;
1781*4882a593Smuzhiyun platform_set_drvdata(pdev, udc);
1782*4882a593Smuzhiyun
1783*4882a593Smuzhiyun s3c2410_udc_disable(udc);
1784*4882a593Smuzhiyun s3c2410_udc_reinit(udc);
1785*4882a593Smuzhiyun
1786*4882a593Smuzhiyun irq_usbd = platform_get_irq(pdev, 0);
1787*4882a593Smuzhiyun if (irq_usbd < 0) {
1788*4882a593Smuzhiyun retval = irq_usbd;
1789*4882a593Smuzhiyun goto err_udc_clk;
1790*4882a593Smuzhiyun }
1791*4882a593Smuzhiyun
1792*4882a593Smuzhiyun /* irq setup after old hardware state is cleaned up */
1793*4882a593Smuzhiyun retval = request_irq(irq_usbd, s3c2410_udc_irq,
1794*4882a593Smuzhiyun 0, gadget_name, udc);
1795*4882a593Smuzhiyun
1796*4882a593Smuzhiyun if (retval != 0) {
1797*4882a593Smuzhiyun dev_err(dev, "cannot get irq %i, err %d\n", irq_usbd, retval);
1798*4882a593Smuzhiyun retval = -EBUSY;
1799*4882a593Smuzhiyun goto err_udc_clk;
1800*4882a593Smuzhiyun }
1801*4882a593Smuzhiyun
1802*4882a593Smuzhiyun dev_dbg(dev, "got irq %i\n", irq_usbd);
1803*4882a593Smuzhiyun
1804*4882a593Smuzhiyun if (udc_info && udc_info->vbus_pin > 0) {
1805*4882a593Smuzhiyun retval = gpio_request(udc_info->vbus_pin, "udc vbus");
1806*4882a593Smuzhiyun if (retval < 0) {
1807*4882a593Smuzhiyun dev_err(dev, "cannot claim vbus pin\n");
1808*4882a593Smuzhiyun goto err_int;
1809*4882a593Smuzhiyun }
1810*4882a593Smuzhiyun
1811*4882a593Smuzhiyun irq = gpio_to_irq(udc_info->vbus_pin);
1812*4882a593Smuzhiyun if (irq < 0) {
1813*4882a593Smuzhiyun dev_err(dev, "no irq for gpio vbus pin\n");
1814*4882a593Smuzhiyun retval = irq;
1815*4882a593Smuzhiyun goto err_gpio_claim;
1816*4882a593Smuzhiyun }
1817*4882a593Smuzhiyun
1818*4882a593Smuzhiyun retval = request_irq(irq, s3c2410_udc_vbus_irq,
1819*4882a593Smuzhiyun IRQF_TRIGGER_RISING
1820*4882a593Smuzhiyun | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1821*4882a593Smuzhiyun gadget_name, udc);
1822*4882a593Smuzhiyun
1823*4882a593Smuzhiyun if (retval != 0) {
1824*4882a593Smuzhiyun dev_err(dev, "can't get vbus irq %d, err %d\n",
1825*4882a593Smuzhiyun irq, retval);
1826*4882a593Smuzhiyun retval = -EBUSY;
1827*4882a593Smuzhiyun goto err_gpio_claim;
1828*4882a593Smuzhiyun }
1829*4882a593Smuzhiyun
1830*4882a593Smuzhiyun dev_dbg(dev, "got irq %i\n", irq);
1831*4882a593Smuzhiyun } else {
1832*4882a593Smuzhiyun udc->vbus = 1;
1833*4882a593Smuzhiyun }
1834*4882a593Smuzhiyun
1835*4882a593Smuzhiyun if (udc_info && !udc_info->udc_command &&
1836*4882a593Smuzhiyun gpio_is_valid(udc_info->pullup_pin)) {
1837*4882a593Smuzhiyun
1838*4882a593Smuzhiyun retval = gpio_request_one(udc_info->pullup_pin,
1839*4882a593Smuzhiyun udc_info->vbus_pin_inverted ?
1840*4882a593Smuzhiyun GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
1841*4882a593Smuzhiyun "udc pullup");
1842*4882a593Smuzhiyun if (retval)
1843*4882a593Smuzhiyun goto err_vbus_irq;
1844*4882a593Smuzhiyun }
1845*4882a593Smuzhiyun
1846*4882a593Smuzhiyun retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
1847*4882a593Smuzhiyun if (retval)
1848*4882a593Smuzhiyun goto err_add_udc;
1849*4882a593Smuzhiyun
1850*4882a593Smuzhiyun udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1851*4882a593Smuzhiyun s3c2410_udc_debugfs_root, udc,
1852*4882a593Smuzhiyun &s3c2410_udc_debugfs_fops);
1853*4882a593Smuzhiyun
1854*4882a593Smuzhiyun dev_dbg(dev, "probe ok\n");
1855*4882a593Smuzhiyun
1856*4882a593Smuzhiyun return 0;
1857*4882a593Smuzhiyun
1858*4882a593Smuzhiyun err_add_udc:
1859*4882a593Smuzhiyun if (udc_info && !udc_info->udc_command &&
1860*4882a593Smuzhiyun gpio_is_valid(udc_info->pullup_pin))
1861*4882a593Smuzhiyun gpio_free(udc_info->pullup_pin);
1862*4882a593Smuzhiyun err_vbus_irq:
1863*4882a593Smuzhiyun if (udc_info && udc_info->vbus_pin > 0)
1864*4882a593Smuzhiyun free_irq(gpio_to_irq(udc_info->vbus_pin), udc);
1865*4882a593Smuzhiyun err_gpio_claim:
1866*4882a593Smuzhiyun if (udc_info && udc_info->vbus_pin > 0)
1867*4882a593Smuzhiyun gpio_free(udc_info->vbus_pin);
1868*4882a593Smuzhiyun err_int:
1869*4882a593Smuzhiyun free_irq(irq_usbd, udc);
1870*4882a593Smuzhiyun err_udc_clk:
1871*4882a593Smuzhiyun clk_disable_unprepare(udc_clock);
1872*4882a593Smuzhiyun clk_put(udc_clock);
1873*4882a593Smuzhiyun udc_clock = NULL;
1874*4882a593Smuzhiyun err_usb_bus_clk:
1875*4882a593Smuzhiyun clk_disable_unprepare(usb_bus_clock);
1876*4882a593Smuzhiyun clk_put(usb_bus_clock);
1877*4882a593Smuzhiyun usb_bus_clock = NULL;
1878*4882a593Smuzhiyun
1879*4882a593Smuzhiyun return retval;
1880*4882a593Smuzhiyun }
1881*4882a593Smuzhiyun
1882*4882a593Smuzhiyun /*
1883*4882a593Smuzhiyun * s3c2410_udc_remove
1884*4882a593Smuzhiyun */
s3c2410_udc_remove(struct platform_device * pdev)1885*4882a593Smuzhiyun static int s3c2410_udc_remove(struct platform_device *pdev)
1886*4882a593Smuzhiyun {
1887*4882a593Smuzhiyun struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1888*4882a593Smuzhiyun unsigned int irq;
1889*4882a593Smuzhiyun
1890*4882a593Smuzhiyun dev_dbg(&pdev->dev, "%s()\n", __func__);
1891*4882a593Smuzhiyun
1892*4882a593Smuzhiyun if (udc->driver)
1893*4882a593Smuzhiyun return -EBUSY;
1894*4882a593Smuzhiyun
1895*4882a593Smuzhiyun usb_del_gadget_udc(&udc->gadget);
1896*4882a593Smuzhiyun debugfs_remove(udc->regs_info);
1897*4882a593Smuzhiyun
1898*4882a593Smuzhiyun if (udc_info && !udc_info->udc_command &&
1899*4882a593Smuzhiyun gpio_is_valid(udc_info->pullup_pin))
1900*4882a593Smuzhiyun gpio_free(udc_info->pullup_pin);
1901*4882a593Smuzhiyun
1902*4882a593Smuzhiyun if (udc_info && udc_info->vbus_pin > 0) {
1903*4882a593Smuzhiyun irq = gpio_to_irq(udc_info->vbus_pin);
1904*4882a593Smuzhiyun free_irq(irq, udc);
1905*4882a593Smuzhiyun }
1906*4882a593Smuzhiyun
1907*4882a593Smuzhiyun free_irq(irq_usbd, udc);
1908*4882a593Smuzhiyun
1909*4882a593Smuzhiyun if (!IS_ERR(udc_clock) && udc_clock != NULL) {
1910*4882a593Smuzhiyun clk_disable_unprepare(udc_clock);
1911*4882a593Smuzhiyun clk_put(udc_clock);
1912*4882a593Smuzhiyun udc_clock = NULL;
1913*4882a593Smuzhiyun }
1914*4882a593Smuzhiyun
1915*4882a593Smuzhiyun if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
1916*4882a593Smuzhiyun clk_disable_unprepare(usb_bus_clock);
1917*4882a593Smuzhiyun clk_put(usb_bus_clock);
1918*4882a593Smuzhiyun usb_bus_clock = NULL;
1919*4882a593Smuzhiyun }
1920*4882a593Smuzhiyun
1921*4882a593Smuzhiyun dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
1922*4882a593Smuzhiyun return 0;
1923*4882a593Smuzhiyun }
1924*4882a593Smuzhiyun
1925*4882a593Smuzhiyun #ifdef CONFIG_PM
1926*4882a593Smuzhiyun static int
s3c2410_udc_suspend(struct platform_device * pdev,pm_message_t message)1927*4882a593Smuzhiyun s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
1928*4882a593Smuzhiyun {
1929*4882a593Smuzhiyun s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1930*4882a593Smuzhiyun
1931*4882a593Smuzhiyun return 0;
1932*4882a593Smuzhiyun }
1933*4882a593Smuzhiyun
s3c2410_udc_resume(struct platform_device * pdev)1934*4882a593Smuzhiyun static int s3c2410_udc_resume(struct platform_device *pdev)
1935*4882a593Smuzhiyun {
1936*4882a593Smuzhiyun s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1937*4882a593Smuzhiyun
1938*4882a593Smuzhiyun return 0;
1939*4882a593Smuzhiyun }
1940*4882a593Smuzhiyun #else
1941*4882a593Smuzhiyun #define s3c2410_udc_suspend NULL
1942*4882a593Smuzhiyun #define s3c2410_udc_resume NULL
1943*4882a593Smuzhiyun #endif
1944*4882a593Smuzhiyun
1945*4882a593Smuzhiyun static const struct platform_device_id s3c_udc_ids[] = {
1946*4882a593Smuzhiyun { "s3c2410-usbgadget", },
1947*4882a593Smuzhiyun { "s3c2440-usbgadget", },
1948*4882a593Smuzhiyun { }
1949*4882a593Smuzhiyun };
1950*4882a593Smuzhiyun MODULE_DEVICE_TABLE(platform, s3c_udc_ids);
1951*4882a593Smuzhiyun
1952*4882a593Smuzhiyun static struct platform_driver udc_driver_24x0 = {
1953*4882a593Smuzhiyun .driver = {
1954*4882a593Smuzhiyun .name = "s3c24x0-usbgadget",
1955*4882a593Smuzhiyun },
1956*4882a593Smuzhiyun .probe = s3c2410_udc_probe,
1957*4882a593Smuzhiyun .remove = s3c2410_udc_remove,
1958*4882a593Smuzhiyun .suspend = s3c2410_udc_suspend,
1959*4882a593Smuzhiyun .resume = s3c2410_udc_resume,
1960*4882a593Smuzhiyun .id_table = s3c_udc_ids,
1961*4882a593Smuzhiyun };
1962*4882a593Smuzhiyun
udc_init(void)1963*4882a593Smuzhiyun static int __init udc_init(void)
1964*4882a593Smuzhiyun {
1965*4882a593Smuzhiyun int retval;
1966*4882a593Smuzhiyun
1967*4882a593Smuzhiyun dprintk(DEBUG_NORMAL, "%s\n", gadget_name);
1968*4882a593Smuzhiyun
1969*4882a593Smuzhiyun s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name,
1970*4882a593Smuzhiyun usb_debug_root);
1971*4882a593Smuzhiyun
1972*4882a593Smuzhiyun retval = platform_driver_register(&udc_driver_24x0);
1973*4882a593Smuzhiyun if (retval)
1974*4882a593Smuzhiyun goto err;
1975*4882a593Smuzhiyun
1976*4882a593Smuzhiyun return 0;
1977*4882a593Smuzhiyun
1978*4882a593Smuzhiyun err:
1979*4882a593Smuzhiyun debugfs_remove(s3c2410_udc_debugfs_root);
1980*4882a593Smuzhiyun return retval;
1981*4882a593Smuzhiyun }
1982*4882a593Smuzhiyun
udc_exit(void)1983*4882a593Smuzhiyun static void __exit udc_exit(void)
1984*4882a593Smuzhiyun {
1985*4882a593Smuzhiyun platform_driver_unregister(&udc_driver_24x0);
1986*4882a593Smuzhiyun debugfs_remove_recursive(s3c2410_udc_debugfs_root);
1987*4882a593Smuzhiyun }
1988*4882a593Smuzhiyun
1989*4882a593Smuzhiyun module_init(udc_init);
1990*4882a593Smuzhiyun module_exit(udc_exit);
1991*4882a593Smuzhiyun
1992*4882a593Smuzhiyun MODULE_AUTHOR(DRIVER_AUTHOR);
1993*4882a593Smuzhiyun MODULE_DESCRIPTION(DRIVER_DESC);
1994*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1995