xref: /OK3568_Linux_fs/kernel/drivers/usb/gadget/udc/r8a66597-udc.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * R8A66597 UDC (USB gadget)
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2006-2009 Renesas Solutions Corp.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Author : Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/interrupt.h>
12*4882a593Smuzhiyun #include <linux/delay.h>
13*4882a593Smuzhiyun #include <linux/io.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/clk.h>
16*4882a593Smuzhiyun #include <linux/err.h>
17*4882a593Smuzhiyun #include <linux/slab.h>
18*4882a593Smuzhiyun #include <linux/dma-mapping.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include <linux/usb/ch9.h>
21*4882a593Smuzhiyun #include <linux/usb/gadget.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #include "r8a66597-udc.h"
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #define DRIVER_VERSION	"2011-09-26"
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun static const char udc_name[] = "r8a66597_udc";
28*4882a593Smuzhiyun static const char *r8a66597_ep_name[] = {
29*4882a593Smuzhiyun 	"ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7",
30*4882a593Smuzhiyun 	"ep8", "ep9",
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun static void init_controller(struct r8a66597 *r8a66597);
34*4882a593Smuzhiyun static void disable_controller(struct r8a66597 *r8a66597);
35*4882a593Smuzhiyun static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req);
36*4882a593Smuzhiyun static void irq_packet_write(struct r8a66597_ep *ep,
37*4882a593Smuzhiyun 				struct r8a66597_request *req);
38*4882a593Smuzhiyun static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req,
39*4882a593Smuzhiyun 			gfp_t gfp_flags);
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun static void transfer_complete(struct r8a66597_ep *ep,
42*4882a593Smuzhiyun 		struct r8a66597_request *req, int status);
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
get_usb_speed(struct r8a66597 * r8a66597)45*4882a593Smuzhiyun static inline u16 get_usb_speed(struct r8a66597 *r8a66597)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun 	return r8a66597_read(r8a66597, DVSTCTR0) & RHST;
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun 
enable_pipe_irq(struct r8a66597 * r8a66597,u16 pipenum,unsigned long reg)50*4882a593Smuzhiyun static void enable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum,
51*4882a593Smuzhiyun 		unsigned long reg)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	u16 tmp;
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	tmp = r8a66597_read(r8a66597, INTENB0);
56*4882a593Smuzhiyun 	r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE,
57*4882a593Smuzhiyun 			INTENB0);
58*4882a593Smuzhiyun 	r8a66597_bset(r8a66597, (1 << pipenum), reg);
59*4882a593Smuzhiyun 	r8a66597_write(r8a66597, tmp, INTENB0);
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun 
disable_pipe_irq(struct r8a66597 * r8a66597,u16 pipenum,unsigned long reg)62*4882a593Smuzhiyun static void disable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum,
63*4882a593Smuzhiyun 		unsigned long reg)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun 	u16 tmp;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	tmp = r8a66597_read(r8a66597, INTENB0);
68*4882a593Smuzhiyun 	r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE,
69*4882a593Smuzhiyun 			INTENB0);
70*4882a593Smuzhiyun 	r8a66597_bclr(r8a66597, (1 << pipenum), reg);
71*4882a593Smuzhiyun 	r8a66597_write(r8a66597, tmp, INTENB0);
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun 
r8a66597_usb_connect(struct r8a66597 * r8a66597)74*4882a593Smuzhiyun static void r8a66597_usb_connect(struct r8a66597 *r8a66597)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun 	r8a66597_bset(r8a66597, CTRE, INTENB0);
77*4882a593Smuzhiyun 	r8a66597_bset(r8a66597, BEMPE | BRDYE, INTENB0);
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	r8a66597_bset(r8a66597, DPRPU, SYSCFG0);
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun 
r8a66597_usb_disconnect(struct r8a66597 * r8a66597)82*4882a593Smuzhiyun static void r8a66597_usb_disconnect(struct r8a66597 *r8a66597)
83*4882a593Smuzhiyun __releases(r8a66597->lock)
84*4882a593Smuzhiyun __acquires(r8a66597->lock)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun 	r8a66597_bclr(r8a66597, CTRE, INTENB0);
87*4882a593Smuzhiyun 	r8a66597_bclr(r8a66597, BEMPE | BRDYE, INTENB0);
88*4882a593Smuzhiyun 	r8a66597_bclr(r8a66597, DPRPU, SYSCFG0);
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	r8a66597->gadget.speed = USB_SPEED_UNKNOWN;
91*4882a593Smuzhiyun 	spin_unlock(&r8a66597->lock);
92*4882a593Smuzhiyun 	r8a66597->driver->disconnect(&r8a66597->gadget);
93*4882a593Smuzhiyun 	spin_lock(&r8a66597->lock);
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	disable_controller(r8a66597);
96*4882a593Smuzhiyun 	init_controller(r8a66597);
97*4882a593Smuzhiyun 	r8a66597_bset(r8a66597, VBSE, INTENB0);
98*4882a593Smuzhiyun 	INIT_LIST_HEAD(&r8a66597->ep[0].queue);
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun 
control_reg_get_pid(struct r8a66597 * r8a66597,u16 pipenum)101*4882a593Smuzhiyun static inline u16 control_reg_get_pid(struct r8a66597 *r8a66597, u16 pipenum)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun 	u16 pid = 0;
104*4882a593Smuzhiyun 	unsigned long offset;
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	if (pipenum == 0) {
107*4882a593Smuzhiyun 		pid = r8a66597_read(r8a66597, DCPCTR) & PID;
108*4882a593Smuzhiyun 	} else if (pipenum < R8A66597_MAX_NUM_PIPE) {
109*4882a593Smuzhiyun 		offset = get_pipectr_addr(pipenum);
110*4882a593Smuzhiyun 		pid = r8a66597_read(r8a66597, offset) & PID;
111*4882a593Smuzhiyun 	} else {
112*4882a593Smuzhiyun 		dev_err(r8a66597_to_dev(r8a66597), "unexpect pipe num (%d)\n",
113*4882a593Smuzhiyun 			pipenum);
114*4882a593Smuzhiyun 	}
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	return pid;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun 
control_reg_set_pid(struct r8a66597 * r8a66597,u16 pipenum,u16 pid)119*4882a593Smuzhiyun static inline void control_reg_set_pid(struct r8a66597 *r8a66597, u16 pipenum,
120*4882a593Smuzhiyun 		u16 pid)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun 	unsigned long offset;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	if (pipenum == 0) {
125*4882a593Smuzhiyun 		r8a66597_mdfy(r8a66597, pid, PID, DCPCTR);
126*4882a593Smuzhiyun 	} else if (pipenum < R8A66597_MAX_NUM_PIPE) {
127*4882a593Smuzhiyun 		offset = get_pipectr_addr(pipenum);
128*4882a593Smuzhiyun 		r8a66597_mdfy(r8a66597, pid, PID, offset);
129*4882a593Smuzhiyun 	} else {
130*4882a593Smuzhiyun 		dev_err(r8a66597_to_dev(r8a66597), "unexpect pipe num (%d)\n",
131*4882a593Smuzhiyun 			pipenum);
132*4882a593Smuzhiyun 	}
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun 
pipe_start(struct r8a66597 * r8a66597,u16 pipenum)135*4882a593Smuzhiyun static inline void pipe_start(struct r8a66597 *r8a66597, u16 pipenum)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun 	control_reg_set_pid(r8a66597, pipenum, PID_BUF);
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun 
pipe_stop(struct r8a66597 * r8a66597,u16 pipenum)140*4882a593Smuzhiyun static inline void pipe_stop(struct r8a66597 *r8a66597, u16 pipenum)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun 	control_reg_set_pid(r8a66597, pipenum, PID_NAK);
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun 
pipe_stall(struct r8a66597 * r8a66597,u16 pipenum)145*4882a593Smuzhiyun static inline void pipe_stall(struct r8a66597 *r8a66597, u16 pipenum)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun 	control_reg_set_pid(r8a66597, pipenum, PID_STALL);
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun 
control_reg_get(struct r8a66597 * r8a66597,u16 pipenum)150*4882a593Smuzhiyun static inline u16 control_reg_get(struct r8a66597 *r8a66597, u16 pipenum)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun 	u16 ret = 0;
153*4882a593Smuzhiyun 	unsigned long offset;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	if (pipenum == 0) {
156*4882a593Smuzhiyun 		ret = r8a66597_read(r8a66597, DCPCTR);
157*4882a593Smuzhiyun 	} else if (pipenum < R8A66597_MAX_NUM_PIPE) {
158*4882a593Smuzhiyun 		offset = get_pipectr_addr(pipenum);
159*4882a593Smuzhiyun 		ret = r8a66597_read(r8a66597, offset);
160*4882a593Smuzhiyun 	} else {
161*4882a593Smuzhiyun 		dev_err(r8a66597_to_dev(r8a66597), "unexpect pipe num (%d)\n",
162*4882a593Smuzhiyun 			pipenum);
163*4882a593Smuzhiyun 	}
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	return ret;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun 
control_reg_sqclr(struct r8a66597 * r8a66597,u16 pipenum)168*4882a593Smuzhiyun static inline void control_reg_sqclr(struct r8a66597 *r8a66597, u16 pipenum)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun 	unsigned long offset;
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	pipe_stop(r8a66597, pipenum);
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	if (pipenum == 0) {
175*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, SQCLR, DCPCTR);
176*4882a593Smuzhiyun 	} else if (pipenum < R8A66597_MAX_NUM_PIPE) {
177*4882a593Smuzhiyun 		offset = get_pipectr_addr(pipenum);
178*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, SQCLR, offset);
179*4882a593Smuzhiyun 	} else {
180*4882a593Smuzhiyun 		dev_err(r8a66597_to_dev(r8a66597), "unexpect pipe num (%d)\n",
181*4882a593Smuzhiyun 			pipenum);
182*4882a593Smuzhiyun 	}
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun 
control_reg_sqset(struct r8a66597 * r8a66597,u16 pipenum)185*4882a593Smuzhiyun static void control_reg_sqset(struct r8a66597 *r8a66597, u16 pipenum)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun 	unsigned long offset;
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	pipe_stop(r8a66597, pipenum);
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	if (pipenum == 0) {
192*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, SQSET, DCPCTR);
193*4882a593Smuzhiyun 	} else if (pipenum < R8A66597_MAX_NUM_PIPE) {
194*4882a593Smuzhiyun 		offset = get_pipectr_addr(pipenum);
195*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, SQSET, offset);
196*4882a593Smuzhiyun 	} else {
197*4882a593Smuzhiyun 		dev_err(r8a66597_to_dev(r8a66597),
198*4882a593Smuzhiyun 			"unexpect pipe num(%d)\n", pipenum);
199*4882a593Smuzhiyun 	}
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun 
control_reg_sqmon(struct r8a66597 * r8a66597,u16 pipenum)202*4882a593Smuzhiyun static u16 control_reg_sqmon(struct r8a66597 *r8a66597, u16 pipenum)
203*4882a593Smuzhiyun {
204*4882a593Smuzhiyun 	unsigned long offset;
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	if (pipenum == 0) {
207*4882a593Smuzhiyun 		return r8a66597_read(r8a66597, DCPCTR) & SQMON;
208*4882a593Smuzhiyun 	} else if (pipenum < R8A66597_MAX_NUM_PIPE) {
209*4882a593Smuzhiyun 		offset = get_pipectr_addr(pipenum);
210*4882a593Smuzhiyun 		return r8a66597_read(r8a66597, offset) & SQMON;
211*4882a593Smuzhiyun 	} else {
212*4882a593Smuzhiyun 		dev_err(r8a66597_to_dev(r8a66597),
213*4882a593Smuzhiyun 			"unexpect pipe num(%d)\n", pipenum);
214*4882a593Smuzhiyun 	}
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	return 0;
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun 
save_usb_toggle(struct r8a66597 * r8a66597,u16 pipenum)219*4882a593Smuzhiyun static u16 save_usb_toggle(struct r8a66597 *r8a66597, u16 pipenum)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun 	return control_reg_sqmon(r8a66597, pipenum);
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun 
restore_usb_toggle(struct r8a66597 * r8a66597,u16 pipenum,u16 toggle)224*4882a593Smuzhiyun static void restore_usb_toggle(struct r8a66597 *r8a66597, u16 pipenum,
225*4882a593Smuzhiyun 			       u16 toggle)
226*4882a593Smuzhiyun {
227*4882a593Smuzhiyun 	if (toggle)
228*4882a593Smuzhiyun 		control_reg_sqset(r8a66597, pipenum);
229*4882a593Smuzhiyun 	else
230*4882a593Smuzhiyun 		control_reg_sqclr(r8a66597, pipenum);
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun 
get_buffer_size(struct r8a66597 * r8a66597,u16 pipenum)233*4882a593Smuzhiyun static inline int get_buffer_size(struct r8a66597 *r8a66597, u16 pipenum)
234*4882a593Smuzhiyun {
235*4882a593Smuzhiyun 	u16 tmp;
236*4882a593Smuzhiyun 	int size;
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	if (pipenum == 0) {
239*4882a593Smuzhiyun 		tmp = r8a66597_read(r8a66597, DCPCFG);
240*4882a593Smuzhiyun 		if ((tmp & R8A66597_CNTMD) != 0)
241*4882a593Smuzhiyun 			size = 256;
242*4882a593Smuzhiyun 		else {
243*4882a593Smuzhiyun 			tmp = r8a66597_read(r8a66597, DCPMAXP);
244*4882a593Smuzhiyun 			size = tmp & MAXP;
245*4882a593Smuzhiyun 		}
246*4882a593Smuzhiyun 	} else {
247*4882a593Smuzhiyun 		r8a66597_write(r8a66597, pipenum, PIPESEL);
248*4882a593Smuzhiyun 		tmp = r8a66597_read(r8a66597, PIPECFG);
249*4882a593Smuzhiyun 		if ((tmp & R8A66597_CNTMD) != 0) {
250*4882a593Smuzhiyun 			tmp = r8a66597_read(r8a66597, PIPEBUF);
251*4882a593Smuzhiyun 			size = ((tmp >> 10) + 1) * 64;
252*4882a593Smuzhiyun 		} else {
253*4882a593Smuzhiyun 			tmp = r8a66597_read(r8a66597, PIPEMAXP);
254*4882a593Smuzhiyun 			size = tmp & MXPS;
255*4882a593Smuzhiyun 		}
256*4882a593Smuzhiyun 	}
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	return size;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun 
mbw_value(struct r8a66597 * r8a66597)261*4882a593Smuzhiyun static inline unsigned short mbw_value(struct r8a66597 *r8a66597)
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun 	if (r8a66597->pdata->on_chip)
264*4882a593Smuzhiyun 		return MBW_32;
265*4882a593Smuzhiyun 	else
266*4882a593Smuzhiyun 		return MBW_16;
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun 
r8a66597_change_curpipe(struct r8a66597 * r8a66597,u16 pipenum,u16 isel,u16 fifosel)269*4882a593Smuzhiyun static void r8a66597_change_curpipe(struct r8a66597 *r8a66597, u16 pipenum,
270*4882a593Smuzhiyun 				    u16 isel, u16 fifosel)
271*4882a593Smuzhiyun {
272*4882a593Smuzhiyun 	u16 tmp, mask, loop;
273*4882a593Smuzhiyun 	int i = 0;
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	if (!pipenum) {
276*4882a593Smuzhiyun 		mask = ISEL | CURPIPE;
277*4882a593Smuzhiyun 		loop = isel;
278*4882a593Smuzhiyun 	} else {
279*4882a593Smuzhiyun 		mask = CURPIPE;
280*4882a593Smuzhiyun 		loop = pipenum;
281*4882a593Smuzhiyun 	}
282*4882a593Smuzhiyun 	r8a66597_mdfy(r8a66597, loop, mask, fifosel);
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	do {
285*4882a593Smuzhiyun 		tmp = r8a66597_read(r8a66597, fifosel);
286*4882a593Smuzhiyun 		if (i++ > 1000000) {
287*4882a593Smuzhiyun 			dev_err(r8a66597_to_dev(r8a66597),
288*4882a593Smuzhiyun 				"r8a66597: register%x, loop %x "
289*4882a593Smuzhiyun 				"is timeout\n", fifosel, loop);
290*4882a593Smuzhiyun 			break;
291*4882a593Smuzhiyun 		}
292*4882a593Smuzhiyun 		ndelay(1);
293*4882a593Smuzhiyun 	} while ((tmp & mask) != loop);
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun 
pipe_change(struct r8a66597 * r8a66597,u16 pipenum)296*4882a593Smuzhiyun static void pipe_change(struct r8a66597 *r8a66597, u16 pipenum)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun 	struct r8a66597_ep *ep = r8a66597->pipenum2ep[pipenum];
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 	if (ep->use_dma)
301*4882a593Smuzhiyun 		r8a66597_bclr(r8a66597, DREQE, ep->fifosel);
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 	r8a66597_mdfy(r8a66597, pipenum, CURPIPE, ep->fifosel);
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	ndelay(450);
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 	if (r8a66597_is_sudmac(r8a66597) && ep->use_dma)
308*4882a593Smuzhiyun 		r8a66597_bclr(r8a66597, mbw_value(r8a66597), ep->fifosel);
309*4882a593Smuzhiyun 	else
310*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel);
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	if (ep->use_dma)
313*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, DREQE, ep->fifosel);
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun 
pipe_buffer_setting(struct r8a66597 * r8a66597,struct r8a66597_pipe_info * info)316*4882a593Smuzhiyun static int pipe_buffer_setting(struct r8a66597 *r8a66597,
317*4882a593Smuzhiyun 		struct r8a66597_pipe_info *info)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun 	u16 bufnum = 0, buf_bsize = 0;
320*4882a593Smuzhiyun 	u16 pipecfg = 0;
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 	if (info->pipe == 0)
323*4882a593Smuzhiyun 		return -EINVAL;
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	r8a66597_write(r8a66597, info->pipe, PIPESEL);
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	if (info->dir_in)
328*4882a593Smuzhiyun 		pipecfg |= R8A66597_DIR;
329*4882a593Smuzhiyun 	pipecfg |= info->type;
330*4882a593Smuzhiyun 	pipecfg |= info->epnum;
331*4882a593Smuzhiyun 	switch (info->type) {
332*4882a593Smuzhiyun 	case R8A66597_INT:
333*4882a593Smuzhiyun 		bufnum = 4 + (info->pipe - R8A66597_BASE_PIPENUM_INT);
334*4882a593Smuzhiyun 		buf_bsize = 0;
335*4882a593Smuzhiyun 		break;
336*4882a593Smuzhiyun 	case R8A66597_BULK:
337*4882a593Smuzhiyun 		/* isochronous pipes may be used as bulk pipes */
338*4882a593Smuzhiyun 		if (info->pipe >= R8A66597_BASE_PIPENUM_BULK)
339*4882a593Smuzhiyun 			bufnum = info->pipe - R8A66597_BASE_PIPENUM_BULK;
340*4882a593Smuzhiyun 		else
341*4882a593Smuzhiyun 			bufnum = info->pipe - R8A66597_BASE_PIPENUM_ISOC;
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 		bufnum = R8A66597_BASE_BUFNUM + (bufnum * 16);
344*4882a593Smuzhiyun 		buf_bsize = 7;
345*4882a593Smuzhiyun 		pipecfg |= R8A66597_DBLB;
346*4882a593Smuzhiyun 		if (!info->dir_in)
347*4882a593Smuzhiyun 			pipecfg |= R8A66597_SHTNAK;
348*4882a593Smuzhiyun 		break;
349*4882a593Smuzhiyun 	case R8A66597_ISO:
350*4882a593Smuzhiyun 		bufnum = R8A66597_BASE_BUFNUM +
351*4882a593Smuzhiyun 			 (info->pipe - R8A66597_BASE_PIPENUM_ISOC) * 16;
352*4882a593Smuzhiyun 		buf_bsize = 7;
353*4882a593Smuzhiyun 		break;
354*4882a593Smuzhiyun 	}
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 	if (buf_bsize && ((bufnum + 16) >= R8A66597_MAX_BUFNUM)) {
357*4882a593Smuzhiyun 		pr_err("r8a66597 pipe memory is insufficient\n");
358*4882a593Smuzhiyun 		return -ENOMEM;
359*4882a593Smuzhiyun 	}
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	r8a66597_write(r8a66597, pipecfg, PIPECFG);
362*4882a593Smuzhiyun 	r8a66597_write(r8a66597, (buf_bsize << 10) | (bufnum), PIPEBUF);
363*4882a593Smuzhiyun 	r8a66597_write(r8a66597, info->maxpacket, PIPEMAXP);
364*4882a593Smuzhiyun 	if (info->interval)
365*4882a593Smuzhiyun 		info->interval--;
366*4882a593Smuzhiyun 	r8a66597_write(r8a66597, info->interval, PIPEPERI);
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	return 0;
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun 
pipe_buffer_release(struct r8a66597 * r8a66597,struct r8a66597_pipe_info * info)371*4882a593Smuzhiyun static void pipe_buffer_release(struct r8a66597 *r8a66597,
372*4882a593Smuzhiyun 				struct r8a66597_pipe_info *info)
373*4882a593Smuzhiyun {
374*4882a593Smuzhiyun 	if (info->pipe == 0)
375*4882a593Smuzhiyun 		return;
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun 	if (is_bulk_pipe(info->pipe)) {
378*4882a593Smuzhiyun 		r8a66597->bulk--;
379*4882a593Smuzhiyun 	} else if (is_interrupt_pipe(info->pipe)) {
380*4882a593Smuzhiyun 		r8a66597->interrupt--;
381*4882a593Smuzhiyun 	} else if (is_isoc_pipe(info->pipe)) {
382*4882a593Smuzhiyun 		r8a66597->isochronous--;
383*4882a593Smuzhiyun 		if (info->type == R8A66597_BULK)
384*4882a593Smuzhiyun 			r8a66597->bulk--;
385*4882a593Smuzhiyun 	} else {
386*4882a593Smuzhiyun 		dev_err(r8a66597_to_dev(r8a66597),
387*4882a593Smuzhiyun 			"ep_release: unexpect pipenum (%d)\n", info->pipe);
388*4882a593Smuzhiyun 	}
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun 
pipe_initialize(struct r8a66597_ep * ep)391*4882a593Smuzhiyun static void pipe_initialize(struct r8a66597_ep *ep)
392*4882a593Smuzhiyun {
393*4882a593Smuzhiyun 	struct r8a66597 *r8a66597 = ep->r8a66597;
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	r8a66597_mdfy(r8a66597, 0, CURPIPE, ep->fifosel);
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	r8a66597_write(r8a66597, ACLRM, ep->pipectr);
398*4882a593Smuzhiyun 	r8a66597_write(r8a66597, 0, ep->pipectr);
399*4882a593Smuzhiyun 	r8a66597_write(r8a66597, SQCLR, ep->pipectr);
400*4882a593Smuzhiyun 	if (ep->use_dma) {
401*4882a593Smuzhiyun 		r8a66597_mdfy(r8a66597, ep->pipenum, CURPIPE, ep->fifosel);
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 		ndelay(450);
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel);
406*4882a593Smuzhiyun 	}
407*4882a593Smuzhiyun }
408*4882a593Smuzhiyun 
r8a66597_ep_setting(struct r8a66597 * r8a66597,struct r8a66597_ep * ep,const struct usb_endpoint_descriptor * desc,u16 pipenum,int dma)409*4882a593Smuzhiyun static void r8a66597_ep_setting(struct r8a66597 *r8a66597,
410*4882a593Smuzhiyun 				struct r8a66597_ep *ep,
411*4882a593Smuzhiyun 				const struct usb_endpoint_descriptor *desc,
412*4882a593Smuzhiyun 				u16 pipenum, int dma)
413*4882a593Smuzhiyun {
414*4882a593Smuzhiyun 	ep->use_dma = 0;
415*4882a593Smuzhiyun 	ep->fifoaddr = CFIFO;
416*4882a593Smuzhiyun 	ep->fifosel = CFIFOSEL;
417*4882a593Smuzhiyun 	ep->fifoctr = CFIFOCTR;
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 	ep->pipectr = get_pipectr_addr(pipenum);
420*4882a593Smuzhiyun 	if (is_bulk_pipe(pipenum) || is_isoc_pipe(pipenum)) {
421*4882a593Smuzhiyun 		ep->pipetre = get_pipetre_addr(pipenum);
422*4882a593Smuzhiyun 		ep->pipetrn = get_pipetrn_addr(pipenum);
423*4882a593Smuzhiyun 	} else {
424*4882a593Smuzhiyun 		ep->pipetre = 0;
425*4882a593Smuzhiyun 		ep->pipetrn = 0;
426*4882a593Smuzhiyun 	}
427*4882a593Smuzhiyun 	ep->pipenum = pipenum;
428*4882a593Smuzhiyun 	ep->ep.maxpacket = usb_endpoint_maxp(desc);
429*4882a593Smuzhiyun 	r8a66597->pipenum2ep[pipenum] = ep;
430*4882a593Smuzhiyun 	r8a66597->epaddr2ep[usb_endpoint_num(desc)]
431*4882a593Smuzhiyun 		= ep;
432*4882a593Smuzhiyun 	INIT_LIST_HEAD(&ep->queue);
433*4882a593Smuzhiyun }
434*4882a593Smuzhiyun 
r8a66597_ep_release(struct r8a66597_ep * ep)435*4882a593Smuzhiyun static void r8a66597_ep_release(struct r8a66597_ep *ep)
436*4882a593Smuzhiyun {
437*4882a593Smuzhiyun 	struct r8a66597 *r8a66597 = ep->r8a66597;
438*4882a593Smuzhiyun 	u16 pipenum = ep->pipenum;
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun 	if (pipenum == 0)
441*4882a593Smuzhiyun 		return;
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	if (ep->use_dma)
444*4882a593Smuzhiyun 		r8a66597->num_dma--;
445*4882a593Smuzhiyun 	ep->pipenum = 0;
446*4882a593Smuzhiyun 	ep->busy = 0;
447*4882a593Smuzhiyun 	ep->use_dma = 0;
448*4882a593Smuzhiyun }
449*4882a593Smuzhiyun 
alloc_pipe_config(struct r8a66597_ep * ep,const struct usb_endpoint_descriptor * desc)450*4882a593Smuzhiyun static int alloc_pipe_config(struct r8a66597_ep *ep,
451*4882a593Smuzhiyun 		const struct usb_endpoint_descriptor *desc)
452*4882a593Smuzhiyun {
453*4882a593Smuzhiyun 	struct r8a66597 *r8a66597 = ep->r8a66597;
454*4882a593Smuzhiyun 	struct r8a66597_pipe_info info;
455*4882a593Smuzhiyun 	int dma = 0;
456*4882a593Smuzhiyun 	unsigned char *counter;
457*4882a593Smuzhiyun 	int ret;
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun 	ep->ep.desc = desc;
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 	if (ep->pipenum)	/* already allocated pipe  */
462*4882a593Smuzhiyun 		return 0;
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	switch (usb_endpoint_type(desc)) {
465*4882a593Smuzhiyun 	case USB_ENDPOINT_XFER_BULK:
466*4882a593Smuzhiyun 		if (r8a66597->bulk >= R8A66597_MAX_NUM_BULK) {
467*4882a593Smuzhiyun 			if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) {
468*4882a593Smuzhiyun 				dev_err(r8a66597_to_dev(r8a66597),
469*4882a593Smuzhiyun 					"bulk pipe is insufficient\n");
470*4882a593Smuzhiyun 				return -ENODEV;
471*4882a593Smuzhiyun 			} else {
472*4882a593Smuzhiyun 				info.pipe = R8A66597_BASE_PIPENUM_ISOC
473*4882a593Smuzhiyun 						+ r8a66597->isochronous;
474*4882a593Smuzhiyun 				counter = &r8a66597->isochronous;
475*4882a593Smuzhiyun 			}
476*4882a593Smuzhiyun 		} else {
477*4882a593Smuzhiyun 			info.pipe = R8A66597_BASE_PIPENUM_BULK + r8a66597->bulk;
478*4882a593Smuzhiyun 			counter = &r8a66597->bulk;
479*4882a593Smuzhiyun 		}
480*4882a593Smuzhiyun 		info.type = R8A66597_BULK;
481*4882a593Smuzhiyun 		dma = 1;
482*4882a593Smuzhiyun 		break;
483*4882a593Smuzhiyun 	case USB_ENDPOINT_XFER_INT:
484*4882a593Smuzhiyun 		if (r8a66597->interrupt >= R8A66597_MAX_NUM_INT) {
485*4882a593Smuzhiyun 			dev_err(r8a66597_to_dev(r8a66597),
486*4882a593Smuzhiyun 				"interrupt pipe is insufficient\n");
487*4882a593Smuzhiyun 			return -ENODEV;
488*4882a593Smuzhiyun 		}
489*4882a593Smuzhiyun 		info.pipe = R8A66597_BASE_PIPENUM_INT + r8a66597->interrupt;
490*4882a593Smuzhiyun 		info.type = R8A66597_INT;
491*4882a593Smuzhiyun 		counter = &r8a66597->interrupt;
492*4882a593Smuzhiyun 		break;
493*4882a593Smuzhiyun 	case USB_ENDPOINT_XFER_ISOC:
494*4882a593Smuzhiyun 		if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) {
495*4882a593Smuzhiyun 			dev_err(r8a66597_to_dev(r8a66597),
496*4882a593Smuzhiyun 				"isochronous pipe is insufficient\n");
497*4882a593Smuzhiyun 			return -ENODEV;
498*4882a593Smuzhiyun 		}
499*4882a593Smuzhiyun 		info.pipe = R8A66597_BASE_PIPENUM_ISOC + r8a66597->isochronous;
500*4882a593Smuzhiyun 		info.type = R8A66597_ISO;
501*4882a593Smuzhiyun 		counter = &r8a66597->isochronous;
502*4882a593Smuzhiyun 		break;
503*4882a593Smuzhiyun 	default:
504*4882a593Smuzhiyun 		dev_err(r8a66597_to_dev(r8a66597), "unexpect xfer type\n");
505*4882a593Smuzhiyun 		return -EINVAL;
506*4882a593Smuzhiyun 	}
507*4882a593Smuzhiyun 	ep->type = info.type;
508*4882a593Smuzhiyun 
509*4882a593Smuzhiyun 	info.epnum = usb_endpoint_num(desc);
510*4882a593Smuzhiyun 	info.maxpacket = usb_endpoint_maxp(desc);
511*4882a593Smuzhiyun 	info.interval = desc->bInterval;
512*4882a593Smuzhiyun 	if (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK)
513*4882a593Smuzhiyun 		info.dir_in = 1;
514*4882a593Smuzhiyun 	else
515*4882a593Smuzhiyun 		info.dir_in = 0;
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun 	ret = pipe_buffer_setting(r8a66597, &info);
518*4882a593Smuzhiyun 	if (ret < 0) {
519*4882a593Smuzhiyun 		dev_err(r8a66597_to_dev(r8a66597),
520*4882a593Smuzhiyun 			"pipe_buffer_setting fail\n");
521*4882a593Smuzhiyun 		return ret;
522*4882a593Smuzhiyun 	}
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun 	(*counter)++;
525*4882a593Smuzhiyun 	if ((counter == &r8a66597->isochronous) && info.type == R8A66597_BULK)
526*4882a593Smuzhiyun 		r8a66597->bulk++;
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun 	r8a66597_ep_setting(r8a66597, ep, desc, info.pipe, dma);
529*4882a593Smuzhiyun 	pipe_initialize(ep);
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	return 0;
532*4882a593Smuzhiyun }
533*4882a593Smuzhiyun 
free_pipe_config(struct r8a66597_ep * ep)534*4882a593Smuzhiyun static int free_pipe_config(struct r8a66597_ep *ep)
535*4882a593Smuzhiyun {
536*4882a593Smuzhiyun 	struct r8a66597 *r8a66597 = ep->r8a66597;
537*4882a593Smuzhiyun 	struct r8a66597_pipe_info info;
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun 	info.pipe = ep->pipenum;
540*4882a593Smuzhiyun 	info.type = ep->type;
541*4882a593Smuzhiyun 	pipe_buffer_release(r8a66597, &info);
542*4882a593Smuzhiyun 	r8a66597_ep_release(ep);
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun 	return 0;
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun 
547*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
pipe_irq_enable(struct r8a66597 * r8a66597,u16 pipenum)548*4882a593Smuzhiyun static void pipe_irq_enable(struct r8a66597 *r8a66597, u16 pipenum)
549*4882a593Smuzhiyun {
550*4882a593Smuzhiyun 	enable_irq_ready(r8a66597, pipenum);
551*4882a593Smuzhiyun 	enable_irq_nrdy(r8a66597, pipenum);
552*4882a593Smuzhiyun }
553*4882a593Smuzhiyun 
pipe_irq_disable(struct r8a66597 * r8a66597,u16 pipenum)554*4882a593Smuzhiyun static void pipe_irq_disable(struct r8a66597 *r8a66597, u16 pipenum)
555*4882a593Smuzhiyun {
556*4882a593Smuzhiyun 	disable_irq_ready(r8a66597, pipenum);
557*4882a593Smuzhiyun 	disable_irq_nrdy(r8a66597, pipenum);
558*4882a593Smuzhiyun }
559*4882a593Smuzhiyun 
560*4882a593Smuzhiyun /* if complete is true, gadget driver complete function is not call */
control_end(struct r8a66597 * r8a66597,unsigned ccpl)561*4882a593Smuzhiyun static void control_end(struct r8a66597 *r8a66597, unsigned ccpl)
562*4882a593Smuzhiyun {
563*4882a593Smuzhiyun 	r8a66597->ep[0].internal_ccpl = ccpl;
564*4882a593Smuzhiyun 	pipe_start(r8a66597, 0);
565*4882a593Smuzhiyun 	r8a66597_bset(r8a66597, CCPL, DCPCTR);
566*4882a593Smuzhiyun }
567*4882a593Smuzhiyun 
start_ep0_write(struct r8a66597_ep * ep,struct r8a66597_request * req)568*4882a593Smuzhiyun static void start_ep0_write(struct r8a66597_ep *ep,
569*4882a593Smuzhiyun 				struct r8a66597_request *req)
570*4882a593Smuzhiyun {
571*4882a593Smuzhiyun 	struct r8a66597 *r8a66597 = ep->r8a66597;
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun 	pipe_change(r8a66597, ep->pipenum);
574*4882a593Smuzhiyun 	r8a66597_mdfy(r8a66597, ISEL, (ISEL | CURPIPE), CFIFOSEL);
575*4882a593Smuzhiyun 	r8a66597_write(r8a66597, BCLR, ep->fifoctr);
576*4882a593Smuzhiyun 	if (req->req.length == 0) {
577*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, BVAL, ep->fifoctr);
578*4882a593Smuzhiyun 		pipe_start(r8a66597, 0);
579*4882a593Smuzhiyun 		transfer_complete(ep, req, 0);
580*4882a593Smuzhiyun 	} else {
581*4882a593Smuzhiyun 		r8a66597_write(r8a66597, ~BEMP0, BEMPSTS);
582*4882a593Smuzhiyun 		irq_ep0_write(ep, req);
583*4882a593Smuzhiyun 	}
584*4882a593Smuzhiyun }
585*4882a593Smuzhiyun 
disable_fifosel(struct r8a66597 * r8a66597,u16 pipenum,u16 fifosel)586*4882a593Smuzhiyun static void disable_fifosel(struct r8a66597 *r8a66597, u16 pipenum,
587*4882a593Smuzhiyun 			    u16 fifosel)
588*4882a593Smuzhiyun {
589*4882a593Smuzhiyun 	u16 tmp;
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun 	tmp = r8a66597_read(r8a66597, fifosel) & CURPIPE;
592*4882a593Smuzhiyun 	if (tmp == pipenum)
593*4882a593Smuzhiyun 		r8a66597_change_curpipe(r8a66597, 0, 0, fifosel);
594*4882a593Smuzhiyun }
595*4882a593Smuzhiyun 
change_bfre_mode(struct r8a66597 * r8a66597,u16 pipenum,int enable)596*4882a593Smuzhiyun static void change_bfre_mode(struct r8a66597 *r8a66597, u16 pipenum,
597*4882a593Smuzhiyun 			     int enable)
598*4882a593Smuzhiyun {
599*4882a593Smuzhiyun 	struct r8a66597_ep *ep = r8a66597->pipenum2ep[pipenum];
600*4882a593Smuzhiyun 	u16 tmp, toggle;
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun 	/* check current BFRE bit */
603*4882a593Smuzhiyun 	r8a66597_write(r8a66597, pipenum, PIPESEL);
604*4882a593Smuzhiyun 	tmp = r8a66597_read(r8a66597, PIPECFG) & R8A66597_BFRE;
605*4882a593Smuzhiyun 	if ((enable && tmp) || (!enable && !tmp))
606*4882a593Smuzhiyun 		return;
607*4882a593Smuzhiyun 
608*4882a593Smuzhiyun 	/* change BFRE bit */
609*4882a593Smuzhiyun 	pipe_stop(r8a66597, pipenum);
610*4882a593Smuzhiyun 	disable_fifosel(r8a66597, pipenum, CFIFOSEL);
611*4882a593Smuzhiyun 	disable_fifosel(r8a66597, pipenum, D0FIFOSEL);
612*4882a593Smuzhiyun 	disable_fifosel(r8a66597, pipenum, D1FIFOSEL);
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun 	toggle = save_usb_toggle(r8a66597, pipenum);
615*4882a593Smuzhiyun 
616*4882a593Smuzhiyun 	r8a66597_write(r8a66597, pipenum, PIPESEL);
617*4882a593Smuzhiyun 	if (enable)
618*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, R8A66597_BFRE, PIPECFG);
619*4882a593Smuzhiyun 	else
620*4882a593Smuzhiyun 		r8a66597_bclr(r8a66597, R8A66597_BFRE, PIPECFG);
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun 	/* initialize for internal BFRE flag */
623*4882a593Smuzhiyun 	r8a66597_bset(r8a66597, ACLRM, ep->pipectr);
624*4882a593Smuzhiyun 	r8a66597_bclr(r8a66597, ACLRM, ep->pipectr);
625*4882a593Smuzhiyun 
626*4882a593Smuzhiyun 	restore_usb_toggle(r8a66597, pipenum, toggle);
627*4882a593Smuzhiyun }
628*4882a593Smuzhiyun 
sudmac_alloc_channel(struct r8a66597 * r8a66597,struct r8a66597_ep * ep,struct r8a66597_request * req)629*4882a593Smuzhiyun static int sudmac_alloc_channel(struct r8a66597 *r8a66597,
630*4882a593Smuzhiyun 				struct r8a66597_ep *ep,
631*4882a593Smuzhiyun 				struct r8a66597_request *req)
632*4882a593Smuzhiyun {
633*4882a593Smuzhiyun 	struct r8a66597_dma *dma;
634*4882a593Smuzhiyun 
635*4882a593Smuzhiyun 	if (!r8a66597_is_sudmac(r8a66597))
636*4882a593Smuzhiyun 		return -ENODEV;
637*4882a593Smuzhiyun 
638*4882a593Smuzhiyun 	/* Check transfer type */
639*4882a593Smuzhiyun 	if (!is_bulk_pipe(ep->pipenum))
640*4882a593Smuzhiyun 		return -EIO;
641*4882a593Smuzhiyun 
642*4882a593Smuzhiyun 	if (r8a66597->dma.used)
643*4882a593Smuzhiyun 		return -EBUSY;
644*4882a593Smuzhiyun 
645*4882a593Smuzhiyun 	/* set SUDMAC parameters */
646*4882a593Smuzhiyun 	dma = &r8a66597->dma;
647*4882a593Smuzhiyun 	dma->used = 1;
648*4882a593Smuzhiyun 	if (ep->ep.desc->bEndpointAddress & USB_DIR_IN) {
649*4882a593Smuzhiyun 		dma->dir = 1;
650*4882a593Smuzhiyun 	} else {
651*4882a593Smuzhiyun 		dma->dir = 0;
652*4882a593Smuzhiyun 		change_bfre_mode(r8a66597, ep->pipenum, 1);
653*4882a593Smuzhiyun 	}
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun 	/* set r8a66597_ep paramters */
656*4882a593Smuzhiyun 	ep->use_dma = 1;
657*4882a593Smuzhiyun 	ep->dma = dma;
658*4882a593Smuzhiyun 	ep->fifoaddr = D0FIFO;
659*4882a593Smuzhiyun 	ep->fifosel = D0FIFOSEL;
660*4882a593Smuzhiyun 	ep->fifoctr = D0FIFOCTR;
661*4882a593Smuzhiyun 
662*4882a593Smuzhiyun 	/* dma mapping */
663*4882a593Smuzhiyun 	return usb_gadget_map_request(&r8a66597->gadget, &req->req, dma->dir);
664*4882a593Smuzhiyun }
665*4882a593Smuzhiyun 
sudmac_free_channel(struct r8a66597 * r8a66597,struct r8a66597_ep * ep,struct r8a66597_request * req)666*4882a593Smuzhiyun static void sudmac_free_channel(struct r8a66597 *r8a66597,
667*4882a593Smuzhiyun 				struct r8a66597_ep *ep,
668*4882a593Smuzhiyun 				struct r8a66597_request *req)
669*4882a593Smuzhiyun {
670*4882a593Smuzhiyun 	if (!r8a66597_is_sudmac(r8a66597))
671*4882a593Smuzhiyun 		return;
672*4882a593Smuzhiyun 
673*4882a593Smuzhiyun 	usb_gadget_unmap_request(&r8a66597->gadget, &req->req, ep->dma->dir);
674*4882a593Smuzhiyun 
675*4882a593Smuzhiyun 	r8a66597_bclr(r8a66597, DREQE, ep->fifosel);
676*4882a593Smuzhiyun 	r8a66597_change_curpipe(r8a66597, 0, 0, ep->fifosel);
677*4882a593Smuzhiyun 
678*4882a593Smuzhiyun 	ep->dma->used = 0;
679*4882a593Smuzhiyun 	ep->use_dma = 0;
680*4882a593Smuzhiyun 	ep->fifoaddr = CFIFO;
681*4882a593Smuzhiyun 	ep->fifosel = CFIFOSEL;
682*4882a593Smuzhiyun 	ep->fifoctr = CFIFOCTR;
683*4882a593Smuzhiyun }
684*4882a593Smuzhiyun 
sudmac_start(struct r8a66597 * r8a66597,struct r8a66597_ep * ep,struct r8a66597_request * req)685*4882a593Smuzhiyun static void sudmac_start(struct r8a66597 *r8a66597, struct r8a66597_ep *ep,
686*4882a593Smuzhiyun 			 struct r8a66597_request *req)
687*4882a593Smuzhiyun {
688*4882a593Smuzhiyun 	BUG_ON(req->req.length == 0);
689*4882a593Smuzhiyun 
690*4882a593Smuzhiyun 	r8a66597_sudmac_write(r8a66597, LBA_WAIT, CH0CFG);
691*4882a593Smuzhiyun 	r8a66597_sudmac_write(r8a66597, req->req.dma, CH0BA);
692*4882a593Smuzhiyun 	r8a66597_sudmac_write(r8a66597, req->req.length, CH0BBC);
693*4882a593Smuzhiyun 	r8a66597_sudmac_write(r8a66597, CH0ENDE, DINTCTRL);
694*4882a593Smuzhiyun 
695*4882a593Smuzhiyun 	r8a66597_sudmac_write(r8a66597, DEN, CH0DEN);
696*4882a593Smuzhiyun }
697*4882a593Smuzhiyun 
start_packet_write(struct r8a66597_ep * ep,struct r8a66597_request * req)698*4882a593Smuzhiyun static void start_packet_write(struct r8a66597_ep *ep,
699*4882a593Smuzhiyun 				struct r8a66597_request *req)
700*4882a593Smuzhiyun {
701*4882a593Smuzhiyun 	struct r8a66597 *r8a66597 = ep->r8a66597;
702*4882a593Smuzhiyun 	u16 tmp;
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun 	pipe_change(r8a66597, ep->pipenum);
705*4882a593Smuzhiyun 	disable_irq_empty(r8a66597, ep->pipenum);
706*4882a593Smuzhiyun 	pipe_start(r8a66597, ep->pipenum);
707*4882a593Smuzhiyun 
708*4882a593Smuzhiyun 	if (req->req.length == 0) {
709*4882a593Smuzhiyun 		transfer_complete(ep, req, 0);
710*4882a593Smuzhiyun 	} else {
711*4882a593Smuzhiyun 		r8a66597_write(r8a66597, ~(1 << ep->pipenum), BRDYSTS);
712*4882a593Smuzhiyun 		if (sudmac_alloc_channel(r8a66597, ep, req) < 0) {
713*4882a593Smuzhiyun 			/* PIO mode */
714*4882a593Smuzhiyun 			pipe_change(r8a66597, ep->pipenum);
715*4882a593Smuzhiyun 			disable_irq_empty(r8a66597, ep->pipenum);
716*4882a593Smuzhiyun 			pipe_start(r8a66597, ep->pipenum);
717*4882a593Smuzhiyun 			tmp = r8a66597_read(r8a66597, ep->fifoctr);
718*4882a593Smuzhiyun 			if (unlikely((tmp & FRDY) == 0))
719*4882a593Smuzhiyun 				pipe_irq_enable(r8a66597, ep->pipenum);
720*4882a593Smuzhiyun 			else
721*4882a593Smuzhiyun 				irq_packet_write(ep, req);
722*4882a593Smuzhiyun 		} else {
723*4882a593Smuzhiyun 			/* DMA mode */
724*4882a593Smuzhiyun 			pipe_change(r8a66597, ep->pipenum);
725*4882a593Smuzhiyun 			disable_irq_nrdy(r8a66597, ep->pipenum);
726*4882a593Smuzhiyun 			pipe_start(r8a66597, ep->pipenum);
727*4882a593Smuzhiyun 			enable_irq_nrdy(r8a66597, ep->pipenum);
728*4882a593Smuzhiyun 			sudmac_start(r8a66597, ep, req);
729*4882a593Smuzhiyun 		}
730*4882a593Smuzhiyun 	}
731*4882a593Smuzhiyun }
732*4882a593Smuzhiyun 
start_packet_read(struct r8a66597_ep * ep,struct r8a66597_request * req)733*4882a593Smuzhiyun static void start_packet_read(struct r8a66597_ep *ep,
734*4882a593Smuzhiyun 				struct r8a66597_request *req)
735*4882a593Smuzhiyun {
736*4882a593Smuzhiyun 	struct r8a66597 *r8a66597 = ep->r8a66597;
737*4882a593Smuzhiyun 	u16 pipenum = ep->pipenum;
738*4882a593Smuzhiyun 
739*4882a593Smuzhiyun 	if (ep->pipenum == 0) {
740*4882a593Smuzhiyun 		r8a66597_mdfy(r8a66597, 0, (ISEL | CURPIPE), CFIFOSEL);
741*4882a593Smuzhiyun 		r8a66597_write(r8a66597, BCLR, ep->fifoctr);
742*4882a593Smuzhiyun 		pipe_start(r8a66597, pipenum);
743*4882a593Smuzhiyun 		pipe_irq_enable(r8a66597, pipenum);
744*4882a593Smuzhiyun 	} else {
745*4882a593Smuzhiyun 		pipe_stop(r8a66597, pipenum);
746*4882a593Smuzhiyun 		if (ep->pipetre) {
747*4882a593Smuzhiyun 			enable_irq_nrdy(r8a66597, pipenum);
748*4882a593Smuzhiyun 			r8a66597_write(r8a66597, TRCLR, ep->pipetre);
749*4882a593Smuzhiyun 			r8a66597_write(r8a66597,
750*4882a593Smuzhiyun 				DIV_ROUND_UP(req->req.length, ep->ep.maxpacket),
751*4882a593Smuzhiyun 				ep->pipetrn);
752*4882a593Smuzhiyun 			r8a66597_bset(r8a66597, TRENB, ep->pipetre);
753*4882a593Smuzhiyun 		}
754*4882a593Smuzhiyun 
755*4882a593Smuzhiyun 		if (sudmac_alloc_channel(r8a66597, ep, req) < 0) {
756*4882a593Smuzhiyun 			/* PIO mode */
757*4882a593Smuzhiyun 			change_bfre_mode(r8a66597, ep->pipenum, 0);
758*4882a593Smuzhiyun 			pipe_start(r8a66597, pipenum);	/* trigger once */
759*4882a593Smuzhiyun 			pipe_irq_enable(r8a66597, pipenum);
760*4882a593Smuzhiyun 		} else {
761*4882a593Smuzhiyun 			pipe_change(r8a66597, pipenum);
762*4882a593Smuzhiyun 			sudmac_start(r8a66597, ep, req);
763*4882a593Smuzhiyun 			pipe_start(r8a66597, pipenum);	/* trigger once */
764*4882a593Smuzhiyun 		}
765*4882a593Smuzhiyun 	}
766*4882a593Smuzhiyun }
767*4882a593Smuzhiyun 
start_packet(struct r8a66597_ep * ep,struct r8a66597_request * req)768*4882a593Smuzhiyun static void start_packet(struct r8a66597_ep *ep, struct r8a66597_request *req)
769*4882a593Smuzhiyun {
770*4882a593Smuzhiyun 	if (ep->ep.desc->bEndpointAddress & USB_DIR_IN)
771*4882a593Smuzhiyun 		start_packet_write(ep, req);
772*4882a593Smuzhiyun 	else
773*4882a593Smuzhiyun 		start_packet_read(ep, req);
774*4882a593Smuzhiyun }
775*4882a593Smuzhiyun 
start_ep0(struct r8a66597_ep * ep,struct r8a66597_request * req)776*4882a593Smuzhiyun static void start_ep0(struct r8a66597_ep *ep, struct r8a66597_request *req)
777*4882a593Smuzhiyun {
778*4882a593Smuzhiyun 	u16 ctsq;
779*4882a593Smuzhiyun 
780*4882a593Smuzhiyun 	ctsq = r8a66597_read(ep->r8a66597, INTSTS0) & CTSQ;
781*4882a593Smuzhiyun 
782*4882a593Smuzhiyun 	switch (ctsq) {
783*4882a593Smuzhiyun 	case CS_RDDS:
784*4882a593Smuzhiyun 		start_ep0_write(ep, req);
785*4882a593Smuzhiyun 		break;
786*4882a593Smuzhiyun 	case CS_WRDS:
787*4882a593Smuzhiyun 		start_packet_read(ep, req);
788*4882a593Smuzhiyun 		break;
789*4882a593Smuzhiyun 
790*4882a593Smuzhiyun 	case CS_WRND:
791*4882a593Smuzhiyun 		control_end(ep->r8a66597, 0);
792*4882a593Smuzhiyun 		break;
793*4882a593Smuzhiyun 	default:
794*4882a593Smuzhiyun 		dev_err(r8a66597_to_dev(ep->r8a66597),
795*4882a593Smuzhiyun 			"start_ep0: unexpect ctsq(%x)\n", ctsq);
796*4882a593Smuzhiyun 		break;
797*4882a593Smuzhiyun 	}
798*4882a593Smuzhiyun }
799*4882a593Smuzhiyun 
init_controller(struct r8a66597 * r8a66597)800*4882a593Smuzhiyun static void init_controller(struct r8a66597 *r8a66597)
801*4882a593Smuzhiyun {
802*4882a593Smuzhiyun 	u16 vif = r8a66597->pdata->vif ? LDRV : 0;
803*4882a593Smuzhiyun 	u16 irq_sense = r8a66597->irq_sense_low ? INTL : 0;
804*4882a593Smuzhiyun 	u16 endian = r8a66597->pdata->endian ? BIGEND : 0;
805*4882a593Smuzhiyun 
806*4882a593Smuzhiyun 	if (r8a66597->pdata->on_chip) {
807*4882a593Smuzhiyun 		if (r8a66597->pdata->buswait)
808*4882a593Smuzhiyun 			r8a66597_write(r8a66597, r8a66597->pdata->buswait,
809*4882a593Smuzhiyun 					SYSCFG1);
810*4882a593Smuzhiyun 		else
811*4882a593Smuzhiyun 			r8a66597_write(r8a66597, 0x0f, SYSCFG1);
812*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, HSE, SYSCFG0);
813*4882a593Smuzhiyun 
814*4882a593Smuzhiyun 		r8a66597_bclr(r8a66597, USBE, SYSCFG0);
815*4882a593Smuzhiyun 		r8a66597_bclr(r8a66597, DPRPU, SYSCFG0);
816*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, USBE, SYSCFG0);
817*4882a593Smuzhiyun 
818*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, SCKE, SYSCFG0);
819*4882a593Smuzhiyun 
820*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, irq_sense, INTENB1);
821*4882a593Smuzhiyun 		r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR,
822*4882a593Smuzhiyun 				DMA0CFG);
823*4882a593Smuzhiyun 	} else {
824*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, vif | endian, PINCFG);
825*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, HSE, SYSCFG0);		/* High spd */
826*4882a593Smuzhiyun 		r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata),
827*4882a593Smuzhiyun 				XTAL, SYSCFG0);
828*4882a593Smuzhiyun 
829*4882a593Smuzhiyun 		r8a66597_bclr(r8a66597, USBE, SYSCFG0);
830*4882a593Smuzhiyun 		r8a66597_bclr(r8a66597, DPRPU, SYSCFG0);
831*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, USBE, SYSCFG0);
832*4882a593Smuzhiyun 
833*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, XCKE, SYSCFG0);
834*4882a593Smuzhiyun 
835*4882a593Smuzhiyun 		mdelay(3);
836*4882a593Smuzhiyun 
837*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, PLLC, SYSCFG0);
838*4882a593Smuzhiyun 
839*4882a593Smuzhiyun 		mdelay(1);
840*4882a593Smuzhiyun 
841*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, SCKE, SYSCFG0);
842*4882a593Smuzhiyun 
843*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, irq_sense, INTENB1);
844*4882a593Smuzhiyun 		r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR,
845*4882a593Smuzhiyun 			       DMA0CFG);
846*4882a593Smuzhiyun 	}
847*4882a593Smuzhiyun }
848*4882a593Smuzhiyun 
disable_controller(struct r8a66597 * r8a66597)849*4882a593Smuzhiyun static void disable_controller(struct r8a66597 *r8a66597)
850*4882a593Smuzhiyun {
851*4882a593Smuzhiyun 	if (r8a66597->pdata->on_chip) {
852*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, SCKE, SYSCFG0);
853*4882a593Smuzhiyun 		r8a66597_bclr(r8a66597, UTST, TESTMODE);
854*4882a593Smuzhiyun 
855*4882a593Smuzhiyun 		/* disable interrupts */
856*4882a593Smuzhiyun 		r8a66597_write(r8a66597, 0, INTENB0);
857*4882a593Smuzhiyun 		r8a66597_write(r8a66597, 0, INTENB1);
858*4882a593Smuzhiyun 		r8a66597_write(r8a66597, 0, BRDYENB);
859*4882a593Smuzhiyun 		r8a66597_write(r8a66597, 0, BEMPENB);
860*4882a593Smuzhiyun 		r8a66597_write(r8a66597, 0, NRDYENB);
861*4882a593Smuzhiyun 
862*4882a593Smuzhiyun 		/* clear status */
863*4882a593Smuzhiyun 		r8a66597_write(r8a66597, 0, BRDYSTS);
864*4882a593Smuzhiyun 		r8a66597_write(r8a66597, 0, NRDYSTS);
865*4882a593Smuzhiyun 		r8a66597_write(r8a66597, 0, BEMPSTS);
866*4882a593Smuzhiyun 
867*4882a593Smuzhiyun 		r8a66597_bclr(r8a66597, USBE, SYSCFG0);
868*4882a593Smuzhiyun 		r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
869*4882a593Smuzhiyun 
870*4882a593Smuzhiyun 	} else {
871*4882a593Smuzhiyun 		r8a66597_bclr(r8a66597, UTST, TESTMODE);
872*4882a593Smuzhiyun 		r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
873*4882a593Smuzhiyun 		udelay(1);
874*4882a593Smuzhiyun 		r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
875*4882a593Smuzhiyun 		udelay(1);
876*4882a593Smuzhiyun 		udelay(1);
877*4882a593Smuzhiyun 		r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
878*4882a593Smuzhiyun 	}
879*4882a593Smuzhiyun }
880*4882a593Smuzhiyun 
r8a66597_start_xclock(struct r8a66597 * r8a66597)881*4882a593Smuzhiyun static void r8a66597_start_xclock(struct r8a66597 *r8a66597)
882*4882a593Smuzhiyun {
883*4882a593Smuzhiyun 	u16 tmp;
884*4882a593Smuzhiyun 
885*4882a593Smuzhiyun 	if (!r8a66597->pdata->on_chip) {
886*4882a593Smuzhiyun 		tmp = r8a66597_read(r8a66597, SYSCFG0);
887*4882a593Smuzhiyun 		if (!(tmp & XCKE))
888*4882a593Smuzhiyun 			r8a66597_bset(r8a66597, XCKE, SYSCFG0);
889*4882a593Smuzhiyun 	}
890*4882a593Smuzhiyun }
891*4882a593Smuzhiyun 
get_request_from_ep(struct r8a66597_ep * ep)892*4882a593Smuzhiyun static struct r8a66597_request *get_request_from_ep(struct r8a66597_ep *ep)
893*4882a593Smuzhiyun {
894*4882a593Smuzhiyun 	return list_entry(ep->queue.next, struct r8a66597_request, queue);
895*4882a593Smuzhiyun }
896*4882a593Smuzhiyun 
897*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
transfer_complete(struct r8a66597_ep * ep,struct r8a66597_request * req,int status)898*4882a593Smuzhiyun static void transfer_complete(struct r8a66597_ep *ep,
899*4882a593Smuzhiyun 		struct r8a66597_request *req, int status)
900*4882a593Smuzhiyun __releases(r8a66597->lock)
901*4882a593Smuzhiyun __acquires(r8a66597->lock)
902*4882a593Smuzhiyun {
903*4882a593Smuzhiyun 	int restart = 0;
904*4882a593Smuzhiyun 
905*4882a593Smuzhiyun 	if (unlikely(ep->pipenum == 0)) {
906*4882a593Smuzhiyun 		if (ep->internal_ccpl) {
907*4882a593Smuzhiyun 			ep->internal_ccpl = 0;
908*4882a593Smuzhiyun 			return;
909*4882a593Smuzhiyun 		}
910*4882a593Smuzhiyun 	}
911*4882a593Smuzhiyun 
912*4882a593Smuzhiyun 	list_del_init(&req->queue);
913*4882a593Smuzhiyun 	if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN)
914*4882a593Smuzhiyun 		req->req.status = -ESHUTDOWN;
915*4882a593Smuzhiyun 	else
916*4882a593Smuzhiyun 		req->req.status = status;
917*4882a593Smuzhiyun 
918*4882a593Smuzhiyun 	if (!list_empty(&ep->queue))
919*4882a593Smuzhiyun 		restart = 1;
920*4882a593Smuzhiyun 
921*4882a593Smuzhiyun 	if (ep->use_dma)
922*4882a593Smuzhiyun 		sudmac_free_channel(ep->r8a66597, ep, req);
923*4882a593Smuzhiyun 
924*4882a593Smuzhiyun 	spin_unlock(&ep->r8a66597->lock);
925*4882a593Smuzhiyun 	usb_gadget_giveback_request(&ep->ep, &req->req);
926*4882a593Smuzhiyun 	spin_lock(&ep->r8a66597->lock);
927*4882a593Smuzhiyun 
928*4882a593Smuzhiyun 	if (restart) {
929*4882a593Smuzhiyun 		req = get_request_from_ep(ep);
930*4882a593Smuzhiyun 		if (ep->ep.desc)
931*4882a593Smuzhiyun 			start_packet(ep, req);
932*4882a593Smuzhiyun 	}
933*4882a593Smuzhiyun }
934*4882a593Smuzhiyun 
irq_ep0_write(struct r8a66597_ep * ep,struct r8a66597_request * req)935*4882a593Smuzhiyun static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req)
936*4882a593Smuzhiyun {
937*4882a593Smuzhiyun 	int i;
938*4882a593Smuzhiyun 	u16 tmp;
939*4882a593Smuzhiyun 	unsigned bufsize;
940*4882a593Smuzhiyun 	size_t size;
941*4882a593Smuzhiyun 	void *buf;
942*4882a593Smuzhiyun 	u16 pipenum = ep->pipenum;
943*4882a593Smuzhiyun 	struct r8a66597 *r8a66597 = ep->r8a66597;
944*4882a593Smuzhiyun 
945*4882a593Smuzhiyun 	pipe_change(r8a66597, pipenum);
946*4882a593Smuzhiyun 	r8a66597_bset(r8a66597, ISEL, ep->fifosel);
947*4882a593Smuzhiyun 
948*4882a593Smuzhiyun 	i = 0;
949*4882a593Smuzhiyun 	do {
950*4882a593Smuzhiyun 		tmp = r8a66597_read(r8a66597, ep->fifoctr);
951*4882a593Smuzhiyun 		if (i++ > 100000) {
952*4882a593Smuzhiyun 			dev_err(r8a66597_to_dev(r8a66597),
953*4882a593Smuzhiyun 				"pipe0 is busy. maybe cpu i/o bus "
954*4882a593Smuzhiyun 				"conflict. please power off this controller.");
955*4882a593Smuzhiyun 			return;
956*4882a593Smuzhiyun 		}
957*4882a593Smuzhiyun 		ndelay(1);
958*4882a593Smuzhiyun 	} while ((tmp & FRDY) == 0);
959*4882a593Smuzhiyun 
960*4882a593Smuzhiyun 	/* prepare parameters */
961*4882a593Smuzhiyun 	bufsize = get_buffer_size(r8a66597, pipenum);
962*4882a593Smuzhiyun 	buf = req->req.buf + req->req.actual;
963*4882a593Smuzhiyun 	size = min(bufsize, req->req.length - req->req.actual);
964*4882a593Smuzhiyun 
965*4882a593Smuzhiyun 	/* write fifo */
966*4882a593Smuzhiyun 	if (req->req.buf) {
967*4882a593Smuzhiyun 		if (size > 0)
968*4882a593Smuzhiyun 			r8a66597_write_fifo(r8a66597, ep, buf, size);
969*4882a593Smuzhiyun 		if ((size == 0) || ((size % ep->ep.maxpacket) != 0))
970*4882a593Smuzhiyun 			r8a66597_bset(r8a66597, BVAL, ep->fifoctr);
971*4882a593Smuzhiyun 	}
972*4882a593Smuzhiyun 
973*4882a593Smuzhiyun 	/* update parameters */
974*4882a593Smuzhiyun 	req->req.actual += size;
975*4882a593Smuzhiyun 
976*4882a593Smuzhiyun 	/* check transfer finish */
977*4882a593Smuzhiyun 	if ((!req->req.zero && (req->req.actual == req->req.length))
978*4882a593Smuzhiyun 			|| (size % ep->ep.maxpacket)
979*4882a593Smuzhiyun 			|| (size == 0)) {
980*4882a593Smuzhiyun 		disable_irq_ready(r8a66597, pipenum);
981*4882a593Smuzhiyun 		disable_irq_empty(r8a66597, pipenum);
982*4882a593Smuzhiyun 	} else {
983*4882a593Smuzhiyun 		disable_irq_ready(r8a66597, pipenum);
984*4882a593Smuzhiyun 		enable_irq_empty(r8a66597, pipenum);
985*4882a593Smuzhiyun 	}
986*4882a593Smuzhiyun 	pipe_start(r8a66597, pipenum);
987*4882a593Smuzhiyun }
988*4882a593Smuzhiyun 
irq_packet_write(struct r8a66597_ep * ep,struct r8a66597_request * req)989*4882a593Smuzhiyun static void irq_packet_write(struct r8a66597_ep *ep,
990*4882a593Smuzhiyun 				struct r8a66597_request *req)
991*4882a593Smuzhiyun {
992*4882a593Smuzhiyun 	u16 tmp;
993*4882a593Smuzhiyun 	unsigned bufsize;
994*4882a593Smuzhiyun 	size_t size;
995*4882a593Smuzhiyun 	void *buf;
996*4882a593Smuzhiyun 	u16 pipenum = ep->pipenum;
997*4882a593Smuzhiyun 	struct r8a66597 *r8a66597 = ep->r8a66597;
998*4882a593Smuzhiyun 
999*4882a593Smuzhiyun 	pipe_change(r8a66597, pipenum);
1000*4882a593Smuzhiyun 	tmp = r8a66597_read(r8a66597, ep->fifoctr);
1001*4882a593Smuzhiyun 	if (unlikely((tmp & FRDY) == 0)) {
1002*4882a593Smuzhiyun 		pipe_stop(r8a66597, pipenum);
1003*4882a593Smuzhiyun 		pipe_irq_disable(r8a66597, pipenum);
1004*4882a593Smuzhiyun 		dev_err(r8a66597_to_dev(r8a66597),
1005*4882a593Smuzhiyun 			"write fifo not ready. pipnum=%d\n", pipenum);
1006*4882a593Smuzhiyun 		return;
1007*4882a593Smuzhiyun 	}
1008*4882a593Smuzhiyun 
1009*4882a593Smuzhiyun 	/* prepare parameters */
1010*4882a593Smuzhiyun 	bufsize = get_buffer_size(r8a66597, pipenum);
1011*4882a593Smuzhiyun 	buf = req->req.buf + req->req.actual;
1012*4882a593Smuzhiyun 	size = min(bufsize, req->req.length - req->req.actual);
1013*4882a593Smuzhiyun 
1014*4882a593Smuzhiyun 	/* write fifo */
1015*4882a593Smuzhiyun 	if (req->req.buf) {
1016*4882a593Smuzhiyun 		r8a66597_write_fifo(r8a66597, ep, buf, size);
1017*4882a593Smuzhiyun 		if ((size == 0)
1018*4882a593Smuzhiyun 				|| ((size % ep->ep.maxpacket) != 0)
1019*4882a593Smuzhiyun 				|| ((bufsize != ep->ep.maxpacket)
1020*4882a593Smuzhiyun 					&& (bufsize > size)))
1021*4882a593Smuzhiyun 			r8a66597_bset(r8a66597, BVAL, ep->fifoctr);
1022*4882a593Smuzhiyun 	}
1023*4882a593Smuzhiyun 
1024*4882a593Smuzhiyun 	/* update parameters */
1025*4882a593Smuzhiyun 	req->req.actual += size;
1026*4882a593Smuzhiyun 	/* check transfer finish */
1027*4882a593Smuzhiyun 	if ((!req->req.zero && (req->req.actual == req->req.length))
1028*4882a593Smuzhiyun 			|| (size % ep->ep.maxpacket)
1029*4882a593Smuzhiyun 			|| (size == 0)) {
1030*4882a593Smuzhiyun 		disable_irq_ready(r8a66597, pipenum);
1031*4882a593Smuzhiyun 		enable_irq_empty(r8a66597, pipenum);
1032*4882a593Smuzhiyun 	} else {
1033*4882a593Smuzhiyun 		disable_irq_empty(r8a66597, pipenum);
1034*4882a593Smuzhiyun 		pipe_irq_enable(r8a66597, pipenum);
1035*4882a593Smuzhiyun 	}
1036*4882a593Smuzhiyun }
1037*4882a593Smuzhiyun 
irq_packet_read(struct r8a66597_ep * ep,struct r8a66597_request * req)1038*4882a593Smuzhiyun static void irq_packet_read(struct r8a66597_ep *ep,
1039*4882a593Smuzhiyun 				struct r8a66597_request *req)
1040*4882a593Smuzhiyun {
1041*4882a593Smuzhiyun 	u16 tmp;
1042*4882a593Smuzhiyun 	int rcv_len, bufsize, req_len;
1043*4882a593Smuzhiyun 	int size;
1044*4882a593Smuzhiyun 	void *buf;
1045*4882a593Smuzhiyun 	u16 pipenum = ep->pipenum;
1046*4882a593Smuzhiyun 	struct r8a66597 *r8a66597 = ep->r8a66597;
1047*4882a593Smuzhiyun 	int finish = 0;
1048*4882a593Smuzhiyun 
1049*4882a593Smuzhiyun 	pipe_change(r8a66597, pipenum);
1050*4882a593Smuzhiyun 	tmp = r8a66597_read(r8a66597, ep->fifoctr);
1051*4882a593Smuzhiyun 	if (unlikely((tmp & FRDY) == 0)) {
1052*4882a593Smuzhiyun 		req->req.status = -EPIPE;
1053*4882a593Smuzhiyun 		pipe_stop(r8a66597, pipenum);
1054*4882a593Smuzhiyun 		pipe_irq_disable(r8a66597, pipenum);
1055*4882a593Smuzhiyun 		dev_err(r8a66597_to_dev(r8a66597), "read fifo not ready");
1056*4882a593Smuzhiyun 		return;
1057*4882a593Smuzhiyun 	}
1058*4882a593Smuzhiyun 
1059*4882a593Smuzhiyun 	/* prepare parameters */
1060*4882a593Smuzhiyun 	rcv_len = tmp & DTLN;
1061*4882a593Smuzhiyun 	bufsize = get_buffer_size(r8a66597, pipenum);
1062*4882a593Smuzhiyun 
1063*4882a593Smuzhiyun 	buf = req->req.buf + req->req.actual;
1064*4882a593Smuzhiyun 	req_len = req->req.length - req->req.actual;
1065*4882a593Smuzhiyun 	if (rcv_len < bufsize)
1066*4882a593Smuzhiyun 		size = min(rcv_len, req_len);
1067*4882a593Smuzhiyun 	else
1068*4882a593Smuzhiyun 		size = min(bufsize, req_len);
1069*4882a593Smuzhiyun 
1070*4882a593Smuzhiyun 	/* update parameters */
1071*4882a593Smuzhiyun 	req->req.actual += size;
1072*4882a593Smuzhiyun 
1073*4882a593Smuzhiyun 	/* check transfer finish */
1074*4882a593Smuzhiyun 	if ((!req->req.zero && (req->req.actual == req->req.length))
1075*4882a593Smuzhiyun 			|| (size % ep->ep.maxpacket)
1076*4882a593Smuzhiyun 			|| (size == 0)) {
1077*4882a593Smuzhiyun 		pipe_stop(r8a66597, pipenum);
1078*4882a593Smuzhiyun 		pipe_irq_disable(r8a66597, pipenum);
1079*4882a593Smuzhiyun 		finish = 1;
1080*4882a593Smuzhiyun 	}
1081*4882a593Smuzhiyun 
1082*4882a593Smuzhiyun 	/* read fifo */
1083*4882a593Smuzhiyun 	if (req->req.buf) {
1084*4882a593Smuzhiyun 		if (size == 0)
1085*4882a593Smuzhiyun 			r8a66597_write(r8a66597, BCLR, ep->fifoctr);
1086*4882a593Smuzhiyun 		else
1087*4882a593Smuzhiyun 			r8a66597_read_fifo(r8a66597, ep->fifoaddr, buf, size);
1088*4882a593Smuzhiyun 
1089*4882a593Smuzhiyun 	}
1090*4882a593Smuzhiyun 
1091*4882a593Smuzhiyun 	if ((ep->pipenum != 0) && finish)
1092*4882a593Smuzhiyun 		transfer_complete(ep, req, 0);
1093*4882a593Smuzhiyun }
1094*4882a593Smuzhiyun 
irq_pipe_ready(struct r8a66597 * r8a66597,u16 status,u16 enb)1095*4882a593Smuzhiyun static void irq_pipe_ready(struct r8a66597 *r8a66597, u16 status, u16 enb)
1096*4882a593Smuzhiyun {
1097*4882a593Smuzhiyun 	u16 check;
1098*4882a593Smuzhiyun 	u16 pipenum;
1099*4882a593Smuzhiyun 	struct r8a66597_ep *ep;
1100*4882a593Smuzhiyun 	struct r8a66597_request *req;
1101*4882a593Smuzhiyun 
1102*4882a593Smuzhiyun 	if ((status & BRDY0) && (enb & BRDY0)) {
1103*4882a593Smuzhiyun 		r8a66597_write(r8a66597, ~BRDY0, BRDYSTS);
1104*4882a593Smuzhiyun 		r8a66597_mdfy(r8a66597, 0, CURPIPE, CFIFOSEL);
1105*4882a593Smuzhiyun 
1106*4882a593Smuzhiyun 		ep = &r8a66597->ep[0];
1107*4882a593Smuzhiyun 		req = get_request_from_ep(ep);
1108*4882a593Smuzhiyun 		irq_packet_read(ep, req);
1109*4882a593Smuzhiyun 	} else {
1110*4882a593Smuzhiyun 		for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) {
1111*4882a593Smuzhiyun 			check = 1 << pipenum;
1112*4882a593Smuzhiyun 			if ((status & check) && (enb & check)) {
1113*4882a593Smuzhiyun 				r8a66597_write(r8a66597, ~check, BRDYSTS);
1114*4882a593Smuzhiyun 				ep = r8a66597->pipenum2ep[pipenum];
1115*4882a593Smuzhiyun 				req = get_request_from_ep(ep);
1116*4882a593Smuzhiyun 				if (ep->ep.desc->bEndpointAddress & USB_DIR_IN)
1117*4882a593Smuzhiyun 					irq_packet_write(ep, req);
1118*4882a593Smuzhiyun 				else
1119*4882a593Smuzhiyun 					irq_packet_read(ep, req);
1120*4882a593Smuzhiyun 			}
1121*4882a593Smuzhiyun 		}
1122*4882a593Smuzhiyun 	}
1123*4882a593Smuzhiyun }
1124*4882a593Smuzhiyun 
irq_pipe_empty(struct r8a66597 * r8a66597,u16 status,u16 enb)1125*4882a593Smuzhiyun static void irq_pipe_empty(struct r8a66597 *r8a66597, u16 status, u16 enb)
1126*4882a593Smuzhiyun {
1127*4882a593Smuzhiyun 	u16 tmp;
1128*4882a593Smuzhiyun 	u16 check;
1129*4882a593Smuzhiyun 	u16 pipenum;
1130*4882a593Smuzhiyun 	struct r8a66597_ep *ep;
1131*4882a593Smuzhiyun 	struct r8a66597_request *req;
1132*4882a593Smuzhiyun 
1133*4882a593Smuzhiyun 	if ((status & BEMP0) && (enb & BEMP0)) {
1134*4882a593Smuzhiyun 		r8a66597_write(r8a66597, ~BEMP0, BEMPSTS);
1135*4882a593Smuzhiyun 
1136*4882a593Smuzhiyun 		ep = &r8a66597->ep[0];
1137*4882a593Smuzhiyun 		req = get_request_from_ep(ep);
1138*4882a593Smuzhiyun 		irq_ep0_write(ep, req);
1139*4882a593Smuzhiyun 	} else {
1140*4882a593Smuzhiyun 		for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) {
1141*4882a593Smuzhiyun 			check = 1 << pipenum;
1142*4882a593Smuzhiyun 			if ((status & check) && (enb & check)) {
1143*4882a593Smuzhiyun 				r8a66597_write(r8a66597, ~check, BEMPSTS);
1144*4882a593Smuzhiyun 				tmp = control_reg_get(r8a66597, pipenum);
1145*4882a593Smuzhiyun 				if ((tmp & INBUFM) == 0) {
1146*4882a593Smuzhiyun 					disable_irq_empty(r8a66597, pipenum);
1147*4882a593Smuzhiyun 					pipe_irq_disable(r8a66597, pipenum);
1148*4882a593Smuzhiyun 					pipe_stop(r8a66597, pipenum);
1149*4882a593Smuzhiyun 					ep = r8a66597->pipenum2ep[pipenum];
1150*4882a593Smuzhiyun 					req = get_request_from_ep(ep);
1151*4882a593Smuzhiyun 					if (!list_empty(&ep->queue))
1152*4882a593Smuzhiyun 						transfer_complete(ep, req, 0);
1153*4882a593Smuzhiyun 				}
1154*4882a593Smuzhiyun 			}
1155*4882a593Smuzhiyun 		}
1156*4882a593Smuzhiyun 	}
1157*4882a593Smuzhiyun }
1158*4882a593Smuzhiyun 
get_status(struct r8a66597 * r8a66597,struct usb_ctrlrequest * ctrl)1159*4882a593Smuzhiyun static void get_status(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl)
1160*4882a593Smuzhiyun __releases(r8a66597->lock)
1161*4882a593Smuzhiyun __acquires(r8a66597->lock)
1162*4882a593Smuzhiyun {
1163*4882a593Smuzhiyun 	struct r8a66597_ep *ep;
1164*4882a593Smuzhiyun 	u16 pid;
1165*4882a593Smuzhiyun 	u16 status = 0;
1166*4882a593Smuzhiyun 	u16 w_index = le16_to_cpu(ctrl->wIndex);
1167*4882a593Smuzhiyun 
1168*4882a593Smuzhiyun 	switch (ctrl->bRequestType & USB_RECIP_MASK) {
1169*4882a593Smuzhiyun 	case USB_RECIP_DEVICE:
1170*4882a593Smuzhiyun 		status = r8a66597->device_status;
1171*4882a593Smuzhiyun 		break;
1172*4882a593Smuzhiyun 	case USB_RECIP_INTERFACE:
1173*4882a593Smuzhiyun 		status = 0;
1174*4882a593Smuzhiyun 		break;
1175*4882a593Smuzhiyun 	case USB_RECIP_ENDPOINT:
1176*4882a593Smuzhiyun 		ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
1177*4882a593Smuzhiyun 		pid = control_reg_get_pid(r8a66597, ep->pipenum);
1178*4882a593Smuzhiyun 		if (pid == PID_STALL)
1179*4882a593Smuzhiyun 			status = 1 << USB_ENDPOINT_HALT;
1180*4882a593Smuzhiyun 		else
1181*4882a593Smuzhiyun 			status = 0;
1182*4882a593Smuzhiyun 		break;
1183*4882a593Smuzhiyun 	default:
1184*4882a593Smuzhiyun 		pipe_stall(r8a66597, 0);
1185*4882a593Smuzhiyun 		return;		/* exit */
1186*4882a593Smuzhiyun 	}
1187*4882a593Smuzhiyun 
1188*4882a593Smuzhiyun 	r8a66597->ep0_data = cpu_to_le16(status);
1189*4882a593Smuzhiyun 	r8a66597->ep0_req->buf = &r8a66597->ep0_data;
1190*4882a593Smuzhiyun 	r8a66597->ep0_req->length = 2;
1191*4882a593Smuzhiyun 	/* AV: what happens if we get called again before that gets through? */
1192*4882a593Smuzhiyun 	spin_unlock(&r8a66597->lock);
1193*4882a593Smuzhiyun 	r8a66597_queue(r8a66597->gadget.ep0, r8a66597->ep0_req, GFP_ATOMIC);
1194*4882a593Smuzhiyun 	spin_lock(&r8a66597->lock);
1195*4882a593Smuzhiyun }
1196*4882a593Smuzhiyun 
clear_feature(struct r8a66597 * r8a66597,struct usb_ctrlrequest * ctrl)1197*4882a593Smuzhiyun static void clear_feature(struct r8a66597 *r8a66597,
1198*4882a593Smuzhiyun 				struct usb_ctrlrequest *ctrl)
1199*4882a593Smuzhiyun {
1200*4882a593Smuzhiyun 	switch (ctrl->bRequestType & USB_RECIP_MASK) {
1201*4882a593Smuzhiyun 	case USB_RECIP_DEVICE:
1202*4882a593Smuzhiyun 		control_end(r8a66597, 1);
1203*4882a593Smuzhiyun 		break;
1204*4882a593Smuzhiyun 	case USB_RECIP_INTERFACE:
1205*4882a593Smuzhiyun 		control_end(r8a66597, 1);
1206*4882a593Smuzhiyun 		break;
1207*4882a593Smuzhiyun 	case USB_RECIP_ENDPOINT: {
1208*4882a593Smuzhiyun 		struct r8a66597_ep *ep;
1209*4882a593Smuzhiyun 		struct r8a66597_request *req;
1210*4882a593Smuzhiyun 		u16 w_index = le16_to_cpu(ctrl->wIndex);
1211*4882a593Smuzhiyun 
1212*4882a593Smuzhiyun 		ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
1213*4882a593Smuzhiyun 		if (!ep->wedge) {
1214*4882a593Smuzhiyun 			pipe_stop(r8a66597, ep->pipenum);
1215*4882a593Smuzhiyun 			control_reg_sqclr(r8a66597, ep->pipenum);
1216*4882a593Smuzhiyun 			spin_unlock(&r8a66597->lock);
1217*4882a593Smuzhiyun 			usb_ep_clear_halt(&ep->ep);
1218*4882a593Smuzhiyun 			spin_lock(&r8a66597->lock);
1219*4882a593Smuzhiyun 		}
1220*4882a593Smuzhiyun 
1221*4882a593Smuzhiyun 		control_end(r8a66597, 1);
1222*4882a593Smuzhiyun 
1223*4882a593Smuzhiyun 		req = get_request_from_ep(ep);
1224*4882a593Smuzhiyun 		if (ep->busy) {
1225*4882a593Smuzhiyun 			ep->busy = 0;
1226*4882a593Smuzhiyun 			if (list_empty(&ep->queue))
1227*4882a593Smuzhiyun 				break;
1228*4882a593Smuzhiyun 			start_packet(ep, req);
1229*4882a593Smuzhiyun 		} else if (!list_empty(&ep->queue))
1230*4882a593Smuzhiyun 			pipe_start(r8a66597, ep->pipenum);
1231*4882a593Smuzhiyun 		}
1232*4882a593Smuzhiyun 		break;
1233*4882a593Smuzhiyun 	default:
1234*4882a593Smuzhiyun 		pipe_stall(r8a66597, 0);
1235*4882a593Smuzhiyun 		break;
1236*4882a593Smuzhiyun 	}
1237*4882a593Smuzhiyun }
1238*4882a593Smuzhiyun 
set_feature(struct r8a66597 * r8a66597,struct usb_ctrlrequest * ctrl)1239*4882a593Smuzhiyun static void set_feature(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl)
1240*4882a593Smuzhiyun {
1241*4882a593Smuzhiyun 	u16 tmp;
1242*4882a593Smuzhiyun 	int timeout = 3000;
1243*4882a593Smuzhiyun 
1244*4882a593Smuzhiyun 	switch (ctrl->bRequestType & USB_RECIP_MASK) {
1245*4882a593Smuzhiyun 	case USB_RECIP_DEVICE:
1246*4882a593Smuzhiyun 		switch (le16_to_cpu(ctrl->wValue)) {
1247*4882a593Smuzhiyun 		case USB_DEVICE_TEST_MODE:
1248*4882a593Smuzhiyun 			control_end(r8a66597, 1);
1249*4882a593Smuzhiyun 			/* Wait for the completion of status stage */
1250*4882a593Smuzhiyun 			do {
1251*4882a593Smuzhiyun 				tmp = r8a66597_read(r8a66597, INTSTS0) & CTSQ;
1252*4882a593Smuzhiyun 				udelay(1);
1253*4882a593Smuzhiyun 			} while (tmp != CS_IDST && timeout-- > 0);
1254*4882a593Smuzhiyun 
1255*4882a593Smuzhiyun 			if (tmp == CS_IDST)
1256*4882a593Smuzhiyun 				r8a66597_bset(r8a66597,
1257*4882a593Smuzhiyun 					      le16_to_cpu(ctrl->wIndex >> 8),
1258*4882a593Smuzhiyun 					      TESTMODE);
1259*4882a593Smuzhiyun 			break;
1260*4882a593Smuzhiyun 		default:
1261*4882a593Smuzhiyun 			pipe_stall(r8a66597, 0);
1262*4882a593Smuzhiyun 			break;
1263*4882a593Smuzhiyun 		}
1264*4882a593Smuzhiyun 		break;
1265*4882a593Smuzhiyun 	case USB_RECIP_INTERFACE:
1266*4882a593Smuzhiyun 		control_end(r8a66597, 1);
1267*4882a593Smuzhiyun 		break;
1268*4882a593Smuzhiyun 	case USB_RECIP_ENDPOINT: {
1269*4882a593Smuzhiyun 		struct r8a66597_ep *ep;
1270*4882a593Smuzhiyun 		u16 w_index = le16_to_cpu(ctrl->wIndex);
1271*4882a593Smuzhiyun 
1272*4882a593Smuzhiyun 		ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
1273*4882a593Smuzhiyun 		pipe_stall(r8a66597, ep->pipenum);
1274*4882a593Smuzhiyun 
1275*4882a593Smuzhiyun 		control_end(r8a66597, 1);
1276*4882a593Smuzhiyun 		}
1277*4882a593Smuzhiyun 		break;
1278*4882a593Smuzhiyun 	default:
1279*4882a593Smuzhiyun 		pipe_stall(r8a66597, 0);
1280*4882a593Smuzhiyun 		break;
1281*4882a593Smuzhiyun 	}
1282*4882a593Smuzhiyun }
1283*4882a593Smuzhiyun 
1284*4882a593Smuzhiyun /* if return value is true, call class driver's setup() */
setup_packet(struct r8a66597 * r8a66597,struct usb_ctrlrequest * ctrl)1285*4882a593Smuzhiyun static int setup_packet(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl)
1286*4882a593Smuzhiyun {
1287*4882a593Smuzhiyun 	u16 *p = (u16 *)ctrl;
1288*4882a593Smuzhiyun 	unsigned long offset = USBREQ;
1289*4882a593Smuzhiyun 	int i, ret = 0;
1290*4882a593Smuzhiyun 
1291*4882a593Smuzhiyun 	/* read fifo */
1292*4882a593Smuzhiyun 	r8a66597_write(r8a66597, ~VALID, INTSTS0);
1293*4882a593Smuzhiyun 
1294*4882a593Smuzhiyun 	for (i = 0; i < 4; i++)
1295*4882a593Smuzhiyun 		p[i] = r8a66597_read(r8a66597, offset + i*2);
1296*4882a593Smuzhiyun 
1297*4882a593Smuzhiyun 	/* check request */
1298*4882a593Smuzhiyun 	if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
1299*4882a593Smuzhiyun 		switch (ctrl->bRequest) {
1300*4882a593Smuzhiyun 		case USB_REQ_GET_STATUS:
1301*4882a593Smuzhiyun 			get_status(r8a66597, ctrl);
1302*4882a593Smuzhiyun 			break;
1303*4882a593Smuzhiyun 		case USB_REQ_CLEAR_FEATURE:
1304*4882a593Smuzhiyun 			clear_feature(r8a66597, ctrl);
1305*4882a593Smuzhiyun 			break;
1306*4882a593Smuzhiyun 		case USB_REQ_SET_FEATURE:
1307*4882a593Smuzhiyun 			set_feature(r8a66597, ctrl);
1308*4882a593Smuzhiyun 			break;
1309*4882a593Smuzhiyun 		default:
1310*4882a593Smuzhiyun 			ret = 1;
1311*4882a593Smuzhiyun 			break;
1312*4882a593Smuzhiyun 		}
1313*4882a593Smuzhiyun 	} else
1314*4882a593Smuzhiyun 		ret = 1;
1315*4882a593Smuzhiyun 	return ret;
1316*4882a593Smuzhiyun }
1317*4882a593Smuzhiyun 
r8a66597_update_usb_speed(struct r8a66597 * r8a66597)1318*4882a593Smuzhiyun static void r8a66597_update_usb_speed(struct r8a66597 *r8a66597)
1319*4882a593Smuzhiyun {
1320*4882a593Smuzhiyun 	u16 speed = get_usb_speed(r8a66597);
1321*4882a593Smuzhiyun 
1322*4882a593Smuzhiyun 	switch (speed) {
1323*4882a593Smuzhiyun 	case HSMODE:
1324*4882a593Smuzhiyun 		r8a66597->gadget.speed = USB_SPEED_HIGH;
1325*4882a593Smuzhiyun 		break;
1326*4882a593Smuzhiyun 	case FSMODE:
1327*4882a593Smuzhiyun 		r8a66597->gadget.speed = USB_SPEED_FULL;
1328*4882a593Smuzhiyun 		break;
1329*4882a593Smuzhiyun 	default:
1330*4882a593Smuzhiyun 		r8a66597->gadget.speed = USB_SPEED_UNKNOWN;
1331*4882a593Smuzhiyun 		dev_err(r8a66597_to_dev(r8a66597), "USB speed unknown\n");
1332*4882a593Smuzhiyun 	}
1333*4882a593Smuzhiyun }
1334*4882a593Smuzhiyun 
irq_device_state(struct r8a66597 * r8a66597)1335*4882a593Smuzhiyun static void irq_device_state(struct r8a66597 *r8a66597)
1336*4882a593Smuzhiyun {
1337*4882a593Smuzhiyun 	u16 dvsq;
1338*4882a593Smuzhiyun 
1339*4882a593Smuzhiyun 	dvsq = r8a66597_read(r8a66597, INTSTS0) & DVSQ;
1340*4882a593Smuzhiyun 	r8a66597_write(r8a66597, ~DVST, INTSTS0);
1341*4882a593Smuzhiyun 
1342*4882a593Smuzhiyun 	if (dvsq == DS_DFLT) {
1343*4882a593Smuzhiyun 		/* bus reset */
1344*4882a593Smuzhiyun 		spin_unlock(&r8a66597->lock);
1345*4882a593Smuzhiyun 		usb_gadget_udc_reset(&r8a66597->gadget, r8a66597->driver);
1346*4882a593Smuzhiyun 		spin_lock(&r8a66597->lock);
1347*4882a593Smuzhiyun 		r8a66597_update_usb_speed(r8a66597);
1348*4882a593Smuzhiyun 	}
1349*4882a593Smuzhiyun 	if (r8a66597->old_dvsq == DS_CNFG && dvsq != DS_CNFG)
1350*4882a593Smuzhiyun 		r8a66597_update_usb_speed(r8a66597);
1351*4882a593Smuzhiyun 	if ((dvsq == DS_CNFG || dvsq == DS_ADDS)
1352*4882a593Smuzhiyun 			&& r8a66597->gadget.speed == USB_SPEED_UNKNOWN)
1353*4882a593Smuzhiyun 		r8a66597_update_usb_speed(r8a66597);
1354*4882a593Smuzhiyun 
1355*4882a593Smuzhiyun 	r8a66597->old_dvsq = dvsq;
1356*4882a593Smuzhiyun }
1357*4882a593Smuzhiyun 
irq_control_stage(struct r8a66597 * r8a66597)1358*4882a593Smuzhiyun static void irq_control_stage(struct r8a66597 *r8a66597)
1359*4882a593Smuzhiyun __releases(r8a66597->lock)
1360*4882a593Smuzhiyun __acquires(r8a66597->lock)
1361*4882a593Smuzhiyun {
1362*4882a593Smuzhiyun 	struct usb_ctrlrequest ctrl;
1363*4882a593Smuzhiyun 	u16 ctsq;
1364*4882a593Smuzhiyun 
1365*4882a593Smuzhiyun 	ctsq = r8a66597_read(r8a66597, INTSTS0) & CTSQ;
1366*4882a593Smuzhiyun 	r8a66597_write(r8a66597, ~CTRT, INTSTS0);
1367*4882a593Smuzhiyun 
1368*4882a593Smuzhiyun 	switch (ctsq) {
1369*4882a593Smuzhiyun 	case CS_IDST: {
1370*4882a593Smuzhiyun 		struct r8a66597_ep *ep;
1371*4882a593Smuzhiyun 		struct r8a66597_request *req;
1372*4882a593Smuzhiyun 		ep = &r8a66597->ep[0];
1373*4882a593Smuzhiyun 		req = get_request_from_ep(ep);
1374*4882a593Smuzhiyun 		transfer_complete(ep, req, 0);
1375*4882a593Smuzhiyun 		}
1376*4882a593Smuzhiyun 		break;
1377*4882a593Smuzhiyun 
1378*4882a593Smuzhiyun 	case CS_RDDS:
1379*4882a593Smuzhiyun 	case CS_WRDS:
1380*4882a593Smuzhiyun 	case CS_WRND:
1381*4882a593Smuzhiyun 		if (setup_packet(r8a66597, &ctrl)) {
1382*4882a593Smuzhiyun 			spin_unlock(&r8a66597->lock);
1383*4882a593Smuzhiyun 			if (r8a66597->driver->setup(&r8a66597->gadget, &ctrl)
1384*4882a593Smuzhiyun 				< 0)
1385*4882a593Smuzhiyun 				pipe_stall(r8a66597, 0);
1386*4882a593Smuzhiyun 			spin_lock(&r8a66597->lock);
1387*4882a593Smuzhiyun 		}
1388*4882a593Smuzhiyun 		break;
1389*4882a593Smuzhiyun 	case CS_RDSS:
1390*4882a593Smuzhiyun 	case CS_WRSS:
1391*4882a593Smuzhiyun 		control_end(r8a66597, 0);
1392*4882a593Smuzhiyun 		break;
1393*4882a593Smuzhiyun 	default:
1394*4882a593Smuzhiyun 		dev_err(r8a66597_to_dev(r8a66597),
1395*4882a593Smuzhiyun 			"ctrl_stage: unexpect ctsq(%x)\n", ctsq);
1396*4882a593Smuzhiyun 		break;
1397*4882a593Smuzhiyun 	}
1398*4882a593Smuzhiyun }
1399*4882a593Smuzhiyun 
sudmac_finish(struct r8a66597 * r8a66597,struct r8a66597_ep * ep)1400*4882a593Smuzhiyun static void sudmac_finish(struct r8a66597 *r8a66597, struct r8a66597_ep *ep)
1401*4882a593Smuzhiyun {
1402*4882a593Smuzhiyun 	u16 pipenum;
1403*4882a593Smuzhiyun 	struct r8a66597_request *req;
1404*4882a593Smuzhiyun 	u32 len;
1405*4882a593Smuzhiyun 	int i = 0;
1406*4882a593Smuzhiyun 
1407*4882a593Smuzhiyun 	pipenum = ep->pipenum;
1408*4882a593Smuzhiyun 	pipe_change(r8a66597, pipenum);
1409*4882a593Smuzhiyun 
1410*4882a593Smuzhiyun 	while (!(r8a66597_read(r8a66597, ep->fifoctr) & FRDY)) {
1411*4882a593Smuzhiyun 		udelay(1);
1412*4882a593Smuzhiyun 		if (unlikely(i++ >= 10000)) {	/* timeout = 10 msec */
1413*4882a593Smuzhiyun 			dev_err(r8a66597_to_dev(r8a66597),
1414*4882a593Smuzhiyun 				"%s: FRDY was not set (%d)\n",
1415*4882a593Smuzhiyun 				__func__, pipenum);
1416*4882a593Smuzhiyun 			return;
1417*4882a593Smuzhiyun 		}
1418*4882a593Smuzhiyun 	}
1419*4882a593Smuzhiyun 
1420*4882a593Smuzhiyun 	r8a66597_bset(r8a66597, BCLR, ep->fifoctr);
1421*4882a593Smuzhiyun 	req = get_request_from_ep(ep);
1422*4882a593Smuzhiyun 
1423*4882a593Smuzhiyun 	/* prepare parameters */
1424*4882a593Smuzhiyun 	len = r8a66597_sudmac_read(r8a66597, CH0CBC);
1425*4882a593Smuzhiyun 	req->req.actual += len;
1426*4882a593Smuzhiyun 
1427*4882a593Smuzhiyun 	/* clear */
1428*4882a593Smuzhiyun 	r8a66597_sudmac_write(r8a66597, CH0STCLR, DSTSCLR);
1429*4882a593Smuzhiyun 
1430*4882a593Smuzhiyun 	/* check transfer finish */
1431*4882a593Smuzhiyun 	if ((!req->req.zero && (req->req.actual == req->req.length))
1432*4882a593Smuzhiyun 			|| (len % ep->ep.maxpacket)) {
1433*4882a593Smuzhiyun 		if (ep->dma->dir) {
1434*4882a593Smuzhiyun 			disable_irq_ready(r8a66597, pipenum);
1435*4882a593Smuzhiyun 			enable_irq_empty(r8a66597, pipenum);
1436*4882a593Smuzhiyun 		} else {
1437*4882a593Smuzhiyun 			/* Clear the interrupt flag for next transfer */
1438*4882a593Smuzhiyun 			r8a66597_write(r8a66597, ~(1 << pipenum), BRDYSTS);
1439*4882a593Smuzhiyun 			transfer_complete(ep, req, 0);
1440*4882a593Smuzhiyun 		}
1441*4882a593Smuzhiyun 	}
1442*4882a593Smuzhiyun }
1443*4882a593Smuzhiyun 
r8a66597_sudmac_irq(struct r8a66597 * r8a66597)1444*4882a593Smuzhiyun static void r8a66597_sudmac_irq(struct r8a66597 *r8a66597)
1445*4882a593Smuzhiyun {
1446*4882a593Smuzhiyun 	u32 irqsts;
1447*4882a593Smuzhiyun 	struct r8a66597_ep *ep;
1448*4882a593Smuzhiyun 	u16 pipenum;
1449*4882a593Smuzhiyun 
1450*4882a593Smuzhiyun 	irqsts = r8a66597_sudmac_read(r8a66597, DINTSTS);
1451*4882a593Smuzhiyun 	if (irqsts & CH0ENDS) {
1452*4882a593Smuzhiyun 		r8a66597_sudmac_write(r8a66597, CH0ENDC, DINTSTSCLR);
1453*4882a593Smuzhiyun 		pipenum = (r8a66597_read(r8a66597, D0FIFOSEL) & CURPIPE);
1454*4882a593Smuzhiyun 		ep = r8a66597->pipenum2ep[pipenum];
1455*4882a593Smuzhiyun 		sudmac_finish(r8a66597, ep);
1456*4882a593Smuzhiyun 	}
1457*4882a593Smuzhiyun }
1458*4882a593Smuzhiyun 
r8a66597_irq(int irq,void * _r8a66597)1459*4882a593Smuzhiyun static irqreturn_t r8a66597_irq(int irq, void *_r8a66597)
1460*4882a593Smuzhiyun {
1461*4882a593Smuzhiyun 	struct r8a66597 *r8a66597 = _r8a66597;
1462*4882a593Smuzhiyun 	u16 intsts0;
1463*4882a593Smuzhiyun 	u16 intenb0;
1464*4882a593Smuzhiyun 	u16 savepipe;
1465*4882a593Smuzhiyun 	u16 mask0;
1466*4882a593Smuzhiyun 
1467*4882a593Smuzhiyun 	spin_lock(&r8a66597->lock);
1468*4882a593Smuzhiyun 
1469*4882a593Smuzhiyun 	if (r8a66597_is_sudmac(r8a66597))
1470*4882a593Smuzhiyun 		r8a66597_sudmac_irq(r8a66597);
1471*4882a593Smuzhiyun 
1472*4882a593Smuzhiyun 	intsts0 = r8a66597_read(r8a66597, INTSTS0);
1473*4882a593Smuzhiyun 	intenb0 = r8a66597_read(r8a66597, INTENB0);
1474*4882a593Smuzhiyun 
1475*4882a593Smuzhiyun 	savepipe = r8a66597_read(r8a66597, CFIFOSEL);
1476*4882a593Smuzhiyun 
1477*4882a593Smuzhiyun 	mask0 = intsts0 & intenb0;
1478*4882a593Smuzhiyun 	if (mask0) {
1479*4882a593Smuzhiyun 		u16 brdysts = r8a66597_read(r8a66597, BRDYSTS);
1480*4882a593Smuzhiyun 		u16 bempsts = r8a66597_read(r8a66597, BEMPSTS);
1481*4882a593Smuzhiyun 		u16 brdyenb = r8a66597_read(r8a66597, BRDYENB);
1482*4882a593Smuzhiyun 		u16 bempenb = r8a66597_read(r8a66597, BEMPENB);
1483*4882a593Smuzhiyun 
1484*4882a593Smuzhiyun 		if (mask0 & VBINT) {
1485*4882a593Smuzhiyun 			r8a66597_write(r8a66597,  0xffff & ~VBINT,
1486*4882a593Smuzhiyun 					INTSTS0);
1487*4882a593Smuzhiyun 			r8a66597_start_xclock(r8a66597);
1488*4882a593Smuzhiyun 
1489*4882a593Smuzhiyun 			/* start vbus sampling */
1490*4882a593Smuzhiyun 			r8a66597->old_vbus = r8a66597_read(r8a66597, INTSTS0)
1491*4882a593Smuzhiyun 					& VBSTS;
1492*4882a593Smuzhiyun 			r8a66597->scount = R8A66597_MAX_SAMPLING;
1493*4882a593Smuzhiyun 
1494*4882a593Smuzhiyun 			mod_timer(&r8a66597->timer,
1495*4882a593Smuzhiyun 					jiffies + msecs_to_jiffies(50));
1496*4882a593Smuzhiyun 		}
1497*4882a593Smuzhiyun 		if (intsts0 & DVSQ)
1498*4882a593Smuzhiyun 			irq_device_state(r8a66597);
1499*4882a593Smuzhiyun 
1500*4882a593Smuzhiyun 		if ((intsts0 & BRDY) && (intenb0 & BRDYE)
1501*4882a593Smuzhiyun 				&& (brdysts & brdyenb))
1502*4882a593Smuzhiyun 			irq_pipe_ready(r8a66597, brdysts, brdyenb);
1503*4882a593Smuzhiyun 		if ((intsts0 & BEMP) && (intenb0 & BEMPE)
1504*4882a593Smuzhiyun 				&& (bempsts & bempenb))
1505*4882a593Smuzhiyun 			irq_pipe_empty(r8a66597, bempsts, bempenb);
1506*4882a593Smuzhiyun 
1507*4882a593Smuzhiyun 		if (intsts0 & CTRT)
1508*4882a593Smuzhiyun 			irq_control_stage(r8a66597);
1509*4882a593Smuzhiyun 	}
1510*4882a593Smuzhiyun 
1511*4882a593Smuzhiyun 	r8a66597_write(r8a66597, savepipe, CFIFOSEL);
1512*4882a593Smuzhiyun 
1513*4882a593Smuzhiyun 	spin_unlock(&r8a66597->lock);
1514*4882a593Smuzhiyun 	return IRQ_HANDLED;
1515*4882a593Smuzhiyun }
1516*4882a593Smuzhiyun 
r8a66597_timer(struct timer_list * t)1517*4882a593Smuzhiyun static void r8a66597_timer(struct timer_list *t)
1518*4882a593Smuzhiyun {
1519*4882a593Smuzhiyun 	struct r8a66597 *r8a66597 = from_timer(r8a66597, t, timer);
1520*4882a593Smuzhiyun 	unsigned long flags;
1521*4882a593Smuzhiyun 	u16 tmp;
1522*4882a593Smuzhiyun 
1523*4882a593Smuzhiyun 	spin_lock_irqsave(&r8a66597->lock, flags);
1524*4882a593Smuzhiyun 	tmp = r8a66597_read(r8a66597, SYSCFG0);
1525*4882a593Smuzhiyun 	if (r8a66597->scount > 0) {
1526*4882a593Smuzhiyun 		tmp = r8a66597_read(r8a66597, INTSTS0) & VBSTS;
1527*4882a593Smuzhiyun 		if (tmp == r8a66597->old_vbus) {
1528*4882a593Smuzhiyun 			r8a66597->scount--;
1529*4882a593Smuzhiyun 			if (r8a66597->scount == 0) {
1530*4882a593Smuzhiyun 				if (tmp == VBSTS)
1531*4882a593Smuzhiyun 					r8a66597_usb_connect(r8a66597);
1532*4882a593Smuzhiyun 				else
1533*4882a593Smuzhiyun 					r8a66597_usb_disconnect(r8a66597);
1534*4882a593Smuzhiyun 			} else {
1535*4882a593Smuzhiyun 				mod_timer(&r8a66597->timer,
1536*4882a593Smuzhiyun 					jiffies + msecs_to_jiffies(50));
1537*4882a593Smuzhiyun 			}
1538*4882a593Smuzhiyun 		} else {
1539*4882a593Smuzhiyun 			r8a66597->scount = R8A66597_MAX_SAMPLING;
1540*4882a593Smuzhiyun 			r8a66597->old_vbus = tmp;
1541*4882a593Smuzhiyun 			mod_timer(&r8a66597->timer,
1542*4882a593Smuzhiyun 					jiffies + msecs_to_jiffies(50));
1543*4882a593Smuzhiyun 		}
1544*4882a593Smuzhiyun 	}
1545*4882a593Smuzhiyun 	spin_unlock_irqrestore(&r8a66597->lock, flags);
1546*4882a593Smuzhiyun }
1547*4882a593Smuzhiyun 
1548*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
r8a66597_enable(struct usb_ep * _ep,const struct usb_endpoint_descriptor * desc)1549*4882a593Smuzhiyun static int r8a66597_enable(struct usb_ep *_ep,
1550*4882a593Smuzhiyun 			 const struct usb_endpoint_descriptor *desc)
1551*4882a593Smuzhiyun {
1552*4882a593Smuzhiyun 	struct r8a66597_ep *ep;
1553*4882a593Smuzhiyun 
1554*4882a593Smuzhiyun 	ep = container_of(_ep, struct r8a66597_ep, ep);
1555*4882a593Smuzhiyun 	return alloc_pipe_config(ep, desc);
1556*4882a593Smuzhiyun }
1557*4882a593Smuzhiyun 
r8a66597_disable(struct usb_ep * _ep)1558*4882a593Smuzhiyun static int r8a66597_disable(struct usb_ep *_ep)
1559*4882a593Smuzhiyun {
1560*4882a593Smuzhiyun 	struct r8a66597_ep *ep;
1561*4882a593Smuzhiyun 	struct r8a66597_request *req;
1562*4882a593Smuzhiyun 	unsigned long flags;
1563*4882a593Smuzhiyun 
1564*4882a593Smuzhiyun 	ep = container_of(_ep, struct r8a66597_ep, ep);
1565*4882a593Smuzhiyun 	BUG_ON(!ep);
1566*4882a593Smuzhiyun 
1567*4882a593Smuzhiyun 	while (!list_empty(&ep->queue)) {
1568*4882a593Smuzhiyun 		req = get_request_from_ep(ep);
1569*4882a593Smuzhiyun 		spin_lock_irqsave(&ep->r8a66597->lock, flags);
1570*4882a593Smuzhiyun 		transfer_complete(ep, req, -ECONNRESET);
1571*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
1572*4882a593Smuzhiyun 	}
1573*4882a593Smuzhiyun 
1574*4882a593Smuzhiyun 	pipe_irq_disable(ep->r8a66597, ep->pipenum);
1575*4882a593Smuzhiyun 	return free_pipe_config(ep);
1576*4882a593Smuzhiyun }
1577*4882a593Smuzhiyun 
r8a66597_alloc_request(struct usb_ep * _ep,gfp_t gfp_flags)1578*4882a593Smuzhiyun static struct usb_request *r8a66597_alloc_request(struct usb_ep *_ep,
1579*4882a593Smuzhiyun 						gfp_t gfp_flags)
1580*4882a593Smuzhiyun {
1581*4882a593Smuzhiyun 	struct r8a66597_request *req;
1582*4882a593Smuzhiyun 
1583*4882a593Smuzhiyun 	req = kzalloc(sizeof(struct r8a66597_request), gfp_flags);
1584*4882a593Smuzhiyun 	if (!req)
1585*4882a593Smuzhiyun 		return NULL;
1586*4882a593Smuzhiyun 
1587*4882a593Smuzhiyun 	INIT_LIST_HEAD(&req->queue);
1588*4882a593Smuzhiyun 
1589*4882a593Smuzhiyun 	return &req->req;
1590*4882a593Smuzhiyun }
1591*4882a593Smuzhiyun 
r8a66597_free_request(struct usb_ep * _ep,struct usb_request * _req)1592*4882a593Smuzhiyun static void r8a66597_free_request(struct usb_ep *_ep, struct usb_request *_req)
1593*4882a593Smuzhiyun {
1594*4882a593Smuzhiyun 	struct r8a66597_request *req;
1595*4882a593Smuzhiyun 
1596*4882a593Smuzhiyun 	req = container_of(_req, struct r8a66597_request, req);
1597*4882a593Smuzhiyun 	kfree(req);
1598*4882a593Smuzhiyun }
1599*4882a593Smuzhiyun 
r8a66597_queue(struct usb_ep * _ep,struct usb_request * _req,gfp_t gfp_flags)1600*4882a593Smuzhiyun static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req,
1601*4882a593Smuzhiyun 			gfp_t gfp_flags)
1602*4882a593Smuzhiyun {
1603*4882a593Smuzhiyun 	struct r8a66597_ep *ep;
1604*4882a593Smuzhiyun 	struct r8a66597_request *req;
1605*4882a593Smuzhiyun 	unsigned long flags;
1606*4882a593Smuzhiyun 	int request = 0;
1607*4882a593Smuzhiyun 
1608*4882a593Smuzhiyun 	ep = container_of(_ep, struct r8a66597_ep, ep);
1609*4882a593Smuzhiyun 	req = container_of(_req, struct r8a66597_request, req);
1610*4882a593Smuzhiyun 
1611*4882a593Smuzhiyun 	if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN)
1612*4882a593Smuzhiyun 		return -ESHUTDOWN;
1613*4882a593Smuzhiyun 
1614*4882a593Smuzhiyun 	spin_lock_irqsave(&ep->r8a66597->lock, flags);
1615*4882a593Smuzhiyun 
1616*4882a593Smuzhiyun 	if (list_empty(&ep->queue))
1617*4882a593Smuzhiyun 		request = 1;
1618*4882a593Smuzhiyun 
1619*4882a593Smuzhiyun 	list_add_tail(&req->queue, &ep->queue);
1620*4882a593Smuzhiyun 	req->req.actual = 0;
1621*4882a593Smuzhiyun 	req->req.status = -EINPROGRESS;
1622*4882a593Smuzhiyun 
1623*4882a593Smuzhiyun 	if (ep->ep.desc == NULL)	/* control */
1624*4882a593Smuzhiyun 		start_ep0(ep, req);
1625*4882a593Smuzhiyun 	else {
1626*4882a593Smuzhiyun 		if (request && !ep->busy)
1627*4882a593Smuzhiyun 			start_packet(ep, req);
1628*4882a593Smuzhiyun 	}
1629*4882a593Smuzhiyun 
1630*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
1631*4882a593Smuzhiyun 
1632*4882a593Smuzhiyun 	return 0;
1633*4882a593Smuzhiyun }
1634*4882a593Smuzhiyun 
r8a66597_dequeue(struct usb_ep * _ep,struct usb_request * _req)1635*4882a593Smuzhiyun static int r8a66597_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1636*4882a593Smuzhiyun {
1637*4882a593Smuzhiyun 	struct r8a66597_ep *ep;
1638*4882a593Smuzhiyun 	struct r8a66597_request *req;
1639*4882a593Smuzhiyun 	unsigned long flags;
1640*4882a593Smuzhiyun 
1641*4882a593Smuzhiyun 	ep = container_of(_ep, struct r8a66597_ep, ep);
1642*4882a593Smuzhiyun 	req = container_of(_req, struct r8a66597_request, req);
1643*4882a593Smuzhiyun 
1644*4882a593Smuzhiyun 	spin_lock_irqsave(&ep->r8a66597->lock, flags);
1645*4882a593Smuzhiyun 	if (!list_empty(&ep->queue))
1646*4882a593Smuzhiyun 		transfer_complete(ep, req, -ECONNRESET);
1647*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
1648*4882a593Smuzhiyun 
1649*4882a593Smuzhiyun 	return 0;
1650*4882a593Smuzhiyun }
1651*4882a593Smuzhiyun 
r8a66597_set_halt(struct usb_ep * _ep,int value)1652*4882a593Smuzhiyun static int r8a66597_set_halt(struct usb_ep *_ep, int value)
1653*4882a593Smuzhiyun {
1654*4882a593Smuzhiyun 	struct r8a66597_ep *ep = container_of(_ep, struct r8a66597_ep, ep);
1655*4882a593Smuzhiyun 	unsigned long flags;
1656*4882a593Smuzhiyun 	int ret = 0;
1657*4882a593Smuzhiyun 
1658*4882a593Smuzhiyun 	spin_lock_irqsave(&ep->r8a66597->lock, flags);
1659*4882a593Smuzhiyun 	if (!list_empty(&ep->queue)) {
1660*4882a593Smuzhiyun 		ret = -EAGAIN;
1661*4882a593Smuzhiyun 	} else if (value) {
1662*4882a593Smuzhiyun 		ep->busy = 1;
1663*4882a593Smuzhiyun 		pipe_stall(ep->r8a66597, ep->pipenum);
1664*4882a593Smuzhiyun 	} else {
1665*4882a593Smuzhiyun 		ep->busy = 0;
1666*4882a593Smuzhiyun 		ep->wedge = 0;
1667*4882a593Smuzhiyun 		pipe_stop(ep->r8a66597, ep->pipenum);
1668*4882a593Smuzhiyun 	}
1669*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
1670*4882a593Smuzhiyun 	return ret;
1671*4882a593Smuzhiyun }
1672*4882a593Smuzhiyun 
r8a66597_set_wedge(struct usb_ep * _ep)1673*4882a593Smuzhiyun static int r8a66597_set_wedge(struct usb_ep *_ep)
1674*4882a593Smuzhiyun {
1675*4882a593Smuzhiyun 	struct r8a66597_ep *ep;
1676*4882a593Smuzhiyun 	unsigned long flags;
1677*4882a593Smuzhiyun 
1678*4882a593Smuzhiyun 	ep = container_of(_ep, struct r8a66597_ep, ep);
1679*4882a593Smuzhiyun 
1680*4882a593Smuzhiyun 	if (!ep || !ep->ep.desc)
1681*4882a593Smuzhiyun 		return -EINVAL;
1682*4882a593Smuzhiyun 
1683*4882a593Smuzhiyun 	spin_lock_irqsave(&ep->r8a66597->lock, flags);
1684*4882a593Smuzhiyun 	ep->wedge = 1;
1685*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
1686*4882a593Smuzhiyun 
1687*4882a593Smuzhiyun 	return usb_ep_set_halt(_ep);
1688*4882a593Smuzhiyun }
1689*4882a593Smuzhiyun 
r8a66597_fifo_flush(struct usb_ep * _ep)1690*4882a593Smuzhiyun static void r8a66597_fifo_flush(struct usb_ep *_ep)
1691*4882a593Smuzhiyun {
1692*4882a593Smuzhiyun 	struct r8a66597_ep *ep;
1693*4882a593Smuzhiyun 	unsigned long flags;
1694*4882a593Smuzhiyun 
1695*4882a593Smuzhiyun 	ep = container_of(_ep, struct r8a66597_ep, ep);
1696*4882a593Smuzhiyun 	spin_lock_irqsave(&ep->r8a66597->lock, flags);
1697*4882a593Smuzhiyun 	if (list_empty(&ep->queue) && !ep->busy) {
1698*4882a593Smuzhiyun 		pipe_stop(ep->r8a66597, ep->pipenum);
1699*4882a593Smuzhiyun 		r8a66597_bclr(ep->r8a66597, BCLR, ep->fifoctr);
1700*4882a593Smuzhiyun 		r8a66597_write(ep->r8a66597, ACLRM, ep->pipectr);
1701*4882a593Smuzhiyun 		r8a66597_write(ep->r8a66597, 0, ep->pipectr);
1702*4882a593Smuzhiyun 	}
1703*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
1704*4882a593Smuzhiyun }
1705*4882a593Smuzhiyun 
1706*4882a593Smuzhiyun static const struct usb_ep_ops r8a66597_ep_ops = {
1707*4882a593Smuzhiyun 	.enable		= r8a66597_enable,
1708*4882a593Smuzhiyun 	.disable	= r8a66597_disable,
1709*4882a593Smuzhiyun 
1710*4882a593Smuzhiyun 	.alloc_request	= r8a66597_alloc_request,
1711*4882a593Smuzhiyun 	.free_request	= r8a66597_free_request,
1712*4882a593Smuzhiyun 
1713*4882a593Smuzhiyun 	.queue		= r8a66597_queue,
1714*4882a593Smuzhiyun 	.dequeue	= r8a66597_dequeue,
1715*4882a593Smuzhiyun 
1716*4882a593Smuzhiyun 	.set_halt	= r8a66597_set_halt,
1717*4882a593Smuzhiyun 	.set_wedge	= r8a66597_set_wedge,
1718*4882a593Smuzhiyun 	.fifo_flush	= r8a66597_fifo_flush,
1719*4882a593Smuzhiyun };
1720*4882a593Smuzhiyun 
1721*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
r8a66597_start(struct usb_gadget * gadget,struct usb_gadget_driver * driver)1722*4882a593Smuzhiyun static int r8a66597_start(struct usb_gadget *gadget,
1723*4882a593Smuzhiyun 		struct usb_gadget_driver *driver)
1724*4882a593Smuzhiyun {
1725*4882a593Smuzhiyun 	struct r8a66597 *r8a66597 = gadget_to_r8a66597(gadget);
1726*4882a593Smuzhiyun 
1727*4882a593Smuzhiyun 	if (!driver
1728*4882a593Smuzhiyun 			|| driver->max_speed < USB_SPEED_HIGH
1729*4882a593Smuzhiyun 			|| !driver->setup)
1730*4882a593Smuzhiyun 		return -EINVAL;
1731*4882a593Smuzhiyun 	if (!r8a66597)
1732*4882a593Smuzhiyun 		return -ENODEV;
1733*4882a593Smuzhiyun 
1734*4882a593Smuzhiyun 	/* hook up the driver */
1735*4882a593Smuzhiyun 	r8a66597->driver = driver;
1736*4882a593Smuzhiyun 
1737*4882a593Smuzhiyun 	init_controller(r8a66597);
1738*4882a593Smuzhiyun 	r8a66597_bset(r8a66597, VBSE, INTENB0);
1739*4882a593Smuzhiyun 	if (r8a66597_read(r8a66597, INTSTS0) & VBSTS) {
1740*4882a593Smuzhiyun 		r8a66597_start_xclock(r8a66597);
1741*4882a593Smuzhiyun 		/* start vbus sampling */
1742*4882a593Smuzhiyun 		r8a66597->old_vbus = r8a66597_read(r8a66597,
1743*4882a593Smuzhiyun 					 INTSTS0) & VBSTS;
1744*4882a593Smuzhiyun 		r8a66597->scount = R8A66597_MAX_SAMPLING;
1745*4882a593Smuzhiyun 		mod_timer(&r8a66597->timer, jiffies + msecs_to_jiffies(50));
1746*4882a593Smuzhiyun 	}
1747*4882a593Smuzhiyun 
1748*4882a593Smuzhiyun 	return 0;
1749*4882a593Smuzhiyun }
1750*4882a593Smuzhiyun 
r8a66597_stop(struct usb_gadget * gadget)1751*4882a593Smuzhiyun static int r8a66597_stop(struct usb_gadget *gadget)
1752*4882a593Smuzhiyun {
1753*4882a593Smuzhiyun 	struct r8a66597 *r8a66597 = gadget_to_r8a66597(gadget);
1754*4882a593Smuzhiyun 	unsigned long flags;
1755*4882a593Smuzhiyun 
1756*4882a593Smuzhiyun 	spin_lock_irqsave(&r8a66597->lock, flags);
1757*4882a593Smuzhiyun 	r8a66597_bclr(r8a66597, VBSE, INTENB0);
1758*4882a593Smuzhiyun 	disable_controller(r8a66597);
1759*4882a593Smuzhiyun 	spin_unlock_irqrestore(&r8a66597->lock, flags);
1760*4882a593Smuzhiyun 
1761*4882a593Smuzhiyun 	r8a66597->driver = NULL;
1762*4882a593Smuzhiyun 	return 0;
1763*4882a593Smuzhiyun }
1764*4882a593Smuzhiyun 
1765*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
r8a66597_get_frame(struct usb_gadget * _gadget)1766*4882a593Smuzhiyun static int r8a66597_get_frame(struct usb_gadget *_gadget)
1767*4882a593Smuzhiyun {
1768*4882a593Smuzhiyun 	struct r8a66597 *r8a66597 = gadget_to_r8a66597(_gadget);
1769*4882a593Smuzhiyun 	return r8a66597_read(r8a66597, FRMNUM) & 0x03FF;
1770*4882a593Smuzhiyun }
1771*4882a593Smuzhiyun 
r8a66597_pullup(struct usb_gadget * gadget,int is_on)1772*4882a593Smuzhiyun static int r8a66597_pullup(struct usb_gadget *gadget, int is_on)
1773*4882a593Smuzhiyun {
1774*4882a593Smuzhiyun 	struct r8a66597 *r8a66597 = gadget_to_r8a66597(gadget);
1775*4882a593Smuzhiyun 	unsigned long flags;
1776*4882a593Smuzhiyun 
1777*4882a593Smuzhiyun 	spin_lock_irqsave(&r8a66597->lock, flags);
1778*4882a593Smuzhiyun 	if (is_on)
1779*4882a593Smuzhiyun 		r8a66597_bset(r8a66597, DPRPU, SYSCFG0);
1780*4882a593Smuzhiyun 	else
1781*4882a593Smuzhiyun 		r8a66597_bclr(r8a66597, DPRPU, SYSCFG0);
1782*4882a593Smuzhiyun 	spin_unlock_irqrestore(&r8a66597->lock, flags);
1783*4882a593Smuzhiyun 
1784*4882a593Smuzhiyun 	return 0;
1785*4882a593Smuzhiyun }
1786*4882a593Smuzhiyun 
r8a66597_set_selfpowered(struct usb_gadget * gadget,int is_self)1787*4882a593Smuzhiyun static int r8a66597_set_selfpowered(struct usb_gadget *gadget, int is_self)
1788*4882a593Smuzhiyun {
1789*4882a593Smuzhiyun 	struct r8a66597 *r8a66597 = gadget_to_r8a66597(gadget);
1790*4882a593Smuzhiyun 
1791*4882a593Smuzhiyun 	gadget->is_selfpowered = (is_self != 0);
1792*4882a593Smuzhiyun 	if (is_self)
1793*4882a593Smuzhiyun 		r8a66597->device_status |= 1 << USB_DEVICE_SELF_POWERED;
1794*4882a593Smuzhiyun 	else
1795*4882a593Smuzhiyun 		r8a66597->device_status &= ~(1 << USB_DEVICE_SELF_POWERED);
1796*4882a593Smuzhiyun 
1797*4882a593Smuzhiyun 	return 0;
1798*4882a593Smuzhiyun }
1799*4882a593Smuzhiyun 
1800*4882a593Smuzhiyun static const struct usb_gadget_ops r8a66597_gadget_ops = {
1801*4882a593Smuzhiyun 	.get_frame		= r8a66597_get_frame,
1802*4882a593Smuzhiyun 	.udc_start		= r8a66597_start,
1803*4882a593Smuzhiyun 	.udc_stop		= r8a66597_stop,
1804*4882a593Smuzhiyun 	.pullup			= r8a66597_pullup,
1805*4882a593Smuzhiyun 	.set_selfpowered	= r8a66597_set_selfpowered,
1806*4882a593Smuzhiyun };
1807*4882a593Smuzhiyun 
r8a66597_remove(struct platform_device * pdev)1808*4882a593Smuzhiyun static int r8a66597_remove(struct platform_device *pdev)
1809*4882a593Smuzhiyun {
1810*4882a593Smuzhiyun 	struct r8a66597		*r8a66597 = platform_get_drvdata(pdev);
1811*4882a593Smuzhiyun 
1812*4882a593Smuzhiyun 	usb_del_gadget_udc(&r8a66597->gadget);
1813*4882a593Smuzhiyun 	del_timer_sync(&r8a66597->timer);
1814*4882a593Smuzhiyun 	r8a66597_free_request(&r8a66597->ep[0].ep, r8a66597->ep0_req);
1815*4882a593Smuzhiyun 
1816*4882a593Smuzhiyun 	if (r8a66597->pdata->on_chip) {
1817*4882a593Smuzhiyun 		clk_disable_unprepare(r8a66597->clk);
1818*4882a593Smuzhiyun 	}
1819*4882a593Smuzhiyun 
1820*4882a593Smuzhiyun 	return 0;
1821*4882a593Smuzhiyun }
1822*4882a593Smuzhiyun 
nop_completion(struct usb_ep * ep,struct usb_request * r)1823*4882a593Smuzhiyun static void nop_completion(struct usb_ep *ep, struct usb_request *r)
1824*4882a593Smuzhiyun {
1825*4882a593Smuzhiyun }
1826*4882a593Smuzhiyun 
r8a66597_sudmac_ioremap(struct r8a66597 * r8a66597,struct platform_device * pdev)1827*4882a593Smuzhiyun static int r8a66597_sudmac_ioremap(struct r8a66597 *r8a66597,
1828*4882a593Smuzhiyun 					  struct platform_device *pdev)
1829*4882a593Smuzhiyun {
1830*4882a593Smuzhiyun 	r8a66597->sudmac_reg =
1831*4882a593Smuzhiyun 		devm_platform_ioremap_resource_byname(pdev, "sudmac");
1832*4882a593Smuzhiyun 	return PTR_ERR_OR_ZERO(r8a66597->sudmac_reg);
1833*4882a593Smuzhiyun }
1834*4882a593Smuzhiyun 
r8a66597_probe(struct platform_device * pdev)1835*4882a593Smuzhiyun static int r8a66597_probe(struct platform_device *pdev)
1836*4882a593Smuzhiyun {
1837*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
1838*4882a593Smuzhiyun 	char clk_name[8];
1839*4882a593Smuzhiyun 	struct resource *ires;
1840*4882a593Smuzhiyun 	int irq;
1841*4882a593Smuzhiyun 	void __iomem *reg = NULL;
1842*4882a593Smuzhiyun 	struct r8a66597 *r8a66597 = NULL;
1843*4882a593Smuzhiyun 	int ret = 0;
1844*4882a593Smuzhiyun 	int i;
1845*4882a593Smuzhiyun 	unsigned long irq_trigger;
1846*4882a593Smuzhiyun 
1847*4882a593Smuzhiyun 	reg = devm_platform_ioremap_resource(pdev, 0);
1848*4882a593Smuzhiyun 	if (IS_ERR(reg))
1849*4882a593Smuzhiyun 		return PTR_ERR(reg);
1850*4882a593Smuzhiyun 
1851*4882a593Smuzhiyun 	ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1852*4882a593Smuzhiyun 	if (!ires)
1853*4882a593Smuzhiyun 		return -EINVAL;
1854*4882a593Smuzhiyun 	irq = ires->start;
1855*4882a593Smuzhiyun 	irq_trigger = ires->flags & IRQF_TRIGGER_MASK;
1856*4882a593Smuzhiyun 
1857*4882a593Smuzhiyun 	if (irq < 0) {
1858*4882a593Smuzhiyun 		dev_err(dev, "platform_get_irq error.\n");
1859*4882a593Smuzhiyun 		return -ENODEV;
1860*4882a593Smuzhiyun 	}
1861*4882a593Smuzhiyun 
1862*4882a593Smuzhiyun 	/* initialize ucd */
1863*4882a593Smuzhiyun 	r8a66597 = devm_kzalloc(dev, sizeof(struct r8a66597), GFP_KERNEL);
1864*4882a593Smuzhiyun 	if (r8a66597 == NULL)
1865*4882a593Smuzhiyun 		return -ENOMEM;
1866*4882a593Smuzhiyun 
1867*4882a593Smuzhiyun 	spin_lock_init(&r8a66597->lock);
1868*4882a593Smuzhiyun 	platform_set_drvdata(pdev, r8a66597);
1869*4882a593Smuzhiyun 	r8a66597->pdata = dev_get_platdata(dev);
1870*4882a593Smuzhiyun 	r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW;
1871*4882a593Smuzhiyun 
1872*4882a593Smuzhiyun 	r8a66597->gadget.ops = &r8a66597_gadget_ops;
1873*4882a593Smuzhiyun 	r8a66597->gadget.max_speed = USB_SPEED_HIGH;
1874*4882a593Smuzhiyun 	r8a66597->gadget.name = udc_name;
1875*4882a593Smuzhiyun 
1876*4882a593Smuzhiyun 	timer_setup(&r8a66597->timer, r8a66597_timer, 0);
1877*4882a593Smuzhiyun 	r8a66597->reg = reg;
1878*4882a593Smuzhiyun 
1879*4882a593Smuzhiyun 	if (r8a66597->pdata->on_chip) {
1880*4882a593Smuzhiyun 		snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id);
1881*4882a593Smuzhiyun 		r8a66597->clk = devm_clk_get(dev, clk_name);
1882*4882a593Smuzhiyun 		if (IS_ERR(r8a66597->clk)) {
1883*4882a593Smuzhiyun 			dev_err(dev, "cannot get clock \"%s\"\n", clk_name);
1884*4882a593Smuzhiyun 			return PTR_ERR(r8a66597->clk);
1885*4882a593Smuzhiyun 		}
1886*4882a593Smuzhiyun 		clk_prepare_enable(r8a66597->clk);
1887*4882a593Smuzhiyun 	}
1888*4882a593Smuzhiyun 
1889*4882a593Smuzhiyun 	if (r8a66597->pdata->sudmac) {
1890*4882a593Smuzhiyun 		ret = r8a66597_sudmac_ioremap(r8a66597, pdev);
1891*4882a593Smuzhiyun 		if (ret < 0)
1892*4882a593Smuzhiyun 			goto clean_up2;
1893*4882a593Smuzhiyun 	}
1894*4882a593Smuzhiyun 
1895*4882a593Smuzhiyun 	disable_controller(r8a66597); /* make sure controller is disabled */
1896*4882a593Smuzhiyun 
1897*4882a593Smuzhiyun 	ret = devm_request_irq(dev, irq, r8a66597_irq, IRQF_SHARED,
1898*4882a593Smuzhiyun 			       udc_name, r8a66597);
1899*4882a593Smuzhiyun 	if (ret < 0) {
1900*4882a593Smuzhiyun 		dev_err(dev, "request_irq error (%d)\n", ret);
1901*4882a593Smuzhiyun 		goto clean_up2;
1902*4882a593Smuzhiyun 	}
1903*4882a593Smuzhiyun 
1904*4882a593Smuzhiyun 	INIT_LIST_HEAD(&r8a66597->gadget.ep_list);
1905*4882a593Smuzhiyun 	r8a66597->gadget.ep0 = &r8a66597->ep[0].ep;
1906*4882a593Smuzhiyun 	INIT_LIST_HEAD(&r8a66597->gadget.ep0->ep_list);
1907*4882a593Smuzhiyun 	for (i = 0; i < R8A66597_MAX_NUM_PIPE; i++) {
1908*4882a593Smuzhiyun 		struct r8a66597_ep *ep = &r8a66597->ep[i];
1909*4882a593Smuzhiyun 
1910*4882a593Smuzhiyun 		if (i != 0) {
1911*4882a593Smuzhiyun 			INIT_LIST_HEAD(&r8a66597->ep[i].ep.ep_list);
1912*4882a593Smuzhiyun 			list_add_tail(&r8a66597->ep[i].ep.ep_list,
1913*4882a593Smuzhiyun 					&r8a66597->gadget.ep_list);
1914*4882a593Smuzhiyun 		}
1915*4882a593Smuzhiyun 		ep->r8a66597 = r8a66597;
1916*4882a593Smuzhiyun 		INIT_LIST_HEAD(&ep->queue);
1917*4882a593Smuzhiyun 		ep->ep.name = r8a66597_ep_name[i];
1918*4882a593Smuzhiyun 		ep->ep.ops = &r8a66597_ep_ops;
1919*4882a593Smuzhiyun 		usb_ep_set_maxpacket_limit(&ep->ep, 512);
1920*4882a593Smuzhiyun 
1921*4882a593Smuzhiyun 		if (i == 0) {
1922*4882a593Smuzhiyun 			ep->ep.caps.type_control = true;
1923*4882a593Smuzhiyun 		} else {
1924*4882a593Smuzhiyun 			ep->ep.caps.type_iso = true;
1925*4882a593Smuzhiyun 			ep->ep.caps.type_bulk = true;
1926*4882a593Smuzhiyun 			ep->ep.caps.type_int = true;
1927*4882a593Smuzhiyun 		}
1928*4882a593Smuzhiyun 		ep->ep.caps.dir_in = true;
1929*4882a593Smuzhiyun 		ep->ep.caps.dir_out = true;
1930*4882a593Smuzhiyun 	}
1931*4882a593Smuzhiyun 	usb_ep_set_maxpacket_limit(&r8a66597->ep[0].ep, 64);
1932*4882a593Smuzhiyun 	r8a66597->ep[0].pipenum = 0;
1933*4882a593Smuzhiyun 	r8a66597->ep[0].fifoaddr = CFIFO;
1934*4882a593Smuzhiyun 	r8a66597->ep[0].fifosel = CFIFOSEL;
1935*4882a593Smuzhiyun 	r8a66597->ep[0].fifoctr = CFIFOCTR;
1936*4882a593Smuzhiyun 	r8a66597->ep[0].pipectr = get_pipectr_addr(0);
1937*4882a593Smuzhiyun 	r8a66597->pipenum2ep[0] = &r8a66597->ep[0];
1938*4882a593Smuzhiyun 	r8a66597->epaddr2ep[0] = &r8a66597->ep[0];
1939*4882a593Smuzhiyun 
1940*4882a593Smuzhiyun 	r8a66597->ep0_req = r8a66597_alloc_request(&r8a66597->ep[0].ep,
1941*4882a593Smuzhiyun 							GFP_KERNEL);
1942*4882a593Smuzhiyun 	if (r8a66597->ep0_req == NULL) {
1943*4882a593Smuzhiyun 		ret = -ENOMEM;
1944*4882a593Smuzhiyun 		goto clean_up2;
1945*4882a593Smuzhiyun 	}
1946*4882a593Smuzhiyun 	r8a66597->ep0_req->complete = nop_completion;
1947*4882a593Smuzhiyun 
1948*4882a593Smuzhiyun 	ret = usb_add_gadget_udc(dev, &r8a66597->gadget);
1949*4882a593Smuzhiyun 	if (ret)
1950*4882a593Smuzhiyun 		goto err_add_udc;
1951*4882a593Smuzhiyun 
1952*4882a593Smuzhiyun 	dev_info(dev, "version %s\n", DRIVER_VERSION);
1953*4882a593Smuzhiyun 	return 0;
1954*4882a593Smuzhiyun 
1955*4882a593Smuzhiyun err_add_udc:
1956*4882a593Smuzhiyun 	r8a66597_free_request(&r8a66597->ep[0].ep, r8a66597->ep0_req);
1957*4882a593Smuzhiyun clean_up2:
1958*4882a593Smuzhiyun 	if (r8a66597->pdata->on_chip)
1959*4882a593Smuzhiyun 		clk_disable_unprepare(r8a66597->clk);
1960*4882a593Smuzhiyun 
1961*4882a593Smuzhiyun 	if (r8a66597->ep0_req)
1962*4882a593Smuzhiyun 		r8a66597_free_request(&r8a66597->ep[0].ep, r8a66597->ep0_req);
1963*4882a593Smuzhiyun 
1964*4882a593Smuzhiyun 	return ret;
1965*4882a593Smuzhiyun }
1966*4882a593Smuzhiyun 
1967*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
1968*4882a593Smuzhiyun static struct platform_driver r8a66597_driver = {
1969*4882a593Smuzhiyun 	.remove =	r8a66597_remove,
1970*4882a593Smuzhiyun 	.driver		= {
1971*4882a593Smuzhiyun 		.name =	udc_name,
1972*4882a593Smuzhiyun 	},
1973*4882a593Smuzhiyun };
1974*4882a593Smuzhiyun 
1975*4882a593Smuzhiyun module_platform_driver_probe(r8a66597_driver, r8a66597_probe);
1976*4882a593Smuzhiyun 
1977*4882a593Smuzhiyun MODULE_DESCRIPTION("R8A66597 USB gadget driver");
1978*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1979*4882a593Smuzhiyun MODULE_AUTHOR("Yoshihiro Shimoda");
1980*4882a593Smuzhiyun MODULE_ALIAS("platform:r8a66597_udc");
1981