xref: /OK3568_Linux_fs/kernel/drivers/usb/gadget/udc/goku_udc.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Toshiba TC86C001 ("Goku-S") USB Device Controller driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2000-2002 Lineo
6*4882a593Smuzhiyun  *      by Stuart Lynne, Tom Rushworth, and Bruce Balden
7*4882a593Smuzhiyun  * Copyright (C) 2002 Toshiba Corporation
8*4882a593Smuzhiyun  * Copyright (C) 2003 MontaVista Software (source@mvista.com)
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun /*
12*4882a593Smuzhiyun  * This device has ep0 and three semi-configurable bulk/interrupt endpoints.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  *  - Endpoint numbering is fixed: ep{1,2,3}-bulk
15*4882a593Smuzhiyun  *  - Gadget drivers can choose ep maxpacket (8/16/32/64)
16*4882a593Smuzhiyun  *  - Gadget drivers can choose direction (IN, OUT)
17*4882a593Smuzhiyun  *  - DMA works with ep1 (OUT transfers) and ep2 (IN transfers).
18*4882a593Smuzhiyun  */
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun // #define	VERBOSE		/* extra debug messages (success too) */
21*4882a593Smuzhiyun // #define	USB_TRACE	/* packet-level success messages */
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #include <linux/kernel.h>
24*4882a593Smuzhiyun #include <linux/module.h>
25*4882a593Smuzhiyun #include <linux/pci.h>
26*4882a593Smuzhiyun #include <linux/delay.h>
27*4882a593Smuzhiyun #include <linux/ioport.h>
28*4882a593Smuzhiyun #include <linux/slab.h>
29*4882a593Smuzhiyun #include <linux/errno.h>
30*4882a593Smuzhiyun #include <linux/timer.h>
31*4882a593Smuzhiyun #include <linux/list.h>
32*4882a593Smuzhiyun #include <linux/interrupt.h>
33*4882a593Smuzhiyun #include <linux/proc_fs.h>
34*4882a593Smuzhiyun #include <linux/seq_file.h>
35*4882a593Smuzhiyun #include <linux/device.h>
36*4882a593Smuzhiyun #include <linux/usb/ch9.h>
37*4882a593Smuzhiyun #include <linux/usb/gadget.h>
38*4882a593Smuzhiyun #include <linux/prefetch.h>
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun #include <asm/byteorder.h>
41*4882a593Smuzhiyun #include <asm/io.h>
42*4882a593Smuzhiyun #include <asm/irq.h>
43*4882a593Smuzhiyun #include <asm/unaligned.h>
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun #include "goku_udc.h"
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun #define	DRIVER_DESC		"TC86C001 USB Device Controller"
49*4882a593Smuzhiyun #define	DRIVER_VERSION		"30-Oct 2003"
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun static const char driver_name [] = "goku_udc";
52*4882a593Smuzhiyun static const char driver_desc [] = DRIVER_DESC;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun MODULE_AUTHOR("source@mvista.com");
55*4882a593Smuzhiyun MODULE_DESCRIPTION(DRIVER_DESC);
56*4882a593Smuzhiyun MODULE_LICENSE("GPL");
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun /*
60*4882a593Smuzhiyun  * IN dma behaves ok under testing, though the IN-dma abort paths don't
61*4882a593Smuzhiyun  * seem to behave quite as expected.  Used by default.
62*4882a593Smuzhiyun  *
63*4882a593Smuzhiyun  * OUT dma documents design problems handling the common "short packet"
64*4882a593Smuzhiyun  * transfer termination policy; it couldn't be enabled by default, even
65*4882a593Smuzhiyun  * if the OUT-dma abort problems had a resolution.
66*4882a593Smuzhiyun  */
67*4882a593Smuzhiyun static unsigned use_dma = 1;
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun #if 0
70*4882a593Smuzhiyun //#include <linux/moduleparam.h>
71*4882a593Smuzhiyun /* "modprobe goku_udc use_dma=1" etc
72*4882a593Smuzhiyun  *	0 to disable dma
73*4882a593Smuzhiyun  *	1 to use IN dma only (normal operation)
74*4882a593Smuzhiyun  *	2 to use IN and OUT dma
75*4882a593Smuzhiyun  */
76*4882a593Smuzhiyun module_param(use_dma, uint, S_IRUGO);
77*4882a593Smuzhiyun #endif
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun static void nuke(struct goku_ep *, int status);
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun static inline void
command(struct goku_udc_regs __iomem * regs,int command,unsigned epnum)84*4882a593Smuzhiyun command(struct goku_udc_regs __iomem *regs, int command, unsigned epnum)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun 	writel(COMMAND_EP(epnum) | command, &regs->Command);
87*4882a593Smuzhiyun 	udelay(300);
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun static int
goku_ep_enable(struct usb_ep * _ep,const struct usb_endpoint_descriptor * desc)91*4882a593Smuzhiyun goku_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun 	struct goku_udc	*dev;
94*4882a593Smuzhiyun 	struct goku_ep	*ep;
95*4882a593Smuzhiyun 	u32		mode;
96*4882a593Smuzhiyun 	u16		max;
97*4882a593Smuzhiyun 	unsigned long	flags;
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	ep = container_of(_ep, struct goku_ep, ep);
100*4882a593Smuzhiyun 	if (!_ep || !desc
101*4882a593Smuzhiyun 			|| desc->bDescriptorType != USB_DT_ENDPOINT)
102*4882a593Smuzhiyun 		return -EINVAL;
103*4882a593Smuzhiyun 	dev = ep->dev;
104*4882a593Smuzhiyun 	if (ep == &dev->ep[0])
105*4882a593Smuzhiyun 		return -EINVAL;
106*4882a593Smuzhiyun 	if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
107*4882a593Smuzhiyun 		return -ESHUTDOWN;
108*4882a593Smuzhiyun 	if (ep->num != usb_endpoint_num(desc))
109*4882a593Smuzhiyun 		return -EINVAL;
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	switch (usb_endpoint_type(desc)) {
112*4882a593Smuzhiyun 	case USB_ENDPOINT_XFER_BULK:
113*4882a593Smuzhiyun 	case USB_ENDPOINT_XFER_INT:
114*4882a593Smuzhiyun 		break;
115*4882a593Smuzhiyun 	default:
116*4882a593Smuzhiyun 		return -EINVAL;
117*4882a593Smuzhiyun 	}
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	if ((readl(ep->reg_status) & EPxSTATUS_EP_MASK)
120*4882a593Smuzhiyun 			!= EPxSTATUS_EP_INVALID)
121*4882a593Smuzhiyun 		return -EBUSY;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	/* enabling the no-toggle interrupt mode would need an api hook */
124*4882a593Smuzhiyun 	mode = 0;
125*4882a593Smuzhiyun 	max = get_unaligned_le16(&desc->wMaxPacketSize);
126*4882a593Smuzhiyun 	switch (max) {
127*4882a593Smuzhiyun 	case 64:
128*4882a593Smuzhiyun 		mode++;
129*4882a593Smuzhiyun 		fallthrough;
130*4882a593Smuzhiyun 	case 32:
131*4882a593Smuzhiyun 		mode++;
132*4882a593Smuzhiyun 		fallthrough;
133*4882a593Smuzhiyun 	case 16:
134*4882a593Smuzhiyun 		mode++;
135*4882a593Smuzhiyun 		fallthrough;
136*4882a593Smuzhiyun 	case 8:
137*4882a593Smuzhiyun 		mode <<= 3;
138*4882a593Smuzhiyun 		break;
139*4882a593Smuzhiyun 	default:
140*4882a593Smuzhiyun 		return -EINVAL;
141*4882a593Smuzhiyun 	}
142*4882a593Smuzhiyun 	mode |= 2 << 1;		/* bulk, or intr-with-toggle */
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	/* ep1/ep2 dma direction is chosen early; it works in the other
145*4882a593Smuzhiyun 	 * direction, with pio.  be cautious with out-dma.
146*4882a593Smuzhiyun 	 */
147*4882a593Smuzhiyun 	ep->is_in = usb_endpoint_dir_in(desc);
148*4882a593Smuzhiyun 	if (ep->is_in) {
149*4882a593Smuzhiyun 		mode |= 1;
150*4882a593Smuzhiyun 		ep->dma = (use_dma != 0) && (ep->num == UDC_MSTRD_ENDPOINT);
151*4882a593Smuzhiyun 	} else {
152*4882a593Smuzhiyun 		ep->dma = (use_dma == 2) && (ep->num == UDC_MSTWR_ENDPOINT);
153*4882a593Smuzhiyun 		if (ep->dma)
154*4882a593Smuzhiyun 			DBG(dev, "%s out-dma hides short packets\n",
155*4882a593Smuzhiyun 				ep->ep.name);
156*4882a593Smuzhiyun 	}
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	spin_lock_irqsave(&ep->dev->lock, flags);
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	/* ep1 and ep2 can do double buffering and/or dma */
161*4882a593Smuzhiyun 	if (ep->num < 3) {
162*4882a593Smuzhiyun 		struct goku_udc_regs __iomem	*regs = ep->dev->regs;
163*4882a593Smuzhiyun 		u32				tmp;
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 		/* double buffer except (for now) with pio in */
166*4882a593Smuzhiyun 		tmp = ((ep->dma || !ep->is_in)
167*4882a593Smuzhiyun 				? 0x10	/* double buffered */
168*4882a593Smuzhiyun 				: 0x11	/* single buffer */
169*4882a593Smuzhiyun 			) << ep->num;
170*4882a593Smuzhiyun 		tmp |= readl(&regs->EPxSingle);
171*4882a593Smuzhiyun 		writel(tmp, &regs->EPxSingle);
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 		tmp = (ep->dma ? 0x10/*dma*/ : 0x11/*pio*/) << ep->num;
174*4882a593Smuzhiyun 		tmp |= readl(&regs->EPxBCS);
175*4882a593Smuzhiyun 		writel(tmp, &regs->EPxBCS);
176*4882a593Smuzhiyun 	}
177*4882a593Smuzhiyun 	writel(mode, ep->reg_mode);
178*4882a593Smuzhiyun 	command(ep->dev->regs, COMMAND_RESET, ep->num);
179*4882a593Smuzhiyun 	ep->ep.maxpacket = max;
180*4882a593Smuzhiyun 	ep->stopped = 0;
181*4882a593Smuzhiyun 	ep->ep.desc = desc;
182*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ep->dev->lock, flags);
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	DBG(dev, "enable %s %s %s maxpacket %u\n", ep->ep.name,
185*4882a593Smuzhiyun 		ep->is_in ? "IN" : "OUT",
186*4882a593Smuzhiyun 		ep->dma ? "dma" : "pio",
187*4882a593Smuzhiyun 		max);
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	return 0;
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun 
ep_reset(struct goku_udc_regs __iomem * regs,struct goku_ep * ep)192*4882a593Smuzhiyun static void ep_reset(struct goku_udc_regs __iomem *regs, struct goku_ep *ep)
193*4882a593Smuzhiyun {
194*4882a593Smuzhiyun 	struct goku_udc		*dev = ep->dev;
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	if (regs) {
197*4882a593Smuzhiyun 		command(regs, COMMAND_INVALID, ep->num);
198*4882a593Smuzhiyun 		if (ep->num) {
199*4882a593Smuzhiyun 			if (ep->num == UDC_MSTWR_ENDPOINT)
200*4882a593Smuzhiyun 				dev->int_enable &= ~(INT_MSTWREND
201*4882a593Smuzhiyun 							|INT_MSTWRTMOUT);
202*4882a593Smuzhiyun 			else if (ep->num == UDC_MSTRD_ENDPOINT)
203*4882a593Smuzhiyun 				dev->int_enable &= ~INT_MSTRDEND;
204*4882a593Smuzhiyun 			dev->int_enable &= ~INT_EPxDATASET (ep->num);
205*4882a593Smuzhiyun 		} else
206*4882a593Smuzhiyun 			dev->int_enable &= ~INT_EP0;
207*4882a593Smuzhiyun 		writel(dev->int_enable, &regs->int_enable);
208*4882a593Smuzhiyun 		readl(&regs->int_enable);
209*4882a593Smuzhiyun 		if (ep->num < 3) {
210*4882a593Smuzhiyun 			struct goku_udc_regs __iomem	*r = ep->dev->regs;
211*4882a593Smuzhiyun 			u32				tmp;
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 			tmp = readl(&r->EPxSingle);
214*4882a593Smuzhiyun 			tmp &= ~(0x11 << ep->num);
215*4882a593Smuzhiyun 			writel(tmp, &r->EPxSingle);
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 			tmp = readl(&r->EPxBCS);
218*4882a593Smuzhiyun 			tmp &= ~(0x11 << ep->num);
219*4882a593Smuzhiyun 			writel(tmp, &r->EPxBCS);
220*4882a593Smuzhiyun 		}
221*4882a593Smuzhiyun 		/* reset dma in case we're still using it */
222*4882a593Smuzhiyun 		if (ep->dma) {
223*4882a593Smuzhiyun 			u32	master;
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 			master = readl(&regs->dma_master) & MST_RW_BITS;
226*4882a593Smuzhiyun 			if (ep->num == UDC_MSTWR_ENDPOINT) {
227*4882a593Smuzhiyun 				master &= ~MST_W_BITS;
228*4882a593Smuzhiyun 				master |= MST_WR_RESET;
229*4882a593Smuzhiyun 			} else {
230*4882a593Smuzhiyun 				master &= ~MST_R_BITS;
231*4882a593Smuzhiyun 				master |= MST_RD_RESET;
232*4882a593Smuzhiyun 			}
233*4882a593Smuzhiyun 			writel(master, &regs->dma_master);
234*4882a593Smuzhiyun 		}
235*4882a593Smuzhiyun 	}
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	usb_ep_set_maxpacket_limit(&ep->ep, MAX_FIFO_SIZE);
238*4882a593Smuzhiyun 	ep->ep.desc = NULL;
239*4882a593Smuzhiyun 	ep->stopped = 1;
240*4882a593Smuzhiyun 	ep->irqs = 0;
241*4882a593Smuzhiyun 	ep->dma = 0;
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun 
goku_ep_disable(struct usb_ep * _ep)244*4882a593Smuzhiyun static int goku_ep_disable(struct usb_ep *_ep)
245*4882a593Smuzhiyun {
246*4882a593Smuzhiyun 	struct goku_ep	*ep;
247*4882a593Smuzhiyun 	struct goku_udc	*dev;
248*4882a593Smuzhiyun 	unsigned long	flags;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	ep = container_of(_ep, struct goku_ep, ep);
251*4882a593Smuzhiyun 	if (!_ep || !ep->ep.desc)
252*4882a593Smuzhiyun 		return -ENODEV;
253*4882a593Smuzhiyun 	dev = ep->dev;
254*4882a593Smuzhiyun 	if (dev->ep0state == EP0_SUSPEND)
255*4882a593Smuzhiyun 		return -EBUSY;
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	VDBG(dev, "disable %s\n", _ep->name);
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	spin_lock_irqsave(&dev->lock, flags);
260*4882a593Smuzhiyun 	nuke(ep, -ESHUTDOWN);
261*4882a593Smuzhiyun 	ep_reset(dev->regs, ep);
262*4882a593Smuzhiyun 	spin_unlock_irqrestore(&dev->lock, flags);
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	return 0;
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun static struct usb_request *
goku_alloc_request(struct usb_ep * _ep,gfp_t gfp_flags)270*4882a593Smuzhiyun goku_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
271*4882a593Smuzhiyun {
272*4882a593Smuzhiyun 	struct goku_request	*req;
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	if (!_ep)
275*4882a593Smuzhiyun 		return NULL;
276*4882a593Smuzhiyun 	req = kzalloc(sizeof *req, gfp_flags);
277*4882a593Smuzhiyun 	if (!req)
278*4882a593Smuzhiyun 		return NULL;
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	INIT_LIST_HEAD(&req->queue);
281*4882a593Smuzhiyun 	return &req->req;
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun static void
goku_free_request(struct usb_ep * _ep,struct usb_request * _req)285*4882a593Smuzhiyun goku_free_request(struct usb_ep *_ep, struct usb_request *_req)
286*4882a593Smuzhiyun {
287*4882a593Smuzhiyun 	struct goku_request	*req;
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 	if (!_ep || !_req)
290*4882a593Smuzhiyun 		return;
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	req = container_of(_req, struct goku_request, req);
293*4882a593Smuzhiyun 	WARN_ON(!list_empty(&req->queue));
294*4882a593Smuzhiyun 	kfree(req);
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun static void
done(struct goku_ep * ep,struct goku_request * req,int status)300*4882a593Smuzhiyun done(struct goku_ep *ep, struct goku_request *req, int status)
301*4882a593Smuzhiyun {
302*4882a593Smuzhiyun 	struct goku_udc		*dev;
303*4882a593Smuzhiyun 	unsigned		stopped = ep->stopped;
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	list_del_init(&req->queue);
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 	if (likely(req->req.status == -EINPROGRESS))
308*4882a593Smuzhiyun 		req->req.status = status;
309*4882a593Smuzhiyun 	else
310*4882a593Smuzhiyun 		status = req->req.status;
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	dev = ep->dev;
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	if (ep->dma)
315*4882a593Smuzhiyun 		usb_gadget_unmap_request(&dev->gadget, &req->req, ep->is_in);
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun #ifndef USB_TRACE
318*4882a593Smuzhiyun 	if (status && status != -ESHUTDOWN)
319*4882a593Smuzhiyun #endif
320*4882a593Smuzhiyun 		VDBG(dev, "complete %s req %p stat %d len %u/%u\n",
321*4882a593Smuzhiyun 			ep->ep.name, &req->req, status,
322*4882a593Smuzhiyun 			req->req.actual, req->req.length);
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 	/* don't modify queue heads during completion callback */
325*4882a593Smuzhiyun 	ep->stopped = 1;
326*4882a593Smuzhiyun 	spin_unlock(&dev->lock);
327*4882a593Smuzhiyun 	usb_gadget_giveback_request(&ep->ep, &req->req);
328*4882a593Smuzhiyun 	spin_lock(&dev->lock);
329*4882a593Smuzhiyun 	ep->stopped = stopped;
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun static inline int
write_packet(u32 __iomem * fifo,u8 * buf,struct goku_request * req,unsigned max)335*4882a593Smuzhiyun write_packet(u32 __iomem *fifo, u8 *buf, struct goku_request *req, unsigned max)
336*4882a593Smuzhiyun {
337*4882a593Smuzhiyun 	unsigned	length, count;
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun 	length = min(req->req.length - req->req.actual, max);
340*4882a593Smuzhiyun 	req->req.actual += length;
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	count = length;
343*4882a593Smuzhiyun 	while (likely(count--))
344*4882a593Smuzhiyun 		writel(*buf++, fifo);
345*4882a593Smuzhiyun 	return length;
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun // return:  0 = still running, 1 = completed, negative = errno
write_fifo(struct goku_ep * ep,struct goku_request * req)349*4882a593Smuzhiyun static int write_fifo(struct goku_ep *ep, struct goku_request *req)
350*4882a593Smuzhiyun {
351*4882a593Smuzhiyun 	struct goku_udc	*dev = ep->dev;
352*4882a593Smuzhiyun 	u32		tmp;
353*4882a593Smuzhiyun 	u8		*buf;
354*4882a593Smuzhiyun 	unsigned	count;
355*4882a593Smuzhiyun 	int		is_last;
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 	tmp = readl(&dev->regs->DataSet);
358*4882a593Smuzhiyun 	buf = req->req.buf + req->req.actual;
359*4882a593Smuzhiyun 	prefetch(buf);
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	dev = ep->dev;
362*4882a593Smuzhiyun 	if (unlikely(ep->num == 0 && dev->ep0state != EP0_IN))
363*4882a593Smuzhiyun 		return -EL2HLT;
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun 	/* NOTE:  just single-buffered PIO-IN for now.  */
366*4882a593Smuzhiyun 	if (unlikely((tmp & DATASET_A(ep->num)) != 0))
367*4882a593Smuzhiyun 		return 0;
368*4882a593Smuzhiyun 
369*4882a593Smuzhiyun 	/* clear our "packet available" irq */
370*4882a593Smuzhiyun 	if (ep->num != 0)
371*4882a593Smuzhiyun 		writel(~INT_EPxDATASET(ep->num), &dev->regs->int_status);
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 	count = write_packet(ep->reg_fifo, buf, req, ep->ep.maxpacket);
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun 	/* last packet often short (sometimes a zlp, especially on ep0) */
376*4882a593Smuzhiyun 	if (unlikely(count != ep->ep.maxpacket)) {
377*4882a593Smuzhiyun 		writel(~(1<<ep->num), &dev->regs->EOP);
378*4882a593Smuzhiyun 		if (ep->num == 0) {
379*4882a593Smuzhiyun 			dev->ep[0].stopped = 1;
380*4882a593Smuzhiyun 			dev->ep0state = EP0_STATUS;
381*4882a593Smuzhiyun 		}
382*4882a593Smuzhiyun 		is_last = 1;
383*4882a593Smuzhiyun 	} else {
384*4882a593Smuzhiyun 		if (likely(req->req.length != req->req.actual)
385*4882a593Smuzhiyun 				|| req->req.zero)
386*4882a593Smuzhiyun 			is_last = 0;
387*4882a593Smuzhiyun 		else
388*4882a593Smuzhiyun 			is_last = 1;
389*4882a593Smuzhiyun 	}
390*4882a593Smuzhiyun #if 0		/* printk seemed to trash is_last...*/
391*4882a593Smuzhiyun //#ifdef USB_TRACE
392*4882a593Smuzhiyun 	VDBG(dev, "wrote %s %u bytes%s IN %u left %p\n",
393*4882a593Smuzhiyun 		ep->ep.name, count, is_last ? "/last" : "",
394*4882a593Smuzhiyun 		req->req.length - req->req.actual, req);
395*4882a593Smuzhiyun #endif
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	/* requests complete when all IN data is in the FIFO,
398*4882a593Smuzhiyun 	 * or sometimes later, if a zlp was needed.
399*4882a593Smuzhiyun 	 */
400*4882a593Smuzhiyun 	if (is_last) {
401*4882a593Smuzhiyun 		done(ep, req, 0);
402*4882a593Smuzhiyun 		return 1;
403*4882a593Smuzhiyun 	}
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	return 0;
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun 
read_fifo(struct goku_ep * ep,struct goku_request * req)408*4882a593Smuzhiyun static int read_fifo(struct goku_ep *ep, struct goku_request *req)
409*4882a593Smuzhiyun {
410*4882a593Smuzhiyun 	struct goku_udc_regs __iomem	*regs;
411*4882a593Smuzhiyun 	u32				size, set;
412*4882a593Smuzhiyun 	u8				*buf;
413*4882a593Smuzhiyun 	unsigned			bufferspace, is_short, dbuff;
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun 	regs = ep->dev->regs;
416*4882a593Smuzhiyun top:
417*4882a593Smuzhiyun 	buf = req->req.buf + req->req.actual;
418*4882a593Smuzhiyun 	prefetchw(buf);
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 	if (unlikely(ep->num == 0 && ep->dev->ep0state != EP0_OUT))
421*4882a593Smuzhiyun 		return -EL2HLT;
422*4882a593Smuzhiyun 
423*4882a593Smuzhiyun 	dbuff = (ep->num == 1 || ep->num == 2);
424*4882a593Smuzhiyun 	do {
425*4882a593Smuzhiyun 		/* ack dataset irq matching the status we'll handle */
426*4882a593Smuzhiyun 		if (ep->num != 0)
427*4882a593Smuzhiyun 			writel(~INT_EPxDATASET(ep->num), &regs->int_status);
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 		set = readl(&regs->DataSet) & DATASET_AB(ep->num);
430*4882a593Smuzhiyun 		size = readl(&regs->EPxSizeLA[ep->num]);
431*4882a593Smuzhiyun 		bufferspace = req->req.length - req->req.actual;
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun 		/* usually do nothing without an OUT packet */
434*4882a593Smuzhiyun 		if (likely(ep->num != 0 || bufferspace != 0)) {
435*4882a593Smuzhiyun 			if (unlikely(set == 0))
436*4882a593Smuzhiyun 				break;
437*4882a593Smuzhiyun 			/* use ep1/ep2 double-buffering for OUT */
438*4882a593Smuzhiyun 			if (!(size & PACKET_ACTIVE))
439*4882a593Smuzhiyun 				size = readl(&regs->EPxSizeLB[ep->num]);
440*4882a593Smuzhiyun 			if (!(size & PACKET_ACTIVE))	/* "can't happen" */
441*4882a593Smuzhiyun 				break;
442*4882a593Smuzhiyun 			size &= DATASIZE;	/* EPxSizeH == 0 */
443*4882a593Smuzhiyun 
444*4882a593Smuzhiyun 		/* ep0out no-out-data case for set_config, etc */
445*4882a593Smuzhiyun 		} else
446*4882a593Smuzhiyun 			size = 0;
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun 		/* read all bytes from this packet */
449*4882a593Smuzhiyun 		req->req.actual += size;
450*4882a593Smuzhiyun 		is_short = (size < ep->ep.maxpacket);
451*4882a593Smuzhiyun #ifdef USB_TRACE
452*4882a593Smuzhiyun 		VDBG(ep->dev, "read %s %u bytes%s OUT req %p %u/%u\n",
453*4882a593Smuzhiyun 			ep->ep.name, size, is_short ? "/S" : "",
454*4882a593Smuzhiyun 			req, req->req.actual, req->req.length);
455*4882a593Smuzhiyun #endif
456*4882a593Smuzhiyun 		while (likely(size-- != 0)) {
457*4882a593Smuzhiyun 			u8	byte = (u8) readl(ep->reg_fifo);
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun 			if (unlikely(bufferspace == 0)) {
460*4882a593Smuzhiyun 				/* this happens when the driver's buffer
461*4882a593Smuzhiyun 				 * is smaller than what the host sent.
462*4882a593Smuzhiyun 				 * discard the extra data in this packet.
463*4882a593Smuzhiyun 				 */
464*4882a593Smuzhiyun 				if (req->req.status != -EOVERFLOW)
465*4882a593Smuzhiyun 					DBG(ep->dev, "%s overflow %u\n",
466*4882a593Smuzhiyun 						ep->ep.name, size);
467*4882a593Smuzhiyun 				req->req.status = -EOVERFLOW;
468*4882a593Smuzhiyun 			} else {
469*4882a593Smuzhiyun 				*buf++ = byte;
470*4882a593Smuzhiyun 				bufferspace--;
471*4882a593Smuzhiyun 			}
472*4882a593Smuzhiyun 		}
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 		/* completion */
475*4882a593Smuzhiyun 		if (unlikely(is_short || req->req.actual == req->req.length)) {
476*4882a593Smuzhiyun 			if (unlikely(ep->num == 0)) {
477*4882a593Smuzhiyun 				/* non-control endpoints now usable? */
478*4882a593Smuzhiyun 				if (ep->dev->req_config)
479*4882a593Smuzhiyun 					writel(ep->dev->configured
480*4882a593Smuzhiyun 							? USBSTATE_CONFIGURED
481*4882a593Smuzhiyun 							: 0,
482*4882a593Smuzhiyun 						&regs->UsbState);
483*4882a593Smuzhiyun 				/* ep0out status stage */
484*4882a593Smuzhiyun 				writel(~(1<<0), &regs->EOP);
485*4882a593Smuzhiyun 				ep->stopped = 1;
486*4882a593Smuzhiyun 				ep->dev->ep0state = EP0_STATUS;
487*4882a593Smuzhiyun 			}
488*4882a593Smuzhiyun 			done(ep, req, 0);
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun 			/* empty the second buffer asap */
491*4882a593Smuzhiyun 			if (dbuff && !list_empty(&ep->queue)) {
492*4882a593Smuzhiyun 				req = list_entry(ep->queue.next,
493*4882a593Smuzhiyun 						struct goku_request, queue);
494*4882a593Smuzhiyun 				goto top;
495*4882a593Smuzhiyun 			}
496*4882a593Smuzhiyun 			return 1;
497*4882a593Smuzhiyun 		}
498*4882a593Smuzhiyun 	} while (dbuff);
499*4882a593Smuzhiyun 	return 0;
500*4882a593Smuzhiyun }
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun static inline void
pio_irq_enable(struct goku_udc * dev,struct goku_udc_regs __iomem * regs,int epnum)503*4882a593Smuzhiyun pio_irq_enable(struct goku_udc *dev,
504*4882a593Smuzhiyun 		struct goku_udc_regs __iomem *regs, int epnum)
505*4882a593Smuzhiyun {
506*4882a593Smuzhiyun 	dev->int_enable |= INT_EPxDATASET (epnum);
507*4882a593Smuzhiyun 	writel(dev->int_enable, &regs->int_enable);
508*4882a593Smuzhiyun 	/* write may still be posted */
509*4882a593Smuzhiyun }
510*4882a593Smuzhiyun 
511*4882a593Smuzhiyun static inline void
pio_irq_disable(struct goku_udc * dev,struct goku_udc_regs __iomem * regs,int epnum)512*4882a593Smuzhiyun pio_irq_disable(struct goku_udc *dev,
513*4882a593Smuzhiyun 		struct goku_udc_regs __iomem *regs, int epnum)
514*4882a593Smuzhiyun {
515*4882a593Smuzhiyun 	dev->int_enable &= ~INT_EPxDATASET (epnum);
516*4882a593Smuzhiyun 	writel(dev->int_enable, &regs->int_enable);
517*4882a593Smuzhiyun 	/* write may still be posted */
518*4882a593Smuzhiyun }
519*4882a593Smuzhiyun 
520*4882a593Smuzhiyun static inline void
pio_advance(struct goku_ep * ep)521*4882a593Smuzhiyun pio_advance(struct goku_ep *ep)
522*4882a593Smuzhiyun {
523*4882a593Smuzhiyun 	struct goku_request	*req;
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 	if (unlikely(list_empty (&ep->queue)))
526*4882a593Smuzhiyun 		return;
527*4882a593Smuzhiyun 	req = list_entry(ep->queue.next, struct goku_request, queue);
528*4882a593Smuzhiyun 	(ep->is_in ? write_fifo : read_fifo)(ep, req);
529*4882a593Smuzhiyun }
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun // return:  0 = q running, 1 = q stopped, negative = errno
start_dma(struct goku_ep * ep,struct goku_request * req)535*4882a593Smuzhiyun static int start_dma(struct goku_ep *ep, struct goku_request *req)
536*4882a593Smuzhiyun {
537*4882a593Smuzhiyun 	struct goku_udc_regs __iomem	*regs = ep->dev->regs;
538*4882a593Smuzhiyun 	u32				master;
539*4882a593Smuzhiyun 	u32				start = req->req.dma;
540*4882a593Smuzhiyun 	u32				end = start + req->req.length - 1;
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun 	master = readl(&regs->dma_master) & MST_RW_BITS;
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun 	/* re-init the bits affecting IN dma; careful with zlps */
545*4882a593Smuzhiyun 	if (likely(ep->is_in)) {
546*4882a593Smuzhiyun 		if (unlikely(master & MST_RD_ENA)) {
547*4882a593Smuzhiyun 			DBG (ep->dev, "start, IN active dma %03x!!\n",
548*4882a593Smuzhiyun 				master);
549*4882a593Smuzhiyun //			return -EL2HLT;
550*4882a593Smuzhiyun 		}
551*4882a593Smuzhiyun 		writel(end, &regs->in_dma_end);
552*4882a593Smuzhiyun 		writel(start, &regs->in_dma_start);
553*4882a593Smuzhiyun 
554*4882a593Smuzhiyun 		master &= ~MST_R_BITS;
555*4882a593Smuzhiyun 		if (unlikely(req->req.length == 0))
556*4882a593Smuzhiyun 			master = MST_RD_ENA | MST_RD_EOPB;
557*4882a593Smuzhiyun 		else if ((req->req.length % ep->ep.maxpacket) != 0
558*4882a593Smuzhiyun 					|| req->req.zero)
559*4882a593Smuzhiyun 			master = MST_RD_ENA | MST_EOPB_ENA;
560*4882a593Smuzhiyun 		else
561*4882a593Smuzhiyun 			master = MST_RD_ENA | MST_EOPB_DIS;
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun 		ep->dev->int_enable |= INT_MSTRDEND;
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun 	/* Goku DMA-OUT merges short packets, which plays poorly with
566*4882a593Smuzhiyun 	 * protocols where short packets mark the transfer boundaries.
567*4882a593Smuzhiyun 	 * The chip supports a nonstandard policy with INT_MSTWRTMOUT,
568*4882a593Smuzhiyun 	 * ending transfers after 3 SOFs; we don't turn it on.
569*4882a593Smuzhiyun 	 */
570*4882a593Smuzhiyun 	} else {
571*4882a593Smuzhiyun 		if (unlikely(master & MST_WR_ENA)) {
572*4882a593Smuzhiyun 			DBG (ep->dev, "start, OUT active dma %03x!!\n",
573*4882a593Smuzhiyun 				master);
574*4882a593Smuzhiyun //			return -EL2HLT;
575*4882a593Smuzhiyun 		}
576*4882a593Smuzhiyun 		writel(end, &regs->out_dma_end);
577*4882a593Smuzhiyun 		writel(start, &regs->out_dma_start);
578*4882a593Smuzhiyun 
579*4882a593Smuzhiyun 		master &= ~MST_W_BITS;
580*4882a593Smuzhiyun 		master |= MST_WR_ENA | MST_TIMEOUT_DIS;
581*4882a593Smuzhiyun 
582*4882a593Smuzhiyun 		ep->dev->int_enable |= INT_MSTWREND|INT_MSTWRTMOUT;
583*4882a593Smuzhiyun 	}
584*4882a593Smuzhiyun 
585*4882a593Smuzhiyun 	writel(master, &regs->dma_master);
586*4882a593Smuzhiyun 	writel(ep->dev->int_enable, &regs->int_enable);
587*4882a593Smuzhiyun 	return 0;
588*4882a593Smuzhiyun }
589*4882a593Smuzhiyun 
dma_advance(struct goku_udc * dev,struct goku_ep * ep)590*4882a593Smuzhiyun static void dma_advance(struct goku_udc *dev, struct goku_ep *ep)
591*4882a593Smuzhiyun {
592*4882a593Smuzhiyun 	struct goku_request		*req;
593*4882a593Smuzhiyun 	struct goku_udc_regs __iomem	*regs = ep->dev->regs;
594*4882a593Smuzhiyun 	u32				master;
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun 	master = readl(&regs->dma_master);
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun 	if (unlikely(list_empty(&ep->queue))) {
599*4882a593Smuzhiyun stop:
600*4882a593Smuzhiyun 		if (ep->is_in)
601*4882a593Smuzhiyun 			dev->int_enable &= ~INT_MSTRDEND;
602*4882a593Smuzhiyun 		else
603*4882a593Smuzhiyun 			dev->int_enable &= ~(INT_MSTWREND|INT_MSTWRTMOUT);
604*4882a593Smuzhiyun 		writel(dev->int_enable, &regs->int_enable);
605*4882a593Smuzhiyun 		return;
606*4882a593Smuzhiyun 	}
607*4882a593Smuzhiyun 	req = list_entry(ep->queue.next, struct goku_request, queue);
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun 	/* normal hw dma completion (not abort) */
610*4882a593Smuzhiyun 	if (likely(ep->is_in)) {
611*4882a593Smuzhiyun 		if (unlikely(master & MST_RD_ENA))
612*4882a593Smuzhiyun 			return;
613*4882a593Smuzhiyun 		req->req.actual = readl(&regs->in_dma_current);
614*4882a593Smuzhiyun 	} else {
615*4882a593Smuzhiyun 		if (unlikely(master & MST_WR_ENA))
616*4882a593Smuzhiyun 			return;
617*4882a593Smuzhiyun 
618*4882a593Smuzhiyun 		/* hardware merges short packets, and also hides packet
619*4882a593Smuzhiyun 		 * overruns.  a partial packet MAY be in the fifo here.
620*4882a593Smuzhiyun 		 */
621*4882a593Smuzhiyun 		req->req.actual = readl(&regs->out_dma_current);
622*4882a593Smuzhiyun 	}
623*4882a593Smuzhiyun 	req->req.actual -= req->req.dma;
624*4882a593Smuzhiyun 	req->req.actual++;
625*4882a593Smuzhiyun 
626*4882a593Smuzhiyun #ifdef USB_TRACE
627*4882a593Smuzhiyun 	VDBG(dev, "done %s %s dma, %u/%u bytes, req %p\n",
628*4882a593Smuzhiyun 		ep->ep.name, ep->is_in ? "IN" : "OUT",
629*4882a593Smuzhiyun 		req->req.actual, req->req.length, req);
630*4882a593Smuzhiyun #endif
631*4882a593Smuzhiyun 	done(ep, req, 0);
632*4882a593Smuzhiyun 	if (list_empty(&ep->queue))
633*4882a593Smuzhiyun 		goto stop;
634*4882a593Smuzhiyun 	req = list_entry(ep->queue.next, struct goku_request, queue);
635*4882a593Smuzhiyun 	(void) start_dma(ep, req);
636*4882a593Smuzhiyun }
637*4882a593Smuzhiyun 
abort_dma(struct goku_ep * ep,int status)638*4882a593Smuzhiyun static void abort_dma(struct goku_ep *ep, int status)
639*4882a593Smuzhiyun {
640*4882a593Smuzhiyun 	struct goku_udc_regs __iomem	*regs = ep->dev->regs;
641*4882a593Smuzhiyun 	struct goku_request		*req;
642*4882a593Smuzhiyun 	u32				curr, master;
643*4882a593Smuzhiyun 
644*4882a593Smuzhiyun 	/* NAK future host requests, hoping the implicit delay lets the
645*4882a593Smuzhiyun 	 * dma engine finish reading (or writing) its latest packet and
646*4882a593Smuzhiyun 	 * empty the dma buffer (up to 16 bytes).
647*4882a593Smuzhiyun 	 *
648*4882a593Smuzhiyun 	 * This avoids needing to clean up a partial packet in the fifo;
649*4882a593Smuzhiyun 	 * we can't do that for IN without side effects to HALT and TOGGLE.
650*4882a593Smuzhiyun 	 */
651*4882a593Smuzhiyun 	command(regs, COMMAND_FIFO_DISABLE, ep->num);
652*4882a593Smuzhiyun 	req = list_entry(ep->queue.next, struct goku_request, queue);
653*4882a593Smuzhiyun 	master = readl(&regs->dma_master) & MST_RW_BITS;
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun 	/* FIXME using these resets isn't usably documented. this may
656*4882a593Smuzhiyun 	 * not work unless it's followed by disabling the endpoint.
657*4882a593Smuzhiyun 	 *
658*4882a593Smuzhiyun 	 * FIXME the OUT reset path doesn't even behave consistently.
659*4882a593Smuzhiyun 	 */
660*4882a593Smuzhiyun 	if (ep->is_in) {
661*4882a593Smuzhiyun 		if (unlikely((readl(&regs->dma_master) & MST_RD_ENA) == 0))
662*4882a593Smuzhiyun 			goto finished;
663*4882a593Smuzhiyun 		curr = readl(&regs->in_dma_current);
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun 		writel(curr, &regs->in_dma_end);
666*4882a593Smuzhiyun 		writel(curr, &regs->in_dma_start);
667*4882a593Smuzhiyun 
668*4882a593Smuzhiyun 		master &= ~MST_R_BITS;
669*4882a593Smuzhiyun 		master |= MST_RD_RESET;
670*4882a593Smuzhiyun 		writel(master, &regs->dma_master);
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun 		if (readl(&regs->dma_master) & MST_RD_ENA)
673*4882a593Smuzhiyun 			DBG(ep->dev, "IN dma active after reset!\n");
674*4882a593Smuzhiyun 
675*4882a593Smuzhiyun 	} else {
676*4882a593Smuzhiyun 		if (unlikely((readl(&regs->dma_master) & MST_WR_ENA) == 0))
677*4882a593Smuzhiyun 			goto finished;
678*4882a593Smuzhiyun 		curr = readl(&regs->out_dma_current);
679*4882a593Smuzhiyun 
680*4882a593Smuzhiyun 		writel(curr, &regs->out_dma_end);
681*4882a593Smuzhiyun 		writel(curr, &regs->out_dma_start);
682*4882a593Smuzhiyun 
683*4882a593Smuzhiyun 		master &= ~MST_W_BITS;
684*4882a593Smuzhiyun 		master |= MST_WR_RESET;
685*4882a593Smuzhiyun 		writel(master, &regs->dma_master);
686*4882a593Smuzhiyun 
687*4882a593Smuzhiyun 		if (readl(&regs->dma_master) & MST_WR_ENA)
688*4882a593Smuzhiyun 			DBG(ep->dev, "OUT dma active after reset!\n");
689*4882a593Smuzhiyun 	}
690*4882a593Smuzhiyun 	req->req.actual = (curr - req->req.dma) + 1;
691*4882a593Smuzhiyun 	req->req.status = status;
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun 	VDBG(ep->dev, "%s %s %s %d/%d\n", __func__, ep->ep.name,
694*4882a593Smuzhiyun 		ep->is_in ? "IN" : "OUT",
695*4882a593Smuzhiyun 		req->req.actual, req->req.length);
696*4882a593Smuzhiyun 
697*4882a593Smuzhiyun 	command(regs, COMMAND_FIFO_ENABLE, ep->num);
698*4882a593Smuzhiyun 
699*4882a593Smuzhiyun 	return;
700*4882a593Smuzhiyun 
701*4882a593Smuzhiyun finished:
702*4882a593Smuzhiyun 	/* dma already completed; no abort needed */
703*4882a593Smuzhiyun 	command(regs, COMMAND_FIFO_ENABLE, ep->num);
704*4882a593Smuzhiyun 	req->req.actual = req->req.length;
705*4882a593Smuzhiyun 	req->req.status = 0;
706*4882a593Smuzhiyun }
707*4882a593Smuzhiyun 
708*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
709*4882a593Smuzhiyun 
710*4882a593Smuzhiyun static int
goku_queue(struct usb_ep * _ep,struct usb_request * _req,gfp_t gfp_flags)711*4882a593Smuzhiyun goku_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
712*4882a593Smuzhiyun {
713*4882a593Smuzhiyun 	struct goku_request	*req;
714*4882a593Smuzhiyun 	struct goku_ep		*ep;
715*4882a593Smuzhiyun 	struct goku_udc		*dev;
716*4882a593Smuzhiyun 	unsigned long		flags;
717*4882a593Smuzhiyun 	int			status;
718*4882a593Smuzhiyun 
719*4882a593Smuzhiyun 	/* always require a cpu-view buffer so pio works */
720*4882a593Smuzhiyun 	req = container_of(_req, struct goku_request, req);
721*4882a593Smuzhiyun 	if (unlikely(!_req || !_req->complete
722*4882a593Smuzhiyun 			|| !_req->buf || !list_empty(&req->queue)))
723*4882a593Smuzhiyun 		return -EINVAL;
724*4882a593Smuzhiyun 	ep = container_of(_ep, struct goku_ep, ep);
725*4882a593Smuzhiyun 	if (unlikely(!_ep || (!ep->ep.desc && ep->num != 0)))
726*4882a593Smuzhiyun 		return -EINVAL;
727*4882a593Smuzhiyun 	dev = ep->dev;
728*4882a593Smuzhiyun 	if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN))
729*4882a593Smuzhiyun 		return -ESHUTDOWN;
730*4882a593Smuzhiyun 
731*4882a593Smuzhiyun 	/* can't touch registers when suspended */
732*4882a593Smuzhiyun 	if (dev->ep0state == EP0_SUSPEND)
733*4882a593Smuzhiyun 		return -EBUSY;
734*4882a593Smuzhiyun 
735*4882a593Smuzhiyun 	/* set up dma mapping in case the caller didn't */
736*4882a593Smuzhiyun 	if (ep->dma) {
737*4882a593Smuzhiyun 		status = usb_gadget_map_request(&dev->gadget, &req->req,
738*4882a593Smuzhiyun 				ep->is_in);
739*4882a593Smuzhiyun 		if (status)
740*4882a593Smuzhiyun 			return status;
741*4882a593Smuzhiyun 	}
742*4882a593Smuzhiyun 
743*4882a593Smuzhiyun #ifdef USB_TRACE
744*4882a593Smuzhiyun 	VDBG(dev, "%s queue req %p, len %u buf %p\n",
745*4882a593Smuzhiyun 			_ep->name, _req, _req->length, _req->buf);
746*4882a593Smuzhiyun #endif
747*4882a593Smuzhiyun 
748*4882a593Smuzhiyun 	spin_lock_irqsave(&dev->lock, flags);
749*4882a593Smuzhiyun 
750*4882a593Smuzhiyun 	_req->status = -EINPROGRESS;
751*4882a593Smuzhiyun 	_req->actual = 0;
752*4882a593Smuzhiyun 
753*4882a593Smuzhiyun 	/* for ep0 IN without premature status, zlp is required and
754*4882a593Smuzhiyun 	 * writing EOP starts the status stage (OUT).
755*4882a593Smuzhiyun 	 */
756*4882a593Smuzhiyun 	if (unlikely(ep->num == 0 && ep->is_in))
757*4882a593Smuzhiyun 		_req->zero = 1;
758*4882a593Smuzhiyun 
759*4882a593Smuzhiyun 	/* kickstart this i/o queue? */
760*4882a593Smuzhiyun 	status = 0;
761*4882a593Smuzhiyun 	if (list_empty(&ep->queue) && likely(!ep->stopped)) {
762*4882a593Smuzhiyun 		/* dma:  done after dma completion IRQ (or error)
763*4882a593Smuzhiyun 		 * pio:  done after last fifo operation
764*4882a593Smuzhiyun 		 */
765*4882a593Smuzhiyun 		if (ep->dma)
766*4882a593Smuzhiyun 			status = start_dma(ep, req);
767*4882a593Smuzhiyun 		else
768*4882a593Smuzhiyun 			status = (ep->is_in ? write_fifo : read_fifo)(ep, req);
769*4882a593Smuzhiyun 
770*4882a593Smuzhiyun 		if (unlikely(status != 0)) {
771*4882a593Smuzhiyun 			if (status > 0)
772*4882a593Smuzhiyun 				status = 0;
773*4882a593Smuzhiyun 			req = NULL;
774*4882a593Smuzhiyun 		}
775*4882a593Smuzhiyun 
776*4882a593Smuzhiyun 	} /* else pio or dma irq handler advances the queue. */
777*4882a593Smuzhiyun 
778*4882a593Smuzhiyun 	if (likely(req != NULL))
779*4882a593Smuzhiyun 		list_add_tail(&req->queue, &ep->queue);
780*4882a593Smuzhiyun 
781*4882a593Smuzhiyun 	if (likely(!list_empty(&ep->queue))
782*4882a593Smuzhiyun 			&& likely(ep->num != 0)
783*4882a593Smuzhiyun 			&& !ep->dma
784*4882a593Smuzhiyun 			&& !(dev->int_enable & INT_EPxDATASET (ep->num)))
785*4882a593Smuzhiyun 		pio_irq_enable(dev, dev->regs, ep->num);
786*4882a593Smuzhiyun 
787*4882a593Smuzhiyun 	spin_unlock_irqrestore(&dev->lock, flags);
788*4882a593Smuzhiyun 
789*4882a593Smuzhiyun 	/* pci writes may still be posted */
790*4882a593Smuzhiyun 	return status;
791*4882a593Smuzhiyun }
792*4882a593Smuzhiyun 
793*4882a593Smuzhiyun /* dequeue ALL requests */
nuke(struct goku_ep * ep,int status)794*4882a593Smuzhiyun static void nuke(struct goku_ep *ep, int status)
795*4882a593Smuzhiyun {
796*4882a593Smuzhiyun 	struct goku_request	*req;
797*4882a593Smuzhiyun 
798*4882a593Smuzhiyun 	ep->stopped = 1;
799*4882a593Smuzhiyun 	if (list_empty(&ep->queue))
800*4882a593Smuzhiyun 		return;
801*4882a593Smuzhiyun 	if (ep->dma)
802*4882a593Smuzhiyun 		abort_dma(ep, status);
803*4882a593Smuzhiyun 	while (!list_empty(&ep->queue)) {
804*4882a593Smuzhiyun 		req = list_entry(ep->queue.next, struct goku_request, queue);
805*4882a593Smuzhiyun 		done(ep, req, status);
806*4882a593Smuzhiyun 	}
807*4882a593Smuzhiyun }
808*4882a593Smuzhiyun 
809*4882a593Smuzhiyun /* dequeue JUST ONE request */
goku_dequeue(struct usb_ep * _ep,struct usb_request * _req)810*4882a593Smuzhiyun static int goku_dequeue(struct usb_ep *_ep, struct usb_request *_req)
811*4882a593Smuzhiyun {
812*4882a593Smuzhiyun 	struct goku_request	*req;
813*4882a593Smuzhiyun 	struct goku_ep		*ep;
814*4882a593Smuzhiyun 	struct goku_udc		*dev;
815*4882a593Smuzhiyun 	unsigned long		flags;
816*4882a593Smuzhiyun 
817*4882a593Smuzhiyun 	ep = container_of(_ep, struct goku_ep, ep);
818*4882a593Smuzhiyun 	if (!_ep || !_req || (!ep->ep.desc && ep->num != 0))
819*4882a593Smuzhiyun 		return -EINVAL;
820*4882a593Smuzhiyun 	dev = ep->dev;
821*4882a593Smuzhiyun 	if (!dev->driver)
822*4882a593Smuzhiyun 		return -ESHUTDOWN;
823*4882a593Smuzhiyun 
824*4882a593Smuzhiyun 	/* we can't touch (dma) registers when suspended */
825*4882a593Smuzhiyun 	if (dev->ep0state == EP0_SUSPEND)
826*4882a593Smuzhiyun 		return -EBUSY;
827*4882a593Smuzhiyun 
828*4882a593Smuzhiyun 	VDBG(dev, "%s %s %s %s %p\n", __func__, _ep->name,
829*4882a593Smuzhiyun 		ep->is_in ? "IN" : "OUT",
830*4882a593Smuzhiyun 		ep->dma ? "dma" : "pio",
831*4882a593Smuzhiyun 		_req);
832*4882a593Smuzhiyun 
833*4882a593Smuzhiyun 	spin_lock_irqsave(&dev->lock, flags);
834*4882a593Smuzhiyun 
835*4882a593Smuzhiyun 	/* make sure it's actually queued on this endpoint */
836*4882a593Smuzhiyun 	list_for_each_entry (req, &ep->queue, queue) {
837*4882a593Smuzhiyun 		if (&req->req == _req)
838*4882a593Smuzhiyun 			break;
839*4882a593Smuzhiyun 	}
840*4882a593Smuzhiyun 	if (&req->req != _req) {
841*4882a593Smuzhiyun 		spin_unlock_irqrestore (&dev->lock, flags);
842*4882a593Smuzhiyun 		return -EINVAL;
843*4882a593Smuzhiyun 	}
844*4882a593Smuzhiyun 
845*4882a593Smuzhiyun 	if (ep->dma && ep->queue.next == &req->queue && !ep->stopped) {
846*4882a593Smuzhiyun 		abort_dma(ep, -ECONNRESET);
847*4882a593Smuzhiyun 		done(ep, req, -ECONNRESET);
848*4882a593Smuzhiyun 		dma_advance(dev, ep);
849*4882a593Smuzhiyun 	} else if (!list_empty(&req->queue))
850*4882a593Smuzhiyun 		done(ep, req, -ECONNRESET);
851*4882a593Smuzhiyun 	else
852*4882a593Smuzhiyun 		req = NULL;
853*4882a593Smuzhiyun 	spin_unlock_irqrestore(&dev->lock, flags);
854*4882a593Smuzhiyun 
855*4882a593Smuzhiyun 	return req ? 0 : -EOPNOTSUPP;
856*4882a593Smuzhiyun }
857*4882a593Smuzhiyun 
858*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
859*4882a593Smuzhiyun 
goku_clear_halt(struct goku_ep * ep)860*4882a593Smuzhiyun static void goku_clear_halt(struct goku_ep *ep)
861*4882a593Smuzhiyun {
862*4882a593Smuzhiyun 	// assert (ep->num !=0)
863*4882a593Smuzhiyun 	VDBG(ep->dev, "%s clear halt\n", ep->ep.name);
864*4882a593Smuzhiyun 	command(ep->dev->regs, COMMAND_SETDATA0, ep->num);
865*4882a593Smuzhiyun 	command(ep->dev->regs, COMMAND_STALL_CLEAR, ep->num);
866*4882a593Smuzhiyun 	if (ep->stopped) {
867*4882a593Smuzhiyun 		ep->stopped = 0;
868*4882a593Smuzhiyun 		if (ep->dma) {
869*4882a593Smuzhiyun 			struct goku_request	*req;
870*4882a593Smuzhiyun 
871*4882a593Smuzhiyun 			if (list_empty(&ep->queue))
872*4882a593Smuzhiyun 				return;
873*4882a593Smuzhiyun 			req = list_entry(ep->queue.next, struct goku_request,
874*4882a593Smuzhiyun 						queue);
875*4882a593Smuzhiyun 			(void) start_dma(ep, req);
876*4882a593Smuzhiyun 		} else
877*4882a593Smuzhiyun 			pio_advance(ep);
878*4882a593Smuzhiyun 	}
879*4882a593Smuzhiyun }
880*4882a593Smuzhiyun 
goku_set_halt(struct usb_ep * _ep,int value)881*4882a593Smuzhiyun static int goku_set_halt(struct usb_ep *_ep, int value)
882*4882a593Smuzhiyun {
883*4882a593Smuzhiyun 	struct goku_ep	*ep;
884*4882a593Smuzhiyun 	unsigned long	flags;
885*4882a593Smuzhiyun 	int		retval = 0;
886*4882a593Smuzhiyun 
887*4882a593Smuzhiyun 	if (!_ep)
888*4882a593Smuzhiyun 		return -ENODEV;
889*4882a593Smuzhiyun 	ep = container_of (_ep, struct goku_ep, ep);
890*4882a593Smuzhiyun 
891*4882a593Smuzhiyun 	if (ep->num == 0) {
892*4882a593Smuzhiyun 		if (value) {
893*4882a593Smuzhiyun 			ep->dev->ep0state = EP0_STALL;
894*4882a593Smuzhiyun 			ep->dev->ep[0].stopped = 1;
895*4882a593Smuzhiyun 		} else
896*4882a593Smuzhiyun 			return -EINVAL;
897*4882a593Smuzhiyun 
898*4882a593Smuzhiyun 	/* don't change EPxSTATUS_EP_INVALID to READY */
899*4882a593Smuzhiyun 	} else if (!ep->ep.desc) {
900*4882a593Smuzhiyun 		DBG(ep->dev, "%s %s inactive?\n", __func__, ep->ep.name);
901*4882a593Smuzhiyun 		return -EINVAL;
902*4882a593Smuzhiyun 	}
903*4882a593Smuzhiyun 
904*4882a593Smuzhiyun 	spin_lock_irqsave(&ep->dev->lock, flags);
905*4882a593Smuzhiyun 	if (!list_empty(&ep->queue))
906*4882a593Smuzhiyun 		retval = -EAGAIN;
907*4882a593Smuzhiyun 	else if (ep->is_in && value
908*4882a593Smuzhiyun 			/* data in (either) packet buffer? */
909*4882a593Smuzhiyun 			&& (readl(&ep->dev->regs->DataSet)
910*4882a593Smuzhiyun 					& DATASET_AB(ep->num)))
911*4882a593Smuzhiyun 		retval = -EAGAIN;
912*4882a593Smuzhiyun 	else if (!value)
913*4882a593Smuzhiyun 		goku_clear_halt(ep);
914*4882a593Smuzhiyun 	else {
915*4882a593Smuzhiyun 		ep->stopped = 1;
916*4882a593Smuzhiyun 		VDBG(ep->dev, "%s set halt\n", ep->ep.name);
917*4882a593Smuzhiyun 		command(ep->dev->regs, COMMAND_STALL, ep->num);
918*4882a593Smuzhiyun 		readl(ep->reg_status);
919*4882a593Smuzhiyun 	}
920*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ep->dev->lock, flags);
921*4882a593Smuzhiyun 	return retval;
922*4882a593Smuzhiyun }
923*4882a593Smuzhiyun 
goku_fifo_status(struct usb_ep * _ep)924*4882a593Smuzhiyun static int goku_fifo_status(struct usb_ep *_ep)
925*4882a593Smuzhiyun {
926*4882a593Smuzhiyun 	struct goku_ep			*ep;
927*4882a593Smuzhiyun 	struct goku_udc_regs __iomem	*regs;
928*4882a593Smuzhiyun 	u32				size;
929*4882a593Smuzhiyun 
930*4882a593Smuzhiyun 	if (!_ep)
931*4882a593Smuzhiyun 		return -ENODEV;
932*4882a593Smuzhiyun 	ep = container_of(_ep, struct goku_ep, ep);
933*4882a593Smuzhiyun 
934*4882a593Smuzhiyun 	/* size is only reported sanely for OUT */
935*4882a593Smuzhiyun 	if (ep->is_in)
936*4882a593Smuzhiyun 		return -EOPNOTSUPP;
937*4882a593Smuzhiyun 
938*4882a593Smuzhiyun 	/* ignores 16-byte dma buffer; SizeH == 0 */
939*4882a593Smuzhiyun 	regs = ep->dev->regs;
940*4882a593Smuzhiyun 	size = readl(&regs->EPxSizeLA[ep->num]) & DATASIZE;
941*4882a593Smuzhiyun 	size += readl(&regs->EPxSizeLB[ep->num]) & DATASIZE;
942*4882a593Smuzhiyun 	VDBG(ep->dev, "%s %s %u\n", __func__, ep->ep.name, size);
943*4882a593Smuzhiyun 	return size;
944*4882a593Smuzhiyun }
945*4882a593Smuzhiyun 
goku_fifo_flush(struct usb_ep * _ep)946*4882a593Smuzhiyun static void goku_fifo_flush(struct usb_ep *_ep)
947*4882a593Smuzhiyun {
948*4882a593Smuzhiyun 	struct goku_ep			*ep;
949*4882a593Smuzhiyun 	struct goku_udc_regs __iomem	*regs;
950*4882a593Smuzhiyun 	u32				size;
951*4882a593Smuzhiyun 
952*4882a593Smuzhiyun 	if (!_ep)
953*4882a593Smuzhiyun 		return;
954*4882a593Smuzhiyun 	ep = container_of(_ep, struct goku_ep, ep);
955*4882a593Smuzhiyun 	VDBG(ep->dev, "%s %s\n", __func__, ep->ep.name);
956*4882a593Smuzhiyun 
957*4882a593Smuzhiyun 	/* don't change EPxSTATUS_EP_INVALID to READY */
958*4882a593Smuzhiyun 	if (!ep->ep.desc && ep->num != 0) {
959*4882a593Smuzhiyun 		DBG(ep->dev, "%s %s inactive?\n", __func__, ep->ep.name);
960*4882a593Smuzhiyun 		return;
961*4882a593Smuzhiyun 	}
962*4882a593Smuzhiyun 
963*4882a593Smuzhiyun 	regs = ep->dev->regs;
964*4882a593Smuzhiyun 	size = readl(&regs->EPxSizeLA[ep->num]);
965*4882a593Smuzhiyun 	size &= DATASIZE;
966*4882a593Smuzhiyun 
967*4882a593Smuzhiyun 	/* Non-desirable behavior:  FIFO_CLEAR also clears the
968*4882a593Smuzhiyun 	 * endpoint halt feature.  For OUT, we _could_ just read
969*4882a593Smuzhiyun 	 * the bytes out (PIO, if !ep->dma); for in, no choice.
970*4882a593Smuzhiyun 	 */
971*4882a593Smuzhiyun 	if (size)
972*4882a593Smuzhiyun 		command(regs, COMMAND_FIFO_CLEAR, ep->num);
973*4882a593Smuzhiyun }
974*4882a593Smuzhiyun 
975*4882a593Smuzhiyun static const struct usb_ep_ops goku_ep_ops = {
976*4882a593Smuzhiyun 	.enable		= goku_ep_enable,
977*4882a593Smuzhiyun 	.disable	= goku_ep_disable,
978*4882a593Smuzhiyun 
979*4882a593Smuzhiyun 	.alloc_request	= goku_alloc_request,
980*4882a593Smuzhiyun 	.free_request	= goku_free_request,
981*4882a593Smuzhiyun 
982*4882a593Smuzhiyun 	.queue		= goku_queue,
983*4882a593Smuzhiyun 	.dequeue	= goku_dequeue,
984*4882a593Smuzhiyun 
985*4882a593Smuzhiyun 	.set_halt	= goku_set_halt,
986*4882a593Smuzhiyun 	.fifo_status	= goku_fifo_status,
987*4882a593Smuzhiyun 	.fifo_flush	= goku_fifo_flush,
988*4882a593Smuzhiyun };
989*4882a593Smuzhiyun 
990*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
991*4882a593Smuzhiyun 
goku_get_frame(struct usb_gadget * _gadget)992*4882a593Smuzhiyun static int goku_get_frame(struct usb_gadget *_gadget)
993*4882a593Smuzhiyun {
994*4882a593Smuzhiyun 	return -EOPNOTSUPP;
995*4882a593Smuzhiyun }
996*4882a593Smuzhiyun 
goku_match_ep(struct usb_gadget * g,struct usb_endpoint_descriptor * desc,struct usb_ss_ep_comp_descriptor * ep_comp)997*4882a593Smuzhiyun static struct usb_ep *goku_match_ep(struct usb_gadget *g,
998*4882a593Smuzhiyun 		struct usb_endpoint_descriptor *desc,
999*4882a593Smuzhiyun 		struct usb_ss_ep_comp_descriptor *ep_comp)
1000*4882a593Smuzhiyun {
1001*4882a593Smuzhiyun 	struct goku_udc	*dev = to_goku_udc(g);
1002*4882a593Smuzhiyun 	struct usb_ep *ep;
1003*4882a593Smuzhiyun 
1004*4882a593Smuzhiyun 	switch (usb_endpoint_type(desc)) {
1005*4882a593Smuzhiyun 	case USB_ENDPOINT_XFER_INT:
1006*4882a593Smuzhiyun 		/* single buffering is enough */
1007*4882a593Smuzhiyun 		ep = &dev->ep[3].ep;
1008*4882a593Smuzhiyun 		if (usb_gadget_ep_match_desc(g, ep, desc, ep_comp))
1009*4882a593Smuzhiyun 			return ep;
1010*4882a593Smuzhiyun 		break;
1011*4882a593Smuzhiyun 	case USB_ENDPOINT_XFER_BULK:
1012*4882a593Smuzhiyun 		if (usb_endpoint_dir_in(desc)) {
1013*4882a593Smuzhiyun 			/* DMA may be available */
1014*4882a593Smuzhiyun 			ep = &dev->ep[2].ep;
1015*4882a593Smuzhiyun 			if (usb_gadget_ep_match_desc(g, ep, desc, ep_comp))
1016*4882a593Smuzhiyun 				return ep;
1017*4882a593Smuzhiyun 		}
1018*4882a593Smuzhiyun 		break;
1019*4882a593Smuzhiyun 	default:
1020*4882a593Smuzhiyun 		/* nothing */ ;
1021*4882a593Smuzhiyun 	}
1022*4882a593Smuzhiyun 
1023*4882a593Smuzhiyun 	return NULL;
1024*4882a593Smuzhiyun }
1025*4882a593Smuzhiyun 
1026*4882a593Smuzhiyun static int goku_udc_start(struct usb_gadget *g,
1027*4882a593Smuzhiyun 		struct usb_gadget_driver *driver);
1028*4882a593Smuzhiyun static int goku_udc_stop(struct usb_gadget *g);
1029*4882a593Smuzhiyun 
1030*4882a593Smuzhiyun static const struct usb_gadget_ops goku_ops = {
1031*4882a593Smuzhiyun 	.get_frame	= goku_get_frame,
1032*4882a593Smuzhiyun 	.udc_start	= goku_udc_start,
1033*4882a593Smuzhiyun 	.udc_stop	= goku_udc_stop,
1034*4882a593Smuzhiyun 	.match_ep	= goku_match_ep,
1035*4882a593Smuzhiyun 	// no remote wakeup
1036*4882a593Smuzhiyun 	// not selfpowered
1037*4882a593Smuzhiyun };
1038*4882a593Smuzhiyun 
1039*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
1040*4882a593Smuzhiyun 
dmastr(void)1041*4882a593Smuzhiyun static inline const char *dmastr(void)
1042*4882a593Smuzhiyun {
1043*4882a593Smuzhiyun 	if (use_dma == 0)
1044*4882a593Smuzhiyun 		return "(dma disabled)";
1045*4882a593Smuzhiyun 	else if (use_dma == 2)
1046*4882a593Smuzhiyun 		return "(dma IN and OUT)";
1047*4882a593Smuzhiyun 	else
1048*4882a593Smuzhiyun 		return "(dma IN)";
1049*4882a593Smuzhiyun }
1050*4882a593Smuzhiyun 
1051*4882a593Smuzhiyun #ifdef CONFIG_USB_GADGET_DEBUG_FILES
1052*4882a593Smuzhiyun 
1053*4882a593Smuzhiyun static const char proc_node_name [] = "driver/udc";
1054*4882a593Smuzhiyun 
1055*4882a593Smuzhiyun #define FOURBITS "%s%s%s%s"
1056*4882a593Smuzhiyun #define EIGHTBITS FOURBITS FOURBITS
1057*4882a593Smuzhiyun 
dump_intmask(struct seq_file * m,const char * label,u32 mask)1058*4882a593Smuzhiyun static void dump_intmask(struct seq_file *m, const char *label, u32 mask)
1059*4882a593Smuzhiyun {
1060*4882a593Smuzhiyun 	/* int_status is the same format ... */
1061*4882a593Smuzhiyun 	seq_printf(m, "%s %05X =" FOURBITS EIGHTBITS EIGHTBITS "\n",
1062*4882a593Smuzhiyun 		   label, mask,
1063*4882a593Smuzhiyun 		   (mask & INT_PWRDETECT) ? " power" : "",
1064*4882a593Smuzhiyun 		   (mask & INT_SYSERROR) ? " sys" : "",
1065*4882a593Smuzhiyun 		   (mask & INT_MSTRDEND) ? " in-dma" : "",
1066*4882a593Smuzhiyun 		   (mask & INT_MSTWRTMOUT) ? " wrtmo" : "",
1067*4882a593Smuzhiyun 
1068*4882a593Smuzhiyun 		   (mask & INT_MSTWREND) ? " out-dma" : "",
1069*4882a593Smuzhiyun 		   (mask & INT_MSTWRSET) ? " wrset" : "",
1070*4882a593Smuzhiyun 		   (mask & INT_ERR) ? " err" : "",
1071*4882a593Smuzhiyun 		   (mask & INT_SOF) ? " sof" : "",
1072*4882a593Smuzhiyun 
1073*4882a593Smuzhiyun 		   (mask & INT_EP3NAK) ? " ep3nak" : "",
1074*4882a593Smuzhiyun 		   (mask & INT_EP2NAK) ? " ep2nak" : "",
1075*4882a593Smuzhiyun 		   (mask & INT_EP1NAK) ? " ep1nak" : "",
1076*4882a593Smuzhiyun 		   (mask & INT_EP3DATASET) ? " ep3" : "",
1077*4882a593Smuzhiyun 
1078*4882a593Smuzhiyun 		   (mask & INT_EP2DATASET) ? " ep2" : "",
1079*4882a593Smuzhiyun 		   (mask & INT_EP1DATASET) ? " ep1" : "",
1080*4882a593Smuzhiyun 		   (mask & INT_STATUSNAK) ? " ep0snak" : "",
1081*4882a593Smuzhiyun 		   (mask & INT_STATUS) ? " ep0status" : "",
1082*4882a593Smuzhiyun 
1083*4882a593Smuzhiyun 		   (mask & INT_SETUP) ? " setup" : "",
1084*4882a593Smuzhiyun 		   (mask & INT_ENDPOINT0) ? " ep0" : "",
1085*4882a593Smuzhiyun 		   (mask & INT_USBRESET) ? " reset" : "",
1086*4882a593Smuzhiyun 		   (mask & INT_SUSPEND) ? " suspend" : "");
1087*4882a593Smuzhiyun }
1088*4882a593Smuzhiyun 
udc_ep_state(enum ep0state state)1089*4882a593Smuzhiyun static const char *udc_ep_state(enum ep0state state)
1090*4882a593Smuzhiyun {
1091*4882a593Smuzhiyun 	switch (state) {
1092*4882a593Smuzhiyun 	case EP0_DISCONNECT:
1093*4882a593Smuzhiyun 		return "ep0_disconnect";
1094*4882a593Smuzhiyun 	case EP0_IDLE:
1095*4882a593Smuzhiyun 		return "ep0_idle";
1096*4882a593Smuzhiyun 	case EP0_IN:
1097*4882a593Smuzhiyun 		return "ep0_in";
1098*4882a593Smuzhiyun 	case EP0_OUT:
1099*4882a593Smuzhiyun 		return "ep0_out";
1100*4882a593Smuzhiyun 	case EP0_STATUS:
1101*4882a593Smuzhiyun 		return "ep0_status";
1102*4882a593Smuzhiyun 	case EP0_STALL:
1103*4882a593Smuzhiyun 		return "ep0_stall";
1104*4882a593Smuzhiyun 	case EP0_SUSPEND:
1105*4882a593Smuzhiyun 		return "ep0_suspend";
1106*4882a593Smuzhiyun 	}
1107*4882a593Smuzhiyun 
1108*4882a593Smuzhiyun 	return "ep0_?";
1109*4882a593Smuzhiyun }
1110*4882a593Smuzhiyun 
udc_ep_status(u32 status)1111*4882a593Smuzhiyun static const char *udc_ep_status(u32 status)
1112*4882a593Smuzhiyun {
1113*4882a593Smuzhiyun 	switch (status & EPxSTATUS_EP_MASK) {
1114*4882a593Smuzhiyun 	case EPxSTATUS_EP_READY:
1115*4882a593Smuzhiyun 		return "ready";
1116*4882a593Smuzhiyun 	case EPxSTATUS_EP_DATAIN:
1117*4882a593Smuzhiyun 		return "packet";
1118*4882a593Smuzhiyun 	case EPxSTATUS_EP_FULL:
1119*4882a593Smuzhiyun 		return "full";
1120*4882a593Smuzhiyun 	case EPxSTATUS_EP_TX_ERR:	/* host will retry */
1121*4882a593Smuzhiyun 		return "tx_err";
1122*4882a593Smuzhiyun 	case EPxSTATUS_EP_RX_ERR:
1123*4882a593Smuzhiyun 		return "rx_err";
1124*4882a593Smuzhiyun 	case EPxSTATUS_EP_BUSY:		/* ep0 only */
1125*4882a593Smuzhiyun 		return "busy";
1126*4882a593Smuzhiyun 	case EPxSTATUS_EP_STALL:
1127*4882a593Smuzhiyun 		return "stall";
1128*4882a593Smuzhiyun 	case EPxSTATUS_EP_INVALID:	/* these "can't happen" */
1129*4882a593Smuzhiyun 		return "invalid";
1130*4882a593Smuzhiyun 	}
1131*4882a593Smuzhiyun 
1132*4882a593Smuzhiyun 	return "?";
1133*4882a593Smuzhiyun }
1134*4882a593Smuzhiyun 
udc_proc_read(struct seq_file * m,void * v)1135*4882a593Smuzhiyun static int udc_proc_read(struct seq_file *m, void *v)
1136*4882a593Smuzhiyun {
1137*4882a593Smuzhiyun 	struct goku_udc			*dev = m->private;
1138*4882a593Smuzhiyun 	struct goku_udc_regs __iomem	*regs = dev->regs;
1139*4882a593Smuzhiyun 	unsigned long			flags;
1140*4882a593Smuzhiyun 	int				i, is_usb_connected;
1141*4882a593Smuzhiyun 	u32				tmp;
1142*4882a593Smuzhiyun 
1143*4882a593Smuzhiyun 	local_irq_save(flags);
1144*4882a593Smuzhiyun 
1145*4882a593Smuzhiyun 	/* basic device status */
1146*4882a593Smuzhiyun 	tmp = readl(&regs->power_detect);
1147*4882a593Smuzhiyun 	is_usb_connected = tmp & PW_DETECT;
1148*4882a593Smuzhiyun 	seq_printf(m,
1149*4882a593Smuzhiyun 		   "%s - %s\n"
1150*4882a593Smuzhiyun 		   "%s version: %s %s\n"
1151*4882a593Smuzhiyun 		   "Gadget driver: %s\n"
1152*4882a593Smuzhiyun 		   "Host %s, %s\n"
1153*4882a593Smuzhiyun 		   "\n",
1154*4882a593Smuzhiyun 		   pci_name(dev->pdev), driver_desc,
1155*4882a593Smuzhiyun 		   driver_name, DRIVER_VERSION, dmastr(),
1156*4882a593Smuzhiyun 		   dev->driver ? dev->driver->driver.name : "(none)",
1157*4882a593Smuzhiyun 		   is_usb_connected
1158*4882a593Smuzhiyun 			   ? ((tmp & PW_PULLUP) ? "full speed" : "powered")
1159*4882a593Smuzhiyun 			   : "disconnected",
1160*4882a593Smuzhiyun 		   udc_ep_state(dev->ep0state));
1161*4882a593Smuzhiyun 
1162*4882a593Smuzhiyun 	dump_intmask(m, "int_status", readl(&regs->int_status));
1163*4882a593Smuzhiyun 	dump_intmask(m, "int_enable", readl(&regs->int_enable));
1164*4882a593Smuzhiyun 
1165*4882a593Smuzhiyun 	if (!is_usb_connected || !dev->driver || (tmp & PW_PULLUP) == 0)
1166*4882a593Smuzhiyun 		goto done;
1167*4882a593Smuzhiyun 
1168*4882a593Smuzhiyun 	/* registers for (active) device and ep0 */
1169*4882a593Smuzhiyun 	seq_printf(m, "\nirqs %lu\ndataset %02x single.bcs %02x.%02x state %x addr %u\n",
1170*4882a593Smuzhiyun 		   dev->irqs, readl(&regs->DataSet),
1171*4882a593Smuzhiyun 		   readl(&regs->EPxSingle), readl(&regs->EPxBCS),
1172*4882a593Smuzhiyun 		   readl(&regs->UsbState),
1173*4882a593Smuzhiyun 		   readl(&regs->address));
1174*4882a593Smuzhiyun 	if (seq_has_overflowed(m))
1175*4882a593Smuzhiyun 		goto done;
1176*4882a593Smuzhiyun 
1177*4882a593Smuzhiyun 	tmp = readl(&regs->dma_master);
1178*4882a593Smuzhiyun 	seq_printf(m, "dma %03X =" EIGHTBITS "%s %s\n",
1179*4882a593Smuzhiyun 		   tmp,
1180*4882a593Smuzhiyun 		   (tmp & MST_EOPB_DIS) ? " eopb-" : "",
1181*4882a593Smuzhiyun 		   (tmp & MST_EOPB_ENA) ? " eopb+" : "",
1182*4882a593Smuzhiyun 		   (tmp & MST_TIMEOUT_DIS) ? " tmo-" : "",
1183*4882a593Smuzhiyun 		   (tmp & MST_TIMEOUT_ENA) ? " tmo+" : "",
1184*4882a593Smuzhiyun 
1185*4882a593Smuzhiyun 		   (tmp & MST_RD_EOPB) ? " eopb" : "",
1186*4882a593Smuzhiyun 		   (tmp & MST_RD_RESET) ? " in_reset" : "",
1187*4882a593Smuzhiyun 		   (tmp & MST_WR_RESET) ? " out_reset" : "",
1188*4882a593Smuzhiyun 		   (tmp & MST_RD_ENA) ? " IN" : "",
1189*4882a593Smuzhiyun 
1190*4882a593Smuzhiyun 		   (tmp & MST_WR_ENA) ? " OUT" : "",
1191*4882a593Smuzhiyun 		   (tmp & MST_CONNECTION) ? "ep1in/ep2out" : "ep1out/ep2in");
1192*4882a593Smuzhiyun 	if (seq_has_overflowed(m))
1193*4882a593Smuzhiyun 		goto done;
1194*4882a593Smuzhiyun 
1195*4882a593Smuzhiyun 	/* dump endpoint queues */
1196*4882a593Smuzhiyun 	for (i = 0; i < 4; i++) {
1197*4882a593Smuzhiyun 		struct goku_ep		*ep = &dev->ep [i];
1198*4882a593Smuzhiyun 		struct goku_request	*req;
1199*4882a593Smuzhiyun 
1200*4882a593Smuzhiyun 		if (i && !ep->ep.desc)
1201*4882a593Smuzhiyun 			continue;
1202*4882a593Smuzhiyun 
1203*4882a593Smuzhiyun 		tmp = readl(ep->reg_status);
1204*4882a593Smuzhiyun 		seq_printf(m, "%s %s max %u %s, irqs %lu, status %02x (%s) " FOURBITS "\n",
1205*4882a593Smuzhiyun 			   ep->ep.name,
1206*4882a593Smuzhiyun 			   ep->is_in ? "in" : "out",
1207*4882a593Smuzhiyun 			   ep->ep.maxpacket,
1208*4882a593Smuzhiyun 			   ep->dma ? "dma" : "pio",
1209*4882a593Smuzhiyun 			   ep->irqs,
1210*4882a593Smuzhiyun 			   tmp, udc_ep_status(tmp),
1211*4882a593Smuzhiyun 			   (tmp & EPxSTATUS_TOGGLE) ? "data1" : "data0",
1212*4882a593Smuzhiyun 			   (tmp & EPxSTATUS_SUSPEND) ? " suspend" : "",
1213*4882a593Smuzhiyun 			   (tmp & EPxSTATUS_FIFO_DISABLE) ? " disable" : "",
1214*4882a593Smuzhiyun 			   (tmp & EPxSTATUS_STAGE_ERROR) ? " ep0stat" : "");
1215*4882a593Smuzhiyun 		if (seq_has_overflowed(m))
1216*4882a593Smuzhiyun 			goto done;
1217*4882a593Smuzhiyun 
1218*4882a593Smuzhiyun 		if (list_empty(&ep->queue)) {
1219*4882a593Smuzhiyun 			seq_puts(m, "\t(nothing queued)\n");
1220*4882a593Smuzhiyun 			if (seq_has_overflowed(m))
1221*4882a593Smuzhiyun 				goto done;
1222*4882a593Smuzhiyun 			continue;
1223*4882a593Smuzhiyun 		}
1224*4882a593Smuzhiyun 		list_for_each_entry(req, &ep->queue, queue) {
1225*4882a593Smuzhiyun 			if (ep->dma && req->queue.prev == &ep->queue) {
1226*4882a593Smuzhiyun 				if (i == UDC_MSTRD_ENDPOINT)
1227*4882a593Smuzhiyun 					tmp = readl(&regs->in_dma_current);
1228*4882a593Smuzhiyun 				else
1229*4882a593Smuzhiyun 					tmp = readl(&regs->out_dma_current);
1230*4882a593Smuzhiyun 				tmp -= req->req.dma;
1231*4882a593Smuzhiyun 				tmp++;
1232*4882a593Smuzhiyun 			} else
1233*4882a593Smuzhiyun 				tmp = req->req.actual;
1234*4882a593Smuzhiyun 
1235*4882a593Smuzhiyun 			seq_printf(m, "\treq %p len %u/%u buf %p\n",
1236*4882a593Smuzhiyun 				   &req->req, tmp, req->req.length,
1237*4882a593Smuzhiyun 				   req->req.buf);
1238*4882a593Smuzhiyun 			if (seq_has_overflowed(m))
1239*4882a593Smuzhiyun 				goto done;
1240*4882a593Smuzhiyun 		}
1241*4882a593Smuzhiyun 	}
1242*4882a593Smuzhiyun 
1243*4882a593Smuzhiyun done:
1244*4882a593Smuzhiyun 	local_irq_restore(flags);
1245*4882a593Smuzhiyun 	return 0;
1246*4882a593Smuzhiyun }
1247*4882a593Smuzhiyun #endif	/* CONFIG_USB_GADGET_DEBUG_FILES */
1248*4882a593Smuzhiyun 
1249*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
1250*4882a593Smuzhiyun 
udc_reinit(struct goku_udc * dev)1251*4882a593Smuzhiyun static void udc_reinit (struct goku_udc *dev)
1252*4882a593Smuzhiyun {
1253*4882a593Smuzhiyun 	static char *names [] = { "ep0", "ep1-bulk", "ep2-bulk", "ep3-bulk" };
1254*4882a593Smuzhiyun 
1255*4882a593Smuzhiyun 	unsigned i;
1256*4882a593Smuzhiyun 
1257*4882a593Smuzhiyun 	INIT_LIST_HEAD (&dev->gadget.ep_list);
1258*4882a593Smuzhiyun 	dev->gadget.ep0 = &dev->ep [0].ep;
1259*4882a593Smuzhiyun 	dev->gadget.speed = USB_SPEED_UNKNOWN;
1260*4882a593Smuzhiyun 	dev->ep0state = EP0_DISCONNECT;
1261*4882a593Smuzhiyun 	dev->irqs = 0;
1262*4882a593Smuzhiyun 
1263*4882a593Smuzhiyun 	for (i = 0; i < 4; i++) {
1264*4882a593Smuzhiyun 		struct goku_ep	*ep = &dev->ep[i];
1265*4882a593Smuzhiyun 
1266*4882a593Smuzhiyun 		ep->num = i;
1267*4882a593Smuzhiyun 		ep->ep.name = names[i];
1268*4882a593Smuzhiyun 		ep->reg_fifo = &dev->regs->ep_fifo [i];
1269*4882a593Smuzhiyun 		ep->reg_status = &dev->regs->ep_status [i];
1270*4882a593Smuzhiyun 		ep->reg_mode = &dev->regs->ep_mode[i];
1271*4882a593Smuzhiyun 
1272*4882a593Smuzhiyun 		ep->ep.ops = &goku_ep_ops;
1273*4882a593Smuzhiyun 		list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1274*4882a593Smuzhiyun 		ep->dev = dev;
1275*4882a593Smuzhiyun 		INIT_LIST_HEAD (&ep->queue);
1276*4882a593Smuzhiyun 
1277*4882a593Smuzhiyun 		ep_reset(NULL, ep);
1278*4882a593Smuzhiyun 
1279*4882a593Smuzhiyun 		if (i == 0)
1280*4882a593Smuzhiyun 			ep->ep.caps.type_control = true;
1281*4882a593Smuzhiyun 		else
1282*4882a593Smuzhiyun 			ep->ep.caps.type_bulk = true;
1283*4882a593Smuzhiyun 
1284*4882a593Smuzhiyun 		ep->ep.caps.dir_in = true;
1285*4882a593Smuzhiyun 		ep->ep.caps.dir_out = true;
1286*4882a593Smuzhiyun 	}
1287*4882a593Smuzhiyun 
1288*4882a593Smuzhiyun 	dev->ep[0].reg_mode = NULL;
1289*4882a593Smuzhiyun 	usb_ep_set_maxpacket_limit(&dev->ep[0].ep, MAX_EP0_SIZE);
1290*4882a593Smuzhiyun 	list_del_init (&dev->ep[0].ep.ep_list);
1291*4882a593Smuzhiyun }
1292*4882a593Smuzhiyun 
udc_reset(struct goku_udc * dev)1293*4882a593Smuzhiyun static void udc_reset(struct goku_udc *dev)
1294*4882a593Smuzhiyun {
1295*4882a593Smuzhiyun 	struct goku_udc_regs __iomem	*regs = dev->regs;
1296*4882a593Smuzhiyun 
1297*4882a593Smuzhiyun 	writel(0, &regs->power_detect);
1298*4882a593Smuzhiyun 	writel(0, &regs->int_enable);
1299*4882a593Smuzhiyun 	readl(&regs->int_enable);
1300*4882a593Smuzhiyun 	dev->int_enable = 0;
1301*4882a593Smuzhiyun 
1302*4882a593Smuzhiyun 	/* deassert reset, leave USB D+ at hi-Z (no pullup)
1303*4882a593Smuzhiyun 	 * don't let INT_PWRDETECT sequence begin
1304*4882a593Smuzhiyun 	 */
1305*4882a593Smuzhiyun 	udelay(250);
1306*4882a593Smuzhiyun 	writel(PW_RESETB, &regs->power_detect);
1307*4882a593Smuzhiyun 	readl(&regs->int_enable);
1308*4882a593Smuzhiyun }
1309*4882a593Smuzhiyun 
ep0_start(struct goku_udc * dev)1310*4882a593Smuzhiyun static void ep0_start(struct goku_udc *dev)
1311*4882a593Smuzhiyun {
1312*4882a593Smuzhiyun 	struct goku_udc_regs __iomem	*regs = dev->regs;
1313*4882a593Smuzhiyun 	unsigned			i;
1314*4882a593Smuzhiyun 
1315*4882a593Smuzhiyun 	VDBG(dev, "%s\n", __func__);
1316*4882a593Smuzhiyun 
1317*4882a593Smuzhiyun 	udc_reset(dev);
1318*4882a593Smuzhiyun 	udc_reinit (dev);
1319*4882a593Smuzhiyun 	//writel(MST_EOPB_ENA | MST_TIMEOUT_ENA, &regs->dma_master);
1320*4882a593Smuzhiyun 
1321*4882a593Smuzhiyun 	/* hw handles set_address, set_feature, get_status; maybe more */
1322*4882a593Smuzhiyun 	writel(   G_REQMODE_SET_INTF | G_REQMODE_GET_INTF
1323*4882a593Smuzhiyun 		| G_REQMODE_SET_CONF | G_REQMODE_GET_CONF
1324*4882a593Smuzhiyun 		| G_REQMODE_GET_DESC
1325*4882a593Smuzhiyun 		| G_REQMODE_CLEAR_FEAT
1326*4882a593Smuzhiyun 		, &regs->reqmode);
1327*4882a593Smuzhiyun 
1328*4882a593Smuzhiyun 	for (i = 0; i < 4; i++)
1329*4882a593Smuzhiyun 		dev->ep[i].irqs = 0;
1330*4882a593Smuzhiyun 
1331*4882a593Smuzhiyun 	/* can't modify descriptors after writing UsbReady */
1332*4882a593Smuzhiyun 	for (i = 0; i < DESC_LEN; i++)
1333*4882a593Smuzhiyun 		writel(0, &regs->descriptors[i]);
1334*4882a593Smuzhiyun 	writel(0, &regs->UsbReady);
1335*4882a593Smuzhiyun 
1336*4882a593Smuzhiyun 	/* expect ep0 requests when the host drops reset */
1337*4882a593Smuzhiyun 	writel(PW_RESETB | PW_PULLUP, &regs->power_detect);
1338*4882a593Smuzhiyun 	dev->int_enable = INT_DEVWIDE | INT_EP0;
1339*4882a593Smuzhiyun 	writel(dev->int_enable, &dev->regs->int_enable);
1340*4882a593Smuzhiyun 	readl(&regs->int_enable);
1341*4882a593Smuzhiyun 	dev->gadget.speed = USB_SPEED_FULL;
1342*4882a593Smuzhiyun 	dev->ep0state = EP0_IDLE;
1343*4882a593Smuzhiyun }
1344*4882a593Smuzhiyun 
udc_enable(struct goku_udc * dev)1345*4882a593Smuzhiyun static void udc_enable(struct goku_udc *dev)
1346*4882a593Smuzhiyun {
1347*4882a593Smuzhiyun 	/* start enumeration now, or after power detect irq */
1348*4882a593Smuzhiyun 	if (readl(&dev->regs->power_detect) & PW_DETECT)
1349*4882a593Smuzhiyun 		ep0_start(dev);
1350*4882a593Smuzhiyun 	else {
1351*4882a593Smuzhiyun 		DBG(dev, "%s\n", __func__);
1352*4882a593Smuzhiyun 		dev->int_enable = INT_PWRDETECT;
1353*4882a593Smuzhiyun 		writel(dev->int_enable, &dev->regs->int_enable);
1354*4882a593Smuzhiyun 	}
1355*4882a593Smuzhiyun }
1356*4882a593Smuzhiyun 
1357*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
1358*4882a593Smuzhiyun 
1359*4882a593Smuzhiyun /* keeping it simple:
1360*4882a593Smuzhiyun  * - one bus driver, initted first;
1361*4882a593Smuzhiyun  * - one function driver, initted second
1362*4882a593Smuzhiyun  */
1363*4882a593Smuzhiyun 
1364*4882a593Smuzhiyun /* when a driver is successfully registered, it will receive
1365*4882a593Smuzhiyun  * control requests including set_configuration(), which enables
1366*4882a593Smuzhiyun  * non-control requests.  then usb traffic follows until a
1367*4882a593Smuzhiyun  * disconnect is reported.  then a host may connect again, or
1368*4882a593Smuzhiyun  * the driver might get unbound.
1369*4882a593Smuzhiyun  */
goku_udc_start(struct usb_gadget * g,struct usb_gadget_driver * driver)1370*4882a593Smuzhiyun static int goku_udc_start(struct usb_gadget *g,
1371*4882a593Smuzhiyun 		struct usb_gadget_driver *driver)
1372*4882a593Smuzhiyun {
1373*4882a593Smuzhiyun 	struct goku_udc	*dev = to_goku_udc(g);
1374*4882a593Smuzhiyun 
1375*4882a593Smuzhiyun 	/* hook up the driver */
1376*4882a593Smuzhiyun 	driver->driver.bus = NULL;
1377*4882a593Smuzhiyun 	dev->driver = driver;
1378*4882a593Smuzhiyun 
1379*4882a593Smuzhiyun 	/*
1380*4882a593Smuzhiyun 	 * then enable host detection and ep0; and we're ready
1381*4882a593Smuzhiyun 	 * for set_configuration as well as eventual disconnect.
1382*4882a593Smuzhiyun 	 */
1383*4882a593Smuzhiyun 	udc_enable(dev);
1384*4882a593Smuzhiyun 
1385*4882a593Smuzhiyun 	return 0;
1386*4882a593Smuzhiyun }
1387*4882a593Smuzhiyun 
stop_activity(struct goku_udc * dev)1388*4882a593Smuzhiyun static void stop_activity(struct goku_udc *dev)
1389*4882a593Smuzhiyun {
1390*4882a593Smuzhiyun 	unsigned	i;
1391*4882a593Smuzhiyun 
1392*4882a593Smuzhiyun 	DBG (dev, "%s\n", __func__);
1393*4882a593Smuzhiyun 
1394*4882a593Smuzhiyun 	/* disconnect gadget driver after quiesceing hw and the driver */
1395*4882a593Smuzhiyun 	udc_reset (dev);
1396*4882a593Smuzhiyun 	for (i = 0; i < 4; i++)
1397*4882a593Smuzhiyun 		nuke(&dev->ep [i], -ESHUTDOWN);
1398*4882a593Smuzhiyun 
1399*4882a593Smuzhiyun 	if (dev->driver)
1400*4882a593Smuzhiyun 		udc_enable(dev);
1401*4882a593Smuzhiyun }
1402*4882a593Smuzhiyun 
goku_udc_stop(struct usb_gadget * g)1403*4882a593Smuzhiyun static int goku_udc_stop(struct usb_gadget *g)
1404*4882a593Smuzhiyun {
1405*4882a593Smuzhiyun 	struct goku_udc	*dev = to_goku_udc(g);
1406*4882a593Smuzhiyun 	unsigned long	flags;
1407*4882a593Smuzhiyun 
1408*4882a593Smuzhiyun 	spin_lock_irqsave(&dev->lock, flags);
1409*4882a593Smuzhiyun 	dev->driver = NULL;
1410*4882a593Smuzhiyun 	stop_activity(dev);
1411*4882a593Smuzhiyun 	spin_unlock_irqrestore(&dev->lock, flags);
1412*4882a593Smuzhiyun 
1413*4882a593Smuzhiyun 	return 0;
1414*4882a593Smuzhiyun }
1415*4882a593Smuzhiyun 
1416*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
1417*4882a593Smuzhiyun 
ep0_setup(struct goku_udc * dev)1418*4882a593Smuzhiyun static void ep0_setup(struct goku_udc *dev)
1419*4882a593Smuzhiyun {
1420*4882a593Smuzhiyun 	struct goku_udc_regs __iomem	*regs = dev->regs;
1421*4882a593Smuzhiyun 	struct usb_ctrlrequest		ctrl;
1422*4882a593Smuzhiyun 	int				tmp;
1423*4882a593Smuzhiyun 
1424*4882a593Smuzhiyun 	/* read SETUP packet and enter DATA stage */
1425*4882a593Smuzhiyun 	ctrl.bRequestType = readl(&regs->bRequestType);
1426*4882a593Smuzhiyun 	ctrl.bRequest = readl(&regs->bRequest);
1427*4882a593Smuzhiyun 	ctrl.wValue  = cpu_to_le16((readl(&regs->wValueH)  << 8)
1428*4882a593Smuzhiyun 					| readl(&regs->wValueL));
1429*4882a593Smuzhiyun 	ctrl.wIndex  = cpu_to_le16((readl(&regs->wIndexH)  << 8)
1430*4882a593Smuzhiyun 					| readl(&regs->wIndexL));
1431*4882a593Smuzhiyun 	ctrl.wLength = cpu_to_le16((readl(&regs->wLengthH) << 8)
1432*4882a593Smuzhiyun 					| readl(&regs->wLengthL));
1433*4882a593Smuzhiyun 	writel(0, &regs->SetupRecv);
1434*4882a593Smuzhiyun 
1435*4882a593Smuzhiyun 	nuke(&dev->ep[0], 0);
1436*4882a593Smuzhiyun 	dev->ep[0].stopped = 0;
1437*4882a593Smuzhiyun 	if (likely(ctrl.bRequestType & USB_DIR_IN)) {
1438*4882a593Smuzhiyun 		dev->ep[0].is_in = 1;
1439*4882a593Smuzhiyun 		dev->ep0state = EP0_IN;
1440*4882a593Smuzhiyun 		/* detect early status stages */
1441*4882a593Smuzhiyun 		writel(ICONTROL_STATUSNAK, &dev->regs->IntControl);
1442*4882a593Smuzhiyun 	} else {
1443*4882a593Smuzhiyun 		dev->ep[0].is_in = 0;
1444*4882a593Smuzhiyun 		dev->ep0state = EP0_OUT;
1445*4882a593Smuzhiyun 
1446*4882a593Smuzhiyun 		/* NOTE:  CLEAR_FEATURE is done in software so that we can
1447*4882a593Smuzhiyun 		 * synchronize transfer restarts after bulk IN stalls.  data
1448*4882a593Smuzhiyun 		 * won't even enter the fifo until the halt is cleared.
1449*4882a593Smuzhiyun 		 */
1450*4882a593Smuzhiyun 		switch (ctrl.bRequest) {
1451*4882a593Smuzhiyun 		case USB_REQ_CLEAR_FEATURE:
1452*4882a593Smuzhiyun 			switch (ctrl.bRequestType) {
1453*4882a593Smuzhiyun 			case USB_RECIP_ENDPOINT:
1454*4882a593Smuzhiyun 				tmp = le16_to_cpu(ctrl.wIndex) & 0x0f;
1455*4882a593Smuzhiyun 				/* active endpoint */
1456*4882a593Smuzhiyun 				if (tmp > 3 ||
1457*4882a593Smuzhiyun 				    (!dev->ep[tmp].ep.desc && tmp != 0))
1458*4882a593Smuzhiyun 					goto stall;
1459*4882a593Smuzhiyun 				if (ctrl.wIndex & cpu_to_le16(
1460*4882a593Smuzhiyun 						USB_DIR_IN)) {
1461*4882a593Smuzhiyun 					if (!dev->ep[tmp].is_in)
1462*4882a593Smuzhiyun 						goto stall;
1463*4882a593Smuzhiyun 				} else {
1464*4882a593Smuzhiyun 					if (dev->ep[tmp].is_in)
1465*4882a593Smuzhiyun 						goto stall;
1466*4882a593Smuzhiyun 				}
1467*4882a593Smuzhiyun 				if (ctrl.wValue != cpu_to_le16(
1468*4882a593Smuzhiyun 						USB_ENDPOINT_HALT))
1469*4882a593Smuzhiyun 					goto stall;
1470*4882a593Smuzhiyun 				if (tmp)
1471*4882a593Smuzhiyun 					goku_clear_halt(&dev->ep[tmp]);
1472*4882a593Smuzhiyun succeed:
1473*4882a593Smuzhiyun 				/* start ep0out status stage */
1474*4882a593Smuzhiyun 				writel(~(1<<0), &regs->EOP);
1475*4882a593Smuzhiyun 				dev->ep[0].stopped = 1;
1476*4882a593Smuzhiyun 				dev->ep0state = EP0_STATUS;
1477*4882a593Smuzhiyun 				return;
1478*4882a593Smuzhiyun 			case USB_RECIP_DEVICE:
1479*4882a593Smuzhiyun 				/* device remote wakeup: always clear */
1480*4882a593Smuzhiyun 				if (ctrl.wValue != cpu_to_le16(1))
1481*4882a593Smuzhiyun 					goto stall;
1482*4882a593Smuzhiyun 				VDBG(dev, "clear dev remote wakeup\n");
1483*4882a593Smuzhiyun 				goto succeed;
1484*4882a593Smuzhiyun 			case USB_RECIP_INTERFACE:
1485*4882a593Smuzhiyun 				goto stall;
1486*4882a593Smuzhiyun 			default:		/* pass to gadget driver */
1487*4882a593Smuzhiyun 				break;
1488*4882a593Smuzhiyun 			}
1489*4882a593Smuzhiyun 			break;
1490*4882a593Smuzhiyun 		default:
1491*4882a593Smuzhiyun 			break;
1492*4882a593Smuzhiyun 		}
1493*4882a593Smuzhiyun 	}
1494*4882a593Smuzhiyun 
1495*4882a593Smuzhiyun #ifdef USB_TRACE
1496*4882a593Smuzhiyun 	VDBG(dev, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1497*4882a593Smuzhiyun 		ctrl.bRequestType, ctrl.bRequest,
1498*4882a593Smuzhiyun 		le16_to_cpu(ctrl.wValue), le16_to_cpu(ctrl.wIndex),
1499*4882a593Smuzhiyun 		le16_to_cpu(ctrl.wLength));
1500*4882a593Smuzhiyun #endif
1501*4882a593Smuzhiyun 
1502*4882a593Smuzhiyun 	/* hw wants to know when we're configured (or not) */
1503*4882a593Smuzhiyun 	dev->req_config = (ctrl.bRequest == USB_REQ_SET_CONFIGURATION
1504*4882a593Smuzhiyun 				&& ctrl.bRequestType == USB_RECIP_DEVICE);
1505*4882a593Smuzhiyun 	if (unlikely(dev->req_config))
1506*4882a593Smuzhiyun 		dev->configured = (ctrl.wValue != cpu_to_le16(0));
1507*4882a593Smuzhiyun 
1508*4882a593Smuzhiyun 	/* delegate everything to the gadget driver.
1509*4882a593Smuzhiyun 	 * it may respond after this irq handler returns.
1510*4882a593Smuzhiyun 	 */
1511*4882a593Smuzhiyun 	spin_unlock (&dev->lock);
1512*4882a593Smuzhiyun 	tmp = dev->driver->setup(&dev->gadget, &ctrl);
1513*4882a593Smuzhiyun 	spin_lock (&dev->lock);
1514*4882a593Smuzhiyun 	if (unlikely(tmp < 0)) {
1515*4882a593Smuzhiyun stall:
1516*4882a593Smuzhiyun #ifdef USB_TRACE
1517*4882a593Smuzhiyun 		VDBG(dev, "req %02x.%02x protocol STALL; err %d\n",
1518*4882a593Smuzhiyun 				ctrl.bRequestType, ctrl.bRequest, tmp);
1519*4882a593Smuzhiyun #endif
1520*4882a593Smuzhiyun 		command(regs, COMMAND_STALL, 0);
1521*4882a593Smuzhiyun 		dev->ep[0].stopped = 1;
1522*4882a593Smuzhiyun 		dev->ep0state = EP0_STALL;
1523*4882a593Smuzhiyun 	}
1524*4882a593Smuzhiyun 
1525*4882a593Smuzhiyun 	/* expect at least one data or status stage irq */
1526*4882a593Smuzhiyun }
1527*4882a593Smuzhiyun 
1528*4882a593Smuzhiyun #define ACK(irqbit) { \
1529*4882a593Smuzhiyun 		stat &= ~irqbit; \
1530*4882a593Smuzhiyun 		writel(~irqbit, &regs->int_status); \
1531*4882a593Smuzhiyun 		handled = 1; \
1532*4882a593Smuzhiyun 		}
1533*4882a593Smuzhiyun 
goku_irq(int irq,void * _dev)1534*4882a593Smuzhiyun static irqreturn_t goku_irq(int irq, void *_dev)
1535*4882a593Smuzhiyun {
1536*4882a593Smuzhiyun 	struct goku_udc			*dev = _dev;
1537*4882a593Smuzhiyun 	struct goku_udc_regs __iomem	*regs = dev->regs;
1538*4882a593Smuzhiyun 	struct goku_ep			*ep;
1539*4882a593Smuzhiyun 	u32				stat, handled = 0;
1540*4882a593Smuzhiyun 	unsigned			i, rescans = 5;
1541*4882a593Smuzhiyun 
1542*4882a593Smuzhiyun 	spin_lock(&dev->lock);
1543*4882a593Smuzhiyun 
1544*4882a593Smuzhiyun rescan:
1545*4882a593Smuzhiyun 	stat = readl(&regs->int_status) & dev->int_enable;
1546*4882a593Smuzhiyun         if (!stat)
1547*4882a593Smuzhiyun 		goto done;
1548*4882a593Smuzhiyun 	dev->irqs++;
1549*4882a593Smuzhiyun 
1550*4882a593Smuzhiyun 	/* device-wide irqs */
1551*4882a593Smuzhiyun 	if (unlikely(stat & INT_DEVWIDE)) {
1552*4882a593Smuzhiyun 		if (stat & INT_SYSERROR) {
1553*4882a593Smuzhiyun 			ERROR(dev, "system error\n");
1554*4882a593Smuzhiyun 			stop_activity(dev);
1555*4882a593Smuzhiyun 			stat = 0;
1556*4882a593Smuzhiyun 			handled = 1;
1557*4882a593Smuzhiyun 			// FIXME have a neater way to prevent re-enumeration
1558*4882a593Smuzhiyun 			dev->driver = NULL;
1559*4882a593Smuzhiyun 			goto done;
1560*4882a593Smuzhiyun 		}
1561*4882a593Smuzhiyun 		if (stat & INT_PWRDETECT) {
1562*4882a593Smuzhiyun 			writel(~stat, &regs->int_status);
1563*4882a593Smuzhiyun 			if (readl(&dev->regs->power_detect) & PW_DETECT) {
1564*4882a593Smuzhiyun 				VDBG(dev, "connect\n");
1565*4882a593Smuzhiyun 				ep0_start(dev);
1566*4882a593Smuzhiyun 			} else {
1567*4882a593Smuzhiyun 				DBG(dev, "disconnect\n");
1568*4882a593Smuzhiyun 				if (dev->gadget.speed == USB_SPEED_FULL)
1569*4882a593Smuzhiyun 					stop_activity(dev);
1570*4882a593Smuzhiyun 				dev->ep0state = EP0_DISCONNECT;
1571*4882a593Smuzhiyun 				dev->int_enable = INT_DEVWIDE;
1572*4882a593Smuzhiyun 				writel(dev->int_enable, &dev->regs->int_enable);
1573*4882a593Smuzhiyun 			}
1574*4882a593Smuzhiyun 			stat = 0;
1575*4882a593Smuzhiyun 			handled = 1;
1576*4882a593Smuzhiyun 			goto done;
1577*4882a593Smuzhiyun 		}
1578*4882a593Smuzhiyun 		if (stat & INT_SUSPEND) {
1579*4882a593Smuzhiyun 			ACK(INT_SUSPEND);
1580*4882a593Smuzhiyun 			if (readl(&regs->ep_status[0]) & EPxSTATUS_SUSPEND) {
1581*4882a593Smuzhiyun 				switch (dev->ep0state) {
1582*4882a593Smuzhiyun 				case EP0_DISCONNECT:
1583*4882a593Smuzhiyun 				case EP0_SUSPEND:
1584*4882a593Smuzhiyun 					goto pm_next;
1585*4882a593Smuzhiyun 				default:
1586*4882a593Smuzhiyun 					break;
1587*4882a593Smuzhiyun 				}
1588*4882a593Smuzhiyun 				DBG(dev, "USB suspend\n");
1589*4882a593Smuzhiyun 				dev->ep0state = EP0_SUSPEND;
1590*4882a593Smuzhiyun 				if (dev->gadget.speed != USB_SPEED_UNKNOWN
1591*4882a593Smuzhiyun 						&& dev->driver
1592*4882a593Smuzhiyun 						&& dev->driver->suspend) {
1593*4882a593Smuzhiyun 					spin_unlock(&dev->lock);
1594*4882a593Smuzhiyun 					dev->driver->suspend(&dev->gadget);
1595*4882a593Smuzhiyun 					spin_lock(&dev->lock);
1596*4882a593Smuzhiyun 				}
1597*4882a593Smuzhiyun 			} else {
1598*4882a593Smuzhiyun 				if (dev->ep0state != EP0_SUSPEND) {
1599*4882a593Smuzhiyun 					DBG(dev, "bogus USB resume %d\n",
1600*4882a593Smuzhiyun 						dev->ep0state);
1601*4882a593Smuzhiyun 					goto pm_next;
1602*4882a593Smuzhiyun 				}
1603*4882a593Smuzhiyun 				DBG(dev, "USB resume\n");
1604*4882a593Smuzhiyun 				dev->ep0state = EP0_IDLE;
1605*4882a593Smuzhiyun 				if (dev->gadget.speed != USB_SPEED_UNKNOWN
1606*4882a593Smuzhiyun 						&& dev->driver
1607*4882a593Smuzhiyun 						&& dev->driver->resume) {
1608*4882a593Smuzhiyun 					spin_unlock(&dev->lock);
1609*4882a593Smuzhiyun 					dev->driver->resume(&dev->gadget);
1610*4882a593Smuzhiyun 					spin_lock(&dev->lock);
1611*4882a593Smuzhiyun 				}
1612*4882a593Smuzhiyun 			}
1613*4882a593Smuzhiyun 		}
1614*4882a593Smuzhiyun pm_next:
1615*4882a593Smuzhiyun 		if (stat & INT_USBRESET) {		/* hub reset done */
1616*4882a593Smuzhiyun 			ACK(INT_USBRESET);
1617*4882a593Smuzhiyun 			INFO(dev, "USB reset done, gadget %s\n",
1618*4882a593Smuzhiyun 				dev->driver->driver.name);
1619*4882a593Smuzhiyun 		}
1620*4882a593Smuzhiyun 		// and INT_ERR on some endpoint's crc/bitstuff/... problem
1621*4882a593Smuzhiyun 	}
1622*4882a593Smuzhiyun 
1623*4882a593Smuzhiyun 	/* progress ep0 setup, data, or status stages.
1624*4882a593Smuzhiyun 	 * no transition {EP0_STATUS, EP0_STALL} --> EP0_IDLE; saves irqs
1625*4882a593Smuzhiyun 	 */
1626*4882a593Smuzhiyun 	if (stat & INT_SETUP) {
1627*4882a593Smuzhiyun 		ACK(INT_SETUP);
1628*4882a593Smuzhiyun 		dev->ep[0].irqs++;
1629*4882a593Smuzhiyun 		ep0_setup(dev);
1630*4882a593Smuzhiyun 	}
1631*4882a593Smuzhiyun         if (stat & INT_STATUSNAK) {
1632*4882a593Smuzhiyun 		ACK(INT_STATUSNAK|INT_ENDPOINT0);
1633*4882a593Smuzhiyun 		if (dev->ep0state == EP0_IN) {
1634*4882a593Smuzhiyun 			ep = &dev->ep[0];
1635*4882a593Smuzhiyun 			ep->irqs++;
1636*4882a593Smuzhiyun 			nuke(ep, 0);
1637*4882a593Smuzhiyun 			writel(~(1<<0), &regs->EOP);
1638*4882a593Smuzhiyun 			dev->ep0state = EP0_STATUS;
1639*4882a593Smuzhiyun 		}
1640*4882a593Smuzhiyun 	}
1641*4882a593Smuzhiyun         if (stat & INT_ENDPOINT0) {
1642*4882a593Smuzhiyun 		ACK(INT_ENDPOINT0);
1643*4882a593Smuzhiyun 		ep = &dev->ep[0];
1644*4882a593Smuzhiyun 		ep->irqs++;
1645*4882a593Smuzhiyun 		pio_advance(ep);
1646*4882a593Smuzhiyun         }
1647*4882a593Smuzhiyun 
1648*4882a593Smuzhiyun 	/* dma completion */
1649*4882a593Smuzhiyun         if (stat & INT_MSTRDEND) {	/* IN */
1650*4882a593Smuzhiyun 		ACK(INT_MSTRDEND);
1651*4882a593Smuzhiyun 		ep = &dev->ep[UDC_MSTRD_ENDPOINT];
1652*4882a593Smuzhiyun 		ep->irqs++;
1653*4882a593Smuzhiyun 		dma_advance(dev, ep);
1654*4882a593Smuzhiyun         }
1655*4882a593Smuzhiyun         if (stat & INT_MSTWREND) {	/* OUT */
1656*4882a593Smuzhiyun 		ACK(INT_MSTWREND);
1657*4882a593Smuzhiyun 		ep = &dev->ep[UDC_MSTWR_ENDPOINT];
1658*4882a593Smuzhiyun 		ep->irqs++;
1659*4882a593Smuzhiyun 		dma_advance(dev, ep);
1660*4882a593Smuzhiyun         }
1661*4882a593Smuzhiyun         if (stat & INT_MSTWRTMOUT) {	/* OUT */
1662*4882a593Smuzhiyun 		ACK(INT_MSTWRTMOUT);
1663*4882a593Smuzhiyun 		ep = &dev->ep[UDC_MSTWR_ENDPOINT];
1664*4882a593Smuzhiyun 		ep->irqs++;
1665*4882a593Smuzhiyun 		ERROR(dev, "%s write timeout ?\n", ep->ep.name);
1666*4882a593Smuzhiyun 		// reset dma? then dma_advance()
1667*4882a593Smuzhiyun         }
1668*4882a593Smuzhiyun 
1669*4882a593Smuzhiyun 	/* pio */
1670*4882a593Smuzhiyun 	for (i = 1; i < 4; i++) {
1671*4882a593Smuzhiyun 		u32		tmp = INT_EPxDATASET(i);
1672*4882a593Smuzhiyun 
1673*4882a593Smuzhiyun 		if (!(stat & tmp))
1674*4882a593Smuzhiyun 			continue;
1675*4882a593Smuzhiyun 		ep = &dev->ep[i];
1676*4882a593Smuzhiyun 		pio_advance(ep);
1677*4882a593Smuzhiyun 		if (list_empty (&ep->queue))
1678*4882a593Smuzhiyun 			pio_irq_disable(dev, regs, i);
1679*4882a593Smuzhiyun 		stat &= ~tmp;
1680*4882a593Smuzhiyun 		handled = 1;
1681*4882a593Smuzhiyun 		ep->irqs++;
1682*4882a593Smuzhiyun 	}
1683*4882a593Smuzhiyun 
1684*4882a593Smuzhiyun 	if (rescans--)
1685*4882a593Smuzhiyun 		goto rescan;
1686*4882a593Smuzhiyun 
1687*4882a593Smuzhiyun done:
1688*4882a593Smuzhiyun 	(void)readl(&regs->int_enable);
1689*4882a593Smuzhiyun 	spin_unlock(&dev->lock);
1690*4882a593Smuzhiyun 	if (stat)
1691*4882a593Smuzhiyun 		DBG(dev, "unhandled irq status: %05x (%05x, %05x)\n", stat,
1692*4882a593Smuzhiyun 				readl(&regs->int_status), dev->int_enable);
1693*4882a593Smuzhiyun 	return IRQ_RETVAL(handled);
1694*4882a593Smuzhiyun }
1695*4882a593Smuzhiyun 
1696*4882a593Smuzhiyun #undef ACK
1697*4882a593Smuzhiyun 
1698*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
1699*4882a593Smuzhiyun 
gadget_release(struct device * _dev)1700*4882a593Smuzhiyun static void gadget_release(struct device *_dev)
1701*4882a593Smuzhiyun {
1702*4882a593Smuzhiyun 	struct goku_udc	*dev = dev_get_drvdata(_dev);
1703*4882a593Smuzhiyun 
1704*4882a593Smuzhiyun 	kfree(dev);
1705*4882a593Smuzhiyun }
1706*4882a593Smuzhiyun 
1707*4882a593Smuzhiyun /* tear down the binding between this driver and the pci device */
1708*4882a593Smuzhiyun 
goku_remove(struct pci_dev * pdev)1709*4882a593Smuzhiyun static void goku_remove(struct pci_dev *pdev)
1710*4882a593Smuzhiyun {
1711*4882a593Smuzhiyun 	struct goku_udc		*dev = pci_get_drvdata(pdev);
1712*4882a593Smuzhiyun 
1713*4882a593Smuzhiyun 	DBG(dev, "%s\n", __func__);
1714*4882a593Smuzhiyun 
1715*4882a593Smuzhiyun 	usb_del_gadget_udc(&dev->gadget);
1716*4882a593Smuzhiyun 
1717*4882a593Smuzhiyun 	BUG_ON(dev->driver);
1718*4882a593Smuzhiyun 
1719*4882a593Smuzhiyun #ifdef CONFIG_USB_GADGET_DEBUG_FILES
1720*4882a593Smuzhiyun 	remove_proc_entry(proc_node_name, NULL);
1721*4882a593Smuzhiyun #endif
1722*4882a593Smuzhiyun 	if (dev->regs)
1723*4882a593Smuzhiyun 		udc_reset(dev);
1724*4882a593Smuzhiyun 	if (dev->got_irq)
1725*4882a593Smuzhiyun 		free_irq(pdev->irq, dev);
1726*4882a593Smuzhiyun 	if (dev->regs)
1727*4882a593Smuzhiyun 		iounmap(dev->regs);
1728*4882a593Smuzhiyun 	if (dev->got_region)
1729*4882a593Smuzhiyun 		release_mem_region(pci_resource_start (pdev, 0),
1730*4882a593Smuzhiyun 				pci_resource_len (pdev, 0));
1731*4882a593Smuzhiyun 	if (dev->enabled)
1732*4882a593Smuzhiyun 		pci_disable_device(pdev);
1733*4882a593Smuzhiyun 
1734*4882a593Smuzhiyun 	dev->regs = NULL;
1735*4882a593Smuzhiyun 
1736*4882a593Smuzhiyun 	INFO(dev, "unbind\n");
1737*4882a593Smuzhiyun }
1738*4882a593Smuzhiyun 
1739*4882a593Smuzhiyun /* wrap this driver around the specified pci device, but
1740*4882a593Smuzhiyun  * don't respond over USB until a gadget driver binds to us.
1741*4882a593Smuzhiyun  */
1742*4882a593Smuzhiyun 
goku_probe(struct pci_dev * pdev,const struct pci_device_id * id)1743*4882a593Smuzhiyun static int goku_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1744*4882a593Smuzhiyun {
1745*4882a593Smuzhiyun 	struct goku_udc		*dev = NULL;
1746*4882a593Smuzhiyun 	unsigned long		resource, len;
1747*4882a593Smuzhiyun 	void __iomem		*base = NULL;
1748*4882a593Smuzhiyun 	int			retval;
1749*4882a593Smuzhiyun 
1750*4882a593Smuzhiyun 	if (!pdev->irq) {
1751*4882a593Smuzhiyun 		printk(KERN_ERR "Check PCI %s IRQ setup!\n", pci_name(pdev));
1752*4882a593Smuzhiyun 		retval = -ENODEV;
1753*4882a593Smuzhiyun 		goto err;
1754*4882a593Smuzhiyun 	}
1755*4882a593Smuzhiyun 
1756*4882a593Smuzhiyun 	/* alloc, and start init */
1757*4882a593Smuzhiyun 	dev = kzalloc (sizeof *dev, GFP_KERNEL);
1758*4882a593Smuzhiyun 	if (!dev) {
1759*4882a593Smuzhiyun 		retval = -ENOMEM;
1760*4882a593Smuzhiyun 		goto err;
1761*4882a593Smuzhiyun 	}
1762*4882a593Smuzhiyun 
1763*4882a593Smuzhiyun 	pci_set_drvdata(pdev, dev);
1764*4882a593Smuzhiyun 	spin_lock_init(&dev->lock);
1765*4882a593Smuzhiyun 	dev->pdev = pdev;
1766*4882a593Smuzhiyun 	dev->gadget.ops = &goku_ops;
1767*4882a593Smuzhiyun 	dev->gadget.max_speed = USB_SPEED_FULL;
1768*4882a593Smuzhiyun 
1769*4882a593Smuzhiyun 	/* the "gadget" abstracts/virtualizes the controller */
1770*4882a593Smuzhiyun 	dev->gadget.name = driver_name;
1771*4882a593Smuzhiyun 
1772*4882a593Smuzhiyun 	/* now all the pci goodies ... */
1773*4882a593Smuzhiyun 	retval = pci_enable_device(pdev);
1774*4882a593Smuzhiyun 	if (retval < 0) {
1775*4882a593Smuzhiyun 		DBG(dev, "can't enable, %d\n", retval);
1776*4882a593Smuzhiyun 		goto err;
1777*4882a593Smuzhiyun 	}
1778*4882a593Smuzhiyun 	dev->enabled = 1;
1779*4882a593Smuzhiyun 
1780*4882a593Smuzhiyun 	resource = pci_resource_start(pdev, 0);
1781*4882a593Smuzhiyun 	len = pci_resource_len(pdev, 0);
1782*4882a593Smuzhiyun 	if (!request_mem_region(resource, len, driver_name)) {
1783*4882a593Smuzhiyun 		DBG(dev, "controller already in use\n");
1784*4882a593Smuzhiyun 		retval = -EBUSY;
1785*4882a593Smuzhiyun 		goto err;
1786*4882a593Smuzhiyun 	}
1787*4882a593Smuzhiyun 	dev->got_region = 1;
1788*4882a593Smuzhiyun 
1789*4882a593Smuzhiyun 	base = ioremap(resource, len);
1790*4882a593Smuzhiyun 	if (base == NULL) {
1791*4882a593Smuzhiyun 		DBG(dev, "can't map memory\n");
1792*4882a593Smuzhiyun 		retval = -EFAULT;
1793*4882a593Smuzhiyun 		goto err;
1794*4882a593Smuzhiyun 	}
1795*4882a593Smuzhiyun 	dev->regs = (struct goku_udc_regs __iomem *) base;
1796*4882a593Smuzhiyun 
1797*4882a593Smuzhiyun 	INFO(dev, "%s\n", driver_desc);
1798*4882a593Smuzhiyun 	INFO(dev, "version: " DRIVER_VERSION " %s\n", dmastr());
1799*4882a593Smuzhiyun 	INFO(dev, "irq %d, pci mem %p\n", pdev->irq, base);
1800*4882a593Smuzhiyun 
1801*4882a593Smuzhiyun 	/* init to known state, then setup irqs */
1802*4882a593Smuzhiyun 	udc_reset(dev);
1803*4882a593Smuzhiyun 	udc_reinit (dev);
1804*4882a593Smuzhiyun 	if (request_irq(pdev->irq, goku_irq, IRQF_SHARED,
1805*4882a593Smuzhiyun 			driver_name, dev) != 0) {
1806*4882a593Smuzhiyun 		DBG(dev, "request interrupt %d failed\n", pdev->irq);
1807*4882a593Smuzhiyun 		retval = -EBUSY;
1808*4882a593Smuzhiyun 		goto err;
1809*4882a593Smuzhiyun 	}
1810*4882a593Smuzhiyun 	dev->got_irq = 1;
1811*4882a593Smuzhiyun 	if (use_dma)
1812*4882a593Smuzhiyun 		pci_set_master(pdev);
1813*4882a593Smuzhiyun 
1814*4882a593Smuzhiyun 
1815*4882a593Smuzhiyun #ifdef CONFIG_USB_GADGET_DEBUG_FILES
1816*4882a593Smuzhiyun 	proc_create_single_data(proc_node_name, 0, NULL, udc_proc_read, dev);
1817*4882a593Smuzhiyun #endif
1818*4882a593Smuzhiyun 
1819*4882a593Smuzhiyun 	retval = usb_add_gadget_udc_release(&pdev->dev, &dev->gadget,
1820*4882a593Smuzhiyun 			gadget_release);
1821*4882a593Smuzhiyun 	if (retval)
1822*4882a593Smuzhiyun 		goto err;
1823*4882a593Smuzhiyun 
1824*4882a593Smuzhiyun 	return 0;
1825*4882a593Smuzhiyun 
1826*4882a593Smuzhiyun err:
1827*4882a593Smuzhiyun 	if (dev)
1828*4882a593Smuzhiyun 		goku_remove (pdev);
1829*4882a593Smuzhiyun 	/* gadget_release is not registered yet, kfree explicitly */
1830*4882a593Smuzhiyun 	kfree(dev);
1831*4882a593Smuzhiyun 	return retval;
1832*4882a593Smuzhiyun }
1833*4882a593Smuzhiyun 
1834*4882a593Smuzhiyun 
1835*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
1836*4882a593Smuzhiyun 
1837*4882a593Smuzhiyun static const struct pci_device_id pci_ids[] = { {
1838*4882a593Smuzhiyun 	.class =	PCI_CLASS_SERIAL_USB_DEVICE,
1839*4882a593Smuzhiyun 	.class_mask =	~0,
1840*4882a593Smuzhiyun 	.vendor =	0x102f,		/* Toshiba */
1841*4882a593Smuzhiyun 	.device =	0x0107,		/* this UDC */
1842*4882a593Smuzhiyun 	.subvendor =	PCI_ANY_ID,
1843*4882a593Smuzhiyun 	.subdevice =	PCI_ANY_ID,
1844*4882a593Smuzhiyun 
1845*4882a593Smuzhiyun }, { /* end: all zeroes */ }
1846*4882a593Smuzhiyun };
1847*4882a593Smuzhiyun MODULE_DEVICE_TABLE (pci, pci_ids);
1848*4882a593Smuzhiyun 
1849*4882a593Smuzhiyun static struct pci_driver goku_pci_driver = {
1850*4882a593Smuzhiyun 	.name =		driver_name,
1851*4882a593Smuzhiyun 	.id_table =	pci_ids,
1852*4882a593Smuzhiyun 
1853*4882a593Smuzhiyun 	.probe =	goku_probe,
1854*4882a593Smuzhiyun 	.remove =	goku_remove,
1855*4882a593Smuzhiyun 
1856*4882a593Smuzhiyun 	/* FIXME add power management support */
1857*4882a593Smuzhiyun };
1858*4882a593Smuzhiyun 
1859*4882a593Smuzhiyun module_pci_driver(goku_pci_driver);
1860