1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * FOTG210 UDC Driver supports Bulk transfer so far
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013 Faraday Technology Corporation
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author : Yuan-Hsin Chen <yhchen@faraday-tech.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/dma-mapping.h>
11*4882a593Smuzhiyun #include <linux/err.h>
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <linux/io.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun #include <linux/usb/ch9.h>
17*4882a593Smuzhiyun #include <linux/usb/gadget.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include "fotg210.h"
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define DRIVER_DESC "FOTG210 USB Device Controller Driver"
22*4882a593Smuzhiyun #define DRIVER_VERSION "30-April-2013"
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun static const char udc_name[] = "fotg210_udc";
25*4882a593Smuzhiyun static const char * const fotg210_ep_name[] = {
26*4882a593Smuzhiyun "ep0", "ep1", "ep2", "ep3", "ep4"};
27*4882a593Smuzhiyun
fotg210_disable_fifo_int(struct fotg210_ep * ep)28*4882a593Smuzhiyun static void fotg210_disable_fifo_int(struct fotg210_ep *ep)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR1);
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun if (ep->dir_in)
33*4882a593Smuzhiyun value |= DMISGR1_MF_IN_INT(ep->epnum - 1);
34*4882a593Smuzhiyun else
35*4882a593Smuzhiyun value |= DMISGR1_MF_OUTSPK_INT(ep->epnum - 1);
36*4882a593Smuzhiyun iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR1);
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
fotg210_enable_fifo_int(struct fotg210_ep * ep)39*4882a593Smuzhiyun static void fotg210_enable_fifo_int(struct fotg210_ep *ep)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR1);
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun if (ep->dir_in)
44*4882a593Smuzhiyun value &= ~DMISGR1_MF_IN_INT(ep->epnum - 1);
45*4882a593Smuzhiyun else
46*4882a593Smuzhiyun value &= ~DMISGR1_MF_OUTSPK_INT(ep->epnum - 1);
47*4882a593Smuzhiyun iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR1);
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
fotg210_set_cxdone(struct fotg210_udc * fotg210)50*4882a593Smuzhiyun static void fotg210_set_cxdone(struct fotg210_udc *fotg210)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun u32 value = ioread32(fotg210->reg + FOTG210_DCFESR);
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun value |= DCFESR_CX_DONE;
55*4882a593Smuzhiyun iowrite32(value, fotg210->reg + FOTG210_DCFESR);
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
fotg210_done(struct fotg210_ep * ep,struct fotg210_request * req,int status)58*4882a593Smuzhiyun static void fotg210_done(struct fotg210_ep *ep, struct fotg210_request *req,
59*4882a593Smuzhiyun int status)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun list_del_init(&req->queue);
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /* don't modify queue heads during completion callback */
64*4882a593Smuzhiyun if (ep->fotg210->gadget.speed == USB_SPEED_UNKNOWN)
65*4882a593Smuzhiyun req->req.status = -ESHUTDOWN;
66*4882a593Smuzhiyun else
67*4882a593Smuzhiyun req->req.status = status;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun spin_unlock(&ep->fotg210->lock);
70*4882a593Smuzhiyun usb_gadget_giveback_request(&ep->ep, &req->req);
71*4882a593Smuzhiyun spin_lock(&ep->fotg210->lock);
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun if (ep->epnum) {
74*4882a593Smuzhiyun if (list_empty(&ep->queue))
75*4882a593Smuzhiyun fotg210_disable_fifo_int(ep);
76*4882a593Smuzhiyun } else {
77*4882a593Smuzhiyun fotg210_set_cxdone(ep->fotg210);
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
fotg210_fifo_ep_mapping(struct fotg210_ep * ep,u32 epnum,u32 dir_in)81*4882a593Smuzhiyun static void fotg210_fifo_ep_mapping(struct fotg210_ep *ep, u32 epnum,
82*4882a593Smuzhiyun u32 dir_in)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun struct fotg210_udc *fotg210 = ep->fotg210;
85*4882a593Smuzhiyun u32 val;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /* Driver should map an ep to a fifo and then map the fifo
88*4882a593Smuzhiyun * to the ep. What a brain-damaged design!
89*4882a593Smuzhiyun */
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun /* map a fifo to an ep */
92*4882a593Smuzhiyun val = ioread32(fotg210->reg + FOTG210_EPMAP);
93*4882a593Smuzhiyun val &= ~EPMAP_FIFONOMSK(epnum, dir_in);
94*4882a593Smuzhiyun val |= EPMAP_FIFONO(epnum, dir_in);
95*4882a593Smuzhiyun iowrite32(val, fotg210->reg + FOTG210_EPMAP);
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun /* map the ep to the fifo */
98*4882a593Smuzhiyun val = ioread32(fotg210->reg + FOTG210_FIFOMAP);
99*4882a593Smuzhiyun val &= ~FIFOMAP_EPNOMSK(epnum);
100*4882a593Smuzhiyun val |= FIFOMAP_EPNO(epnum);
101*4882a593Smuzhiyun iowrite32(val, fotg210->reg + FOTG210_FIFOMAP);
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun /* enable fifo */
104*4882a593Smuzhiyun val = ioread32(fotg210->reg + FOTG210_FIFOCF);
105*4882a593Smuzhiyun val |= FIFOCF_FIFO_EN(epnum - 1);
106*4882a593Smuzhiyun iowrite32(val, fotg210->reg + FOTG210_FIFOCF);
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
fotg210_set_fifo_dir(struct fotg210_ep * ep,u32 epnum,u32 dir_in)109*4882a593Smuzhiyun static void fotg210_set_fifo_dir(struct fotg210_ep *ep, u32 epnum, u32 dir_in)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun struct fotg210_udc *fotg210 = ep->fotg210;
112*4882a593Smuzhiyun u32 val;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun val = ioread32(fotg210->reg + FOTG210_FIFOMAP);
115*4882a593Smuzhiyun val |= (dir_in ? FIFOMAP_DIRIN(epnum - 1) : FIFOMAP_DIROUT(epnum - 1));
116*4882a593Smuzhiyun iowrite32(val, fotg210->reg + FOTG210_FIFOMAP);
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
fotg210_set_tfrtype(struct fotg210_ep * ep,u32 epnum,u32 type)119*4882a593Smuzhiyun static void fotg210_set_tfrtype(struct fotg210_ep *ep, u32 epnum, u32 type)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun struct fotg210_udc *fotg210 = ep->fotg210;
122*4882a593Smuzhiyun u32 val;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun val = ioread32(fotg210->reg + FOTG210_FIFOCF);
125*4882a593Smuzhiyun val |= FIFOCF_TYPE(type, epnum - 1);
126*4882a593Smuzhiyun iowrite32(val, fotg210->reg + FOTG210_FIFOCF);
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun
fotg210_set_mps(struct fotg210_ep * ep,u32 epnum,u32 mps,u32 dir_in)129*4882a593Smuzhiyun static void fotg210_set_mps(struct fotg210_ep *ep, u32 epnum, u32 mps,
130*4882a593Smuzhiyun u32 dir_in)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun struct fotg210_udc *fotg210 = ep->fotg210;
133*4882a593Smuzhiyun u32 val;
134*4882a593Smuzhiyun u32 offset = dir_in ? FOTG210_INEPMPSR(epnum) :
135*4882a593Smuzhiyun FOTG210_OUTEPMPSR(epnum);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun val = ioread32(fotg210->reg + offset);
138*4882a593Smuzhiyun val |= INOUTEPMPSR_MPS(mps);
139*4882a593Smuzhiyun iowrite32(val, fotg210->reg + offset);
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
fotg210_config_ep(struct fotg210_ep * ep,const struct usb_endpoint_descriptor * desc)142*4882a593Smuzhiyun static int fotg210_config_ep(struct fotg210_ep *ep,
143*4882a593Smuzhiyun const struct usb_endpoint_descriptor *desc)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun struct fotg210_udc *fotg210 = ep->fotg210;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun fotg210_set_fifo_dir(ep, ep->epnum, ep->dir_in);
148*4882a593Smuzhiyun fotg210_set_tfrtype(ep, ep->epnum, ep->type);
149*4882a593Smuzhiyun fotg210_set_mps(ep, ep->epnum, ep->ep.maxpacket, ep->dir_in);
150*4882a593Smuzhiyun fotg210_fifo_ep_mapping(ep, ep->epnum, ep->dir_in);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun fotg210->ep[ep->epnum] = ep;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun return 0;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
fotg210_ep_enable(struct usb_ep * _ep,const struct usb_endpoint_descriptor * desc)157*4882a593Smuzhiyun static int fotg210_ep_enable(struct usb_ep *_ep,
158*4882a593Smuzhiyun const struct usb_endpoint_descriptor *desc)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun struct fotg210_ep *ep;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun ep = container_of(_ep, struct fotg210_ep, ep);
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun ep->desc = desc;
165*4882a593Smuzhiyun ep->epnum = usb_endpoint_num(desc);
166*4882a593Smuzhiyun ep->type = usb_endpoint_type(desc);
167*4882a593Smuzhiyun ep->dir_in = usb_endpoint_dir_in(desc);
168*4882a593Smuzhiyun ep->ep.maxpacket = usb_endpoint_maxp(desc);
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun return fotg210_config_ep(ep, desc);
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun
fotg210_reset_tseq(struct fotg210_udc * fotg210,u8 epnum)173*4882a593Smuzhiyun static void fotg210_reset_tseq(struct fotg210_udc *fotg210, u8 epnum)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun struct fotg210_ep *ep = fotg210->ep[epnum];
176*4882a593Smuzhiyun u32 value;
177*4882a593Smuzhiyun void __iomem *reg;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun reg = (ep->dir_in) ?
180*4882a593Smuzhiyun fotg210->reg + FOTG210_INEPMPSR(epnum) :
181*4882a593Smuzhiyun fotg210->reg + FOTG210_OUTEPMPSR(epnum);
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun /* Note: Driver needs to set and clear INOUTEPMPSR_RESET_TSEQ
184*4882a593Smuzhiyun * bit. Controller wouldn't clear this bit. WTF!!!
185*4882a593Smuzhiyun */
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun value = ioread32(reg);
188*4882a593Smuzhiyun value |= INOUTEPMPSR_RESET_TSEQ;
189*4882a593Smuzhiyun iowrite32(value, reg);
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun value = ioread32(reg);
192*4882a593Smuzhiyun value &= ~INOUTEPMPSR_RESET_TSEQ;
193*4882a593Smuzhiyun iowrite32(value, reg);
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
fotg210_ep_release(struct fotg210_ep * ep)196*4882a593Smuzhiyun static int fotg210_ep_release(struct fotg210_ep *ep)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun if (!ep->epnum)
199*4882a593Smuzhiyun return 0;
200*4882a593Smuzhiyun ep->epnum = 0;
201*4882a593Smuzhiyun ep->stall = 0;
202*4882a593Smuzhiyun ep->wedged = 0;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun fotg210_reset_tseq(ep->fotg210, ep->epnum);
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun return 0;
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun
fotg210_ep_disable(struct usb_ep * _ep)209*4882a593Smuzhiyun static int fotg210_ep_disable(struct usb_ep *_ep)
210*4882a593Smuzhiyun {
211*4882a593Smuzhiyun struct fotg210_ep *ep;
212*4882a593Smuzhiyun struct fotg210_request *req;
213*4882a593Smuzhiyun unsigned long flags;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun BUG_ON(!_ep);
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun ep = container_of(_ep, struct fotg210_ep, ep);
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun while (!list_empty(&ep->queue)) {
220*4882a593Smuzhiyun req = list_entry(ep->queue.next,
221*4882a593Smuzhiyun struct fotg210_request, queue);
222*4882a593Smuzhiyun spin_lock_irqsave(&ep->fotg210->lock, flags);
223*4882a593Smuzhiyun fotg210_done(ep, req, -ECONNRESET);
224*4882a593Smuzhiyun spin_unlock_irqrestore(&ep->fotg210->lock, flags);
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun return fotg210_ep_release(ep);
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
fotg210_ep_alloc_request(struct usb_ep * _ep,gfp_t gfp_flags)230*4882a593Smuzhiyun static struct usb_request *fotg210_ep_alloc_request(struct usb_ep *_ep,
231*4882a593Smuzhiyun gfp_t gfp_flags)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun struct fotg210_request *req;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun req = kzalloc(sizeof(struct fotg210_request), gfp_flags);
236*4882a593Smuzhiyun if (!req)
237*4882a593Smuzhiyun return NULL;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun INIT_LIST_HEAD(&req->queue);
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun return &req->req;
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun
fotg210_ep_free_request(struct usb_ep * _ep,struct usb_request * _req)244*4882a593Smuzhiyun static void fotg210_ep_free_request(struct usb_ep *_ep,
245*4882a593Smuzhiyun struct usb_request *_req)
246*4882a593Smuzhiyun {
247*4882a593Smuzhiyun struct fotg210_request *req;
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun req = container_of(_req, struct fotg210_request, req);
250*4882a593Smuzhiyun kfree(req);
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
fotg210_enable_dma(struct fotg210_ep * ep,dma_addr_t d,u32 len)253*4882a593Smuzhiyun static void fotg210_enable_dma(struct fotg210_ep *ep,
254*4882a593Smuzhiyun dma_addr_t d, u32 len)
255*4882a593Smuzhiyun {
256*4882a593Smuzhiyun u32 value;
257*4882a593Smuzhiyun struct fotg210_udc *fotg210 = ep->fotg210;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun /* set transfer length and direction */
260*4882a593Smuzhiyun value = ioread32(fotg210->reg + FOTG210_DMACPSR1);
261*4882a593Smuzhiyun value &= ~(DMACPSR1_DMA_LEN(0xFFFF) | DMACPSR1_DMA_TYPE(1));
262*4882a593Smuzhiyun value |= DMACPSR1_DMA_LEN(len) | DMACPSR1_DMA_TYPE(ep->dir_in);
263*4882a593Smuzhiyun iowrite32(value, fotg210->reg + FOTG210_DMACPSR1);
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun /* set device DMA target FIFO number */
266*4882a593Smuzhiyun value = ioread32(fotg210->reg + FOTG210_DMATFNR);
267*4882a593Smuzhiyun if (ep->epnum)
268*4882a593Smuzhiyun value |= DMATFNR_ACC_FN(ep->epnum - 1);
269*4882a593Smuzhiyun else
270*4882a593Smuzhiyun value |= DMATFNR_ACC_CXF;
271*4882a593Smuzhiyun iowrite32(value, fotg210->reg + FOTG210_DMATFNR);
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun /* set DMA memory address */
274*4882a593Smuzhiyun iowrite32(d, fotg210->reg + FOTG210_DMACPSR2);
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun /* enable MDMA_EROR and MDMA_CMPLT interrupt */
277*4882a593Smuzhiyun value = ioread32(fotg210->reg + FOTG210_DMISGR2);
278*4882a593Smuzhiyun value &= ~(DMISGR2_MDMA_CMPLT | DMISGR2_MDMA_ERROR);
279*4882a593Smuzhiyun iowrite32(value, fotg210->reg + FOTG210_DMISGR2);
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun /* start DMA */
282*4882a593Smuzhiyun value = ioread32(fotg210->reg + FOTG210_DMACPSR1);
283*4882a593Smuzhiyun value |= DMACPSR1_DMA_START;
284*4882a593Smuzhiyun iowrite32(value, fotg210->reg + FOTG210_DMACPSR1);
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun
fotg210_disable_dma(struct fotg210_ep * ep)287*4882a593Smuzhiyun static void fotg210_disable_dma(struct fotg210_ep *ep)
288*4882a593Smuzhiyun {
289*4882a593Smuzhiyun iowrite32(DMATFNR_DISDMA, ep->fotg210->reg + FOTG210_DMATFNR);
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun
fotg210_wait_dma_done(struct fotg210_ep * ep)292*4882a593Smuzhiyun static void fotg210_wait_dma_done(struct fotg210_ep *ep)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun u32 value;
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun do {
297*4882a593Smuzhiyun value = ioread32(ep->fotg210->reg + FOTG210_DISGR2);
298*4882a593Smuzhiyun if ((value & DISGR2_USBRST_INT) ||
299*4882a593Smuzhiyun (value & DISGR2_DMA_ERROR))
300*4882a593Smuzhiyun goto dma_reset;
301*4882a593Smuzhiyun } while (!(value & DISGR2_DMA_CMPLT));
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun value &= ~DISGR2_DMA_CMPLT;
304*4882a593Smuzhiyun iowrite32(value, ep->fotg210->reg + FOTG210_DISGR2);
305*4882a593Smuzhiyun return;
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun dma_reset:
308*4882a593Smuzhiyun value = ioread32(ep->fotg210->reg + FOTG210_DMACPSR1);
309*4882a593Smuzhiyun value |= DMACPSR1_DMA_ABORT;
310*4882a593Smuzhiyun iowrite32(value, ep->fotg210->reg + FOTG210_DMACPSR1);
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun /* reset fifo */
313*4882a593Smuzhiyun if (ep->epnum) {
314*4882a593Smuzhiyun value = ioread32(ep->fotg210->reg +
315*4882a593Smuzhiyun FOTG210_FIBCR(ep->epnum - 1));
316*4882a593Smuzhiyun value |= FIBCR_FFRST;
317*4882a593Smuzhiyun iowrite32(value, ep->fotg210->reg +
318*4882a593Smuzhiyun FOTG210_FIBCR(ep->epnum - 1));
319*4882a593Smuzhiyun } else {
320*4882a593Smuzhiyun value = ioread32(ep->fotg210->reg + FOTG210_DCFESR);
321*4882a593Smuzhiyun value |= DCFESR_CX_CLR;
322*4882a593Smuzhiyun iowrite32(value, ep->fotg210->reg + FOTG210_DCFESR);
323*4882a593Smuzhiyun }
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun
fotg210_start_dma(struct fotg210_ep * ep,struct fotg210_request * req)326*4882a593Smuzhiyun static void fotg210_start_dma(struct fotg210_ep *ep,
327*4882a593Smuzhiyun struct fotg210_request *req)
328*4882a593Smuzhiyun {
329*4882a593Smuzhiyun struct device *dev = &ep->fotg210->gadget.dev;
330*4882a593Smuzhiyun dma_addr_t d;
331*4882a593Smuzhiyun u8 *buffer;
332*4882a593Smuzhiyun u32 length;
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun if (ep->epnum) {
335*4882a593Smuzhiyun if (ep->dir_in) {
336*4882a593Smuzhiyun buffer = req->req.buf;
337*4882a593Smuzhiyun length = req->req.length;
338*4882a593Smuzhiyun } else {
339*4882a593Smuzhiyun buffer = req->req.buf + req->req.actual;
340*4882a593Smuzhiyun length = ioread32(ep->fotg210->reg +
341*4882a593Smuzhiyun FOTG210_FIBCR(ep->epnum - 1)) & FIBCR_BCFX;
342*4882a593Smuzhiyun if (length > req->req.length - req->req.actual)
343*4882a593Smuzhiyun length = req->req.length - req->req.actual;
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun } else {
346*4882a593Smuzhiyun buffer = req->req.buf + req->req.actual;
347*4882a593Smuzhiyun if (req->req.length - req->req.actual > ep->ep.maxpacket)
348*4882a593Smuzhiyun length = ep->ep.maxpacket;
349*4882a593Smuzhiyun else
350*4882a593Smuzhiyun length = req->req.length - req->req.actual;
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun d = dma_map_single(dev, buffer, length,
354*4882a593Smuzhiyun ep->dir_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun if (dma_mapping_error(dev, d)) {
357*4882a593Smuzhiyun pr_err("dma_mapping_error\n");
358*4882a593Smuzhiyun return;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun fotg210_enable_dma(ep, d, length);
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun /* check if dma is done */
364*4882a593Smuzhiyun fotg210_wait_dma_done(ep);
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun fotg210_disable_dma(ep);
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun /* update actual transfer length */
369*4882a593Smuzhiyun req->req.actual += length;
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun dma_unmap_single(dev, d, length, DMA_TO_DEVICE);
372*4882a593Smuzhiyun }
373*4882a593Smuzhiyun
fotg210_ep0_queue(struct fotg210_ep * ep,struct fotg210_request * req)374*4882a593Smuzhiyun static void fotg210_ep0_queue(struct fotg210_ep *ep,
375*4882a593Smuzhiyun struct fotg210_request *req)
376*4882a593Smuzhiyun {
377*4882a593Smuzhiyun if (!req->req.length) {
378*4882a593Smuzhiyun fotg210_done(ep, req, 0);
379*4882a593Smuzhiyun return;
380*4882a593Smuzhiyun }
381*4882a593Smuzhiyun if (ep->dir_in) { /* if IN */
382*4882a593Smuzhiyun fotg210_start_dma(ep, req);
383*4882a593Smuzhiyun if (req->req.length == req->req.actual)
384*4882a593Smuzhiyun fotg210_done(ep, req, 0);
385*4882a593Smuzhiyun } else { /* OUT */
386*4882a593Smuzhiyun u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR0);
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun value &= ~DMISGR0_MCX_OUT_INT;
389*4882a593Smuzhiyun iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR0);
390*4882a593Smuzhiyun }
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun
fotg210_ep_queue(struct usb_ep * _ep,struct usb_request * _req,gfp_t gfp_flags)393*4882a593Smuzhiyun static int fotg210_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
394*4882a593Smuzhiyun gfp_t gfp_flags)
395*4882a593Smuzhiyun {
396*4882a593Smuzhiyun struct fotg210_ep *ep;
397*4882a593Smuzhiyun struct fotg210_request *req;
398*4882a593Smuzhiyun unsigned long flags;
399*4882a593Smuzhiyun int request = 0;
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun ep = container_of(_ep, struct fotg210_ep, ep);
402*4882a593Smuzhiyun req = container_of(_req, struct fotg210_request, req);
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun if (ep->fotg210->gadget.speed == USB_SPEED_UNKNOWN)
405*4882a593Smuzhiyun return -ESHUTDOWN;
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun spin_lock_irqsave(&ep->fotg210->lock, flags);
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun if (list_empty(&ep->queue))
410*4882a593Smuzhiyun request = 1;
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun list_add_tail(&req->queue, &ep->queue);
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun req->req.actual = 0;
415*4882a593Smuzhiyun req->req.status = -EINPROGRESS;
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun if (!ep->epnum) /* ep0 */
418*4882a593Smuzhiyun fotg210_ep0_queue(ep, req);
419*4882a593Smuzhiyun else if (request && !ep->stall)
420*4882a593Smuzhiyun fotg210_enable_fifo_int(ep);
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun spin_unlock_irqrestore(&ep->fotg210->lock, flags);
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun return 0;
425*4882a593Smuzhiyun }
426*4882a593Smuzhiyun
fotg210_ep_dequeue(struct usb_ep * _ep,struct usb_request * _req)427*4882a593Smuzhiyun static int fotg210_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
428*4882a593Smuzhiyun {
429*4882a593Smuzhiyun struct fotg210_ep *ep;
430*4882a593Smuzhiyun struct fotg210_request *req;
431*4882a593Smuzhiyun unsigned long flags;
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun ep = container_of(_ep, struct fotg210_ep, ep);
434*4882a593Smuzhiyun req = container_of(_req, struct fotg210_request, req);
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun spin_lock_irqsave(&ep->fotg210->lock, flags);
437*4882a593Smuzhiyun if (!list_empty(&ep->queue))
438*4882a593Smuzhiyun fotg210_done(ep, req, -ECONNRESET);
439*4882a593Smuzhiyun spin_unlock_irqrestore(&ep->fotg210->lock, flags);
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun return 0;
442*4882a593Smuzhiyun }
443*4882a593Smuzhiyun
fotg210_set_epnstall(struct fotg210_ep * ep)444*4882a593Smuzhiyun static void fotg210_set_epnstall(struct fotg210_ep *ep)
445*4882a593Smuzhiyun {
446*4882a593Smuzhiyun struct fotg210_udc *fotg210 = ep->fotg210;
447*4882a593Smuzhiyun u32 value;
448*4882a593Smuzhiyun void __iomem *reg;
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun /* check if IN FIFO is empty before stall */
451*4882a593Smuzhiyun if (ep->dir_in) {
452*4882a593Smuzhiyun do {
453*4882a593Smuzhiyun value = ioread32(fotg210->reg + FOTG210_DCFESR);
454*4882a593Smuzhiyun } while (!(value & DCFESR_FIFO_EMPTY(ep->epnum - 1)));
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun reg = (ep->dir_in) ?
458*4882a593Smuzhiyun fotg210->reg + FOTG210_INEPMPSR(ep->epnum) :
459*4882a593Smuzhiyun fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum);
460*4882a593Smuzhiyun value = ioread32(reg);
461*4882a593Smuzhiyun value |= INOUTEPMPSR_STL_EP;
462*4882a593Smuzhiyun iowrite32(value, reg);
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun
fotg210_clear_epnstall(struct fotg210_ep * ep)465*4882a593Smuzhiyun static void fotg210_clear_epnstall(struct fotg210_ep *ep)
466*4882a593Smuzhiyun {
467*4882a593Smuzhiyun struct fotg210_udc *fotg210 = ep->fotg210;
468*4882a593Smuzhiyun u32 value;
469*4882a593Smuzhiyun void __iomem *reg;
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun reg = (ep->dir_in) ?
472*4882a593Smuzhiyun fotg210->reg + FOTG210_INEPMPSR(ep->epnum) :
473*4882a593Smuzhiyun fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum);
474*4882a593Smuzhiyun value = ioread32(reg);
475*4882a593Smuzhiyun value &= ~INOUTEPMPSR_STL_EP;
476*4882a593Smuzhiyun iowrite32(value, reg);
477*4882a593Smuzhiyun }
478*4882a593Smuzhiyun
fotg210_set_halt_and_wedge(struct usb_ep * _ep,int value,int wedge)479*4882a593Smuzhiyun static int fotg210_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedge)
480*4882a593Smuzhiyun {
481*4882a593Smuzhiyun struct fotg210_ep *ep;
482*4882a593Smuzhiyun struct fotg210_udc *fotg210;
483*4882a593Smuzhiyun unsigned long flags;
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun ep = container_of(_ep, struct fotg210_ep, ep);
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun fotg210 = ep->fotg210;
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun spin_lock_irqsave(&ep->fotg210->lock, flags);
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun if (value) {
492*4882a593Smuzhiyun fotg210_set_epnstall(ep);
493*4882a593Smuzhiyun ep->stall = 1;
494*4882a593Smuzhiyun if (wedge)
495*4882a593Smuzhiyun ep->wedged = 1;
496*4882a593Smuzhiyun } else {
497*4882a593Smuzhiyun fotg210_reset_tseq(fotg210, ep->epnum);
498*4882a593Smuzhiyun fotg210_clear_epnstall(ep);
499*4882a593Smuzhiyun ep->stall = 0;
500*4882a593Smuzhiyun ep->wedged = 0;
501*4882a593Smuzhiyun if (!list_empty(&ep->queue))
502*4882a593Smuzhiyun fotg210_enable_fifo_int(ep);
503*4882a593Smuzhiyun }
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun spin_unlock_irqrestore(&ep->fotg210->lock, flags);
506*4882a593Smuzhiyun return 0;
507*4882a593Smuzhiyun }
508*4882a593Smuzhiyun
fotg210_ep_set_halt(struct usb_ep * _ep,int value)509*4882a593Smuzhiyun static int fotg210_ep_set_halt(struct usb_ep *_ep, int value)
510*4882a593Smuzhiyun {
511*4882a593Smuzhiyun return fotg210_set_halt_and_wedge(_ep, value, 0);
512*4882a593Smuzhiyun }
513*4882a593Smuzhiyun
fotg210_ep_set_wedge(struct usb_ep * _ep)514*4882a593Smuzhiyun static int fotg210_ep_set_wedge(struct usb_ep *_ep)
515*4882a593Smuzhiyun {
516*4882a593Smuzhiyun return fotg210_set_halt_and_wedge(_ep, 1, 1);
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun
fotg210_ep_fifo_flush(struct usb_ep * _ep)519*4882a593Smuzhiyun static void fotg210_ep_fifo_flush(struct usb_ep *_ep)
520*4882a593Smuzhiyun {
521*4882a593Smuzhiyun }
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun static const struct usb_ep_ops fotg210_ep_ops = {
524*4882a593Smuzhiyun .enable = fotg210_ep_enable,
525*4882a593Smuzhiyun .disable = fotg210_ep_disable,
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun .alloc_request = fotg210_ep_alloc_request,
528*4882a593Smuzhiyun .free_request = fotg210_ep_free_request,
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun .queue = fotg210_ep_queue,
531*4882a593Smuzhiyun .dequeue = fotg210_ep_dequeue,
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun .set_halt = fotg210_ep_set_halt,
534*4882a593Smuzhiyun .fifo_flush = fotg210_ep_fifo_flush,
535*4882a593Smuzhiyun .set_wedge = fotg210_ep_set_wedge,
536*4882a593Smuzhiyun };
537*4882a593Smuzhiyun
fotg210_clear_tx0byte(struct fotg210_udc * fotg210)538*4882a593Smuzhiyun static void fotg210_clear_tx0byte(struct fotg210_udc *fotg210)
539*4882a593Smuzhiyun {
540*4882a593Smuzhiyun u32 value = ioread32(fotg210->reg + FOTG210_TX0BYTE);
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun value &= ~(TX0BYTE_EP1 | TX0BYTE_EP2 | TX0BYTE_EP3
543*4882a593Smuzhiyun | TX0BYTE_EP4);
544*4882a593Smuzhiyun iowrite32(value, fotg210->reg + FOTG210_TX0BYTE);
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun
fotg210_clear_rx0byte(struct fotg210_udc * fotg210)547*4882a593Smuzhiyun static void fotg210_clear_rx0byte(struct fotg210_udc *fotg210)
548*4882a593Smuzhiyun {
549*4882a593Smuzhiyun u32 value = ioread32(fotg210->reg + FOTG210_RX0BYTE);
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun value &= ~(RX0BYTE_EP1 | RX0BYTE_EP2 | RX0BYTE_EP3
552*4882a593Smuzhiyun | RX0BYTE_EP4);
553*4882a593Smuzhiyun iowrite32(value, fotg210->reg + FOTG210_RX0BYTE);
554*4882a593Smuzhiyun }
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun /* read 8-byte setup packet only */
fotg210_rdsetupp(struct fotg210_udc * fotg210,u8 * buffer)557*4882a593Smuzhiyun static void fotg210_rdsetupp(struct fotg210_udc *fotg210,
558*4882a593Smuzhiyun u8 *buffer)
559*4882a593Smuzhiyun {
560*4882a593Smuzhiyun int i = 0;
561*4882a593Smuzhiyun u8 *tmp = buffer;
562*4882a593Smuzhiyun u32 data;
563*4882a593Smuzhiyun u32 length = 8;
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun iowrite32(DMATFNR_ACC_CXF, fotg210->reg + FOTG210_DMATFNR);
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun for (i = (length >> 2); i > 0; i--) {
568*4882a593Smuzhiyun data = ioread32(fotg210->reg + FOTG210_CXPORT);
569*4882a593Smuzhiyun *tmp = data & 0xFF;
570*4882a593Smuzhiyun *(tmp + 1) = (data >> 8) & 0xFF;
571*4882a593Smuzhiyun *(tmp + 2) = (data >> 16) & 0xFF;
572*4882a593Smuzhiyun *(tmp + 3) = (data >> 24) & 0xFF;
573*4882a593Smuzhiyun tmp = tmp + 4;
574*4882a593Smuzhiyun }
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun switch (length % 4) {
577*4882a593Smuzhiyun case 1:
578*4882a593Smuzhiyun data = ioread32(fotg210->reg + FOTG210_CXPORT);
579*4882a593Smuzhiyun *tmp = data & 0xFF;
580*4882a593Smuzhiyun break;
581*4882a593Smuzhiyun case 2:
582*4882a593Smuzhiyun data = ioread32(fotg210->reg + FOTG210_CXPORT);
583*4882a593Smuzhiyun *tmp = data & 0xFF;
584*4882a593Smuzhiyun *(tmp + 1) = (data >> 8) & 0xFF;
585*4882a593Smuzhiyun break;
586*4882a593Smuzhiyun case 3:
587*4882a593Smuzhiyun data = ioread32(fotg210->reg + FOTG210_CXPORT);
588*4882a593Smuzhiyun *tmp = data & 0xFF;
589*4882a593Smuzhiyun *(tmp + 1) = (data >> 8) & 0xFF;
590*4882a593Smuzhiyun *(tmp + 2) = (data >> 16) & 0xFF;
591*4882a593Smuzhiyun break;
592*4882a593Smuzhiyun default:
593*4882a593Smuzhiyun break;
594*4882a593Smuzhiyun }
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun iowrite32(DMATFNR_DISDMA, fotg210->reg + FOTG210_DMATFNR);
597*4882a593Smuzhiyun }
598*4882a593Smuzhiyun
fotg210_set_configuration(struct fotg210_udc * fotg210)599*4882a593Smuzhiyun static void fotg210_set_configuration(struct fotg210_udc *fotg210)
600*4882a593Smuzhiyun {
601*4882a593Smuzhiyun u32 value = ioread32(fotg210->reg + FOTG210_DAR);
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun value |= DAR_AFT_CONF;
604*4882a593Smuzhiyun iowrite32(value, fotg210->reg + FOTG210_DAR);
605*4882a593Smuzhiyun }
606*4882a593Smuzhiyun
fotg210_set_dev_addr(struct fotg210_udc * fotg210,u32 addr)607*4882a593Smuzhiyun static void fotg210_set_dev_addr(struct fotg210_udc *fotg210, u32 addr)
608*4882a593Smuzhiyun {
609*4882a593Smuzhiyun u32 value = ioread32(fotg210->reg + FOTG210_DAR);
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun value |= (addr & 0x7F);
612*4882a593Smuzhiyun iowrite32(value, fotg210->reg + FOTG210_DAR);
613*4882a593Smuzhiyun }
614*4882a593Smuzhiyun
fotg210_set_cxstall(struct fotg210_udc * fotg210)615*4882a593Smuzhiyun static void fotg210_set_cxstall(struct fotg210_udc *fotg210)
616*4882a593Smuzhiyun {
617*4882a593Smuzhiyun u32 value = ioread32(fotg210->reg + FOTG210_DCFESR);
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun value |= DCFESR_CX_STL;
620*4882a593Smuzhiyun iowrite32(value, fotg210->reg + FOTG210_DCFESR);
621*4882a593Smuzhiyun }
622*4882a593Smuzhiyun
fotg210_request_error(struct fotg210_udc * fotg210)623*4882a593Smuzhiyun static void fotg210_request_error(struct fotg210_udc *fotg210)
624*4882a593Smuzhiyun {
625*4882a593Smuzhiyun fotg210_set_cxstall(fotg210);
626*4882a593Smuzhiyun pr_err("request error!!\n");
627*4882a593Smuzhiyun }
628*4882a593Smuzhiyun
fotg210_set_address(struct fotg210_udc * fotg210,struct usb_ctrlrequest * ctrl)629*4882a593Smuzhiyun static void fotg210_set_address(struct fotg210_udc *fotg210,
630*4882a593Smuzhiyun struct usb_ctrlrequest *ctrl)
631*4882a593Smuzhiyun {
632*4882a593Smuzhiyun if (ctrl->wValue >= 0x0100) {
633*4882a593Smuzhiyun fotg210_request_error(fotg210);
634*4882a593Smuzhiyun } else {
635*4882a593Smuzhiyun fotg210_set_dev_addr(fotg210, ctrl->wValue);
636*4882a593Smuzhiyun fotg210_set_cxdone(fotg210);
637*4882a593Smuzhiyun }
638*4882a593Smuzhiyun }
639*4882a593Smuzhiyun
fotg210_set_feature(struct fotg210_udc * fotg210,struct usb_ctrlrequest * ctrl)640*4882a593Smuzhiyun static void fotg210_set_feature(struct fotg210_udc *fotg210,
641*4882a593Smuzhiyun struct usb_ctrlrequest *ctrl)
642*4882a593Smuzhiyun {
643*4882a593Smuzhiyun switch (ctrl->bRequestType & USB_RECIP_MASK) {
644*4882a593Smuzhiyun case USB_RECIP_DEVICE:
645*4882a593Smuzhiyun fotg210_set_cxdone(fotg210);
646*4882a593Smuzhiyun break;
647*4882a593Smuzhiyun case USB_RECIP_INTERFACE:
648*4882a593Smuzhiyun fotg210_set_cxdone(fotg210);
649*4882a593Smuzhiyun break;
650*4882a593Smuzhiyun case USB_RECIP_ENDPOINT: {
651*4882a593Smuzhiyun u8 epnum;
652*4882a593Smuzhiyun epnum = le16_to_cpu(ctrl->wIndex) & USB_ENDPOINT_NUMBER_MASK;
653*4882a593Smuzhiyun if (epnum)
654*4882a593Smuzhiyun fotg210_set_epnstall(fotg210->ep[epnum]);
655*4882a593Smuzhiyun else
656*4882a593Smuzhiyun fotg210_set_cxstall(fotg210);
657*4882a593Smuzhiyun fotg210_set_cxdone(fotg210);
658*4882a593Smuzhiyun }
659*4882a593Smuzhiyun break;
660*4882a593Smuzhiyun default:
661*4882a593Smuzhiyun fotg210_request_error(fotg210);
662*4882a593Smuzhiyun break;
663*4882a593Smuzhiyun }
664*4882a593Smuzhiyun }
665*4882a593Smuzhiyun
fotg210_clear_feature(struct fotg210_udc * fotg210,struct usb_ctrlrequest * ctrl)666*4882a593Smuzhiyun static void fotg210_clear_feature(struct fotg210_udc *fotg210,
667*4882a593Smuzhiyun struct usb_ctrlrequest *ctrl)
668*4882a593Smuzhiyun {
669*4882a593Smuzhiyun struct fotg210_ep *ep =
670*4882a593Smuzhiyun fotg210->ep[ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK];
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun switch (ctrl->bRequestType & USB_RECIP_MASK) {
673*4882a593Smuzhiyun case USB_RECIP_DEVICE:
674*4882a593Smuzhiyun fotg210_set_cxdone(fotg210);
675*4882a593Smuzhiyun break;
676*4882a593Smuzhiyun case USB_RECIP_INTERFACE:
677*4882a593Smuzhiyun fotg210_set_cxdone(fotg210);
678*4882a593Smuzhiyun break;
679*4882a593Smuzhiyun case USB_RECIP_ENDPOINT:
680*4882a593Smuzhiyun if (ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK) {
681*4882a593Smuzhiyun if (ep->wedged) {
682*4882a593Smuzhiyun fotg210_set_cxdone(fotg210);
683*4882a593Smuzhiyun break;
684*4882a593Smuzhiyun }
685*4882a593Smuzhiyun if (ep->stall)
686*4882a593Smuzhiyun fotg210_set_halt_and_wedge(&ep->ep, 0, 0);
687*4882a593Smuzhiyun }
688*4882a593Smuzhiyun fotg210_set_cxdone(fotg210);
689*4882a593Smuzhiyun break;
690*4882a593Smuzhiyun default:
691*4882a593Smuzhiyun fotg210_request_error(fotg210);
692*4882a593Smuzhiyun break;
693*4882a593Smuzhiyun }
694*4882a593Smuzhiyun }
695*4882a593Smuzhiyun
fotg210_is_epnstall(struct fotg210_ep * ep)696*4882a593Smuzhiyun static int fotg210_is_epnstall(struct fotg210_ep *ep)
697*4882a593Smuzhiyun {
698*4882a593Smuzhiyun struct fotg210_udc *fotg210 = ep->fotg210;
699*4882a593Smuzhiyun u32 value;
700*4882a593Smuzhiyun void __iomem *reg;
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun reg = (ep->dir_in) ?
703*4882a593Smuzhiyun fotg210->reg + FOTG210_INEPMPSR(ep->epnum) :
704*4882a593Smuzhiyun fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum);
705*4882a593Smuzhiyun value = ioread32(reg);
706*4882a593Smuzhiyun return value & INOUTEPMPSR_STL_EP ? 1 : 0;
707*4882a593Smuzhiyun }
708*4882a593Smuzhiyun
fotg210_get_status(struct fotg210_udc * fotg210,struct usb_ctrlrequest * ctrl)709*4882a593Smuzhiyun static void fotg210_get_status(struct fotg210_udc *fotg210,
710*4882a593Smuzhiyun struct usb_ctrlrequest *ctrl)
711*4882a593Smuzhiyun {
712*4882a593Smuzhiyun u8 epnum;
713*4882a593Smuzhiyun
714*4882a593Smuzhiyun switch (ctrl->bRequestType & USB_RECIP_MASK) {
715*4882a593Smuzhiyun case USB_RECIP_DEVICE:
716*4882a593Smuzhiyun fotg210->ep0_data = 1 << USB_DEVICE_SELF_POWERED;
717*4882a593Smuzhiyun break;
718*4882a593Smuzhiyun case USB_RECIP_INTERFACE:
719*4882a593Smuzhiyun fotg210->ep0_data = 0;
720*4882a593Smuzhiyun break;
721*4882a593Smuzhiyun case USB_RECIP_ENDPOINT:
722*4882a593Smuzhiyun epnum = ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK;
723*4882a593Smuzhiyun if (epnum)
724*4882a593Smuzhiyun fotg210->ep0_data =
725*4882a593Smuzhiyun fotg210_is_epnstall(fotg210->ep[epnum])
726*4882a593Smuzhiyun << USB_ENDPOINT_HALT;
727*4882a593Smuzhiyun else
728*4882a593Smuzhiyun fotg210_request_error(fotg210);
729*4882a593Smuzhiyun break;
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun default:
732*4882a593Smuzhiyun fotg210_request_error(fotg210);
733*4882a593Smuzhiyun return; /* exit */
734*4882a593Smuzhiyun }
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun fotg210->ep0_req->buf = &fotg210->ep0_data;
737*4882a593Smuzhiyun fotg210->ep0_req->length = 2;
738*4882a593Smuzhiyun
739*4882a593Smuzhiyun spin_unlock(&fotg210->lock);
740*4882a593Smuzhiyun fotg210_ep_queue(fotg210->gadget.ep0, fotg210->ep0_req, GFP_ATOMIC);
741*4882a593Smuzhiyun spin_lock(&fotg210->lock);
742*4882a593Smuzhiyun }
743*4882a593Smuzhiyun
fotg210_setup_packet(struct fotg210_udc * fotg210,struct usb_ctrlrequest * ctrl)744*4882a593Smuzhiyun static int fotg210_setup_packet(struct fotg210_udc *fotg210,
745*4882a593Smuzhiyun struct usb_ctrlrequest *ctrl)
746*4882a593Smuzhiyun {
747*4882a593Smuzhiyun u8 *p = (u8 *)ctrl;
748*4882a593Smuzhiyun u8 ret = 0;
749*4882a593Smuzhiyun
750*4882a593Smuzhiyun fotg210_rdsetupp(fotg210, p);
751*4882a593Smuzhiyun
752*4882a593Smuzhiyun fotg210->ep[0]->dir_in = ctrl->bRequestType & USB_DIR_IN;
753*4882a593Smuzhiyun
754*4882a593Smuzhiyun if (fotg210->gadget.speed == USB_SPEED_UNKNOWN) {
755*4882a593Smuzhiyun u32 value = ioread32(fotg210->reg + FOTG210_DMCR);
756*4882a593Smuzhiyun fotg210->gadget.speed = value & DMCR_HS_EN ?
757*4882a593Smuzhiyun USB_SPEED_HIGH : USB_SPEED_FULL;
758*4882a593Smuzhiyun }
759*4882a593Smuzhiyun
760*4882a593Smuzhiyun /* check request */
761*4882a593Smuzhiyun if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
762*4882a593Smuzhiyun switch (ctrl->bRequest) {
763*4882a593Smuzhiyun case USB_REQ_GET_STATUS:
764*4882a593Smuzhiyun fotg210_get_status(fotg210, ctrl);
765*4882a593Smuzhiyun break;
766*4882a593Smuzhiyun case USB_REQ_CLEAR_FEATURE:
767*4882a593Smuzhiyun fotg210_clear_feature(fotg210, ctrl);
768*4882a593Smuzhiyun break;
769*4882a593Smuzhiyun case USB_REQ_SET_FEATURE:
770*4882a593Smuzhiyun fotg210_set_feature(fotg210, ctrl);
771*4882a593Smuzhiyun break;
772*4882a593Smuzhiyun case USB_REQ_SET_ADDRESS:
773*4882a593Smuzhiyun fotg210_set_address(fotg210, ctrl);
774*4882a593Smuzhiyun break;
775*4882a593Smuzhiyun case USB_REQ_SET_CONFIGURATION:
776*4882a593Smuzhiyun fotg210_set_configuration(fotg210);
777*4882a593Smuzhiyun ret = 1;
778*4882a593Smuzhiyun break;
779*4882a593Smuzhiyun default:
780*4882a593Smuzhiyun ret = 1;
781*4882a593Smuzhiyun break;
782*4882a593Smuzhiyun }
783*4882a593Smuzhiyun } else {
784*4882a593Smuzhiyun ret = 1;
785*4882a593Smuzhiyun }
786*4882a593Smuzhiyun
787*4882a593Smuzhiyun return ret;
788*4882a593Smuzhiyun }
789*4882a593Smuzhiyun
fotg210_ep0out(struct fotg210_udc * fotg210)790*4882a593Smuzhiyun static void fotg210_ep0out(struct fotg210_udc *fotg210)
791*4882a593Smuzhiyun {
792*4882a593Smuzhiyun struct fotg210_ep *ep = fotg210->ep[0];
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun if (!list_empty(&ep->queue) && !ep->dir_in) {
795*4882a593Smuzhiyun struct fotg210_request *req;
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun req = list_first_entry(&ep->queue,
798*4882a593Smuzhiyun struct fotg210_request, queue);
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun if (req->req.length)
801*4882a593Smuzhiyun fotg210_start_dma(ep, req);
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun if ((req->req.length - req->req.actual) < ep->ep.maxpacket)
804*4882a593Smuzhiyun fotg210_done(ep, req, 0);
805*4882a593Smuzhiyun } else {
806*4882a593Smuzhiyun pr_err("%s : empty queue\n", __func__);
807*4882a593Smuzhiyun }
808*4882a593Smuzhiyun }
809*4882a593Smuzhiyun
fotg210_ep0in(struct fotg210_udc * fotg210)810*4882a593Smuzhiyun static void fotg210_ep0in(struct fotg210_udc *fotg210)
811*4882a593Smuzhiyun {
812*4882a593Smuzhiyun struct fotg210_ep *ep = fotg210->ep[0];
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun if ((!list_empty(&ep->queue)) && (ep->dir_in)) {
815*4882a593Smuzhiyun struct fotg210_request *req;
816*4882a593Smuzhiyun
817*4882a593Smuzhiyun req = list_entry(ep->queue.next,
818*4882a593Smuzhiyun struct fotg210_request, queue);
819*4882a593Smuzhiyun
820*4882a593Smuzhiyun if (req->req.length)
821*4882a593Smuzhiyun fotg210_start_dma(ep, req);
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun if (req->req.actual == req->req.length)
824*4882a593Smuzhiyun fotg210_done(ep, req, 0);
825*4882a593Smuzhiyun } else {
826*4882a593Smuzhiyun fotg210_set_cxdone(fotg210);
827*4882a593Smuzhiyun }
828*4882a593Smuzhiyun }
829*4882a593Smuzhiyun
fotg210_clear_comabt_int(struct fotg210_udc * fotg210)830*4882a593Smuzhiyun static void fotg210_clear_comabt_int(struct fotg210_udc *fotg210)
831*4882a593Smuzhiyun {
832*4882a593Smuzhiyun u32 value = ioread32(fotg210->reg + FOTG210_DISGR0);
833*4882a593Smuzhiyun
834*4882a593Smuzhiyun value &= ~DISGR0_CX_COMABT_INT;
835*4882a593Smuzhiyun iowrite32(value, fotg210->reg + FOTG210_DISGR0);
836*4882a593Smuzhiyun }
837*4882a593Smuzhiyun
fotg210_in_fifo_handler(struct fotg210_ep * ep)838*4882a593Smuzhiyun static void fotg210_in_fifo_handler(struct fotg210_ep *ep)
839*4882a593Smuzhiyun {
840*4882a593Smuzhiyun struct fotg210_request *req = list_entry(ep->queue.next,
841*4882a593Smuzhiyun struct fotg210_request, queue);
842*4882a593Smuzhiyun
843*4882a593Smuzhiyun if (req->req.length)
844*4882a593Smuzhiyun fotg210_start_dma(ep, req);
845*4882a593Smuzhiyun fotg210_done(ep, req, 0);
846*4882a593Smuzhiyun }
847*4882a593Smuzhiyun
fotg210_out_fifo_handler(struct fotg210_ep * ep)848*4882a593Smuzhiyun static void fotg210_out_fifo_handler(struct fotg210_ep *ep)
849*4882a593Smuzhiyun {
850*4882a593Smuzhiyun struct fotg210_request *req = list_entry(ep->queue.next,
851*4882a593Smuzhiyun struct fotg210_request, queue);
852*4882a593Smuzhiyun int disgr1 = ioread32(ep->fotg210->reg + FOTG210_DISGR1);
853*4882a593Smuzhiyun
854*4882a593Smuzhiyun fotg210_start_dma(ep, req);
855*4882a593Smuzhiyun
856*4882a593Smuzhiyun /* Complete the request when it's full or a short packet arrived.
857*4882a593Smuzhiyun * Like other drivers, short_not_ok isn't handled.
858*4882a593Smuzhiyun */
859*4882a593Smuzhiyun
860*4882a593Smuzhiyun if (req->req.length == req->req.actual ||
861*4882a593Smuzhiyun (disgr1 & DISGR1_SPK_INT(ep->epnum - 1)))
862*4882a593Smuzhiyun fotg210_done(ep, req, 0);
863*4882a593Smuzhiyun }
864*4882a593Smuzhiyun
fotg210_irq(int irq,void * _fotg210)865*4882a593Smuzhiyun static irqreturn_t fotg210_irq(int irq, void *_fotg210)
866*4882a593Smuzhiyun {
867*4882a593Smuzhiyun struct fotg210_udc *fotg210 = _fotg210;
868*4882a593Smuzhiyun u32 int_grp = ioread32(fotg210->reg + FOTG210_DIGR);
869*4882a593Smuzhiyun u32 int_msk = ioread32(fotg210->reg + FOTG210_DMIGR);
870*4882a593Smuzhiyun
871*4882a593Smuzhiyun int_grp &= ~int_msk;
872*4882a593Smuzhiyun
873*4882a593Smuzhiyun spin_lock(&fotg210->lock);
874*4882a593Smuzhiyun
875*4882a593Smuzhiyun if (int_grp & DIGR_INT_G2) {
876*4882a593Smuzhiyun void __iomem *reg = fotg210->reg + FOTG210_DISGR2;
877*4882a593Smuzhiyun u32 int_grp2 = ioread32(reg);
878*4882a593Smuzhiyun u32 int_msk2 = ioread32(fotg210->reg + FOTG210_DMISGR2);
879*4882a593Smuzhiyun u32 value;
880*4882a593Smuzhiyun
881*4882a593Smuzhiyun int_grp2 &= ~int_msk2;
882*4882a593Smuzhiyun
883*4882a593Smuzhiyun if (int_grp2 & DISGR2_USBRST_INT) {
884*4882a593Smuzhiyun value = ioread32(reg);
885*4882a593Smuzhiyun value &= ~DISGR2_USBRST_INT;
886*4882a593Smuzhiyun iowrite32(value, reg);
887*4882a593Smuzhiyun pr_info("fotg210 udc reset\n");
888*4882a593Smuzhiyun }
889*4882a593Smuzhiyun if (int_grp2 & DISGR2_SUSP_INT) {
890*4882a593Smuzhiyun value = ioread32(reg);
891*4882a593Smuzhiyun value &= ~DISGR2_SUSP_INT;
892*4882a593Smuzhiyun iowrite32(value, reg);
893*4882a593Smuzhiyun pr_info("fotg210 udc suspend\n");
894*4882a593Smuzhiyun }
895*4882a593Smuzhiyun if (int_grp2 & DISGR2_RESM_INT) {
896*4882a593Smuzhiyun value = ioread32(reg);
897*4882a593Smuzhiyun value &= ~DISGR2_RESM_INT;
898*4882a593Smuzhiyun iowrite32(value, reg);
899*4882a593Smuzhiyun pr_info("fotg210 udc resume\n");
900*4882a593Smuzhiyun }
901*4882a593Smuzhiyun if (int_grp2 & DISGR2_ISO_SEQ_ERR_INT) {
902*4882a593Smuzhiyun value = ioread32(reg);
903*4882a593Smuzhiyun value &= ~DISGR2_ISO_SEQ_ERR_INT;
904*4882a593Smuzhiyun iowrite32(value, reg);
905*4882a593Smuzhiyun pr_info("fotg210 iso sequence error\n");
906*4882a593Smuzhiyun }
907*4882a593Smuzhiyun if (int_grp2 & DISGR2_ISO_SEQ_ABORT_INT) {
908*4882a593Smuzhiyun value = ioread32(reg);
909*4882a593Smuzhiyun value &= ~DISGR2_ISO_SEQ_ABORT_INT;
910*4882a593Smuzhiyun iowrite32(value, reg);
911*4882a593Smuzhiyun pr_info("fotg210 iso sequence abort\n");
912*4882a593Smuzhiyun }
913*4882a593Smuzhiyun if (int_grp2 & DISGR2_TX0BYTE_INT) {
914*4882a593Smuzhiyun fotg210_clear_tx0byte(fotg210);
915*4882a593Smuzhiyun value = ioread32(reg);
916*4882a593Smuzhiyun value &= ~DISGR2_TX0BYTE_INT;
917*4882a593Smuzhiyun iowrite32(value, reg);
918*4882a593Smuzhiyun pr_info("fotg210 transferred 0 byte\n");
919*4882a593Smuzhiyun }
920*4882a593Smuzhiyun if (int_grp2 & DISGR2_RX0BYTE_INT) {
921*4882a593Smuzhiyun fotg210_clear_rx0byte(fotg210);
922*4882a593Smuzhiyun value = ioread32(reg);
923*4882a593Smuzhiyun value &= ~DISGR2_RX0BYTE_INT;
924*4882a593Smuzhiyun iowrite32(value, reg);
925*4882a593Smuzhiyun pr_info("fotg210 received 0 byte\n");
926*4882a593Smuzhiyun }
927*4882a593Smuzhiyun if (int_grp2 & DISGR2_DMA_ERROR) {
928*4882a593Smuzhiyun value = ioread32(reg);
929*4882a593Smuzhiyun value &= ~DISGR2_DMA_ERROR;
930*4882a593Smuzhiyun iowrite32(value, reg);
931*4882a593Smuzhiyun }
932*4882a593Smuzhiyun }
933*4882a593Smuzhiyun
934*4882a593Smuzhiyun if (int_grp & DIGR_INT_G0) {
935*4882a593Smuzhiyun void __iomem *reg = fotg210->reg + FOTG210_DISGR0;
936*4882a593Smuzhiyun u32 int_grp0 = ioread32(reg);
937*4882a593Smuzhiyun u32 int_msk0 = ioread32(fotg210->reg + FOTG210_DMISGR0);
938*4882a593Smuzhiyun struct usb_ctrlrequest ctrl;
939*4882a593Smuzhiyun
940*4882a593Smuzhiyun int_grp0 &= ~int_msk0;
941*4882a593Smuzhiyun
942*4882a593Smuzhiyun /* the highest priority in this source register */
943*4882a593Smuzhiyun if (int_grp0 & DISGR0_CX_COMABT_INT) {
944*4882a593Smuzhiyun fotg210_clear_comabt_int(fotg210);
945*4882a593Smuzhiyun pr_info("fotg210 CX command abort\n");
946*4882a593Smuzhiyun }
947*4882a593Smuzhiyun
948*4882a593Smuzhiyun if (int_grp0 & DISGR0_CX_SETUP_INT) {
949*4882a593Smuzhiyun if (fotg210_setup_packet(fotg210, &ctrl)) {
950*4882a593Smuzhiyun spin_unlock(&fotg210->lock);
951*4882a593Smuzhiyun if (fotg210->driver->setup(&fotg210->gadget,
952*4882a593Smuzhiyun &ctrl) < 0)
953*4882a593Smuzhiyun fotg210_set_cxstall(fotg210);
954*4882a593Smuzhiyun spin_lock(&fotg210->lock);
955*4882a593Smuzhiyun }
956*4882a593Smuzhiyun }
957*4882a593Smuzhiyun if (int_grp0 & DISGR0_CX_COMEND_INT)
958*4882a593Smuzhiyun pr_info("fotg210 cmd end\n");
959*4882a593Smuzhiyun
960*4882a593Smuzhiyun if (int_grp0 & DISGR0_CX_IN_INT)
961*4882a593Smuzhiyun fotg210_ep0in(fotg210);
962*4882a593Smuzhiyun
963*4882a593Smuzhiyun if (int_grp0 & DISGR0_CX_OUT_INT)
964*4882a593Smuzhiyun fotg210_ep0out(fotg210);
965*4882a593Smuzhiyun
966*4882a593Smuzhiyun if (int_grp0 & DISGR0_CX_COMFAIL_INT) {
967*4882a593Smuzhiyun fotg210_set_cxstall(fotg210);
968*4882a593Smuzhiyun pr_info("fotg210 ep0 fail\n");
969*4882a593Smuzhiyun }
970*4882a593Smuzhiyun }
971*4882a593Smuzhiyun
972*4882a593Smuzhiyun if (int_grp & DIGR_INT_G1) {
973*4882a593Smuzhiyun void __iomem *reg = fotg210->reg + FOTG210_DISGR1;
974*4882a593Smuzhiyun u32 int_grp1 = ioread32(reg);
975*4882a593Smuzhiyun u32 int_msk1 = ioread32(fotg210->reg + FOTG210_DMISGR1);
976*4882a593Smuzhiyun int fifo;
977*4882a593Smuzhiyun
978*4882a593Smuzhiyun int_grp1 &= ~int_msk1;
979*4882a593Smuzhiyun
980*4882a593Smuzhiyun for (fifo = 0; fifo < FOTG210_MAX_FIFO_NUM; fifo++) {
981*4882a593Smuzhiyun if (int_grp1 & DISGR1_IN_INT(fifo))
982*4882a593Smuzhiyun fotg210_in_fifo_handler(fotg210->ep[fifo + 1]);
983*4882a593Smuzhiyun
984*4882a593Smuzhiyun if ((int_grp1 & DISGR1_OUT_INT(fifo)) ||
985*4882a593Smuzhiyun (int_grp1 & DISGR1_SPK_INT(fifo)))
986*4882a593Smuzhiyun fotg210_out_fifo_handler(fotg210->ep[fifo + 1]);
987*4882a593Smuzhiyun }
988*4882a593Smuzhiyun }
989*4882a593Smuzhiyun
990*4882a593Smuzhiyun spin_unlock(&fotg210->lock);
991*4882a593Smuzhiyun
992*4882a593Smuzhiyun return IRQ_HANDLED;
993*4882a593Smuzhiyun }
994*4882a593Smuzhiyun
fotg210_disable_unplug(struct fotg210_udc * fotg210)995*4882a593Smuzhiyun static void fotg210_disable_unplug(struct fotg210_udc *fotg210)
996*4882a593Smuzhiyun {
997*4882a593Smuzhiyun u32 reg = ioread32(fotg210->reg + FOTG210_PHYTMSR);
998*4882a593Smuzhiyun
999*4882a593Smuzhiyun reg &= ~PHYTMSR_UNPLUG;
1000*4882a593Smuzhiyun iowrite32(reg, fotg210->reg + FOTG210_PHYTMSR);
1001*4882a593Smuzhiyun }
1002*4882a593Smuzhiyun
fotg210_udc_start(struct usb_gadget * g,struct usb_gadget_driver * driver)1003*4882a593Smuzhiyun static int fotg210_udc_start(struct usb_gadget *g,
1004*4882a593Smuzhiyun struct usb_gadget_driver *driver)
1005*4882a593Smuzhiyun {
1006*4882a593Smuzhiyun struct fotg210_udc *fotg210 = gadget_to_fotg210(g);
1007*4882a593Smuzhiyun u32 value;
1008*4882a593Smuzhiyun
1009*4882a593Smuzhiyun /* hook up the driver */
1010*4882a593Smuzhiyun driver->driver.bus = NULL;
1011*4882a593Smuzhiyun fotg210->driver = driver;
1012*4882a593Smuzhiyun
1013*4882a593Smuzhiyun /* enable device global interrupt */
1014*4882a593Smuzhiyun value = ioread32(fotg210->reg + FOTG210_DMCR);
1015*4882a593Smuzhiyun value |= DMCR_GLINT_EN;
1016*4882a593Smuzhiyun iowrite32(value, fotg210->reg + FOTG210_DMCR);
1017*4882a593Smuzhiyun
1018*4882a593Smuzhiyun return 0;
1019*4882a593Smuzhiyun }
1020*4882a593Smuzhiyun
fotg210_init(struct fotg210_udc * fotg210)1021*4882a593Smuzhiyun static void fotg210_init(struct fotg210_udc *fotg210)
1022*4882a593Smuzhiyun {
1023*4882a593Smuzhiyun u32 value;
1024*4882a593Smuzhiyun
1025*4882a593Smuzhiyun /* disable global interrupt and set int polarity to active high */
1026*4882a593Smuzhiyun iowrite32(GMIR_MHC_INT | GMIR_MOTG_INT | GMIR_INT_POLARITY,
1027*4882a593Smuzhiyun fotg210->reg + FOTG210_GMIR);
1028*4882a593Smuzhiyun
1029*4882a593Smuzhiyun /* disable device global interrupt */
1030*4882a593Smuzhiyun value = ioread32(fotg210->reg + FOTG210_DMCR);
1031*4882a593Smuzhiyun value &= ~DMCR_GLINT_EN;
1032*4882a593Smuzhiyun iowrite32(value, fotg210->reg + FOTG210_DMCR);
1033*4882a593Smuzhiyun
1034*4882a593Smuzhiyun /* enable only grp2 irqs we handle */
1035*4882a593Smuzhiyun iowrite32(~(DISGR2_DMA_ERROR | DISGR2_RX0BYTE_INT | DISGR2_TX0BYTE_INT
1036*4882a593Smuzhiyun | DISGR2_ISO_SEQ_ABORT_INT | DISGR2_ISO_SEQ_ERR_INT
1037*4882a593Smuzhiyun | DISGR2_RESM_INT | DISGR2_SUSP_INT | DISGR2_USBRST_INT),
1038*4882a593Smuzhiyun fotg210->reg + FOTG210_DMISGR2);
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun /* disable all fifo interrupt */
1041*4882a593Smuzhiyun iowrite32(~(u32)0, fotg210->reg + FOTG210_DMISGR1);
1042*4882a593Smuzhiyun
1043*4882a593Smuzhiyun /* disable cmd end */
1044*4882a593Smuzhiyun value = ioread32(fotg210->reg + FOTG210_DMISGR0);
1045*4882a593Smuzhiyun value |= DMISGR0_MCX_COMEND;
1046*4882a593Smuzhiyun iowrite32(value, fotg210->reg + FOTG210_DMISGR0);
1047*4882a593Smuzhiyun }
1048*4882a593Smuzhiyun
fotg210_udc_stop(struct usb_gadget * g)1049*4882a593Smuzhiyun static int fotg210_udc_stop(struct usb_gadget *g)
1050*4882a593Smuzhiyun {
1051*4882a593Smuzhiyun struct fotg210_udc *fotg210 = gadget_to_fotg210(g);
1052*4882a593Smuzhiyun unsigned long flags;
1053*4882a593Smuzhiyun
1054*4882a593Smuzhiyun spin_lock_irqsave(&fotg210->lock, flags);
1055*4882a593Smuzhiyun
1056*4882a593Smuzhiyun fotg210_init(fotg210);
1057*4882a593Smuzhiyun fotg210->driver = NULL;
1058*4882a593Smuzhiyun
1059*4882a593Smuzhiyun spin_unlock_irqrestore(&fotg210->lock, flags);
1060*4882a593Smuzhiyun
1061*4882a593Smuzhiyun return 0;
1062*4882a593Smuzhiyun }
1063*4882a593Smuzhiyun
1064*4882a593Smuzhiyun static const struct usb_gadget_ops fotg210_gadget_ops = {
1065*4882a593Smuzhiyun .udc_start = fotg210_udc_start,
1066*4882a593Smuzhiyun .udc_stop = fotg210_udc_stop,
1067*4882a593Smuzhiyun };
1068*4882a593Smuzhiyun
fotg210_udc_remove(struct platform_device * pdev)1069*4882a593Smuzhiyun static int fotg210_udc_remove(struct platform_device *pdev)
1070*4882a593Smuzhiyun {
1071*4882a593Smuzhiyun struct fotg210_udc *fotg210 = platform_get_drvdata(pdev);
1072*4882a593Smuzhiyun int i;
1073*4882a593Smuzhiyun
1074*4882a593Smuzhiyun usb_del_gadget_udc(&fotg210->gadget);
1075*4882a593Smuzhiyun iounmap(fotg210->reg);
1076*4882a593Smuzhiyun free_irq(platform_get_irq(pdev, 0), fotg210);
1077*4882a593Smuzhiyun
1078*4882a593Smuzhiyun fotg210_ep_free_request(&fotg210->ep[0]->ep, fotg210->ep0_req);
1079*4882a593Smuzhiyun for (i = 0; i < FOTG210_MAX_NUM_EP; i++)
1080*4882a593Smuzhiyun kfree(fotg210->ep[i]);
1081*4882a593Smuzhiyun kfree(fotg210);
1082*4882a593Smuzhiyun
1083*4882a593Smuzhiyun return 0;
1084*4882a593Smuzhiyun }
1085*4882a593Smuzhiyun
fotg210_udc_probe(struct platform_device * pdev)1086*4882a593Smuzhiyun static int fotg210_udc_probe(struct platform_device *pdev)
1087*4882a593Smuzhiyun {
1088*4882a593Smuzhiyun struct resource *res, *ires;
1089*4882a593Smuzhiyun struct fotg210_udc *fotg210 = NULL;
1090*4882a593Smuzhiyun struct fotg210_ep *_ep[FOTG210_MAX_NUM_EP];
1091*4882a593Smuzhiyun int ret = 0;
1092*4882a593Smuzhiyun int i;
1093*4882a593Smuzhiyun
1094*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1095*4882a593Smuzhiyun if (!res) {
1096*4882a593Smuzhiyun pr_err("platform_get_resource error.\n");
1097*4882a593Smuzhiyun return -ENODEV;
1098*4882a593Smuzhiyun }
1099*4882a593Smuzhiyun
1100*4882a593Smuzhiyun ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1101*4882a593Smuzhiyun if (!ires) {
1102*4882a593Smuzhiyun pr_err("platform_get_resource IORESOURCE_IRQ error.\n");
1103*4882a593Smuzhiyun return -ENODEV;
1104*4882a593Smuzhiyun }
1105*4882a593Smuzhiyun
1106*4882a593Smuzhiyun ret = -ENOMEM;
1107*4882a593Smuzhiyun
1108*4882a593Smuzhiyun /* initialize udc */
1109*4882a593Smuzhiyun fotg210 = kzalloc(sizeof(struct fotg210_udc), GFP_KERNEL);
1110*4882a593Smuzhiyun if (fotg210 == NULL)
1111*4882a593Smuzhiyun goto err;
1112*4882a593Smuzhiyun
1113*4882a593Smuzhiyun for (i = 0; i < FOTG210_MAX_NUM_EP; i++) {
1114*4882a593Smuzhiyun _ep[i] = kzalloc(sizeof(struct fotg210_ep), GFP_KERNEL);
1115*4882a593Smuzhiyun if (_ep[i] == NULL)
1116*4882a593Smuzhiyun goto err_alloc;
1117*4882a593Smuzhiyun fotg210->ep[i] = _ep[i];
1118*4882a593Smuzhiyun }
1119*4882a593Smuzhiyun
1120*4882a593Smuzhiyun fotg210->reg = ioremap(res->start, resource_size(res));
1121*4882a593Smuzhiyun if (fotg210->reg == NULL) {
1122*4882a593Smuzhiyun pr_err("ioremap error.\n");
1123*4882a593Smuzhiyun goto err_alloc;
1124*4882a593Smuzhiyun }
1125*4882a593Smuzhiyun
1126*4882a593Smuzhiyun spin_lock_init(&fotg210->lock);
1127*4882a593Smuzhiyun
1128*4882a593Smuzhiyun platform_set_drvdata(pdev, fotg210);
1129*4882a593Smuzhiyun
1130*4882a593Smuzhiyun fotg210->gadget.ops = &fotg210_gadget_ops;
1131*4882a593Smuzhiyun
1132*4882a593Smuzhiyun fotg210->gadget.max_speed = USB_SPEED_HIGH;
1133*4882a593Smuzhiyun fotg210->gadget.dev.parent = &pdev->dev;
1134*4882a593Smuzhiyun fotg210->gadget.dev.dma_mask = pdev->dev.dma_mask;
1135*4882a593Smuzhiyun fotg210->gadget.name = udc_name;
1136*4882a593Smuzhiyun
1137*4882a593Smuzhiyun INIT_LIST_HEAD(&fotg210->gadget.ep_list);
1138*4882a593Smuzhiyun
1139*4882a593Smuzhiyun for (i = 0; i < FOTG210_MAX_NUM_EP; i++) {
1140*4882a593Smuzhiyun struct fotg210_ep *ep = fotg210->ep[i];
1141*4882a593Smuzhiyun
1142*4882a593Smuzhiyun if (i) {
1143*4882a593Smuzhiyun INIT_LIST_HEAD(&fotg210->ep[i]->ep.ep_list);
1144*4882a593Smuzhiyun list_add_tail(&fotg210->ep[i]->ep.ep_list,
1145*4882a593Smuzhiyun &fotg210->gadget.ep_list);
1146*4882a593Smuzhiyun }
1147*4882a593Smuzhiyun ep->fotg210 = fotg210;
1148*4882a593Smuzhiyun INIT_LIST_HEAD(&ep->queue);
1149*4882a593Smuzhiyun ep->ep.name = fotg210_ep_name[i];
1150*4882a593Smuzhiyun ep->ep.ops = &fotg210_ep_ops;
1151*4882a593Smuzhiyun usb_ep_set_maxpacket_limit(&ep->ep, (unsigned short) ~0);
1152*4882a593Smuzhiyun
1153*4882a593Smuzhiyun if (i == 0) {
1154*4882a593Smuzhiyun ep->ep.caps.type_control = true;
1155*4882a593Smuzhiyun } else {
1156*4882a593Smuzhiyun ep->ep.caps.type_iso = true;
1157*4882a593Smuzhiyun ep->ep.caps.type_bulk = true;
1158*4882a593Smuzhiyun ep->ep.caps.type_int = true;
1159*4882a593Smuzhiyun }
1160*4882a593Smuzhiyun
1161*4882a593Smuzhiyun ep->ep.caps.dir_in = true;
1162*4882a593Smuzhiyun ep->ep.caps.dir_out = true;
1163*4882a593Smuzhiyun }
1164*4882a593Smuzhiyun usb_ep_set_maxpacket_limit(&fotg210->ep[0]->ep, 0x40);
1165*4882a593Smuzhiyun fotg210->gadget.ep0 = &fotg210->ep[0]->ep;
1166*4882a593Smuzhiyun INIT_LIST_HEAD(&fotg210->gadget.ep0->ep_list);
1167*4882a593Smuzhiyun
1168*4882a593Smuzhiyun fotg210->ep0_req = fotg210_ep_alloc_request(&fotg210->ep[0]->ep,
1169*4882a593Smuzhiyun GFP_KERNEL);
1170*4882a593Smuzhiyun if (fotg210->ep0_req == NULL)
1171*4882a593Smuzhiyun goto err_map;
1172*4882a593Smuzhiyun
1173*4882a593Smuzhiyun fotg210_init(fotg210);
1174*4882a593Smuzhiyun
1175*4882a593Smuzhiyun fotg210_disable_unplug(fotg210);
1176*4882a593Smuzhiyun
1177*4882a593Smuzhiyun ret = request_irq(ires->start, fotg210_irq, IRQF_SHARED,
1178*4882a593Smuzhiyun udc_name, fotg210);
1179*4882a593Smuzhiyun if (ret < 0) {
1180*4882a593Smuzhiyun pr_err("request_irq error (%d)\n", ret);
1181*4882a593Smuzhiyun goto err_req;
1182*4882a593Smuzhiyun }
1183*4882a593Smuzhiyun
1184*4882a593Smuzhiyun ret = usb_add_gadget_udc(&pdev->dev, &fotg210->gadget);
1185*4882a593Smuzhiyun if (ret)
1186*4882a593Smuzhiyun goto err_add_udc;
1187*4882a593Smuzhiyun
1188*4882a593Smuzhiyun dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
1189*4882a593Smuzhiyun
1190*4882a593Smuzhiyun return 0;
1191*4882a593Smuzhiyun
1192*4882a593Smuzhiyun err_add_udc:
1193*4882a593Smuzhiyun free_irq(ires->start, fotg210);
1194*4882a593Smuzhiyun
1195*4882a593Smuzhiyun err_req:
1196*4882a593Smuzhiyun fotg210_ep_free_request(&fotg210->ep[0]->ep, fotg210->ep0_req);
1197*4882a593Smuzhiyun
1198*4882a593Smuzhiyun err_map:
1199*4882a593Smuzhiyun iounmap(fotg210->reg);
1200*4882a593Smuzhiyun
1201*4882a593Smuzhiyun err_alloc:
1202*4882a593Smuzhiyun for (i = 0; i < FOTG210_MAX_NUM_EP; i++)
1203*4882a593Smuzhiyun kfree(fotg210->ep[i]);
1204*4882a593Smuzhiyun kfree(fotg210);
1205*4882a593Smuzhiyun
1206*4882a593Smuzhiyun err:
1207*4882a593Smuzhiyun return ret;
1208*4882a593Smuzhiyun }
1209*4882a593Smuzhiyun
1210*4882a593Smuzhiyun static struct platform_driver fotg210_driver = {
1211*4882a593Smuzhiyun .driver = {
1212*4882a593Smuzhiyun .name = udc_name,
1213*4882a593Smuzhiyun },
1214*4882a593Smuzhiyun .probe = fotg210_udc_probe,
1215*4882a593Smuzhiyun .remove = fotg210_udc_remove,
1216*4882a593Smuzhiyun };
1217*4882a593Smuzhiyun
1218*4882a593Smuzhiyun module_platform_driver(fotg210_driver);
1219*4882a593Smuzhiyun
1220*4882a593Smuzhiyun MODULE_AUTHOR("Yuan-Hsin Chen, Feng-Hsin Chiang <john453@faraday-tech.com>");
1221*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1222*4882a593Smuzhiyun MODULE_DESCRIPTION(DRIVER_DESC);
1223