1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * at91_udc -- driver for at91-series USB peripheral controller
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2004 by Thomas Rathbone
6*4882a593Smuzhiyun * Copyright (C) 2005 by HP Labs
7*4882a593Smuzhiyun * Copyright (C) 2005 by David Brownell
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #undef VERBOSE_DEBUG
11*4882a593Smuzhiyun #undef PACKET_TRACE
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun #include <linux/delay.h>
17*4882a593Smuzhiyun #include <linux/ioport.h>
18*4882a593Smuzhiyun #include <linux/slab.h>
19*4882a593Smuzhiyun #include <linux/errno.h>
20*4882a593Smuzhiyun #include <linux/list.h>
21*4882a593Smuzhiyun #include <linux/interrupt.h>
22*4882a593Smuzhiyun #include <linux/proc_fs.h>
23*4882a593Smuzhiyun #include <linux/prefetch.h>
24*4882a593Smuzhiyun #include <linux/clk.h>
25*4882a593Smuzhiyun #include <linux/usb/ch9.h>
26*4882a593Smuzhiyun #include <linux/usb/gadget.h>
27*4882a593Smuzhiyun #include <linux/of.h>
28*4882a593Smuzhiyun #include <linux/of_gpio.h>
29*4882a593Smuzhiyun #include <linux/platform_data/atmel.h>
30*4882a593Smuzhiyun #include <linux/regmap.h>
31*4882a593Smuzhiyun #include <linux/mfd/syscon.h>
32*4882a593Smuzhiyun #include <linux/mfd/syscon/atmel-matrix.h>
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #include "at91_udc.h"
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun /*
38*4882a593Smuzhiyun * This controller is simple and PIO-only. It's used in many AT91-series
39*4882a593Smuzhiyun * full speed USB controllers, including the at91rm9200 (arm920T, with MMU),
40*4882a593Smuzhiyun * at91sam926x (arm926ejs, with MMU), and several no-mmu versions.
41*4882a593Smuzhiyun *
42*4882a593Smuzhiyun * This driver expects the board has been wired with two GPIOs supporting
43*4882a593Smuzhiyun * a VBUS sensing IRQ, and a D+ pullup. (They may be omitted, but the
44*4882a593Smuzhiyun * testing hasn't covered such cases.)
45*4882a593Smuzhiyun *
46*4882a593Smuzhiyun * The pullup is most important (so it's integrated on sam926x parts). It
47*4882a593Smuzhiyun * provides software control over whether the host enumerates the device.
48*4882a593Smuzhiyun *
49*4882a593Smuzhiyun * The VBUS sensing helps during enumeration, and allows both USB clocks
50*4882a593Smuzhiyun * (and the transceiver) to stay gated off until they're necessary, saving
51*4882a593Smuzhiyun * power. During USB suspend, the 48 MHz clock is gated off in hardware;
52*4882a593Smuzhiyun * it may also be gated off by software during some Linux sleep states.
53*4882a593Smuzhiyun */
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun #define DRIVER_VERSION "3 May 2006"
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun static const char driver_name [] = "at91_udc";
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun static const struct {
60*4882a593Smuzhiyun const char *name;
61*4882a593Smuzhiyun const struct usb_ep_caps caps;
62*4882a593Smuzhiyun } ep_info[] = {
63*4882a593Smuzhiyun #define EP_INFO(_name, _caps) \
64*4882a593Smuzhiyun { \
65*4882a593Smuzhiyun .name = _name, \
66*4882a593Smuzhiyun .caps = _caps, \
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun EP_INFO("ep0",
70*4882a593Smuzhiyun USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
71*4882a593Smuzhiyun EP_INFO("ep1",
72*4882a593Smuzhiyun USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
73*4882a593Smuzhiyun EP_INFO("ep2",
74*4882a593Smuzhiyun USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
75*4882a593Smuzhiyun EP_INFO("ep3-int",
76*4882a593Smuzhiyun USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_ALL)),
77*4882a593Smuzhiyun EP_INFO("ep4",
78*4882a593Smuzhiyun USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
79*4882a593Smuzhiyun EP_INFO("ep5",
80*4882a593Smuzhiyun USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun #undef EP_INFO
83*4882a593Smuzhiyun };
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun #define ep0name ep_info[0].name
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun #define VBUS_POLL_TIMEOUT msecs_to_jiffies(1000)
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun #define at91_udp_read(udc, reg) \
90*4882a593Smuzhiyun __raw_readl((udc)->udp_baseaddr + (reg))
91*4882a593Smuzhiyun #define at91_udp_write(udc, reg, val) \
92*4882a593Smuzhiyun __raw_writel((val), (udc)->udp_baseaddr + (reg))
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun #ifdef CONFIG_USB_GADGET_DEBUG_FILES
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun #include <linux/seq_file.h>
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun static const char debug_filename[] = "driver/udc";
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun #define FOURBITS "%s%s%s%s"
103*4882a593Smuzhiyun #define EIGHTBITS FOURBITS FOURBITS
104*4882a593Smuzhiyun
proc_ep_show(struct seq_file * s,struct at91_ep * ep)105*4882a593Smuzhiyun static void proc_ep_show(struct seq_file *s, struct at91_ep *ep)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun static char *types[] = {
108*4882a593Smuzhiyun "control", "out-iso", "out-bulk", "out-int",
109*4882a593Smuzhiyun "BOGUS", "in-iso", "in-bulk", "in-int"};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun u32 csr;
112*4882a593Smuzhiyun struct at91_request *req;
113*4882a593Smuzhiyun unsigned long flags;
114*4882a593Smuzhiyun struct at91_udc *udc = ep->udc;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun csr = __raw_readl(ep->creg);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun /* NOTE: not collecting per-endpoint irq statistics... */
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun seq_printf(s, "\n");
123*4882a593Smuzhiyun seq_printf(s, "%s, maxpacket %d %s%s %s%s\n",
124*4882a593Smuzhiyun ep->ep.name, ep->ep.maxpacket,
125*4882a593Smuzhiyun ep->is_in ? "in" : "out",
126*4882a593Smuzhiyun ep->is_iso ? " iso" : "",
127*4882a593Smuzhiyun ep->is_pingpong
128*4882a593Smuzhiyun ? (ep->fifo_bank ? "pong" : "ping")
129*4882a593Smuzhiyun : "",
130*4882a593Smuzhiyun ep->stopped ? " stopped" : "");
131*4882a593Smuzhiyun seq_printf(s, "csr %08x rxbytes=%d %s %s %s" EIGHTBITS "\n",
132*4882a593Smuzhiyun csr,
133*4882a593Smuzhiyun (csr & 0x07ff0000) >> 16,
134*4882a593Smuzhiyun (csr & (1 << 15)) ? "enabled" : "disabled",
135*4882a593Smuzhiyun (csr & (1 << 11)) ? "DATA1" : "DATA0",
136*4882a593Smuzhiyun types[(csr & 0x700) >> 8],
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun /* iff type is control then print current direction */
139*4882a593Smuzhiyun (!(csr & 0x700))
140*4882a593Smuzhiyun ? ((csr & (1 << 7)) ? " IN" : " OUT")
141*4882a593Smuzhiyun : "",
142*4882a593Smuzhiyun (csr & (1 << 6)) ? " rxdatabk1" : "",
143*4882a593Smuzhiyun (csr & (1 << 5)) ? " forcestall" : "",
144*4882a593Smuzhiyun (csr & (1 << 4)) ? " txpktrdy" : "",
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun (csr & (1 << 3)) ? " stallsent" : "",
147*4882a593Smuzhiyun (csr & (1 << 2)) ? " rxsetup" : "",
148*4882a593Smuzhiyun (csr & (1 << 1)) ? " rxdatabk0" : "",
149*4882a593Smuzhiyun (csr & (1 << 0)) ? " txcomp" : "");
150*4882a593Smuzhiyun if (list_empty (&ep->queue))
151*4882a593Smuzhiyun seq_printf(s, "\t(queue empty)\n");
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun else list_for_each_entry (req, &ep->queue, queue) {
154*4882a593Smuzhiyun unsigned length = req->req.actual;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun seq_printf(s, "\treq %p len %d/%d buf %p\n",
157*4882a593Smuzhiyun &req->req, length,
158*4882a593Smuzhiyun req->req.length, req->req.buf);
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
proc_irq_show(struct seq_file * s,const char * label,u32 mask)163*4882a593Smuzhiyun static void proc_irq_show(struct seq_file *s, const char *label, u32 mask)
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun int i;
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun seq_printf(s, "%s %04x:%s%s" FOURBITS, label, mask,
168*4882a593Smuzhiyun (mask & (1 << 13)) ? " wakeup" : "",
169*4882a593Smuzhiyun (mask & (1 << 12)) ? " endbusres" : "",
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun (mask & (1 << 11)) ? " sofint" : "",
172*4882a593Smuzhiyun (mask & (1 << 10)) ? " extrsm" : "",
173*4882a593Smuzhiyun (mask & (1 << 9)) ? " rxrsm" : "",
174*4882a593Smuzhiyun (mask & (1 << 8)) ? " rxsusp" : "");
175*4882a593Smuzhiyun for (i = 0; i < 8; i++) {
176*4882a593Smuzhiyun if (mask & (1 << i))
177*4882a593Smuzhiyun seq_printf(s, " ep%d", i);
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun seq_printf(s, "\n");
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun
proc_udc_show(struct seq_file * s,void * unused)182*4882a593Smuzhiyun static int proc_udc_show(struct seq_file *s, void *unused)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun struct at91_udc *udc = s->private;
185*4882a593Smuzhiyun struct at91_ep *ep;
186*4882a593Smuzhiyun u32 tmp;
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun seq_printf(s, "%s: version %s\n", driver_name, DRIVER_VERSION);
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun seq_printf(s, "vbus %s, pullup %s, %s powered%s, gadget %s\n\n",
191*4882a593Smuzhiyun udc->vbus ? "present" : "off",
192*4882a593Smuzhiyun udc->enabled
193*4882a593Smuzhiyun ? (udc->vbus ? "active" : "enabled")
194*4882a593Smuzhiyun : "disabled",
195*4882a593Smuzhiyun udc->gadget.is_selfpowered ? "self" : "VBUS",
196*4882a593Smuzhiyun udc->suspended ? ", suspended" : "",
197*4882a593Smuzhiyun udc->driver ? udc->driver->driver.name : "(none)");
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun /* don't access registers when interface isn't clocked */
200*4882a593Smuzhiyun if (!udc->clocked) {
201*4882a593Smuzhiyun seq_printf(s, "(not clocked)\n");
202*4882a593Smuzhiyun return 0;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun tmp = at91_udp_read(udc, AT91_UDP_FRM_NUM);
206*4882a593Smuzhiyun seq_printf(s, "frame %05x:%s%s frame=%d\n", tmp,
207*4882a593Smuzhiyun (tmp & AT91_UDP_FRM_OK) ? " ok" : "",
208*4882a593Smuzhiyun (tmp & AT91_UDP_FRM_ERR) ? " err" : "",
209*4882a593Smuzhiyun (tmp & AT91_UDP_NUM));
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT);
212*4882a593Smuzhiyun seq_printf(s, "glbstate %02x:%s" FOURBITS "\n", tmp,
213*4882a593Smuzhiyun (tmp & AT91_UDP_RMWUPE) ? " rmwupe" : "",
214*4882a593Smuzhiyun (tmp & AT91_UDP_RSMINPR) ? " rsminpr" : "",
215*4882a593Smuzhiyun (tmp & AT91_UDP_ESR) ? " esr" : "",
216*4882a593Smuzhiyun (tmp & AT91_UDP_CONFG) ? " confg" : "",
217*4882a593Smuzhiyun (tmp & AT91_UDP_FADDEN) ? " fadden" : "");
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun tmp = at91_udp_read(udc, AT91_UDP_FADDR);
220*4882a593Smuzhiyun seq_printf(s, "faddr %03x:%s fadd=%d\n", tmp,
221*4882a593Smuzhiyun (tmp & AT91_UDP_FEN) ? " fen" : "",
222*4882a593Smuzhiyun (tmp & AT91_UDP_FADD));
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun proc_irq_show(s, "imr ", at91_udp_read(udc, AT91_UDP_IMR));
225*4882a593Smuzhiyun proc_irq_show(s, "isr ", at91_udp_read(udc, AT91_UDP_ISR));
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun if (udc->enabled && udc->vbus) {
228*4882a593Smuzhiyun proc_ep_show(s, &udc->ep[0]);
229*4882a593Smuzhiyun list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
230*4882a593Smuzhiyun if (ep->ep.desc)
231*4882a593Smuzhiyun proc_ep_show(s, ep);
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun return 0;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun
create_debug_file(struct at91_udc * udc)237*4882a593Smuzhiyun static void create_debug_file(struct at91_udc *udc)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun udc->pde = proc_create_single_data(debug_filename, 0, NULL,
240*4882a593Smuzhiyun proc_udc_show, udc);
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun
remove_debug_file(struct at91_udc * udc)243*4882a593Smuzhiyun static void remove_debug_file(struct at91_udc *udc)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun if (udc->pde)
246*4882a593Smuzhiyun remove_proc_entry(debug_filename, NULL);
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun #else
250*4882a593Smuzhiyun
create_debug_file(struct at91_udc * udc)251*4882a593Smuzhiyun static inline void create_debug_file(struct at91_udc *udc) {}
remove_debug_file(struct at91_udc * udc)252*4882a593Smuzhiyun static inline void remove_debug_file(struct at91_udc *udc) {}
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun #endif
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
258*4882a593Smuzhiyun
done(struct at91_ep * ep,struct at91_request * req,int status)259*4882a593Smuzhiyun static void done(struct at91_ep *ep, struct at91_request *req, int status)
260*4882a593Smuzhiyun {
261*4882a593Smuzhiyun unsigned stopped = ep->stopped;
262*4882a593Smuzhiyun struct at91_udc *udc = ep->udc;
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun list_del_init(&req->queue);
265*4882a593Smuzhiyun if (req->req.status == -EINPROGRESS)
266*4882a593Smuzhiyun req->req.status = status;
267*4882a593Smuzhiyun else
268*4882a593Smuzhiyun status = req->req.status;
269*4882a593Smuzhiyun if (status && status != -ESHUTDOWN)
270*4882a593Smuzhiyun VDBG("%s done %p, status %d\n", ep->ep.name, req, status);
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun ep->stopped = 1;
273*4882a593Smuzhiyun spin_unlock(&udc->lock);
274*4882a593Smuzhiyun usb_gadget_giveback_request(&ep->ep, &req->req);
275*4882a593Smuzhiyun spin_lock(&udc->lock);
276*4882a593Smuzhiyun ep->stopped = stopped;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun /* ep0 is always ready; other endpoints need a non-empty queue */
279*4882a593Smuzhiyun if (list_empty(&ep->queue) && ep->int_mask != (1 << 0))
280*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IDR, ep->int_mask);
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun /* bits indicating OUT fifo has data ready */
286*4882a593Smuzhiyun #define RX_DATA_READY (AT91_UDP_RX_DATA_BK0 | AT91_UDP_RX_DATA_BK1)
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun /*
289*4882a593Smuzhiyun * Endpoint FIFO CSR bits have a mix of bits, making it unsafe to just write
290*4882a593Smuzhiyun * back most of the value you just read (because of side effects, including
291*4882a593Smuzhiyun * bits that may change after reading and before writing).
292*4882a593Smuzhiyun *
293*4882a593Smuzhiyun * Except when changing a specific bit, always write values which:
294*4882a593Smuzhiyun * - clear SET_FX bits (setting them could change something)
295*4882a593Smuzhiyun * - set CLR_FX bits (clearing them could change something)
296*4882a593Smuzhiyun *
297*4882a593Smuzhiyun * There are also state bits like FORCESTALL, EPEDS, DIR, and EPTYPE
298*4882a593Smuzhiyun * that shouldn't normally be changed.
299*4882a593Smuzhiyun *
300*4882a593Smuzhiyun * NOTE at91sam9260 docs mention synch between UDPCK and MCK clock domains,
301*4882a593Smuzhiyun * implying a need to wait for one write to complete (test relevant bits)
302*4882a593Smuzhiyun * before starting the next write. This shouldn't be an issue given how
303*4882a593Smuzhiyun * infrequently we write, except maybe for write-then-read idioms.
304*4882a593Smuzhiyun */
305*4882a593Smuzhiyun #define SET_FX (AT91_UDP_TXPKTRDY)
306*4882a593Smuzhiyun #define CLR_FX (RX_DATA_READY | AT91_UDP_RXSETUP \
307*4882a593Smuzhiyun | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP)
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun /* pull OUT packet data from the endpoint's fifo */
read_fifo(struct at91_ep * ep,struct at91_request * req)310*4882a593Smuzhiyun static int read_fifo (struct at91_ep *ep, struct at91_request *req)
311*4882a593Smuzhiyun {
312*4882a593Smuzhiyun u32 __iomem *creg = ep->creg;
313*4882a593Smuzhiyun u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0));
314*4882a593Smuzhiyun u32 csr;
315*4882a593Smuzhiyun u8 *buf;
316*4882a593Smuzhiyun unsigned int count, bufferspace, is_done;
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun buf = req->req.buf + req->req.actual;
319*4882a593Smuzhiyun bufferspace = req->req.length - req->req.actual;
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun /*
322*4882a593Smuzhiyun * there might be nothing to read if ep_queue() calls us,
323*4882a593Smuzhiyun * or if we already emptied both pingpong buffers
324*4882a593Smuzhiyun */
325*4882a593Smuzhiyun rescan:
326*4882a593Smuzhiyun csr = __raw_readl(creg);
327*4882a593Smuzhiyun if ((csr & RX_DATA_READY) == 0)
328*4882a593Smuzhiyun return 0;
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun count = (csr & AT91_UDP_RXBYTECNT) >> 16;
331*4882a593Smuzhiyun if (count > ep->ep.maxpacket)
332*4882a593Smuzhiyun count = ep->ep.maxpacket;
333*4882a593Smuzhiyun if (count > bufferspace) {
334*4882a593Smuzhiyun DBG("%s buffer overflow\n", ep->ep.name);
335*4882a593Smuzhiyun req->req.status = -EOVERFLOW;
336*4882a593Smuzhiyun count = bufferspace;
337*4882a593Smuzhiyun }
338*4882a593Smuzhiyun __raw_readsb(dreg, buf, count);
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun /* release and swap pingpong mem bank */
341*4882a593Smuzhiyun csr |= CLR_FX;
342*4882a593Smuzhiyun if (ep->is_pingpong) {
343*4882a593Smuzhiyun if (ep->fifo_bank == 0) {
344*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0);
345*4882a593Smuzhiyun ep->fifo_bank = 1;
346*4882a593Smuzhiyun } else {
347*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK1);
348*4882a593Smuzhiyun ep->fifo_bank = 0;
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun } else
351*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0);
352*4882a593Smuzhiyun __raw_writel(csr, creg);
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun req->req.actual += count;
355*4882a593Smuzhiyun is_done = (count < ep->ep.maxpacket);
356*4882a593Smuzhiyun if (count == bufferspace)
357*4882a593Smuzhiyun is_done = 1;
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun PACKET("%s %p out/%d%s\n", ep->ep.name, &req->req, count,
360*4882a593Smuzhiyun is_done ? " (done)" : "");
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun /*
363*4882a593Smuzhiyun * avoid extra trips through IRQ logic for packets already in
364*4882a593Smuzhiyun * the fifo ... maybe preventing an extra (expensive) OUT-NAK
365*4882a593Smuzhiyun */
366*4882a593Smuzhiyun if (is_done)
367*4882a593Smuzhiyun done(ep, req, 0);
368*4882a593Smuzhiyun else if (ep->is_pingpong) {
369*4882a593Smuzhiyun /*
370*4882a593Smuzhiyun * One dummy read to delay the code because of a HW glitch:
371*4882a593Smuzhiyun * CSR returns bad RXCOUNT when read too soon after updating
372*4882a593Smuzhiyun * RX_DATA_BK flags.
373*4882a593Smuzhiyun */
374*4882a593Smuzhiyun csr = __raw_readl(creg);
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun bufferspace -= count;
377*4882a593Smuzhiyun buf += count;
378*4882a593Smuzhiyun goto rescan;
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun return is_done;
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun /* load fifo for an IN packet */
write_fifo(struct at91_ep * ep,struct at91_request * req)385*4882a593Smuzhiyun static int write_fifo(struct at91_ep *ep, struct at91_request *req)
386*4882a593Smuzhiyun {
387*4882a593Smuzhiyun u32 __iomem *creg = ep->creg;
388*4882a593Smuzhiyun u32 csr = __raw_readl(creg);
389*4882a593Smuzhiyun u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0));
390*4882a593Smuzhiyun unsigned total, count, is_last;
391*4882a593Smuzhiyun u8 *buf;
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun /*
394*4882a593Smuzhiyun * TODO: allow for writing two packets to the fifo ... that'll
395*4882a593Smuzhiyun * reduce the amount of IN-NAKing, but probably won't affect
396*4882a593Smuzhiyun * throughput much. (Unlike preventing OUT-NAKing!)
397*4882a593Smuzhiyun */
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun /*
400*4882a593Smuzhiyun * If ep_queue() calls us, the queue is empty and possibly in
401*4882a593Smuzhiyun * odd states like TXCOMP not yet cleared (we do it, saving at
402*4882a593Smuzhiyun * least one IRQ) or the fifo not yet being free. Those aren't
403*4882a593Smuzhiyun * issues normally (IRQ handler fast path).
404*4882a593Smuzhiyun */
405*4882a593Smuzhiyun if (unlikely(csr & (AT91_UDP_TXCOMP | AT91_UDP_TXPKTRDY))) {
406*4882a593Smuzhiyun if (csr & AT91_UDP_TXCOMP) {
407*4882a593Smuzhiyun csr |= CLR_FX;
408*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_TXCOMP);
409*4882a593Smuzhiyun __raw_writel(csr, creg);
410*4882a593Smuzhiyun csr = __raw_readl(creg);
411*4882a593Smuzhiyun }
412*4882a593Smuzhiyun if (csr & AT91_UDP_TXPKTRDY)
413*4882a593Smuzhiyun return 0;
414*4882a593Smuzhiyun }
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun buf = req->req.buf + req->req.actual;
417*4882a593Smuzhiyun prefetch(buf);
418*4882a593Smuzhiyun total = req->req.length - req->req.actual;
419*4882a593Smuzhiyun if (ep->ep.maxpacket < total) {
420*4882a593Smuzhiyun count = ep->ep.maxpacket;
421*4882a593Smuzhiyun is_last = 0;
422*4882a593Smuzhiyun } else {
423*4882a593Smuzhiyun count = total;
424*4882a593Smuzhiyun is_last = (count < ep->ep.maxpacket) || !req->req.zero;
425*4882a593Smuzhiyun }
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun /*
428*4882a593Smuzhiyun * Write the packet, maybe it's a ZLP.
429*4882a593Smuzhiyun *
430*4882a593Smuzhiyun * NOTE: incrementing req->actual before we receive the ACK means
431*4882a593Smuzhiyun * gadget driver IN bytecounts can be wrong in fault cases. That's
432*4882a593Smuzhiyun * fixable with PIO drivers like this one (save "count" here, and
433*4882a593Smuzhiyun * do the increment later on TX irq), but not for most DMA hardware.
434*4882a593Smuzhiyun *
435*4882a593Smuzhiyun * So all gadget drivers must accept that potential error. Some
436*4882a593Smuzhiyun * hardware supports precise fifo status reporting, letting them
437*4882a593Smuzhiyun * recover when the actual bytecount matters (e.g. for USB Test
438*4882a593Smuzhiyun * and Measurement Class devices).
439*4882a593Smuzhiyun */
440*4882a593Smuzhiyun __raw_writesb(dreg, buf, count);
441*4882a593Smuzhiyun csr &= ~SET_FX;
442*4882a593Smuzhiyun csr |= CLR_FX | AT91_UDP_TXPKTRDY;
443*4882a593Smuzhiyun __raw_writel(csr, creg);
444*4882a593Smuzhiyun req->req.actual += count;
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun PACKET("%s %p in/%d%s\n", ep->ep.name, &req->req, count,
447*4882a593Smuzhiyun is_last ? " (done)" : "");
448*4882a593Smuzhiyun if (is_last)
449*4882a593Smuzhiyun done(ep, req, 0);
450*4882a593Smuzhiyun return is_last;
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun
nuke(struct at91_ep * ep,int status)453*4882a593Smuzhiyun static void nuke(struct at91_ep *ep, int status)
454*4882a593Smuzhiyun {
455*4882a593Smuzhiyun struct at91_request *req;
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun /* terminate any request in the queue */
458*4882a593Smuzhiyun ep->stopped = 1;
459*4882a593Smuzhiyun if (list_empty(&ep->queue))
460*4882a593Smuzhiyun return;
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun VDBG("%s %s\n", __func__, ep->ep.name);
463*4882a593Smuzhiyun while (!list_empty(&ep->queue)) {
464*4882a593Smuzhiyun req = list_entry(ep->queue.next, struct at91_request, queue);
465*4882a593Smuzhiyun done(ep, req, status);
466*4882a593Smuzhiyun }
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
470*4882a593Smuzhiyun
at91_ep_enable(struct usb_ep * _ep,const struct usb_endpoint_descriptor * desc)471*4882a593Smuzhiyun static int at91_ep_enable(struct usb_ep *_ep,
472*4882a593Smuzhiyun const struct usb_endpoint_descriptor *desc)
473*4882a593Smuzhiyun {
474*4882a593Smuzhiyun struct at91_ep *ep = container_of(_ep, struct at91_ep, ep);
475*4882a593Smuzhiyun struct at91_udc *udc;
476*4882a593Smuzhiyun u16 maxpacket;
477*4882a593Smuzhiyun u32 tmp;
478*4882a593Smuzhiyun unsigned long flags;
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun if (!_ep || !ep
481*4882a593Smuzhiyun || !desc || _ep->name == ep0name
482*4882a593Smuzhiyun || desc->bDescriptorType != USB_DT_ENDPOINT
483*4882a593Smuzhiyun || (maxpacket = usb_endpoint_maxp(desc)) == 0
484*4882a593Smuzhiyun || maxpacket > ep->maxpacket) {
485*4882a593Smuzhiyun DBG("bad ep or descriptor\n");
486*4882a593Smuzhiyun return -EINVAL;
487*4882a593Smuzhiyun }
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun udc = ep->udc;
490*4882a593Smuzhiyun if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
491*4882a593Smuzhiyun DBG("bogus device state\n");
492*4882a593Smuzhiyun return -ESHUTDOWN;
493*4882a593Smuzhiyun }
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun tmp = usb_endpoint_type(desc);
496*4882a593Smuzhiyun switch (tmp) {
497*4882a593Smuzhiyun case USB_ENDPOINT_XFER_CONTROL:
498*4882a593Smuzhiyun DBG("only one control endpoint\n");
499*4882a593Smuzhiyun return -EINVAL;
500*4882a593Smuzhiyun case USB_ENDPOINT_XFER_INT:
501*4882a593Smuzhiyun if (maxpacket > 64)
502*4882a593Smuzhiyun goto bogus_max;
503*4882a593Smuzhiyun break;
504*4882a593Smuzhiyun case USB_ENDPOINT_XFER_BULK:
505*4882a593Smuzhiyun switch (maxpacket) {
506*4882a593Smuzhiyun case 8:
507*4882a593Smuzhiyun case 16:
508*4882a593Smuzhiyun case 32:
509*4882a593Smuzhiyun case 64:
510*4882a593Smuzhiyun goto ok;
511*4882a593Smuzhiyun }
512*4882a593Smuzhiyun bogus_max:
513*4882a593Smuzhiyun DBG("bogus maxpacket %d\n", maxpacket);
514*4882a593Smuzhiyun return -EINVAL;
515*4882a593Smuzhiyun case USB_ENDPOINT_XFER_ISOC:
516*4882a593Smuzhiyun if (!ep->is_pingpong) {
517*4882a593Smuzhiyun DBG("iso requires double buffering\n");
518*4882a593Smuzhiyun return -EINVAL;
519*4882a593Smuzhiyun }
520*4882a593Smuzhiyun break;
521*4882a593Smuzhiyun }
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun ok:
524*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun /* initialize endpoint to match this descriptor */
527*4882a593Smuzhiyun ep->is_in = usb_endpoint_dir_in(desc);
528*4882a593Smuzhiyun ep->is_iso = (tmp == USB_ENDPOINT_XFER_ISOC);
529*4882a593Smuzhiyun ep->stopped = 0;
530*4882a593Smuzhiyun if (ep->is_in)
531*4882a593Smuzhiyun tmp |= 0x04;
532*4882a593Smuzhiyun tmp <<= 8;
533*4882a593Smuzhiyun tmp |= AT91_UDP_EPEDS;
534*4882a593Smuzhiyun __raw_writel(tmp, ep->creg);
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun ep->ep.maxpacket = maxpacket;
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun /*
539*4882a593Smuzhiyun * reset/init endpoint fifo. NOTE: leaves fifo_bank alone,
540*4882a593Smuzhiyun * since endpoint resets don't reset hw pingpong state.
541*4882a593Smuzhiyun */
542*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
543*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_RST_EP, 0);
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
546*4882a593Smuzhiyun return 0;
547*4882a593Smuzhiyun }
548*4882a593Smuzhiyun
at91_ep_disable(struct usb_ep * _ep)549*4882a593Smuzhiyun static int at91_ep_disable (struct usb_ep * _ep)
550*4882a593Smuzhiyun {
551*4882a593Smuzhiyun struct at91_ep *ep = container_of(_ep, struct at91_ep, ep);
552*4882a593Smuzhiyun struct at91_udc *udc = ep->udc;
553*4882a593Smuzhiyun unsigned long flags;
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun if (ep == &ep->udc->ep[0])
556*4882a593Smuzhiyun return -EINVAL;
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun nuke(ep, -ESHUTDOWN);
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun /* restore the endpoint's pristine config */
563*4882a593Smuzhiyun ep->ep.desc = NULL;
564*4882a593Smuzhiyun ep->ep.maxpacket = ep->maxpacket;
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun /* reset fifos and endpoint */
567*4882a593Smuzhiyun if (ep->udc->clocked) {
568*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
569*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_RST_EP, 0);
570*4882a593Smuzhiyun __raw_writel(0, ep->creg);
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
574*4882a593Smuzhiyun return 0;
575*4882a593Smuzhiyun }
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun /*
578*4882a593Smuzhiyun * this is a PIO-only driver, so there's nothing
579*4882a593Smuzhiyun * interesting for request or buffer allocation.
580*4882a593Smuzhiyun */
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun static struct usb_request *
at91_ep_alloc_request(struct usb_ep * _ep,gfp_t gfp_flags)583*4882a593Smuzhiyun at91_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
584*4882a593Smuzhiyun {
585*4882a593Smuzhiyun struct at91_request *req;
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun req = kzalloc(sizeof (struct at91_request), gfp_flags);
588*4882a593Smuzhiyun if (!req)
589*4882a593Smuzhiyun return NULL;
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun INIT_LIST_HEAD(&req->queue);
592*4882a593Smuzhiyun return &req->req;
593*4882a593Smuzhiyun }
594*4882a593Smuzhiyun
at91_ep_free_request(struct usb_ep * _ep,struct usb_request * _req)595*4882a593Smuzhiyun static void at91_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
596*4882a593Smuzhiyun {
597*4882a593Smuzhiyun struct at91_request *req;
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun req = container_of(_req, struct at91_request, req);
600*4882a593Smuzhiyun BUG_ON(!list_empty(&req->queue));
601*4882a593Smuzhiyun kfree(req);
602*4882a593Smuzhiyun }
603*4882a593Smuzhiyun
at91_ep_queue(struct usb_ep * _ep,struct usb_request * _req,gfp_t gfp_flags)604*4882a593Smuzhiyun static int at91_ep_queue(struct usb_ep *_ep,
605*4882a593Smuzhiyun struct usb_request *_req, gfp_t gfp_flags)
606*4882a593Smuzhiyun {
607*4882a593Smuzhiyun struct at91_request *req;
608*4882a593Smuzhiyun struct at91_ep *ep;
609*4882a593Smuzhiyun struct at91_udc *udc;
610*4882a593Smuzhiyun int status;
611*4882a593Smuzhiyun unsigned long flags;
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun req = container_of(_req, struct at91_request, req);
614*4882a593Smuzhiyun ep = container_of(_ep, struct at91_ep, ep);
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun if (!_req || !_req->complete
617*4882a593Smuzhiyun || !_req->buf || !list_empty(&req->queue)) {
618*4882a593Smuzhiyun DBG("invalid request\n");
619*4882a593Smuzhiyun return -EINVAL;
620*4882a593Smuzhiyun }
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun if (!_ep || (!ep->ep.desc && ep->ep.name != ep0name)) {
623*4882a593Smuzhiyun DBG("invalid ep\n");
624*4882a593Smuzhiyun return -EINVAL;
625*4882a593Smuzhiyun }
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun udc = ep->udc;
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun if (!udc || !udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
630*4882a593Smuzhiyun DBG("invalid device\n");
631*4882a593Smuzhiyun return -EINVAL;
632*4882a593Smuzhiyun }
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun _req->status = -EINPROGRESS;
635*4882a593Smuzhiyun _req->actual = 0;
636*4882a593Smuzhiyun
637*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun /* try to kickstart any empty and idle queue */
640*4882a593Smuzhiyun if (list_empty(&ep->queue) && !ep->stopped) {
641*4882a593Smuzhiyun int is_ep0;
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun /*
644*4882a593Smuzhiyun * If this control request has a non-empty DATA stage, this
645*4882a593Smuzhiyun * will start that stage. It works just like a non-control
646*4882a593Smuzhiyun * request (until the status stage starts, maybe early).
647*4882a593Smuzhiyun *
648*4882a593Smuzhiyun * If the data stage is empty, then this starts a successful
649*4882a593Smuzhiyun * IN/STATUS stage. (Unsuccessful ones use set_halt.)
650*4882a593Smuzhiyun */
651*4882a593Smuzhiyun is_ep0 = (ep->ep.name == ep0name);
652*4882a593Smuzhiyun if (is_ep0) {
653*4882a593Smuzhiyun u32 tmp;
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun if (!udc->req_pending) {
656*4882a593Smuzhiyun status = -EINVAL;
657*4882a593Smuzhiyun goto done;
658*4882a593Smuzhiyun }
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun /*
661*4882a593Smuzhiyun * defer changing CONFG until after the gadget driver
662*4882a593Smuzhiyun * reconfigures the endpoints.
663*4882a593Smuzhiyun */
664*4882a593Smuzhiyun if (udc->wait_for_config_ack) {
665*4882a593Smuzhiyun tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT);
666*4882a593Smuzhiyun tmp ^= AT91_UDP_CONFG;
667*4882a593Smuzhiyun VDBG("toggle config\n");
668*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp);
669*4882a593Smuzhiyun }
670*4882a593Smuzhiyun if (req->req.length == 0) {
671*4882a593Smuzhiyun ep0_in_status:
672*4882a593Smuzhiyun PACKET("ep0 in/status\n");
673*4882a593Smuzhiyun status = 0;
674*4882a593Smuzhiyun tmp = __raw_readl(ep->creg);
675*4882a593Smuzhiyun tmp &= ~SET_FX;
676*4882a593Smuzhiyun tmp |= CLR_FX | AT91_UDP_TXPKTRDY;
677*4882a593Smuzhiyun __raw_writel(tmp, ep->creg);
678*4882a593Smuzhiyun udc->req_pending = 0;
679*4882a593Smuzhiyun goto done;
680*4882a593Smuzhiyun }
681*4882a593Smuzhiyun }
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun if (ep->is_in)
684*4882a593Smuzhiyun status = write_fifo(ep, req);
685*4882a593Smuzhiyun else {
686*4882a593Smuzhiyun status = read_fifo(ep, req);
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun /* IN/STATUS stage is otherwise triggered by irq */
689*4882a593Smuzhiyun if (status && is_ep0)
690*4882a593Smuzhiyun goto ep0_in_status;
691*4882a593Smuzhiyun }
692*4882a593Smuzhiyun } else
693*4882a593Smuzhiyun status = 0;
694*4882a593Smuzhiyun
695*4882a593Smuzhiyun if (req && !status) {
696*4882a593Smuzhiyun list_add_tail (&req->queue, &ep->queue);
697*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IER, ep->int_mask);
698*4882a593Smuzhiyun }
699*4882a593Smuzhiyun done:
700*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
701*4882a593Smuzhiyun return (status < 0) ? status : 0;
702*4882a593Smuzhiyun }
703*4882a593Smuzhiyun
at91_ep_dequeue(struct usb_ep * _ep,struct usb_request * _req)704*4882a593Smuzhiyun static int at91_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
705*4882a593Smuzhiyun {
706*4882a593Smuzhiyun struct at91_ep *ep;
707*4882a593Smuzhiyun struct at91_request *req;
708*4882a593Smuzhiyun unsigned long flags;
709*4882a593Smuzhiyun struct at91_udc *udc;
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun ep = container_of(_ep, struct at91_ep, ep);
712*4882a593Smuzhiyun if (!_ep || ep->ep.name == ep0name)
713*4882a593Smuzhiyun return -EINVAL;
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun udc = ep->udc;
716*4882a593Smuzhiyun
717*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun /* make sure it's actually queued on this endpoint */
720*4882a593Smuzhiyun list_for_each_entry (req, &ep->queue, queue) {
721*4882a593Smuzhiyun if (&req->req == _req)
722*4882a593Smuzhiyun break;
723*4882a593Smuzhiyun }
724*4882a593Smuzhiyun if (&req->req != _req) {
725*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
726*4882a593Smuzhiyun return -EINVAL;
727*4882a593Smuzhiyun }
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun done(ep, req, -ECONNRESET);
730*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
731*4882a593Smuzhiyun return 0;
732*4882a593Smuzhiyun }
733*4882a593Smuzhiyun
at91_ep_set_halt(struct usb_ep * _ep,int value)734*4882a593Smuzhiyun static int at91_ep_set_halt(struct usb_ep *_ep, int value)
735*4882a593Smuzhiyun {
736*4882a593Smuzhiyun struct at91_ep *ep = container_of(_ep, struct at91_ep, ep);
737*4882a593Smuzhiyun struct at91_udc *udc = ep->udc;
738*4882a593Smuzhiyun u32 __iomem *creg;
739*4882a593Smuzhiyun u32 csr;
740*4882a593Smuzhiyun unsigned long flags;
741*4882a593Smuzhiyun int status = 0;
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun if (!_ep || ep->is_iso || !ep->udc->clocked)
744*4882a593Smuzhiyun return -EINVAL;
745*4882a593Smuzhiyun
746*4882a593Smuzhiyun creg = ep->creg;
747*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
748*4882a593Smuzhiyun
749*4882a593Smuzhiyun csr = __raw_readl(creg);
750*4882a593Smuzhiyun
751*4882a593Smuzhiyun /*
752*4882a593Smuzhiyun * fail with still-busy IN endpoints, ensuring correct sequencing
753*4882a593Smuzhiyun * of data tx then stall. note that the fifo rx bytecount isn't
754*4882a593Smuzhiyun * completely accurate as a tx bytecount.
755*4882a593Smuzhiyun */
756*4882a593Smuzhiyun if (ep->is_in && (!list_empty(&ep->queue) || (csr >> 16) != 0))
757*4882a593Smuzhiyun status = -EAGAIN;
758*4882a593Smuzhiyun else {
759*4882a593Smuzhiyun csr |= CLR_FX;
760*4882a593Smuzhiyun csr &= ~SET_FX;
761*4882a593Smuzhiyun if (value) {
762*4882a593Smuzhiyun csr |= AT91_UDP_FORCESTALL;
763*4882a593Smuzhiyun VDBG("halt %s\n", ep->ep.name);
764*4882a593Smuzhiyun } else {
765*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
766*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_RST_EP, 0);
767*4882a593Smuzhiyun csr &= ~AT91_UDP_FORCESTALL;
768*4882a593Smuzhiyun }
769*4882a593Smuzhiyun __raw_writel(csr, creg);
770*4882a593Smuzhiyun }
771*4882a593Smuzhiyun
772*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
773*4882a593Smuzhiyun return status;
774*4882a593Smuzhiyun }
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun static const struct usb_ep_ops at91_ep_ops = {
777*4882a593Smuzhiyun .enable = at91_ep_enable,
778*4882a593Smuzhiyun .disable = at91_ep_disable,
779*4882a593Smuzhiyun .alloc_request = at91_ep_alloc_request,
780*4882a593Smuzhiyun .free_request = at91_ep_free_request,
781*4882a593Smuzhiyun .queue = at91_ep_queue,
782*4882a593Smuzhiyun .dequeue = at91_ep_dequeue,
783*4882a593Smuzhiyun .set_halt = at91_ep_set_halt,
784*4882a593Smuzhiyun /* there's only imprecise fifo status reporting */
785*4882a593Smuzhiyun };
786*4882a593Smuzhiyun
787*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
788*4882a593Smuzhiyun
at91_get_frame(struct usb_gadget * gadget)789*4882a593Smuzhiyun static int at91_get_frame(struct usb_gadget *gadget)
790*4882a593Smuzhiyun {
791*4882a593Smuzhiyun struct at91_udc *udc = to_udc(gadget);
792*4882a593Smuzhiyun
793*4882a593Smuzhiyun if (!to_udc(gadget)->clocked)
794*4882a593Smuzhiyun return -EINVAL;
795*4882a593Smuzhiyun return at91_udp_read(udc, AT91_UDP_FRM_NUM) & AT91_UDP_NUM;
796*4882a593Smuzhiyun }
797*4882a593Smuzhiyun
at91_wakeup(struct usb_gadget * gadget)798*4882a593Smuzhiyun static int at91_wakeup(struct usb_gadget *gadget)
799*4882a593Smuzhiyun {
800*4882a593Smuzhiyun struct at91_udc *udc = to_udc(gadget);
801*4882a593Smuzhiyun u32 glbstate;
802*4882a593Smuzhiyun unsigned long flags;
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun DBG("%s\n", __func__ );
805*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun if (!udc->clocked || !udc->suspended)
808*4882a593Smuzhiyun goto done;
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun /* NOTE: some "early versions" handle ESR differently ... */
811*4882a593Smuzhiyun
812*4882a593Smuzhiyun glbstate = at91_udp_read(udc, AT91_UDP_GLB_STAT);
813*4882a593Smuzhiyun if (!(glbstate & AT91_UDP_ESR))
814*4882a593Smuzhiyun goto done;
815*4882a593Smuzhiyun glbstate |= AT91_UDP_ESR;
816*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_GLB_STAT, glbstate);
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun done:
819*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
820*4882a593Smuzhiyun return 0;
821*4882a593Smuzhiyun }
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun /* reinit == restore initial software state */
udc_reinit(struct at91_udc * udc)824*4882a593Smuzhiyun static void udc_reinit(struct at91_udc *udc)
825*4882a593Smuzhiyun {
826*4882a593Smuzhiyun u32 i;
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun INIT_LIST_HEAD(&udc->gadget.ep_list);
829*4882a593Smuzhiyun INIT_LIST_HEAD(&udc->gadget.ep0->ep_list);
830*4882a593Smuzhiyun udc->gadget.quirk_stall_not_supp = 1;
831*4882a593Smuzhiyun
832*4882a593Smuzhiyun for (i = 0; i < NUM_ENDPOINTS; i++) {
833*4882a593Smuzhiyun struct at91_ep *ep = &udc->ep[i];
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun if (i != 0)
836*4882a593Smuzhiyun list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
837*4882a593Smuzhiyun ep->ep.desc = NULL;
838*4882a593Smuzhiyun ep->stopped = 0;
839*4882a593Smuzhiyun ep->fifo_bank = 0;
840*4882a593Smuzhiyun usb_ep_set_maxpacket_limit(&ep->ep, ep->maxpacket);
841*4882a593Smuzhiyun ep->creg = (void __iomem *) udc->udp_baseaddr + AT91_UDP_CSR(i);
842*4882a593Smuzhiyun /* initialize one queue per endpoint */
843*4882a593Smuzhiyun INIT_LIST_HEAD(&ep->queue);
844*4882a593Smuzhiyun }
845*4882a593Smuzhiyun }
846*4882a593Smuzhiyun
reset_gadget(struct at91_udc * udc)847*4882a593Smuzhiyun static void reset_gadget(struct at91_udc *udc)
848*4882a593Smuzhiyun {
849*4882a593Smuzhiyun struct usb_gadget_driver *driver = udc->driver;
850*4882a593Smuzhiyun int i;
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun if (udc->gadget.speed == USB_SPEED_UNKNOWN)
853*4882a593Smuzhiyun driver = NULL;
854*4882a593Smuzhiyun udc->gadget.speed = USB_SPEED_UNKNOWN;
855*4882a593Smuzhiyun udc->suspended = 0;
856*4882a593Smuzhiyun
857*4882a593Smuzhiyun for (i = 0; i < NUM_ENDPOINTS; i++) {
858*4882a593Smuzhiyun struct at91_ep *ep = &udc->ep[i];
859*4882a593Smuzhiyun
860*4882a593Smuzhiyun ep->stopped = 1;
861*4882a593Smuzhiyun nuke(ep, -ESHUTDOWN);
862*4882a593Smuzhiyun }
863*4882a593Smuzhiyun if (driver) {
864*4882a593Smuzhiyun spin_unlock(&udc->lock);
865*4882a593Smuzhiyun usb_gadget_udc_reset(&udc->gadget, driver);
866*4882a593Smuzhiyun spin_lock(&udc->lock);
867*4882a593Smuzhiyun }
868*4882a593Smuzhiyun
869*4882a593Smuzhiyun udc_reinit(udc);
870*4882a593Smuzhiyun }
871*4882a593Smuzhiyun
stop_activity(struct at91_udc * udc)872*4882a593Smuzhiyun static void stop_activity(struct at91_udc *udc)
873*4882a593Smuzhiyun {
874*4882a593Smuzhiyun struct usb_gadget_driver *driver = udc->driver;
875*4882a593Smuzhiyun int i;
876*4882a593Smuzhiyun
877*4882a593Smuzhiyun if (udc->gadget.speed == USB_SPEED_UNKNOWN)
878*4882a593Smuzhiyun driver = NULL;
879*4882a593Smuzhiyun udc->gadget.speed = USB_SPEED_UNKNOWN;
880*4882a593Smuzhiyun udc->suspended = 0;
881*4882a593Smuzhiyun
882*4882a593Smuzhiyun for (i = 0; i < NUM_ENDPOINTS; i++) {
883*4882a593Smuzhiyun struct at91_ep *ep = &udc->ep[i];
884*4882a593Smuzhiyun ep->stopped = 1;
885*4882a593Smuzhiyun nuke(ep, -ESHUTDOWN);
886*4882a593Smuzhiyun }
887*4882a593Smuzhiyun if (driver) {
888*4882a593Smuzhiyun spin_unlock(&udc->lock);
889*4882a593Smuzhiyun driver->disconnect(&udc->gadget);
890*4882a593Smuzhiyun spin_lock(&udc->lock);
891*4882a593Smuzhiyun }
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun udc_reinit(udc);
894*4882a593Smuzhiyun }
895*4882a593Smuzhiyun
clk_on(struct at91_udc * udc)896*4882a593Smuzhiyun static void clk_on(struct at91_udc *udc)
897*4882a593Smuzhiyun {
898*4882a593Smuzhiyun if (udc->clocked)
899*4882a593Smuzhiyun return;
900*4882a593Smuzhiyun udc->clocked = 1;
901*4882a593Smuzhiyun
902*4882a593Smuzhiyun clk_enable(udc->iclk);
903*4882a593Smuzhiyun clk_enable(udc->fclk);
904*4882a593Smuzhiyun }
905*4882a593Smuzhiyun
clk_off(struct at91_udc * udc)906*4882a593Smuzhiyun static void clk_off(struct at91_udc *udc)
907*4882a593Smuzhiyun {
908*4882a593Smuzhiyun if (!udc->clocked)
909*4882a593Smuzhiyun return;
910*4882a593Smuzhiyun udc->clocked = 0;
911*4882a593Smuzhiyun udc->gadget.speed = USB_SPEED_UNKNOWN;
912*4882a593Smuzhiyun clk_disable(udc->fclk);
913*4882a593Smuzhiyun clk_disable(udc->iclk);
914*4882a593Smuzhiyun }
915*4882a593Smuzhiyun
916*4882a593Smuzhiyun /*
917*4882a593Smuzhiyun * activate/deactivate link with host; minimize power usage for
918*4882a593Smuzhiyun * inactive links by cutting clocks and transceiver power.
919*4882a593Smuzhiyun */
pullup(struct at91_udc * udc,int is_on)920*4882a593Smuzhiyun static void pullup(struct at91_udc *udc, int is_on)
921*4882a593Smuzhiyun {
922*4882a593Smuzhiyun if (!udc->enabled || !udc->vbus)
923*4882a593Smuzhiyun is_on = 0;
924*4882a593Smuzhiyun DBG("%sactive\n", is_on ? "" : "in");
925*4882a593Smuzhiyun
926*4882a593Smuzhiyun if (is_on) {
927*4882a593Smuzhiyun clk_on(udc);
928*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM);
929*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_TXVC, 0);
930*4882a593Smuzhiyun } else {
931*4882a593Smuzhiyun stop_activity(udc);
932*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM);
933*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS);
934*4882a593Smuzhiyun clk_off(udc);
935*4882a593Smuzhiyun }
936*4882a593Smuzhiyun
937*4882a593Smuzhiyun if (udc->caps && udc->caps->pullup)
938*4882a593Smuzhiyun udc->caps->pullup(udc, is_on);
939*4882a593Smuzhiyun }
940*4882a593Smuzhiyun
941*4882a593Smuzhiyun /* vbus is here! turn everything on that's ready */
at91_vbus_session(struct usb_gadget * gadget,int is_active)942*4882a593Smuzhiyun static int at91_vbus_session(struct usb_gadget *gadget, int is_active)
943*4882a593Smuzhiyun {
944*4882a593Smuzhiyun struct at91_udc *udc = to_udc(gadget);
945*4882a593Smuzhiyun unsigned long flags;
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun /* VDBG("vbus %s\n", is_active ? "on" : "off"); */
948*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
949*4882a593Smuzhiyun udc->vbus = (is_active != 0);
950*4882a593Smuzhiyun if (udc->driver)
951*4882a593Smuzhiyun pullup(udc, is_active);
952*4882a593Smuzhiyun else
953*4882a593Smuzhiyun pullup(udc, 0);
954*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
955*4882a593Smuzhiyun return 0;
956*4882a593Smuzhiyun }
957*4882a593Smuzhiyun
at91_pullup(struct usb_gadget * gadget,int is_on)958*4882a593Smuzhiyun static int at91_pullup(struct usb_gadget *gadget, int is_on)
959*4882a593Smuzhiyun {
960*4882a593Smuzhiyun struct at91_udc *udc = to_udc(gadget);
961*4882a593Smuzhiyun unsigned long flags;
962*4882a593Smuzhiyun
963*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
964*4882a593Smuzhiyun udc->enabled = is_on = !!is_on;
965*4882a593Smuzhiyun pullup(udc, is_on);
966*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
967*4882a593Smuzhiyun return 0;
968*4882a593Smuzhiyun }
969*4882a593Smuzhiyun
at91_set_selfpowered(struct usb_gadget * gadget,int is_on)970*4882a593Smuzhiyun static int at91_set_selfpowered(struct usb_gadget *gadget, int is_on)
971*4882a593Smuzhiyun {
972*4882a593Smuzhiyun struct at91_udc *udc = to_udc(gadget);
973*4882a593Smuzhiyun unsigned long flags;
974*4882a593Smuzhiyun
975*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
976*4882a593Smuzhiyun gadget->is_selfpowered = (is_on != 0);
977*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
978*4882a593Smuzhiyun return 0;
979*4882a593Smuzhiyun }
980*4882a593Smuzhiyun
981*4882a593Smuzhiyun static int at91_start(struct usb_gadget *gadget,
982*4882a593Smuzhiyun struct usb_gadget_driver *driver);
983*4882a593Smuzhiyun static int at91_stop(struct usb_gadget *gadget);
984*4882a593Smuzhiyun
985*4882a593Smuzhiyun static const struct usb_gadget_ops at91_udc_ops = {
986*4882a593Smuzhiyun .get_frame = at91_get_frame,
987*4882a593Smuzhiyun .wakeup = at91_wakeup,
988*4882a593Smuzhiyun .set_selfpowered = at91_set_selfpowered,
989*4882a593Smuzhiyun .vbus_session = at91_vbus_session,
990*4882a593Smuzhiyun .pullup = at91_pullup,
991*4882a593Smuzhiyun .udc_start = at91_start,
992*4882a593Smuzhiyun .udc_stop = at91_stop,
993*4882a593Smuzhiyun
994*4882a593Smuzhiyun /*
995*4882a593Smuzhiyun * VBUS-powered devices may also also want to support bigger
996*4882a593Smuzhiyun * power budgets after an appropriate SET_CONFIGURATION.
997*4882a593Smuzhiyun */
998*4882a593Smuzhiyun /* .vbus_power = at91_vbus_power, */
999*4882a593Smuzhiyun };
1000*4882a593Smuzhiyun
1001*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
1002*4882a593Smuzhiyun
handle_ep(struct at91_ep * ep)1003*4882a593Smuzhiyun static int handle_ep(struct at91_ep *ep)
1004*4882a593Smuzhiyun {
1005*4882a593Smuzhiyun struct at91_request *req;
1006*4882a593Smuzhiyun u32 __iomem *creg = ep->creg;
1007*4882a593Smuzhiyun u32 csr = __raw_readl(creg);
1008*4882a593Smuzhiyun
1009*4882a593Smuzhiyun if (!list_empty(&ep->queue))
1010*4882a593Smuzhiyun req = list_entry(ep->queue.next,
1011*4882a593Smuzhiyun struct at91_request, queue);
1012*4882a593Smuzhiyun else
1013*4882a593Smuzhiyun req = NULL;
1014*4882a593Smuzhiyun
1015*4882a593Smuzhiyun if (ep->is_in) {
1016*4882a593Smuzhiyun if (csr & (AT91_UDP_STALLSENT | AT91_UDP_TXCOMP)) {
1017*4882a593Smuzhiyun csr |= CLR_FX;
1018*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP);
1019*4882a593Smuzhiyun __raw_writel(csr, creg);
1020*4882a593Smuzhiyun }
1021*4882a593Smuzhiyun if (req)
1022*4882a593Smuzhiyun return write_fifo(ep, req);
1023*4882a593Smuzhiyun
1024*4882a593Smuzhiyun } else {
1025*4882a593Smuzhiyun if (csr & AT91_UDP_STALLSENT) {
1026*4882a593Smuzhiyun /* STALLSENT bit == ISOERR */
1027*4882a593Smuzhiyun if (ep->is_iso && req)
1028*4882a593Smuzhiyun req->req.status = -EILSEQ;
1029*4882a593Smuzhiyun csr |= CLR_FX;
1030*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_STALLSENT);
1031*4882a593Smuzhiyun __raw_writel(csr, creg);
1032*4882a593Smuzhiyun csr = __raw_readl(creg);
1033*4882a593Smuzhiyun }
1034*4882a593Smuzhiyun if (req && (csr & RX_DATA_READY))
1035*4882a593Smuzhiyun return read_fifo(ep, req);
1036*4882a593Smuzhiyun }
1037*4882a593Smuzhiyun return 0;
1038*4882a593Smuzhiyun }
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun union setup {
1041*4882a593Smuzhiyun u8 raw[8];
1042*4882a593Smuzhiyun struct usb_ctrlrequest r;
1043*4882a593Smuzhiyun };
1044*4882a593Smuzhiyun
handle_setup(struct at91_udc * udc,struct at91_ep * ep,u32 csr)1045*4882a593Smuzhiyun static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr)
1046*4882a593Smuzhiyun {
1047*4882a593Smuzhiyun u32 __iomem *creg = ep->creg;
1048*4882a593Smuzhiyun u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0));
1049*4882a593Smuzhiyun unsigned rxcount, i = 0;
1050*4882a593Smuzhiyun u32 tmp;
1051*4882a593Smuzhiyun union setup pkt;
1052*4882a593Smuzhiyun int status = 0;
1053*4882a593Smuzhiyun
1054*4882a593Smuzhiyun /* read and ack SETUP; hard-fail for bogus packets */
1055*4882a593Smuzhiyun rxcount = (csr & AT91_UDP_RXBYTECNT) >> 16;
1056*4882a593Smuzhiyun if (likely(rxcount == 8)) {
1057*4882a593Smuzhiyun while (rxcount--)
1058*4882a593Smuzhiyun pkt.raw[i++] = __raw_readb(dreg);
1059*4882a593Smuzhiyun if (pkt.r.bRequestType & USB_DIR_IN) {
1060*4882a593Smuzhiyun csr |= AT91_UDP_DIR;
1061*4882a593Smuzhiyun ep->is_in = 1;
1062*4882a593Smuzhiyun } else {
1063*4882a593Smuzhiyun csr &= ~AT91_UDP_DIR;
1064*4882a593Smuzhiyun ep->is_in = 0;
1065*4882a593Smuzhiyun }
1066*4882a593Smuzhiyun } else {
1067*4882a593Smuzhiyun /* REVISIT this happens sometimes under load; why?? */
1068*4882a593Smuzhiyun ERR("SETUP len %d, csr %08x\n", rxcount, csr);
1069*4882a593Smuzhiyun status = -EINVAL;
1070*4882a593Smuzhiyun }
1071*4882a593Smuzhiyun csr |= CLR_FX;
1072*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_RXSETUP);
1073*4882a593Smuzhiyun __raw_writel(csr, creg);
1074*4882a593Smuzhiyun udc->wait_for_addr_ack = 0;
1075*4882a593Smuzhiyun udc->wait_for_config_ack = 0;
1076*4882a593Smuzhiyun ep->stopped = 0;
1077*4882a593Smuzhiyun if (unlikely(status != 0))
1078*4882a593Smuzhiyun goto stall;
1079*4882a593Smuzhiyun
1080*4882a593Smuzhiyun #define w_index le16_to_cpu(pkt.r.wIndex)
1081*4882a593Smuzhiyun #define w_value le16_to_cpu(pkt.r.wValue)
1082*4882a593Smuzhiyun #define w_length le16_to_cpu(pkt.r.wLength)
1083*4882a593Smuzhiyun
1084*4882a593Smuzhiyun VDBG("SETUP %02x.%02x v%04x i%04x l%04x\n",
1085*4882a593Smuzhiyun pkt.r.bRequestType, pkt.r.bRequest,
1086*4882a593Smuzhiyun w_value, w_index, w_length);
1087*4882a593Smuzhiyun
1088*4882a593Smuzhiyun /*
1089*4882a593Smuzhiyun * A few standard requests get handled here, ones that touch
1090*4882a593Smuzhiyun * hardware ... notably for device and endpoint features.
1091*4882a593Smuzhiyun */
1092*4882a593Smuzhiyun udc->req_pending = 1;
1093*4882a593Smuzhiyun csr = __raw_readl(creg);
1094*4882a593Smuzhiyun csr |= CLR_FX;
1095*4882a593Smuzhiyun csr &= ~SET_FX;
1096*4882a593Smuzhiyun switch ((pkt.r.bRequestType << 8) | pkt.r.bRequest) {
1097*4882a593Smuzhiyun
1098*4882a593Smuzhiyun case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
1099*4882a593Smuzhiyun | USB_REQ_SET_ADDRESS:
1100*4882a593Smuzhiyun __raw_writel(csr | AT91_UDP_TXPKTRDY, creg);
1101*4882a593Smuzhiyun udc->addr = w_value;
1102*4882a593Smuzhiyun udc->wait_for_addr_ack = 1;
1103*4882a593Smuzhiyun udc->req_pending = 0;
1104*4882a593Smuzhiyun /* FADDR is set later, when we ack host STATUS */
1105*4882a593Smuzhiyun return;
1106*4882a593Smuzhiyun
1107*4882a593Smuzhiyun case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
1108*4882a593Smuzhiyun | USB_REQ_SET_CONFIGURATION:
1109*4882a593Smuzhiyun tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_CONFG;
1110*4882a593Smuzhiyun if (pkt.r.wValue)
1111*4882a593Smuzhiyun udc->wait_for_config_ack = (tmp == 0);
1112*4882a593Smuzhiyun else
1113*4882a593Smuzhiyun udc->wait_for_config_ack = (tmp != 0);
1114*4882a593Smuzhiyun if (udc->wait_for_config_ack)
1115*4882a593Smuzhiyun VDBG("wait for config\n");
1116*4882a593Smuzhiyun /* CONFG is toggled later, if gadget driver succeeds */
1117*4882a593Smuzhiyun break;
1118*4882a593Smuzhiyun
1119*4882a593Smuzhiyun /*
1120*4882a593Smuzhiyun * Hosts may set or clear remote wakeup status, and
1121*4882a593Smuzhiyun * devices may report they're VBUS powered.
1122*4882a593Smuzhiyun */
1123*4882a593Smuzhiyun case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
1124*4882a593Smuzhiyun | USB_REQ_GET_STATUS:
1125*4882a593Smuzhiyun tmp = (udc->gadget.is_selfpowered << USB_DEVICE_SELF_POWERED);
1126*4882a593Smuzhiyun if (at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_ESR)
1127*4882a593Smuzhiyun tmp |= (1 << USB_DEVICE_REMOTE_WAKEUP);
1128*4882a593Smuzhiyun PACKET("get device status\n");
1129*4882a593Smuzhiyun __raw_writeb(tmp, dreg);
1130*4882a593Smuzhiyun __raw_writeb(0, dreg);
1131*4882a593Smuzhiyun goto write_in;
1132*4882a593Smuzhiyun /* then STATUS starts later, automatically */
1133*4882a593Smuzhiyun case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
1134*4882a593Smuzhiyun | USB_REQ_SET_FEATURE:
1135*4882a593Smuzhiyun if (w_value != USB_DEVICE_REMOTE_WAKEUP)
1136*4882a593Smuzhiyun goto stall;
1137*4882a593Smuzhiyun tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT);
1138*4882a593Smuzhiyun tmp |= AT91_UDP_ESR;
1139*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp);
1140*4882a593Smuzhiyun goto succeed;
1141*4882a593Smuzhiyun case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
1142*4882a593Smuzhiyun | USB_REQ_CLEAR_FEATURE:
1143*4882a593Smuzhiyun if (w_value != USB_DEVICE_REMOTE_WAKEUP)
1144*4882a593Smuzhiyun goto stall;
1145*4882a593Smuzhiyun tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT);
1146*4882a593Smuzhiyun tmp &= ~AT91_UDP_ESR;
1147*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp);
1148*4882a593Smuzhiyun goto succeed;
1149*4882a593Smuzhiyun
1150*4882a593Smuzhiyun /*
1151*4882a593Smuzhiyun * Interfaces have no feature settings; this is pretty useless.
1152*4882a593Smuzhiyun * we won't even insist the interface exists...
1153*4882a593Smuzhiyun */
1154*4882a593Smuzhiyun case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8)
1155*4882a593Smuzhiyun | USB_REQ_GET_STATUS:
1156*4882a593Smuzhiyun PACKET("get interface status\n");
1157*4882a593Smuzhiyun __raw_writeb(0, dreg);
1158*4882a593Smuzhiyun __raw_writeb(0, dreg);
1159*4882a593Smuzhiyun goto write_in;
1160*4882a593Smuzhiyun /* then STATUS starts later, automatically */
1161*4882a593Smuzhiyun case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8)
1162*4882a593Smuzhiyun | USB_REQ_SET_FEATURE:
1163*4882a593Smuzhiyun case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8)
1164*4882a593Smuzhiyun | USB_REQ_CLEAR_FEATURE:
1165*4882a593Smuzhiyun goto stall;
1166*4882a593Smuzhiyun
1167*4882a593Smuzhiyun /*
1168*4882a593Smuzhiyun * Hosts may clear bulk/intr endpoint halt after the gadget
1169*4882a593Smuzhiyun * driver sets it (not widely used); or set it (for testing)
1170*4882a593Smuzhiyun */
1171*4882a593Smuzhiyun case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8)
1172*4882a593Smuzhiyun | USB_REQ_GET_STATUS:
1173*4882a593Smuzhiyun tmp = w_index & USB_ENDPOINT_NUMBER_MASK;
1174*4882a593Smuzhiyun ep = &udc->ep[tmp];
1175*4882a593Smuzhiyun if (tmp >= NUM_ENDPOINTS || (tmp && !ep->ep.desc))
1176*4882a593Smuzhiyun goto stall;
1177*4882a593Smuzhiyun
1178*4882a593Smuzhiyun if (tmp) {
1179*4882a593Smuzhiyun if ((w_index & USB_DIR_IN)) {
1180*4882a593Smuzhiyun if (!ep->is_in)
1181*4882a593Smuzhiyun goto stall;
1182*4882a593Smuzhiyun } else if (ep->is_in)
1183*4882a593Smuzhiyun goto stall;
1184*4882a593Smuzhiyun }
1185*4882a593Smuzhiyun PACKET("get %s status\n", ep->ep.name);
1186*4882a593Smuzhiyun if (__raw_readl(ep->creg) & AT91_UDP_FORCESTALL)
1187*4882a593Smuzhiyun tmp = (1 << USB_ENDPOINT_HALT);
1188*4882a593Smuzhiyun else
1189*4882a593Smuzhiyun tmp = 0;
1190*4882a593Smuzhiyun __raw_writeb(tmp, dreg);
1191*4882a593Smuzhiyun __raw_writeb(0, dreg);
1192*4882a593Smuzhiyun goto write_in;
1193*4882a593Smuzhiyun /* then STATUS starts later, automatically */
1194*4882a593Smuzhiyun case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8)
1195*4882a593Smuzhiyun | USB_REQ_SET_FEATURE:
1196*4882a593Smuzhiyun tmp = w_index & USB_ENDPOINT_NUMBER_MASK;
1197*4882a593Smuzhiyun ep = &udc->ep[tmp];
1198*4882a593Smuzhiyun if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS)
1199*4882a593Smuzhiyun goto stall;
1200*4882a593Smuzhiyun if (!ep->ep.desc || ep->is_iso)
1201*4882a593Smuzhiyun goto stall;
1202*4882a593Smuzhiyun if ((w_index & USB_DIR_IN)) {
1203*4882a593Smuzhiyun if (!ep->is_in)
1204*4882a593Smuzhiyun goto stall;
1205*4882a593Smuzhiyun } else if (ep->is_in)
1206*4882a593Smuzhiyun goto stall;
1207*4882a593Smuzhiyun
1208*4882a593Smuzhiyun tmp = __raw_readl(ep->creg);
1209*4882a593Smuzhiyun tmp &= ~SET_FX;
1210*4882a593Smuzhiyun tmp |= CLR_FX | AT91_UDP_FORCESTALL;
1211*4882a593Smuzhiyun __raw_writel(tmp, ep->creg);
1212*4882a593Smuzhiyun goto succeed;
1213*4882a593Smuzhiyun case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8)
1214*4882a593Smuzhiyun | USB_REQ_CLEAR_FEATURE:
1215*4882a593Smuzhiyun tmp = w_index & USB_ENDPOINT_NUMBER_MASK;
1216*4882a593Smuzhiyun ep = &udc->ep[tmp];
1217*4882a593Smuzhiyun if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS)
1218*4882a593Smuzhiyun goto stall;
1219*4882a593Smuzhiyun if (tmp == 0)
1220*4882a593Smuzhiyun goto succeed;
1221*4882a593Smuzhiyun if (!ep->ep.desc || ep->is_iso)
1222*4882a593Smuzhiyun goto stall;
1223*4882a593Smuzhiyun if ((w_index & USB_DIR_IN)) {
1224*4882a593Smuzhiyun if (!ep->is_in)
1225*4882a593Smuzhiyun goto stall;
1226*4882a593Smuzhiyun } else if (ep->is_in)
1227*4882a593Smuzhiyun goto stall;
1228*4882a593Smuzhiyun
1229*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
1230*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_RST_EP, 0);
1231*4882a593Smuzhiyun tmp = __raw_readl(ep->creg);
1232*4882a593Smuzhiyun tmp |= CLR_FX;
1233*4882a593Smuzhiyun tmp &= ~(SET_FX | AT91_UDP_FORCESTALL);
1234*4882a593Smuzhiyun __raw_writel(tmp, ep->creg);
1235*4882a593Smuzhiyun if (!list_empty(&ep->queue))
1236*4882a593Smuzhiyun handle_ep(ep);
1237*4882a593Smuzhiyun goto succeed;
1238*4882a593Smuzhiyun }
1239*4882a593Smuzhiyun
1240*4882a593Smuzhiyun #undef w_value
1241*4882a593Smuzhiyun #undef w_index
1242*4882a593Smuzhiyun #undef w_length
1243*4882a593Smuzhiyun
1244*4882a593Smuzhiyun /* pass request up to the gadget driver */
1245*4882a593Smuzhiyun if (udc->driver) {
1246*4882a593Smuzhiyun spin_unlock(&udc->lock);
1247*4882a593Smuzhiyun status = udc->driver->setup(&udc->gadget, &pkt.r);
1248*4882a593Smuzhiyun spin_lock(&udc->lock);
1249*4882a593Smuzhiyun }
1250*4882a593Smuzhiyun else
1251*4882a593Smuzhiyun status = -ENODEV;
1252*4882a593Smuzhiyun if (status < 0) {
1253*4882a593Smuzhiyun stall:
1254*4882a593Smuzhiyun VDBG("req %02x.%02x protocol STALL; stat %d\n",
1255*4882a593Smuzhiyun pkt.r.bRequestType, pkt.r.bRequest, status);
1256*4882a593Smuzhiyun csr |= AT91_UDP_FORCESTALL;
1257*4882a593Smuzhiyun __raw_writel(csr, creg);
1258*4882a593Smuzhiyun udc->req_pending = 0;
1259*4882a593Smuzhiyun }
1260*4882a593Smuzhiyun return;
1261*4882a593Smuzhiyun
1262*4882a593Smuzhiyun succeed:
1263*4882a593Smuzhiyun /* immediate successful (IN) STATUS after zero length DATA */
1264*4882a593Smuzhiyun PACKET("ep0 in/status\n");
1265*4882a593Smuzhiyun write_in:
1266*4882a593Smuzhiyun csr |= AT91_UDP_TXPKTRDY;
1267*4882a593Smuzhiyun __raw_writel(csr, creg);
1268*4882a593Smuzhiyun udc->req_pending = 0;
1269*4882a593Smuzhiyun }
1270*4882a593Smuzhiyun
handle_ep0(struct at91_udc * udc)1271*4882a593Smuzhiyun static void handle_ep0(struct at91_udc *udc)
1272*4882a593Smuzhiyun {
1273*4882a593Smuzhiyun struct at91_ep *ep0 = &udc->ep[0];
1274*4882a593Smuzhiyun u32 __iomem *creg = ep0->creg;
1275*4882a593Smuzhiyun u32 csr = __raw_readl(creg);
1276*4882a593Smuzhiyun struct at91_request *req;
1277*4882a593Smuzhiyun
1278*4882a593Smuzhiyun if (unlikely(csr & AT91_UDP_STALLSENT)) {
1279*4882a593Smuzhiyun nuke(ep0, -EPROTO);
1280*4882a593Smuzhiyun udc->req_pending = 0;
1281*4882a593Smuzhiyun csr |= CLR_FX;
1282*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_FORCESTALL);
1283*4882a593Smuzhiyun __raw_writel(csr, creg);
1284*4882a593Smuzhiyun VDBG("ep0 stalled\n");
1285*4882a593Smuzhiyun csr = __raw_readl(creg);
1286*4882a593Smuzhiyun }
1287*4882a593Smuzhiyun if (csr & AT91_UDP_RXSETUP) {
1288*4882a593Smuzhiyun nuke(ep0, 0);
1289*4882a593Smuzhiyun udc->req_pending = 0;
1290*4882a593Smuzhiyun handle_setup(udc, ep0, csr);
1291*4882a593Smuzhiyun return;
1292*4882a593Smuzhiyun }
1293*4882a593Smuzhiyun
1294*4882a593Smuzhiyun if (list_empty(&ep0->queue))
1295*4882a593Smuzhiyun req = NULL;
1296*4882a593Smuzhiyun else
1297*4882a593Smuzhiyun req = list_entry(ep0->queue.next, struct at91_request, queue);
1298*4882a593Smuzhiyun
1299*4882a593Smuzhiyun /* host ACKed an IN packet that we sent */
1300*4882a593Smuzhiyun if (csr & AT91_UDP_TXCOMP) {
1301*4882a593Smuzhiyun csr |= CLR_FX;
1302*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_TXCOMP);
1303*4882a593Smuzhiyun
1304*4882a593Smuzhiyun /* write more IN DATA? */
1305*4882a593Smuzhiyun if (req && ep0->is_in) {
1306*4882a593Smuzhiyun if (handle_ep(ep0))
1307*4882a593Smuzhiyun udc->req_pending = 0;
1308*4882a593Smuzhiyun
1309*4882a593Smuzhiyun /*
1310*4882a593Smuzhiyun * Ack after:
1311*4882a593Smuzhiyun * - last IN DATA packet (including GET_STATUS)
1312*4882a593Smuzhiyun * - IN/STATUS for OUT DATA
1313*4882a593Smuzhiyun * - IN/STATUS for any zero-length DATA stage
1314*4882a593Smuzhiyun * except for the IN DATA case, the host should send
1315*4882a593Smuzhiyun * an OUT status later, which we'll ack.
1316*4882a593Smuzhiyun */
1317*4882a593Smuzhiyun } else {
1318*4882a593Smuzhiyun udc->req_pending = 0;
1319*4882a593Smuzhiyun __raw_writel(csr, creg);
1320*4882a593Smuzhiyun
1321*4882a593Smuzhiyun /*
1322*4882a593Smuzhiyun * SET_ADDRESS takes effect only after the STATUS
1323*4882a593Smuzhiyun * (to the original address) gets acked.
1324*4882a593Smuzhiyun */
1325*4882a593Smuzhiyun if (udc->wait_for_addr_ack) {
1326*4882a593Smuzhiyun u32 tmp;
1327*4882a593Smuzhiyun
1328*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_FADDR,
1329*4882a593Smuzhiyun AT91_UDP_FEN | udc->addr);
1330*4882a593Smuzhiyun tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT);
1331*4882a593Smuzhiyun tmp &= ~AT91_UDP_FADDEN;
1332*4882a593Smuzhiyun if (udc->addr)
1333*4882a593Smuzhiyun tmp |= AT91_UDP_FADDEN;
1334*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp);
1335*4882a593Smuzhiyun
1336*4882a593Smuzhiyun udc->wait_for_addr_ack = 0;
1337*4882a593Smuzhiyun VDBG("address %d\n", udc->addr);
1338*4882a593Smuzhiyun }
1339*4882a593Smuzhiyun }
1340*4882a593Smuzhiyun }
1341*4882a593Smuzhiyun
1342*4882a593Smuzhiyun /* OUT packet arrived ... */
1343*4882a593Smuzhiyun else if (csr & AT91_UDP_RX_DATA_BK0) {
1344*4882a593Smuzhiyun csr |= CLR_FX;
1345*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0);
1346*4882a593Smuzhiyun
1347*4882a593Smuzhiyun /* OUT DATA stage */
1348*4882a593Smuzhiyun if (!ep0->is_in) {
1349*4882a593Smuzhiyun if (req) {
1350*4882a593Smuzhiyun if (handle_ep(ep0)) {
1351*4882a593Smuzhiyun /* send IN/STATUS */
1352*4882a593Smuzhiyun PACKET("ep0 in/status\n");
1353*4882a593Smuzhiyun csr = __raw_readl(creg);
1354*4882a593Smuzhiyun csr &= ~SET_FX;
1355*4882a593Smuzhiyun csr |= CLR_FX | AT91_UDP_TXPKTRDY;
1356*4882a593Smuzhiyun __raw_writel(csr, creg);
1357*4882a593Smuzhiyun udc->req_pending = 0;
1358*4882a593Smuzhiyun }
1359*4882a593Smuzhiyun } else if (udc->req_pending) {
1360*4882a593Smuzhiyun /*
1361*4882a593Smuzhiyun * AT91 hardware has a hard time with this
1362*4882a593Smuzhiyun * "deferred response" mode for control-OUT
1363*4882a593Smuzhiyun * transfers. (For control-IN it's fine.)
1364*4882a593Smuzhiyun *
1365*4882a593Smuzhiyun * The normal solution leaves OUT data in the
1366*4882a593Smuzhiyun * fifo until the gadget driver is ready.
1367*4882a593Smuzhiyun * We couldn't do that here without disabling
1368*4882a593Smuzhiyun * the IRQ that tells about SETUP packets,
1369*4882a593Smuzhiyun * e.g. when the host gets impatient...
1370*4882a593Smuzhiyun *
1371*4882a593Smuzhiyun * Working around it by copying into a buffer
1372*4882a593Smuzhiyun * would almost be a non-deferred response,
1373*4882a593Smuzhiyun * except that it wouldn't permit reliable
1374*4882a593Smuzhiyun * stalling of the request. Instead, demand
1375*4882a593Smuzhiyun * that gadget drivers not use this mode.
1376*4882a593Smuzhiyun */
1377*4882a593Smuzhiyun DBG("no control-OUT deferred responses!\n");
1378*4882a593Smuzhiyun __raw_writel(csr | AT91_UDP_FORCESTALL, creg);
1379*4882a593Smuzhiyun udc->req_pending = 0;
1380*4882a593Smuzhiyun }
1381*4882a593Smuzhiyun
1382*4882a593Smuzhiyun /* STATUS stage for control-IN; ack. */
1383*4882a593Smuzhiyun } else {
1384*4882a593Smuzhiyun PACKET("ep0 out/status ACK\n");
1385*4882a593Smuzhiyun __raw_writel(csr, creg);
1386*4882a593Smuzhiyun
1387*4882a593Smuzhiyun /* "early" status stage */
1388*4882a593Smuzhiyun if (req)
1389*4882a593Smuzhiyun done(ep0, req, 0);
1390*4882a593Smuzhiyun }
1391*4882a593Smuzhiyun }
1392*4882a593Smuzhiyun }
1393*4882a593Smuzhiyun
at91_udc_irq(int irq,void * _udc)1394*4882a593Smuzhiyun static irqreturn_t at91_udc_irq (int irq, void *_udc)
1395*4882a593Smuzhiyun {
1396*4882a593Smuzhiyun struct at91_udc *udc = _udc;
1397*4882a593Smuzhiyun u32 rescans = 5;
1398*4882a593Smuzhiyun int disable_clock = 0;
1399*4882a593Smuzhiyun unsigned long flags;
1400*4882a593Smuzhiyun
1401*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
1402*4882a593Smuzhiyun
1403*4882a593Smuzhiyun if (!udc->clocked) {
1404*4882a593Smuzhiyun clk_on(udc);
1405*4882a593Smuzhiyun disable_clock = 1;
1406*4882a593Smuzhiyun }
1407*4882a593Smuzhiyun
1408*4882a593Smuzhiyun while (rescans--) {
1409*4882a593Smuzhiyun u32 status;
1410*4882a593Smuzhiyun
1411*4882a593Smuzhiyun status = at91_udp_read(udc, AT91_UDP_ISR)
1412*4882a593Smuzhiyun & at91_udp_read(udc, AT91_UDP_IMR);
1413*4882a593Smuzhiyun if (!status)
1414*4882a593Smuzhiyun break;
1415*4882a593Smuzhiyun
1416*4882a593Smuzhiyun /* USB reset irq: not maskable */
1417*4882a593Smuzhiyun if (status & AT91_UDP_ENDBUSRES) {
1418*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IDR, ~MINIMUS_INTERRUPTUS);
1419*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IER, MINIMUS_INTERRUPTUS);
1420*4882a593Smuzhiyun /* Atmel code clears this irq twice */
1421*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES);
1422*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES);
1423*4882a593Smuzhiyun VDBG("end bus reset\n");
1424*4882a593Smuzhiyun udc->addr = 0;
1425*4882a593Smuzhiyun reset_gadget(udc);
1426*4882a593Smuzhiyun
1427*4882a593Smuzhiyun /* enable ep0 */
1428*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_CSR(0),
1429*4882a593Smuzhiyun AT91_UDP_EPEDS | AT91_UDP_EPTYPE_CTRL);
1430*4882a593Smuzhiyun udc->gadget.speed = USB_SPEED_FULL;
1431*4882a593Smuzhiyun udc->suspended = 0;
1432*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_EP(0));
1433*4882a593Smuzhiyun
1434*4882a593Smuzhiyun /*
1435*4882a593Smuzhiyun * NOTE: this driver keeps clocks off unless the
1436*4882a593Smuzhiyun * USB host is present. That saves power, but for
1437*4882a593Smuzhiyun * boards that don't support VBUS detection, both
1438*4882a593Smuzhiyun * clocks need to be active most of the time.
1439*4882a593Smuzhiyun */
1440*4882a593Smuzhiyun
1441*4882a593Smuzhiyun /* host initiated suspend (3+ms bus idle) */
1442*4882a593Smuzhiyun } else if (status & AT91_UDP_RXSUSP) {
1443*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXSUSP);
1444*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXRSM);
1445*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXSUSP);
1446*4882a593Smuzhiyun /* VDBG("bus suspend\n"); */
1447*4882a593Smuzhiyun if (udc->suspended)
1448*4882a593Smuzhiyun continue;
1449*4882a593Smuzhiyun udc->suspended = 1;
1450*4882a593Smuzhiyun
1451*4882a593Smuzhiyun /*
1452*4882a593Smuzhiyun * NOTE: when suspending a VBUS-powered device, the
1453*4882a593Smuzhiyun * gadget driver should switch into slow clock mode
1454*4882a593Smuzhiyun * and then into standby to avoid drawing more than
1455*4882a593Smuzhiyun * 500uA power (2500uA for some high-power configs).
1456*4882a593Smuzhiyun */
1457*4882a593Smuzhiyun if (udc->driver && udc->driver->suspend) {
1458*4882a593Smuzhiyun spin_unlock(&udc->lock);
1459*4882a593Smuzhiyun udc->driver->suspend(&udc->gadget);
1460*4882a593Smuzhiyun spin_lock(&udc->lock);
1461*4882a593Smuzhiyun }
1462*4882a593Smuzhiyun
1463*4882a593Smuzhiyun /* host initiated resume */
1464*4882a593Smuzhiyun } else if (status & AT91_UDP_RXRSM) {
1465*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM);
1466*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXSUSP);
1467*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM);
1468*4882a593Smuzhiyun /* VDBG("bus resume\n"); */
1469*4882a593Smuzhiyun if (!udc->suspended)
1470*4882a593Smuzhiyun continue;
1471*4882a593Smuzhiyun udc->suspended = 0;
1472*4882a593Smuzhiyun
1473*4882a593Smuzhiyun /*
1474*4882a593Smuzhiyun * NOTE: for a VBUS-powered device, the gadget driver
1475*4882a593Smuzhiyun * would normally want to switch out of slow clock
1476*4882a593Smuzhiyun * mode into normal mode.
1477*4882a593Smuzhiyun */
1478*4882a593Smuzhiyun if (udc->driver && udc->driver->resume) {
1479*4882a593Smuzhiyun spin_unlock(&udc->lock);
1480*4882a593Smuzhiyun udc->driver->resume(&udc->gadget);
1481*4882a593Smuzhiyun spin_lock(&udc->lock);
1482*4882a593Smuzhiyun }
1483*4882a593Smuzhiyun
1484*4882a593Smuzhiyun /* endpoint IRQs are cleared by handling them */
1485*4882a593Smuzhiyun } else {
1486*4882a593Smuzhiyun int i;
1487*4882a593Smuzhiyun unsigned mask = 1;
1488*4882a593Smuzhiyun struct at91_ep *ep = &udc->ep[1];
1489*4882a593Smuzhiyun
1490*4882a593Smuzhiyun if (status & mask)
1491*4882a593Smuzhiyun handle_ep0(udc);
1492*4882a593Smuzhiyun for (i = 1; i < NUM_ENDPOINTS; i++) {
1493*4882a593Smuzhiyun mask <<= 1;
1494*4882a593Smuzhiyun if (status & mask)
1495*4882a593Smuzhiyun handle_ep(ep);
1496*4882a593Smuzhiyun ep++;
1497*4882a593Smuzhiyun }
1498*4882a593Smuzhiyun }
1499*4882a593Smuzhiyun }
1500*4882a593Smuzhiyun
1501*4882a593Smuzhiyun if (disable_clock)
1502*4882a593Smuzhiyun clk_off(udc);
1503*4882a593Smuzhiyun
1504*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
1505*4882a593Smuzhiyun
1506*4882a593Smuzhiyun return IRQ_HANDLED;
1507*4882a593Smuzhiyun }
1508*4882a593Smuzhiyun
1509*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
1510*4882a593Smuzhiyun
at91_vbus_update(struct at91_udc * udc,unsigned value)1511*4882a593Smuzhiyun static void at91_vbus_update(struct at91_udc *udc, unsigned value)
1512*4882a593Smuzhiyun {
1513*4882a593Smuzhiyun value ^= udc->board.vbus_active_low;
1514*4882a593Smuzhiyun if (value != udc->vbus)
1515*4882a593Smuzhiyun at91_vbus_session(&udc->gadget, value);
1516*4882a593Smuzhiyun }
1517*4882a593Smuzhiyun
at91_vbus_irq(int irq,void * _udc)1518*4882a593Smuzhiyun static irqreturn_t at91_vbus_irq(int irq, void *_udc)
1519*4882a593Smuzhiyun {
1520*4882a593Smuzhiyun struct at91_udc *udc = _udc;
1521*4882a593Smuzhiyun
1522*4882a593Smuzhiyun /* vbus needs at least brief debouncing */
1523*4882a593Smuzhiyun udelay(10);
1524*4882a593Smuzhiyun at91_vbus_update(udc, gpio_get_value(udc->board.vbus_pin));
1525*4882a593Smuzhiyun
1526*4882a593Smuzhiyun return IRQ_HANDLED;
1527*4882a593Smuzhiyun }
1528*4882a593Smuzhiyun
at91_vbus_timer_work(struct work_struct * work)1529*4882a593Smuzhiyun static void at91_vbus_timer_work(struct work_struct *work)
1530*4882a593Smuzhiyun {
1531*4882a593Smuzhiyun struct at91_udc *udc = container_of(work, struct at91_udc,
1532*4882a593Smuzhiyun vbus_timer_work);
1533*4882a593Smuzhiyun
1534*4882a593Smuzhiyun at91_vbus_update(udc, gpio_get_value_cansleep(udc->board.vbus_pin));
1535*4882a593Smuzhiyun
1536*4882a593Smuzhiyun if (!timer_pending(&udc->vbus_timer))
1537*4882a593Smuzhiyun mod_timer(&udc->vbus_timer, jiffies + VBUS_POLL_TIMEOUT);
1538*4882a593Smuzhiyun }
1539*4882a593Smuzhiyun
at91_vbus_timer(struct timer_list * t)1540*4882a593Smuzhiyun static void at91_vbus_timer(struct timer_list *t)
1541*4882a593Smuzhiyun {
1542*4882a593Smuzhiyun struct at91_udc *udc = from_timer(udc, t, vbus_timer);
1543*4882a593Smuzhiyun
1544*4882a593Smuzhiyun /*
1545*4882a593Smuzhiyun * If we are polling vbus it is likely that the gpio is on an
1546*4882a593Smuzhiyun * bus such as i2c or spi which may sleep, so schedule some work
1547*4882a593Smuzhiyun * to read the vbus gpio
1548*4882a593Smuzhiyun */
1549*4882a593Smuzhiyun schedule_work(&udc->vbus_timer_work);
1550*4882a593Smuzhiyun }
1551*4882a593Smuzhiyun
at91_start(struct usb_gadget * gadget,struct usb_gadget_driver * driver)1552*4882a593Smuzhiyun static int at91_start(struct usb_gadget *gadget,
1553*4882a593Smuzhiyun struct usb_gadget_driver *driver)
1554*4882a593Smuzhiyun {
1555*4882a593Smuzhiyun struct at91_udc *udc;
1556*4882a593Smuzhiyun
1557*4882a593Smuzhiyun udc = container_of(gadget, struct at91_udc, gadget);
1558*4882a593Smuzhiyun udc->driver = driver;
1559*4882a593Smuzhiyun udc->gadget.dev.of_node = udc->pdev->dev.of_node;
1560*4882a593Smuzhiyun udc->enabled = 1;
1561*4882a593Smuzhiyun udc->gadget.is_selfpowered = 1;
1562*4882a593Smuzhiyun
1563*4882a593Smuzhiyun return 0;
1564*4882a593Smuzhiyun }
1565*4882a593Smuzhiyun
at91_stop(struct usb_gadget * gadget)1566*4882a593Smuzhiyun static int at91_stop(struct usb_gadget *gadget)
1567*4882a593Smuzhiyun {
1568*4882a593Smuzhiyun struct at91_udc *udc;
1569*4882a593Smuzhiyun unsigned long flags;
1570*4882a593Smuzhiyun
1571*4882a593Smuzhiyun udc = container_of(gadget, struct at91_udc, gadget);
1572*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
1573*4882a593Smuzhiyun udc->enabled = 0;
1574*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IDR, ~0);
1575*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
1576*4882a593Smuzhiyun
1577*4882a593Smuzhiyun udc->driver = NULL;
1578*4882a593Smuzhiyun
1579*4882a593Smuzhiyun return 0;
1580*4882a593Smuzhiyun }
1581*4882a593Smuzhiyun
1582*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
1583*4882a593Smuzhiyun
at91udc_shutdown(struct platform_device * dev)1584*4882a593Smuzhiyun static void at91udc_shutdown(struct platform_device *dev)
1585*4882a593Smuzhiyun {
1586*4882a593Smuzhiyun struct at91_udc *udc = platform_get_drvdata(dev);
1587*4882a593Smuzhiyun unsigned long flags;
1588*4882a593Smuzhiyun
1589*4882a593Smuzhiyun /* force disconnect on reboot */
1590*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
1591*4882a593Smuzhiyun pullup(platform_get_drvdata(dev), 0);
1592*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
1593*4882a593Smuzhiyun }
1594*4882a593Smuzhiyun
at91rm9200_udc_init(struct at91_udc * udc)1595*4882a593Smuzhiyun static int at91rm9200_udc_init(struct at91_udc *udc)
1596*4882a593Smuzhiyun {
1597*4882a593Smuzhiyun struct at91_ep *ep;
1598*4882a593Smuzhiyun int ret;
1599*4882a593Smuzhiyun int i;
1600*4882a593Smuzhiyun
1601*4882a593Smuzhiyun for (i = 0; i < NUM_ENDPOINTS; i++) {
1602*4882a593Smuzhiyun ep = &udc->ep[i];
1603*4882a593Smuzhiyun
1604*4882a593Smuzhiyun switch (i) {
1605*4882a593Smuzhiyun case 0:
1606*4882a593Smuzhiyun case 3:
1607*4882a593Smuzhiyun ep->maxpacket = 8;
1608*4882a593Smuzhiyun break;
1609*4882a593Smuzhiyun case 1 ... 2:
1610*4882a593Smuzhiyun ep->maxpacket = 64;
1611*4882a593Smuzhiyun break;
1612*4882a593Smuzhiyun case 4 ... 5:
1613*4882a593Smuzhiyun ep->maxpacket = 256;
1614*4882a593Smuzhiyun break;
1615*4882a593Smuzhiyun }
1616*4882a593Smuzhiyun }
1617*4882a593Smuzhiyun
1618*4882a593Smuzhiyun if (!gpio_is_valid(udc->board.pullup_pin)) {
1619*4882a593Smuzhiyun DBG("no D+ pullup?\n");
1620*4882a593Smuzhiyun return -ENODEV;
1621*4882a593Smuzhiyun }
1622*4882a593Smuzhiyun
1623*4882a593Smuzhiyun ret = devm_gpio_request(&udc->pdev->dev, udc->board.pullup_pin,
1624*4882a593Smuzhiyun "udc_pullup");
1625*4882a593Smuzhiyun if (ret) {
1626*4882a593Smuzhiyun DBG("D+ pullup is busy\n");
1627*4882a593Smuzhiyun return ret;
1628*4882a593Smuzhiyun }
1629*4882a593Smuzhiyun
1630*4882a593Smuzhiyun gpio_direction_output(udc->board.pullup_pin,
1631*4882a593Smuzhiyun udc->board.pullup_active_low);
1632*4882a593Smuzhiyun
1633*4882a593Smuzhiyun return 0;
1634*4882a593Smuzhiyun }
1635*4882a593Smuzhiyun
at91rm9200_udc_pullup(struct at91_udc * udc,int is_on)1636*4882a593Smuzhiyun static void at91rm9200_udc_pullup(struct at91_udc *udc, int is_on)
1637*4882a593Smuzhiyun {
1638*4882a593Smuzhiyun int active = !udc->board.pullup_active_low;
1639*4882a593Smuzhiyun
1640*4882a593Smuzhiyun if (is_on)
1641*4882a593Smuzhiyun gpio_set_value(udc->board.pullup_pin, active);
1642*4882a593Smuzhiyun else
1643*4882a593Smuzhiyun gpio_set_value(udc->board.pullup_pin, !active);
1644*4882a593Smuzhiyun }
1645*4882a593Smuzhiyun
1646*4882a593Smuzhiyun static const struct at91_udc_caps at91rm9200_udc_caps = {
1647*4882a593Smuzhiyun .init = at91rm9200_udc_init,
1648*4882a593Smuzhiyun .pullup = at91rm9200_udc_pullup,
1649*4882a593Smuzhiyun };
1650*4882a593Smuzhiyun
at91sam9260_udc_init(struct at91_udc * udc)1651*4882a593Smuzhiyun static int at91sam9260_udc_init(struct at91_udc *udc)
1652*4882a593Smuzhiyun {
1653*4882a593Smuzhiyun struct at91_ep *ep;
1654*4882a593Smuzhiyun int i;
1655*4882a593Smuzhiyun
1656*4882a593Smuzhiyun for (i = 0; i < NUM_ENDPOINTS; i++) {
1657*4882a593Smuzhiyun ep = &udc->ep[i];
1658*4882a593Smuzhiyun
1659*4882a593Smuzhiyun switch (i) {
1660*4882a593Smuzhiyun case 0 ... 3:
1661*4882a593Smuzhiyun ep->maxpacket = 64;
1662*4882a593Smuzhiyun break;
1663*4882a593Smuzhiyun case 4 ... 5:
1664*4882a593Smuzhiyun ep->maxpacket = 512;
1665*4882a593Smuzhiyun break;
1666*4882a593Smuzhiyun }
1667*4882a593Smuzhiyun }
1668*4882a593Smuzhiyun
1669*4882a593Smuzhiyun return 0;
1670*4882a593Smuzhiyun }
1671*4882a593Smuzhiyun
at91sam9260_udc_pullup(struct at91_udc * udc,int is_on)1672*4882a593Smuzhiyun static void at91sam9260_udc_pullup(struct at91_udc *udc, int is_on)
1673*4882a593Smuzhiyun {
1674*4882a593Smuzhiyun u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC);
1675*4882a593Smuzhiyun
1676*4882a593Smuzhiyun if (is_on)
1677*4882a593Smuzhiyun txvc |= AT91_UDP_TXVC_PUON;
1678*4882a593Smuzhiyun else
1679*4882a593Smuzhiyun txvc &= ~AT91_UDP_TXVC_PUON;
1680*4882a593Smuzhiyun
1681*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_TXVC, txvc);
1682*4882a593Smuzhiyun }
1683*4882a593Smuzhiyun
1684*4882a593Smuzhiyun static const struct at91_udc_caps at91sam9260_udc_caps = {
1685*4882a593Smuzhiyun .init = at91sam9260_udc_init,
1686*4882a593Smuzhiyun .pullup = at91sam9260_udc_pullup,
1687*4882a593Smuzhiyun };
1688*4882a593Smuzhiyun
at91sam9261_udc_init(struct at91_udc * udc)1689*4882a593Smuzhiyun static int at91sam9261_udc_init(struct at91_udc *udc)
1690*4882a593Smuzhiyun {
1691*4882a593Smuzhiyun struct at91_ep *ep;
1692*4882a593Smuzhiyun int i;
1693*4882a593Smuzhiyun
1694*4882a593Smuzhiyun for (i = 0; i < NUM_ENDPOINTS; i++) {
1695*4882a593Smuzhiyun ep = &udc->ep[i];
1696*4882a593Smuzhiyun
1697*4882a593Smuzhiyun switch (i) {
1698*4882a593Smuzhiyun case 0:
1699*4882a593Smuzhiyun ep->maxpacket = 8;
1700*4882a593Smuzhiyun break;
1701*4882a593Smuzhiyun case 1 ... 3:
1702*4882a593Smuzhiyun ep->maxpacket = 64;
1703*4882a593Smuzhiyun break;
1704*4882a593Smuzhiyun case 4 ... 5:
1705*4882a593Smuzhiyun ep->maxpacket = 256;
1706*4882a593Smuzhiyun break;
1707*4882a593Smuzhiyun }
1708*4882a593Smuzhiyun }
1709*4882a593Smuzhiyun
1710*4882a593Smuzhiyun udc->matrix = syscon_regmap_lookup_by_phandle(udc->pdev->dev.of_node,
1711*4882a593Smuzhiyun "atmel,matrix");
1712*4882a593Smuzhiyun return PTR_ERR_OR_ZERO(udc->matrix);
1713*4882a593Smuzhiyun }
1714*4882a593Smuzhiyun
at91sam9261_udc_pullup(struct at91_udc * udc,int is_on)1715*4882a593Smuzhiyun static void at91sam9261_udc_pullup(struct at91_udc *udc, int is_on)
1716*4882a593Smuzhiyun {
1717*4882a593Smuzhiyun u32 usbpucr = 0;
1718*4882a593Smuzhiyun
1719*4882a593Smuzhiyun if (is_on)
1720*4882a593Smuzhiyun usbpucr = AT91_MATRIX_USBPUCR_PUON;
1721*4882a593Smuzhiyun
1722*4882a593Smuzhiyun regmap_update_bits(udc->matrix, AT91SAM9261_MATRIX_USBPUCR,
1723*4882a593Smuzhiyun AT91_MATRIX_USBPUCR_PUON, usbpucr);
1724*4882a593Smuzhiyun }
1725*4882a593Smuzhiyun
1726*4882a593Smuzhiyun static const struct at91_udc_caps at91sam9261_udc_caps = {
1727*4882a593Smuzhiyun .init = at91sam9261_udc_init,
1728*4882a593Smuzhiyun .pullup = at91sam9261_udc_pullup,
1729*4882a593Smuzhiyun };
1730*4882a593Smuzhiyun
at91sam9263_udc_init(struct at91_udc * udc)1731*4882a593Smuzhiyun static int at91sam9263_udc_init(struct at91_udc *udc)
1732*4882a593Smuzhiyun {
1733*4882a593Smuzhiyun struct at91_ep *ep;
1734*4882a593Smuzhiyun int i;
1735*4882a593Smuzhiyun
1736*4882a593Smuzhiyun for (i = 0; i < NUM_ENDPOINTS; i++) {
1737*4882a593Smuzhiyun ep = &udc->ep[i];
1738*4882a593Smuzhiyun
1739*4882a593Smuzhiyun switch (i) {
1740*4882a593Smuzhiyun case 0:
1741*4882a593Smuzhiyun case 1:
1742*4882a593Smuzhiyun case 2:
1743*4882a593Smuzhiyun case 3:
1744*4882a593Smuzhiyun ep->maxpacket = 64;
1745*4882a593Smuzhiyun break;
1746*4882a593Smuzhiyun case 4:
1747*4882a593Smuzhiyun case 5:
1748*4882a593Smuzhiyun ep->maxpacket = 256;
1749*4882a593Smuzhiyun break;
1750*4882a593Smuzhiyun }
1751*4882a593Smuzhiyun }
1752*4882a593Smuzhiyun
1753*4882a593Smuzhiyun return 0;
1754*4882a593Smuzhiyun }
1755*4882a593Smuzhiyun
1756*4882a593Smuzhiyun static const struct at91_udc_caps at91sam9263_udc_caps = {
1757*4882a593Smuzhiyun .init = at91sam9263_udc_init,
1758*4882a593Smuzhiyun .pullup = at91sam9260_udc_pullup,
1759*4882a593Smuzhiyun };
1760*4882a593Smuzhiyun
1761*4882a593Smuzhiyun static const struct of_device_id at91_udc_dt_ids[] = {
1762*4882a593Smuzhiyun {
1763*4882a593Smuzhiyun .compatible = "atmel,at91rm9200-udc",
1764*4882a593Smuzhiyun .data = &at91rm9200_udc_caps,
1765*4882a593Smuzhiyun },
1766*4882a593Smuzhiyun {
1767*4882a593Smuzhiyun .compatible = "atmel,at91sam9260-udc",
1768*4882a593Smuzhiyun .data = &at91sam9260_udc_caps,
1769*4882a593Smuzhiyun },
1770*4882a593Smuzhiyun {
1771*4882a593Smuzhiyun .compatible = "atmel,at91sam9261-udc",
1772*4882a593Smuzhiyun .data = &at91sam9261_udc_caps,
1773*4882a593Smuzhiyun },
1774*4882a593Smuzhiyun {
1775*4882a593Smuzhiyun .compatible = "atmel,at91sam9263-udc",
1776*4882a593Smuzhiyun .data = &at91sam9263_udc_caps,
1777*4882a593Smuzhiyun },
1778*4882a593Smuzhiyun { /* sentinel */ }
1779*4882a593Smuzhiyun };
1780*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, at91_udc_dt_ids);
1781*4882a593Smuzhiyun
at91udc_of_init(struct at91_udc * udc,struct device_node * np)1782*4882a593Smuzhiyun static void at91udc_of_init(struct at91_udc *udc, struct device_node *np)
1783*4882a593Smuzhiyun {
1784*4882a593Smuzhiyun struct at91_udc_data *board = &udc->board;
1785*4882a593Smuzhiyun const struct of_device_id *match;
1786*4882a593Smuzhiyun enum of_gpio_flags flags;
1787*4882a593Smuzhiyun u32 val;
1788*4882a593Smuzhiyun
1789*4882a593Smuzhiyun if (of_property_read_u32(np, "atmel,vbus-polled", &val) == 0)
1790*4882a593Smuzhiyun board->vbus_polled = 1;
1791*4882a593Smuzhiyun
1792*4882a593Smuzhiyun board->vbus_pin = of_get_named_gpio_flags(np, "atmel,vbus-gpio", 0,
1793*4882a593Smuzhiyun &flags);
1794*4882a593Smuzhiyun board->vbus_active_low = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0;
1795*4882a593Smuzhiyun
1796*4882a593Smuzhiyun board->pullup_pin = of_get_named_gpio_flags(np, "atmel,pullup-gpio", 0,
1797*4882a593Smuzhiyun &flags);
1798*4882a593Smuzhiyun
1799*4882a593Smuzhiyun board->pullup_active_low = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0;
1800*4882a593Smuzhiyun
1801*4882a593Smuzhiyun match = of_match_node(at91_udc_dt_ids, np);
1802*4882a593Smuzhiyun if (match)
1803*4882a593Smuzhiyun udc->caps = match->data;
1804*4882a593Smuzhiyun }
1805*4882a593Smuzhiyun
at91udc_probe(struct platform_device * pdev)1806*4882a593Smuzhiyun static int at91udc_probe(struct platform_device *pdev)
1807*4882a593Smuzhiyun {
1808*4882a593Smuzhiyun struct device *dev = &pdev->dev;
1809*4882a593Smuzhiyun struct at91_udc *udc;
1810*4882a593Smuzhiyun int retval;
1811*4882a593Smuzhiyun struct at91_ep *ep;
1812*4882a593Smuzhiyun int i;
1813*4882a593Smuzhiyun
1814*4882a593Smuzhiyun udc = devm_kzalloc(dev, sizeof(*udc), GFP_KERNEL);
1815*4882a593Smuzhiyun if (!udc)
1816*4882a593Smuzhiyun return -ENOMEM;
1817*4882a593Smuzhiyun
1818*4882a593Smuzhiyun /* init software state */
1819*4882a593Smuzhiyun udc->gadget.dev.parent = dev;
1820*4882a593Smuzhiyun at91udc_of_init(udc, pdev->dev.of_node);
1821*4882a593Smuzhiyun udc->pdev = pdev;
1822*4882a593Smuzhiyun udc->enabled = 0;
1823*4882a593Smuzhiyun spin_lock_init(&udc->lock);
1824*4882a593Smuzhiyun
1825*4882a593Smuzhiyun udc->gadget.ops = &at91_udc_ops;
1826*4882a593Smuzhiyun udc->gadget.ep0 = &udc->ep[0].ep;
1827*4882a593Smuzhiyun udc->gadget.name = driver_name;
1828*4882a593Smuzhiyun udc->gadget.dev.init_name = "gadget";
1829*4882a593Smuzhiyun
1830*4882a593Smuzhiyun for (i = 0; i < NUM_ENDPOINTS; i++) {
1831*4882a593Smuzhiyun ep = &udc->ep[i];
1832*4882a593Smuzhiyun ep->ep.name = ep_info[i].name;
1833*4882a593Smuzhiyun ep->ep.caps = ep_info[i].caps;
1834*4882a593Smuzhiyun ep->ep.ops = &at91_ep_ops;
1835*4882a593Smuzhiyun ep->udc = udc;
1836*4882a593Smuzhiyun ep->int_mask = BIT(i);
1837*4882a593Smuzhiyun if (i != 0 && i != 3)
1838*4882a593Smuzhiyun ep->is_pingpong = 1;
1839*4882a593Smuzhiyun }
1840*4882a593Smuzhiyun
1841*4882a593Smuzhiyun udc->udp_baseaddr = devm_platform_ioremap_resource(pdev, 0);
1842*4882a593Smuzhiyun if (IS_ERR(udc->udp_baseaddr))
1843*4882a593Smuzhiyun return PTR_ERR(udc->udp_baseaddr);
1844*4882a593Smuzhiyun
1845*4882a593Smuzhiyun if (udc->caps && udc->caps->init) {
1846*4882a593Smuzhiyun retval = udc->caps->init(udc);
1847*4882a593Smuzhiyun if (retval)
1848*4882a593Smuzhiyun return retval;
1849*4882a593Smuzhiyun }
1850*4882a593Smuzhiyun
1851*4882a593Smuzhiyun udc_reinit(udc);
1852*4882a593Smuzhiyun
1853*4882a593Smuzhiyun /* get interface and function clocks */
1854*4882a593Smuzhiyun udc->iclk = devm_clk_get(dev, "pclk");
1855*4882a593Smuzhiyun if (IS_ERR(udc->iclk))
1856*4882a593Smuzhiyun return PTR_ERR(udc->iclk);
1857*4882a593Smuzhiyun
1858*4882a593Smuzhiyun udc->fclk = devm_clk_get(dev, "hclk");
1859*4882a593Smuzhiyun if (IS_ERR(udc->fclk))
1860*4882a593Smuzhiyun return PTR_ERR(udc->fclk);
1861*4882a593Smuzhiyun
1862*4882a593Smuzhiyun /* don't do anything until we have both gadget driver and VBUS */
1863*4882a593Smuzhiyun clk_set_rate(udc->fclk, 48000000);
1864*4882a593Smuzhiyun retval = clk_prepare(udc->fclk);
1865*4882a593Smuzhiyun if (retval)
1866*4882a593Smuzhiyun return retval;
1867*4882a593Smuzhiyun
1868*4882a593Smuzhiyun retval = clk_prepare_enable(udc->iclk);
1869*4882a593Smuzhiyun if (retval)
1870*4882a593Smuzhiyun goto err_unprepare_fclk;
1871*4882a593Smuzhiyun
1872*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS);
1873*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IDR, 0xffffffff);
1874*4882a593Smuzhiyun /* Clear all pending interrupts - UDP may be used by bootloader. */
1875*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_ICR, 0xffffffff);
1876*4882a593Smuzhiyun clk_disable(udc->iclk);
1877*4882a593Smuzhiyun
1878*4882a593Smuzhiyun /* request UDC and maybe VBUS irqs */
1879*4882a593Smuzhiyun udc->udp_irq = retval = platform_get_irq(pdev, 0);
1880*4882a593Smuzhiyun if (retval < 0)
1881*4882a593Smuzhiyun goto err_unprepare_iclk;
1882*4882a593Smuzhiyun retval = devm_request_irq(dev, udc->udp_irq, at91_udc_irq, 0,
1883*4882a593Smuzhiyun driver_name, udc);
1884*4882a593Smuzhiyun if (retval) {
1885*4882a593Smuzhiyun DBG("request irq %d failed\n", udc->udp_irq);
1886*4882a593Smuzhiyun goto err_unprepare_iclk;
1887*4882a593Smuzhiyun }
1888*4882a593Smuzhiyun
1889*4882a593Smuzhiyun if (gpio_is_valid(udc->board.vbus_pin)) {
1890*4882a593Smuzhiyun retval = devm_gpio_request(dev, udc->board.vbus_pin,
1891*4882a593Smuzhiyun "udc_vbus");
1892*4882a593Smuzhiyun if (retval) {
1893*4882a593Smuzhiyun DBG("request vbus pin failed\n");
1894*4882a593Smuzhiyun goto err_unprepare_iclk;
1895*4882a593Smuzhiyun }
1896*4882a593Smuzhiyun
1897*4882a593Smuzhiyun gpio_direction_input(udc->board.vbus_pin);
1898*4882a593Smuzhiyun
1899*4882a593Smuzhiyun /*
1900*4882a593Smuzhiyun * Get the initial state of VBUS - we cannot expect
1901*4882a593Smuzhiyun * a pending interrupt.
1902*4882a593Smuzhiyun */
1903*4882a593Smuzhiyun udc->vbus = gpio_get_value_cansleep(udc->board.vbus_pin) ^
1904*4882a593Smuzhiyun udc->board.vbus_active_low;
1905*4882a593Smuzhiyun
1906*4882a593Smuzhiyun if (udc->board.vbus_polled) {
1907*4882a593Smuzhiyun INIT_WORK(&udc->vbus_timer_work, at91_vbus_timer_work);
1908*4882a593Smuzhiyun timer_setup(&udc->vbus_timer, at91_vbus_timer, 0);
1909*4882a593Smuzhiyun mod_timer(&udc->vbus_timer,
1910*4882a593Smuzhiyun jiffies + VBUS_POLL_TIMEOUT);
1911*4882a593Smuzhiyun } else {
1912*4882a593Smuzhiyun retval = devm_request_irq(dev,
1913*4882a593Smuzhiyun gpio_to_irq(udc->board.vbus_pin),
1914*4882a593Smuzhiyun at91_vbus_irq, 0, driver_name, udc);
1915*4882a593Smuzhiyun if (retval) {
1916*4882a593Smuzhiyun DBG("request vbus irq %d failed\n",
1917*4882a593Smuzhiyun udc->board.vbus_pin);
1918*4882a593Smuzhiyun goto err_unprepare_iclk;
1919*4882a593Smuzhiyun }
1920*4882a593Smuzhiyun }
1921*4882a593Smuzhiyun } else {
1922*4882a593Smuzhiyun DBG("no VBUS detection, assuming always-on\n");
1923*4882a593Smuzhiyun udc->vbus = 1;
1924*4882a593Smuzhiyun }
1925*4882a593Smuzhiyun retval = usb_add_gadget_udc(dev, &udc->gadget);
1926*4882a593Smuzhiyun if (retval)
1927*4882a593Smuzhiyun goto err_unprepare_iclk;
1928*4882a593Smuzhiyun dev_set_drvdata(dev, udc);
1929*4882a593Smuzhiyun device_init_wakeup(dev, 1);
1930*4882a593Smuzhiyun create_debug_file(udc);
1931*4882a593Smuzhiyun
1932*4882a593Smuzhiyun INFO("%s version %s\n", driver_name, DRIVER_VERSION);
1933*4882a593Smuzhiyun return 0;
1934*4882a593Smuzhiyun
1935*4882a593Smuzhiyun err_unprepare_iclk:
1936*4882a593Smuzhiyun clk_unprepare(udc->iclk);
1937*4882a593Smuzhiyun err_unprepare_fclk:
1938*4882a593Smuzhiyun clk_unprepare(udc->fclk);
1939*4882a593Smuzhiyun
1940*4882a593Smuzhiyun DBG("%s probe failed, %d\n", driver_name, retval);
1941*4882a593Smuzhiyun
1942*4882a593Smuzhiyun return retval;
1943*4882a593Smuzhiyun }
1944*4882a593Smuzhiyun
at91udc_remove(struct platform_device * pdev)1945*4882a593Smuzhiyun static int at91udc_remove(struct platform_device *pdev)
1946*4882a593Smuzhiyun {
1947*4882a593Smuzhiyun struct at91_udc *udc = platform_get_drvdata(pdev);
1948*4882a593Smuzhiyun unsigned long flags;
1949*4882a593Smuzhiyun
1950*4882a593Smuzhiyun DBG("remove\n");
1951*4882a593Smuzhiyun
1952*4882a593Smuzhiyun usb_del_gadget_udc(&udc->gadget);
1953*4882a593Smuzhiyun if (udc->driver)
1954*4882a593Smuzhiyun return -EBUSY;
1955*4882a593Smuzhiyun
1956*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
1957*4882a593Smuzhiyun pullup(udc, 0);
1958*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
1959*4882a593Smuzhiyun
1960*4882a593Smuzhiyun device_init_wakeup(&pdev->dev, 0);
1961*4882a593Smuzhiyun remove_debug_file(udc);
1962*4882a593Smuzhiyun clk_unprepare(udc->fclk);
1963*4882a593Smuzhiyun clk_unprepare(udc->iclk);
1964*4882a593Smuzhiyun
1965*4882a593Smuzhiyun return 0;
1966*4882a593Smuzhiyun }
1967*4882a593Smuzhiyun
1968*4882a593Smuzhiyun #ifdef CONFIG_PM
at91udc_suspend(struct platform_device * pdev,pm_message_t mesg)1969*4882a593Smuzhiyun static int at91udc_suspend(struct platform_device *pdev, pm_message_t mesg)
1970*4882a593Smuzhiyun {
1971*4882a593Smuzhiyun struct at91_udc *udc = platform_get_drvdata(pdev);
1972*4882a593Smuzhiyun int wake = udc->driver && device_may_wakeup(&pdev->dev);
1973*4882a593Smuzhiyun unsigned long flags;
1974*4882a593Smuzhiyun
1975*4882a593Smuzhiyun /* Unless we can act normally to the host (letting it wake us up
1976*4882a593Smuzhiyun * whenever it has work for us) force disconnect. Wakeup requires
1977*4882a593Smuzhiyun * PLLB for USB events (signaling for reset, wakeup, or incoming
1978*4882a593Smuzhiyun * tokens) and VBUS irqs (on systems which support them).
1979*4882a593Smuzhiyun */
1980*4882a593Smuzhiyun if ((!udc->suspended && udc->addr)
1981*4882a593Smuzhiyun || !wake
1982*4882a593Smuzhiyun || at91_suspend_entering_slow_clock()) {
1983*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
1984*4882a593Smuzhiyun pullup(udc, 0);
1985*4882a593Smuzhiyun wake = 0;
1986*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
1987*4882a593Smuzhiyun } else
1988*4882a593Smuzhiyun enable_irq_wake(udc->udp_irq);
1989*4882a593Smuzhiyun
1990*4882a593Smuzhiyun udc->active_suspend = wake;
1991*4882a593Smuzhiyun if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled && wake)
1992*4882a593Smuzhiyun enable_irq_wake(udc->board.vbus_pin);
1993*4882a593Smuzhiyun return 0;
1994*4882a593Smuzhiyun }
1995*4882a593Smuzhiyun
at91udc_resume(struct platform_device * pdev)1996*4882a593Smuzhiyun static int at91udc_resume(struct platform_device *pdev)
1997*4882a593Smuzhiyun {
1998*4882a593Smuzhiyun struct at91_udc *udc = platform_get_drvdata(pdev);
1999*4882a593Smuzhiyun unsigned long flags;
2000*4882a593Smuzhiyun
2001*4882a593Smuzhiyun if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled &&
2002*4882a593Smuzhiyun udc->active_suspend)
2003*4882a593Smuzhiyun disable_irq_wake(udc->board.vbus_pin);
2004*4882a593Smuzhiyun
2005*4882a593Smuzhiyun /* maybe reconnect to host; if so, clocks on */
2006*4882a593Smuzhiyun if (udc->active_suspend)
2007*4882a593Smuzhiyun disable_irq_wake(udc->udp_irq);
2008*4882a593Smuzhiyun else {
2009*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
2010*4882a593Smuzhiyun pullup(udc, 1);
2011*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
2012*4882a593Smuzhiyun }
2013*4882a593Smuzhiyun return 0;
2014*4882a593Smuzhiyun }
2015*4882a593Smuzhiyun #else
2016*4882a593Smuzhiyun #define at91udc_suspend NULL
2017*4882a593Smuzhiyun #define at91udc_resume NULL
2018*4882a593Smuzhiyun #endif
2019*4882a593Smuzhiyun
2020*4882a593Smuzhiyun static struct platform_driver at91_udc_driver = {
2021*4882a593Smuzhiyun .remove = at91udc_remove,
2022*4882a593Smuzhiyun .shutdown = at91udc_shutdown,
2023*4882a593Smuzhiyun .suspend = at91udc_suspend,
2024*4882a593Smuzhiyun .resume = at91udc_resume,
2025*4882a593Smuzhiyun .driver = {
2026*4882a593Smuzhiyun .name = driver_name,
2027*4882a593Smuzhiyun .of_match_table = at91_udc_dt_ids,
2028*4882a593Smuzhiyun },
2029*4882a593Smuzhiyun };
2030*4882a593Smuzhiyun
2031*4882a593Smuzhiyun module_platform_driver_probe(at91_udc_driver, at91udc_probe);
2032*4882a593Smuzhiyun
2033*4882a593Smuzhiyun MODULE_DESCRIPTION("AT91 udc driver");
2034*4882a593Smuzhiyun MODULE_AUTHOR("Thomas Rathbone, David Brownell");
2035*4882a593Smuzhiyun MODULE_LICENSE("GPL");
2036*4882a593Smuzhiyun MODULE_ALIAS("platform:at91_udc");
2037