xref: /OK3568_Linux_fs/kernel/drivers/usb/dwc3/dwc3-of-simple.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * dwc3-of-simple.c - OF glue layer for simple integrations
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2015 Texas Instruments Incorporated - https://www.ti.com
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Author: Felipe Balbi <balbi@ti.com>
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This is a combination of the old dwc3-qcom.c by Ivan T. Ivanov
10*4882a593Smuzhiyun  * <iivanov@mm-sol.com> and the original patch adding support for Xilinx' SoC
11*4882a593Smuzhiyun  * by Subbaraya Sundeep Bhatta <subbaraya.sundeep.bhatta@xilinx.com>
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/kernel.h>
16*4882a593Smuzhiyun #include <linux/slab.h>
17*4882a593Smuzhiyun #include <linux/platform_device.h>
18*4882a593Smuzhiyun #include <linux/dma-mapping.h>
19*4882a593Smuzhiyun #include <linux/clk.h>
20*4882a593Smuzhiyun #include <linux/of.h>
21*4882a593Smuzhiyun #include <linux/of_platform.h>
22*4882a593Smuzhiyun #include <linux/pm_runtime.h>
23*4882a593Smuzhiyun #include <linux/reset.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun struct dwc3_of_simple {
26*4882a593Smuzhiyun 	struct device		*dev;
27*4882a593Smuzhiyun 	struct clk_bulk_data	*clks;
28*4882a593Smuzhiyun 	int			num_clocks;
29*4882a593Smuzhiyun 	struct reset_control	*resets;
30*4882a593Smuzhiyun 	bool			need_reset;
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun 
dwc3_of_simple_probe(struct platform_device * pdev)33*4882a593Smuzhiyun static int dwc3_of_simple_probe(struct platform_device *pdev)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun 	struct dwc3_of_simple	*simple;
36*4882a593Smuzhiyun 	struct device		*dev = &pdev->dev;
37*4882a593Smuzhiyun 	struct device_node	*np = dev->of_node;
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 	int			ret;
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 	simple = devm_kzalloc(dev, sizeof(*simple), GFP_KERNEL);
42*4882a593Smuzhiyun 	if (!simple)
43*4882a593Smuzhiyun 		return -ENOMEM;
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	platform_set_drvdata(pdev, simple);
46*4882a593Smuzhiyun 	simple->dev = dev;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	/*
49*4882a593Smuzhiyun 	 * Some controllers need to toggle the usb3-otg reset before trying to
50*4882a593Smuzhiyun 	 * initialize the PHY, otherwise the PHY times out.
51*4882a593Smuzhiyun 	 */
52*4882a593Smuzhiyun 	if (of_device_is_compatible(np, "rockchip,rk3399-dwc3"))
53*4882a593Smuzhiyun 		simple->need_reset = true;
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	simple->resets = of_reset_control_array_get(np, false, true,
56*4882a593Smuzhiyun 						    true);
57*4882a593Smuzhiyun 	if (IS_ERR(simple->resets)) {
58*4882a593Smuzhiyun 		ret = PTR_ERR(simple->resets);
59*4882a593Smuzhiyun 		dev_err(dev, "failed to get device resets, err=%d\n", ret);
60*4882a593Smuzhiyun 		return ret;
61*4882a593Smuzhiyun 	}
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	ret = reset_control_deassert(simple->resets);
64*4882a593Smuzhiyun 	if (ret)
65*4882a593Smuzhiyun 		goto err_resetc_put;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	ret = clk_bulk_get_all(simple->dev, &simple->clks);
68*4882a593Smuzhiyun 	if (ret < 0)
69*4882a593Smuzhiyun 		goto err_resetc_assert;
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	simple->num_clocks = ret;
72*4882a593Smuzhiyun 	ret = clk_bulk_prepare_enable(simple->num_clocks, simple->clks);
73*4882a593Smuzhiyun 	if (ret)
74*4882a593Smuzhiyun 		goto err_resetc_assert;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	ret = of_platform_populate(np, NULL, NULL, dev);
77*4882a593Smuzhiyun 	if (ret)
78*4882a593Smuzhiyun 		goto err_clk_put;
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	pm_runtime_set_active(dev);
81*4882a593Smuzhiyun 	pm_runtime_enable(dev);
82*4882a593Smuzhiyun 	pm_runtime_get_sync(dev);
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 	return 0;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun err_clk_put:
87*4882a593Smuzhiyun 	clk_bulk_disable_unprepare(simple->num_clocks, simple->clks);
88*4882a593Smuzhiyun 	clk_bulk_put_all(simple->num_clocks, simple->clks);
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun err_resetc_assert:
91*4882a593Smuzhiyun 	reset_control_assert(simple->resets);
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun err_resetc_put:
94*4882a593Smuzhiyun 	reset_control_put(simple->resets);
95*4882a593Smuzhiyun 	return ret;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun 
__dwc3_of_simple_teardown(struct dwc3_of_simple * simple)98*4882a593Smuzhiyun static void __dwc3_of_simple_teardown(struct dwc3_of_simple *simple)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun 	of_platform_depopulate(simple->dev);
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	clk_bulk_disable_unprepare(simple->num_clocks, simple->clks);
103*4882a593Smuzhiyun 	clk_bulk_put_all(simple->num_clocks, simple->clks);
104*4882a593Smuzhiyun 	simple->num_clocks = 0;
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	reset_control_assert(simple->resets);
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	reset_control_put(simple->resets);
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	pm_runtime_disable(simple->dev);
111*4882a593Smuzhiyun 	pm_runtime_put_noidle(simple->dev);
112*4882a593Smuzhiyun 	pm_runtime_set_suspended(simple->dev);
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun 
dwc3_of_simple_remove(struct platform_device * pdev)115*4882a593Smuzhiyun static int dwc3_of_simple_remove(struct platform_device *pdev)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun 	struct dwc3_of_simple	*simple = platform_get_drvdata(pdev);
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	__dwc3_of_simple_teardown(simple);
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	return 0;
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun 
dwc3_of_simple_shutdown(struct platform_device * pdev)124*4882a593Smuzhiyun static void dwc3_of_simple_shutdown(struct platform_device *pdev)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun 	struct dwc3_of_simple	*simple = platform_get_drvdata(pdev);
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	__dwc3_of_simple_teardown(simple);
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun 
dwc3_of_simple_runtime_suspend(struct device * dev)131*4882a593Smuzhiyun static int __maybe_unused dwc3_of_simple_runtime_suspend(struct device *dev)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun 	struct dwc3_of_simple	*simple = dev_get_drvdata(dev);
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	clk_bulk_disable(simple->num_clocks, simple->clks);
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	return 0;
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun 
dwc3_of_simple_runtime_resume(struct device * dev)140*4882a593Smuzhiyun static int __maybe_unused dwc3_of_simple_runtime_resume(struct device *dev)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun 	struct dwc3_of_simple	*simple = dev_get_drvdata(dev);
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	return clk_bulk_enable(simple->num_clocks, simple->clks);
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun 
dwc3_of_simple_suspend(struct device * dev)147*4882a593Smuzhiyun static int __maybe_unused dwc3_of_simple_suspend(struct device *dev)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun 	struct dwc3_of_simple *simple = dev_get_drvdata(dev);
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	if (simple->need_reset)
152*4882a593Smuzhiyun 		reset_control_assert(simple->resets);
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	return 0;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun 
dwc3_of_simple_resume(struct device * dev)157*4882a593Smuzhiyun static int __maybe_unused dwc3_of_simple_resume(struct device *dev)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun 	struct dwc3_of_simple *simple = dev_get_drvdata(dev);
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	if (simple->need_reset)
162*4882a593Smuzhiyun 		reset_control_deassert(simple->resets);
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	return 0;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun static const struct dev_pm_ops dwc3_of_simple_dev_pm_ops = {
168*4882a593Smuzhiyun 	SET_SYSTEM_SLEEP_PM_OPS(dwc3_of_simple_suspend, dwc3_of_simple_resume)
169*4882a593Smuzhiyun 	SET_RUNTIME_PM_OPS(dwc3_of_simple_runtime_suspend,
170*4882a593Smuzhiyun 			dwc3_of_simple_runtime_resume, NULL)
171*4882a593Smuzhiyun };
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun static const struct of_device_id of_dwc3_simple_match[] = {
174*4882a593Smuzhiyun 	{ .compatible = "rockchip,rk3399-dwc3" },
175*4882a593Smuzhiyun 	{ .compatible = "xlnx,zynqmp-dwc3" },
176*4882a593Smuzhiyun 	{ .compatible = "cavium,octeon-7130-usb-uctl" },
177*4882a593Smuzhiyun 	{ .compatible = "sprd,sc9860-dwc3" },
178*4882a593Smuzhiyun 	{ .compatible = "allwinner,sun50i-h6-dwc3" },
179*4882a593Smuzhiyun 	{ .compatible = "hisilicon,hi3670-dwc3" },
180*4882a593Smuzhiyun 	{ .compatible = "intel,keembay-dwc3" },
181*4882a593Smuzhiyun 	{ /* Sentinel */ }
182*4882a593Smuzhiyun };
183*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, of_dwc3_simple_match);
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun static struct platform_driver dwc3_of_simple_driver = {
186*4882a593Smuzhiyun 	.probe		= dwc3_of_simple_probe,
187*4882a593Smuzhiyun 	.remove		= dwc3_of_simple_remove,
188*4882a593Smuzhiyun 	.shutdown	= dwc3_of_simple_shutdown,
189*4882a593Smuzhiyun 	.driver		= {
190*4882a593Smuzhiyun 		.name	= "dwc3-of-simple",
191*4882a593Smuzhiyun 		.of_match_table = of_dwc3_simple_match,
192*4882a593Smuzhiyun 		.pm	= &dwc3_of_simple_dev_pm_ops,
193*4882a593Smuzhiyun 	},
194*4882a593Smuzhiyun };
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun module_platform_driver(dwc3_of_simple_driver);
197*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
198*4882a593Smuzhiyun MODULE_DESCRIPTION("DesignWare USB3 OF Simple Glue Layer");
199*4882a593Smuzhiyun MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
200