xref: /OK3568_Linux_fs/kernel/drivers/usb/dwc3/dwc3-imx8mp.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /**
3*4882a593Smuzhiyun  * dwc3-imx8mp.c - NXP imx8mp Specific Glue layer
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2020 NXP.
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/clk.h>
9*4882a593Smuzhiyun #include <linux/interrupt.h>
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/of_platform.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/pm_runtime.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #include "core.h"
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun /* USB wakeup registers */
20*4882a593Smuzhiyun #define USB_WAKEUP_CTRL			0x00
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun /* Global wakeup interrupt enable, also used to clear interrupt */
23*4882a593Smuzhiyun #define USB_WAKEUP_EN			BIT(31)
24*4882a593Smuzhiyun /* Wakeup from connect or disconnect, only for superspeed */
25*4882a593Smuzhiyun #define USB_WAKEUP_SS_CONN		BIT(5)
26*4882a593Smuzhiyun /* 0 select vbus_valid, 1 select sessvld */
27*4882a593Smuzhiyun #define USB_WAKEUP_VBUS_SRC_SESS_VAL	BIT(4)
28*4882a593Smuzhiyun /* Enable signal for wake up from u3 state */
29*4882a593Smuzhiyun #define USB_WAKEUP_U3_EN		BIT(3)
30*4882a593Smuzhiyun /* Enable signal for wake up from id change */
31*4882a593Smuzhiyun #define USB_WAKEUP_ID_EN		BIT(2)
32*4882a593Smuzhiyun /* Enable signal for wake up from vbus change */
33*4882a593Smuzhiyun #define	USB_WAKEUP_VBUS_EN		BIT(1)
34*4882a593Smuzhiyun /* Enable signal for wake up from dp/dm change */
35*4882a593Smuzhiyun #define USB_WAKEUP_DPDM_EN		BIT(0)
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #define USB_WAKEUP_EN_MASK		GENMASK(5, 0)
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun struct dwc3_imx8mp {
40*4882a593Smuzhiyun 	struct device			*dev;
41*4882a593Smuzhiyun 	struct platform_device		*dwc3;
42*4882a593Smuzhiyun 	void __iomem			*glue_base;
43*4882a593Smuzhiyun 	struct clk			*hsio_clk;
44*4882a593Smuzhiyun 	struct clk			*suspend_clk;
45*4882a593Smuzhiyun 	int				irq;
46*4882a593Smuzhiyun 	bool				pm_suspended;
47*4882a593Smuzhiyun 	bool				wakeup_pending;
48*4882a593Smuzhiyun };
49*4882a593Smuzhiyun 
dwc3_imx8mp_wakeup_enable(struct dwc3_imx8mp * dwc3_imx)50*4882a593Smuzhiyun static void dwc3_imx8mp_wakeup_enable(struct dwc3_imx8mp *dwc3_imx)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun 	struct dwc3	*dwc3 = platform_get_drvdata(dwc3_imx->dwc3);
53*4882a593Smuzhiyun 	u32		val;
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	if (!dwc3)
56*4882a593Smuzhiyun 		return;
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	val = readl(dwc3_imx->glue_base + USB_WAKEUP_CTRL);
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	if ((dwc3->current_dr_role == DWC3_GCTL_PRTCAP_HOST) && dwc3->xhci)
61*4882a593Smuzhiyun 		val |= USB_WAKEUP_EN | USB_WAKEUP_SS_CONN |
62*4882a593Smuzhiyun 		       USB_WAKEUP_U3_EN | USB_WAKEUP_DPDM_EN;
63*4882a593Smuzhiyun 	else if (dwc3->current_dr_role == DWC3_GCTL_PRTCAP_DEVICE)
64*4882a593Smuzhiyun 		val |= USB_WAKEUP_EN | USB_WAKEUP_VBUS_EN |
65*4882a593Smuzhiyun 		       USB_WAKEUP_VBUS_SRC_SESS_VAL;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	writel(val, dwc3_imx->glue_base + USB_WAKEUP_CTRL);
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun 
dwc3_imx8mp_wakeup_disable(struct dwc3_imx8mp * dwc3_imx)70*4882a593Smuzhiyun static void dwc3_imx8mp_wakeup_disable(struct dwc3_imx8mp *dwc3_imx)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun 	u32 val;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	val = readl(dwc3_imx->glue_base + USB_WAKEUP_CTRL);
75*4882a593Smuzhiyun 	val &= ~(USB_WAKEUP_EN | USB_WAKEUP_EN_MASK);
76*4882a593Smuzhiyun 	writel(val, dwc3_imx->glue_base + USB_WAKEUP_CTRL);
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun 
dwc3_imx8mp_interrupt(int irq,void * _dwc3_imx)79*4882a593Smuzhiyun static irqreturn_t dwc3_imx8mp_interrupt(int irq, void *_dwc3_imx)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun 	struct dwc3_imx8mp	*dwc3_imx = _dwc3_imx;
82*4882a593Smuzhiyun 	struct dwc3		*dwc = platform_get_drvdata(dwc3_imx->dwc3);
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 	if (!dwc3_imx->pm_suspended)
85*4882a593Smuzhiyun 		return IRQ_HANDLED;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	disable_irq_nosync(dwc3_imx->irq);
88*4882a593Smuzhiyun 	dwc3_imx->wakeup_pending = true;
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	if ((dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST) && dwc->xhci)
91*4882a593Smuzhiyun 		pm_runtime_resume(&dwc->xhci->dev);
92*4882a593Smuzhiyun 	else if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_DEVICE)
93*4882a593Smuzhiyun 		pm_runtime_get(dwc->dev);
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	return IRQ_HANDLED;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun 
dwc3_imx8mp_probe(struct platform_device * pdev)98*4882a593Smuzhiyun static int dwc3_imx8mp_probe(struct platform_device *pdev)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun 	struct device		*dev = &pdev->dev;
101*4882a593Smuzhiyun 	struct device_node	*dwc3_np, *node = dev->of_node;
102*4882a593Smuzhiyun 	struct dwc3_imx8mp	*dwc3_imx;
103*4882a593Smuzhiyun 	int			err, irq;
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	if (!node) {
106*4882a593Smuzhiyun 		dev_err(dev, "device node not found\n");
107*4882a593Smuzhiyun 		return -EINVAL;
108*4882a593Smuzhiyun 	}
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	dwc3_imx = devm_kzalloc(dev, sizeof(*dwc3_imx), GFP_KERNEL);
111*4882a593Smuzhiyun 	if (!dwc3_imx)
112*4882a593Smuzhiyun 		return -ENOMEM;
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	platform_set_drvdata(pdev, dwc3_imx);
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	dwc3_imx->dev = dev;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	dwc3_imx->glue_base = devm_platform_ioremap_resource(pdev, 0);
119*4882a593Smuzhiyun 	if (IS_ERR(dwc3_imx->glue_base))
120*4882a593Smuzhiyun 		return PTR_ERR(dwc3_imx->glue_base);
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	dwc3_imx->hsio_clk = devm_clk_get(dev, "hsio");
123*4882a593Smuzhiyun 	if (IS_ERR(dwc3_imx->hsio_clk)) {
124*4882a593Smuzhiyun 		err = PTR_ERR(dwc3_imx->hsio_clk);
125*4882a593Smuzhiyun 		dev_err(dev, "Failed to get hsio clk, err=%d\n", err);
126*4882a593Smuzhiyun 		return err;
127*4882a593Smuzhiyun 	}
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	err = clk_prepare_enable(dwc3_imx->hsio_clk);
130*4882a593Smuzhiyun 	if (err) {
131*4882a593Smuzhiyun 		dev_err(dev, "Failed to enable hsio clk, err=%d\n", err);
132*4882a593Smuzhiyun 		return err;
133*4882a593Smuzhiyun 	}
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	dwc3_imx->suspend_clk = devm_clk_get(dev, "suspend");
136*4882a593Smuzhiyun 	if (IS_ERR(dwc3_imx->suspend_clk)) {
137*4882a593Smuzhiyun 		err = PTR_ERR(dwc3_imx->suspend_clk);
138*4882a593Smuzhiyun 		dev_err(dev, "Failed to get suspend clk, err=%d\n", err);
139*4882a593Smuzhiyun 		goto disable_hsio_clk;
140*4882a593Smuzhiyun 	}
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	err = clk_prepare_enable(dwc3_imx->suspend_clk);
143*4882a593Smuzhiyun 	if (err) {
144*4882a593Smuzhiyun 		dev_err(dev, "Failed to enable suspend clk, err=%d\n", err);
145*4882a593Smuzhiyun 		goto disable_hsio_clk;
146*4882a593Smuzhiyun 	}
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	irq = platform_get_irq(pdev, 0);
149*4882a593Smuzhiyun 	if (irq < 0) {
150*4882a593Smuzhiyun 		err = irq;
151*4882a593Smuzhiyun 		goto disable_clks;
152*4882a593Smuzhiyun 	}
153*4882a593Smuzhiyun 	dwc3_imx->irq = irq;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	err = devm_request_threaded_irq(dev, irq, NULL, dwc3_imx8mp_interrupt,
156*4882a593Smuzhiyun 					IRQF_ONESHOT, dev_name(dev), dwc3_imx);
157*4882a593Smuzhiyun 	if (err) {
158*4882a593Smuzhiyun 		dev_err(dev, "failed to request IRQ #%d --> %d\n", irq, err);
159*4882a593Smuzhiyun 		goto disable_clks;
160*4882a593Smuzhiyun 	}
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	pm_runtime_set_active(dev);
163*4882a593Smuzhiyun 	pm_runtime_enable(dev);
164*4882a593Smuzhiyun 	err = pm_runtime_get_sync(dev);
165*4882a593Smuzhiyun 	if (err < 0)
166*4882a593Smuzhiyun 		goto disable_rpm;
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	dwc3_np = of_get_child_by_name(node, "dwc3");
169*4882a593Smuzhiyun 	if (!dwc3_np) {
170*4882a593Smuzhiyun 		err = -ENODEV;
171*4882a593Smuzhiyun 		dev_err(dev, "failed to find dwc3 core child\n");
172*4882a593Smuzhiyun 		goto disable_rpm;
173*4882a593Smuzhiyun 	}
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	err = of_platform_populate(node, NULL, NULL, dev);
176*4882a593Smuzhiyun 	if (err) {
177*4882a593Smuzhiyun 		dev_err(&pdev->dev, "failed to create dwc3 core\n");
178*4882a593Smuzhiyun 		goto err_node_put;
179*4882a593Smuzhiyun 	}
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	dwc3_imx->dwc3 = of_find_device_by_node(dwc3_np);
182*4882a593Smuzhiyun 	if (!dwc3_imx->dwc3) {
183*4882a593Smuzhiyun 		dev_err(dev, "failed to get dwc3 platform device\n");
184*4882a593Smuzhiyun 		err = -ENODEV;
185*4882a593Smuzhiyun 		goto depopulate;
186*4882a593Smuzhiyun 	}
187*4882a593Smuzhiyun 	of_node_put(dwc3_np);
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	device_set_wakeup_capable(dev, true);
190*4882a593Smuzhiyun 	pm_runtime_put(dev);
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	return 0;
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun depopulate:
195*4882a593Smuzhiyun 	of_platform_depopulate(dev);
196*4882a593Smuzhiyun err_node_put:
197*4882a593Smuzhiyun 	of_node_put(dwc3_np);
198*4882a593Smuzhiyun disable_rpm:
199*4882a593Smuzhiyun 	pm_runtime_disable(dev);
200*4882a593Smuzhiyun 	pm_runtime_put_noidle(dev);
201*4882a593Smuzhiyun disable_clks:
202*4882a593Smuzhiyun 	clk_disable_unprepare(dwc3_imx->suspend_clk);
203*4882a593Smuzhiyun disable_hsio_clk:
204*4882a593Smuzhiyun 	clk_disable_unprepare(dwc3_imx->hsio_clk);
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	return err;
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun 
dwc3_imx8mp_remove(struct platform_device * pdev)209*4882a593Smuzhiyun static int dwc3_imx8mp_remove(struct platform_device *pdev)
210*4882a593Smuzhiyun {
211*4882a593Smuzhiyun 	struct dwc3_imx8mp *dwc3_imx = platform_get_drvdata(pdev);
212*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	pm_runtime_get_sync(dev);
215*4882a593Smuzhiyun 	of_platform_depopulate(dev);
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	clk_disable_unprepare(dwc3_imx->suspend_clk);
218*4882a593Smuzhiyun 	clk_disable_unprepare(dwc3_imx->hsio_clk);
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	pm_runtime_disable(dev);
221*4882a593Smuzhiyun 	pm_runtime_put_noidle(dev);
222*4882a593Smuzhiyun 	platform_set_drvdata(pdev, NULL);
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	return 0;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun 
dwc3_imx8mp_suspend(struct dwc3_imx8mp * dwc3_imx,pm_message_t msg)227*4882a593Smuzhiyun static int __maybe_unused dwc3_imx8mp_suspend(struct dwc3_imx8mp *dwc3_imx,
228*4882a593Smuzhiyun 					      pm_message_t msg)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun 	if (dwc3_imx->pm_suspended)
231*4882a593Smuzhiyun 		return 0;
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 	/* Wakeup enable */
234*4882a593Smuzhiyun 	if (PMSG_IS_AUTO(msg) || device_may_wakeup(dwc3_imx->dev))
235*4882a593Smuzhiyun 		dwc3_imx8mp_wakeup_enable(dwc3_imx);
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	dwc3_imx->pm_suspended = true;
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	return 0;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun 
dwc3_imx8mp_resume(struct dwc3_imx8mp * dwc3_imx,pm_message_t msg)242*4882a593Smuzhiyun static int __maybe_unused dwc3_imx8mp_resume(struct dwc3_imx8mp *dwc3_imx,
243*4882a593Smuzhiyun 					     pm_message_t msg)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun 	struct dwc3	*dwc = platform_get_drvdata(dwc3_imx->dwc3);
246*4882a593Smuzhiyun 	int ret = 0;
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	if (!dwc3_imx->pm_suspended)
249*4882a593Smuzhiyun 		return 0;
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	/* Wakeup disable */
252*4882a593Smuzhiyun 	dwc3_imx8mp_wakeup_disable(dwc3_imx);
253*4882a593Smuzhiyun 	dwc3_imx->pm_suspended = false;
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	if (dwc3_imx->wakeup_pending) {
256*4882a593Smuzhiyun 		dwc3_imx->wakeup_pending = false;
257*4882a593Smuzhiyun 		if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_DEVICE) {
258*4882a593Smuzhiyun 			pm_runtime_mark_last_busy(dwc->dev);
259*4882a593Smuzhiyun 			pm_runtime_put_autosuspend(dwc->dev);
260*4882a593Smuzhiyun 		} else {
261*4882a593Smuzhiyun 			/*
262*4882a593Smuzhiyun 			 * Add wait for xhci switch from suspend
263*4882a593Smuzhiyun 			 * clock to normal clock to detect connection.
264*4882a593Smuzhiyun 			 */
265*4882a593Smuzhiyun 			usleep_range(9000, 10000);
266*4882a593Smuzhiyun 		}
267*4882a593Smuzhiyun 		enable_irq(dwc3_imx->irq);
268*4882a593Smuzhiyun 	}
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 	return ret;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun 
dwc3_imx8mp_pm_suspend(struct device * dev)273*4882a593Smuzhiyun static int __maybe_unused dwc3_imx8mp_pm_suspend(struct device *dev)
274*4882a593Smuzhiyun {
275*4882a593Smuzhiyun 	struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
276*4882a593Smuzhiyun 	int ret;
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	ret = dwc3_imx8mp_suspend(dwc3_imx, PMSG_SUSPEND);
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	if (device_may_wakeup(dwc3_imx->dev))
281*4882a593Smuzhiyun 		enable_irq_wake(dwc3_imx->irq);
282*4882a593Smuzhiyun 	else
283*4882a593Smuzhiyun 		clk_disable_unprepare(dwc3_imx->suspend_clk);
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	clk_disable_unprepare(dwc3_imx->hsio_clk);
286*4882a593Smuzhiyun 	dev_dbg(dev, "dwc3 imx8mp pm suspend.\n");
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 	return ret;
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun 
dwc3_imx8mp_pm_resume(struct device * dev)291*4882a593Smuzhiyun static int __maybe_unused dwc3_imx8mp_pm_resume(struct device *dev)
292*4882a593Smuzhiyun {
293*4882a593Smuzhiyun 	struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
294*4882a593Smuzhiyun 	int ret;
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	if (device_may_wakeup(dwc3_imx->dev)) {
297*4882a593Smuzhiyun 		disable_irq_wake(dwc3_imx->irq);
298*4882a593Smuzhiyun 	} else {
299*4882a593Smuzhiyun 		ret = clk_prepare_enable(dwc3_imx->suspend_clk);
300*4882a593Smuzhiyun 		if (ret)
301*4882a593Smuzhiyun 			return ret;
302*4882a593Smuzhiyun 	}
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 	ret = clk_prepare_enable(dwc3_imx->hsio_clk);
305*4882a593Smuzhiyun 	if (ret)
306*4882a593Smuzhiyun 		return ret;
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun 	ret = dwc3_imx8mp_resume(dwc3_imx, PMSG_RESUME);
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	pm_runtime_disable(dev);
311*4882a593Smuzhiyun 	pm_runtime_set_active(dev);
312*4882a593Smuzhiyun 	pm_runtime_enable(dev);
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	dev_dbg(dev, "dwc3 imx8mp pm resume.\n");
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	return ret;
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun 
dwc3_imx8mp_runtime_suspend(struct device * dev)319*4882a593Smuzhiyun static int __maybe_unused dwc3_imx8mp_runtime_suspend(struct device *dev)
320*4882a593Smuzhiyun {
321*4882a593Smuzhiyun 	struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	dev_dbg(dev, "dwc3 imx8mp runtime suspend.\n");
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	return dwc3_imx8mp_suspend(dwc3_imx, PMSG_AUTO_SUSPEND);
326*4882a593Smuzhiyun }
327*4882a593Smuzhiyun 
dwc3_imx8mp_runtime_resume(struct device * dev)328*4882a593Smuzhiyun static int __maybe_unused dwc3_imx8mp_runtime_resume(struct device *dev)
329*4882a593Smuzhiyun {
330*4882a593Smuzhiyun 	struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	dev_dbg(dev, "dwc3 imx8mp runtime resume.\n");
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	return dwc3_imx8mp_resume(dwc3_imx, PMSG_AUTO_RESUME);
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun static const struct dev_pm_ops dwc3_imx8mp_dev_pm_ops = {
338*4882a593Smuzhiyun 	SET_SYSTEM_SLEEP_PM_OPS(dwc3_imx8mp_pm_suspend, dwc3_imx8mp_pm_resume)
339*4882a593Smuzhiyun 	SET_RUNTIME_PM_OPS(dwc3_imx8mp_runtime_suspend,
340*4882a593Smuzhiyun 			   dwc3_imx8mp_runtime_resume, NULL)
341*4882a593Smuzhiyun };
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun static const struct of_device_id dwc3_imx8mp_of_match[] = {
344*4882a593Smuzhiyun 	{ .compatible = "fsl,imx8mp-dwc3", },
345*4882a593Smuzhiyun 	{},
346*4882a593Smuzhiyun };
347*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, dwc3_imx8mp_of_match);
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun static struct platform_driver dwc3_imx8mp_driver = {
350*4882a593Smuzhiyun 	.probe		= dwc3_imx8mp_probe,
351*4882a593Smuzhiyun 	.remove		= dwc3_imx8mp_remove,
352*4882a593Smuzhiyun 	.driver		= {
353*4882a593Smuzhiyun 		.name	= "imx8mp-dwc3",
354*4882a593Smuzhiyun 		.pm	= &dwc3_imx8mp_dev_pm_ops,
355*4882a593Smuzhiyun 		.of_match_table	= dwc3_imx8mp_of_match,
356*4882a593Smuzhiyun 	},
357*4882a593Smuzhiyun };
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun module_platform_driver(dwc3_imx8mp_driver);
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun MODULE_ALIAS("platform:imx8mp-dwc3");
362*4882a593Smuzhiyun MODULE_AUTHOR("jun.li@nxp.com");
363*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
364*4882a593Smuzhiyun MODULE_DESCRIPTION("DesignWare USB3 imx8mp Glue Layer");
365