1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun 3*4882a593Smuzhiyunconfig USB_DWC3 4*4882a593Smuzhiyun tristate "DesignWare USB3 DRD Core Support" 5*4882a593Smuzhiyun depends on (USB || USB_GADGET) && HAS_DMA 6*4882a593Smuzhiyun select USB_XHCI_PLATFORM if USB_XHCI_HCD 7*4882a593Smuzhiyun select USB_ROLE_SWITCH if USB_DWC3_DUAL_ROLE 8*4882a593Smuzhiyun help 9*4882a593Smuzhiyun Say Y or M here if your system has a Dual Role SuperSpeed 10*4882a593Smuzhiyun USB controller based on the DesignWare USB3 IP Core. 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun If you choose to build this driver is a dynamically linked 13*4882a593Smuzhiyun module, the module will be called dwc3.ko. 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunif USB_DWC3 16*4882a593Smuzhiyun 17*4882a593Smuzhiyunconfig USB_DWC3_ULPI 18*4882a593Smuzhiyun bool "Register ULPI PHY Interface" 19*4882a593Smuzhiyun depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_DWC3 20*4882a593Smuzhiyun help 21*4882a593Smuzhiyun Select this if you have ULPI type PHY attached to your DWC3 22*4882a593Smuzhiyun controller. 23*4882a593Smuzhiyun 24*4882a593Smuzhiyunchoice 25*4882a593Smuzhiyun bool "DWC3 Mode Selection" 26*4882a593Smuzhiyun default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET) 27*4882a593Smuzhiyun default USB_DWC3_HOST if (USB && !USB_GADGET) 28*4882a593Smuzhiyun default USB_DWC3_GADGET if (!USB && USB_GADGET) 29*4882a593Smuzhiyun 30*4882a593Smuzhiyunconfig USB_DWC3_HOST 31*4882a593Smuzhiyun bool "Host only mode" 32*4882a593Smuzhiyun depends on USB=y || USB=USB_DWC3 33*4882a593Smuzhiyun help 34*4882a593Smuzhiyun Select this when you want to use DWC3 in host mode only, 35*4882a593Smuzhiyun thereby the gadget feature will be regressed. 36*4882a593Smuzhiyun 37*4882a593Smuzhiyunconfig USB_DWC3_GADGET 38*4882a593Smuzhiyun bool "Gadget only mode" 39*4882a593Smuzhiyun depends on USB_GADGET=y || USB_GADGET=USB_DWC3 40*4882a593Smuzhiyun help 41*4882a593Smuzhiyun Select this when you want to use DWC3 in gadget mode only, 42*4882a593Smuzhiyun thereby the host feature will be regressed. 43*4882a593Smuzhiyun 44*4882a593Smuzhiyunconfig USB_DWC3_DUAL_ROLE 45*4882a593Smuzhiyun bool "Dual Role mode" 46*4882a593Smuzhiyun depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3)) 47*4882a593Smuzhiyun depends on (EXTCON=y || EXTCON=USB_DWC3) 48*4882a593Smuzhiyun help 49*4882a593Smuzhiyun This is the default mode of working of DWC3 controller where 50*4882a593Smuzhiyun both host and gadget features are enabled. 51*4882a593Smuzhiyun 52*4882a593Smuzhiyunendchoice 53*4882a593Smuzhiyun 54*4882a593Smuzhiyuncomment "Platform Glue Driver Support" 55*4882a593Smuzhiyun 56*4882a593Smuzhiyunconfig USB_DWC3_OMAP 57*4882a593Smuzhiyun tristate "Texas Instruments OMAP5 and similar Platforms" 58*4882a593Smuzhiyun depends on ARCH_OMAP2PLUS || COMPILE_TEST 59*4882a593Smuzhiyun depends on EXTCON || !EXTCON 60*4882a593Smuzhiyun depends on OF 61*4882a593Smuzhiyun default USB_DWC3 62*4882a593Smuzhiyun help 63*4882a593Smuzhiyun Some platforms from Texas Instruments like OMAP5, DRA7xxx and 64*4882a593Smuzhiyun AM437x use this IP for USB2/3 functionality. 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun Say 'Y' or 'M' here if you have one such device 67*4882a593Smuzhiyun 68*4882a593Smuzhiyunconfig USB_DWC3_EXYNOS 69*4882a593Smuzhiyun tristate "Samsung Exynos Platform" 70*4882a593Smuzhiyun depends on (ARCH_EXYNOS || COMPILE_TEST) && OF 71*4882a593Smuzhiyun default USB_DWC3 72*4882a593Smuzhiyun help 73*4882a593Smuzhiyun Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside, 74*4882a593Smuzhiyun say 'Y' or 'M' if you have one such device. 75*4882a593Smuzhiyun 76*4882a593Smuzhiyunconfig USB_DWC3_PCI 77*4882a593Smuzhiyun tristate "PCIe-based Platforms" 78*4882a593Smuzhiyun depends on USB_PCI && ACPI 79*4882a593Smuzhiyun default USB_DWC3 80*4882a593Smuzhiyun help 81*4882a593Smuzhiyun If you're using the DesignWare Core IP with a PCIe (but not HAPS 82*4882a593Smuzhiyun platform), please say 'Y' or 'M' here. 83*4882a593Smuzhiyun 84*4882a593Smuzhiyunconfig USB_DWC3_HAPS 85*4882a593Smuzhiyun tristate "Synopsys PCIe-based HAPS Platforms" 86*4882a593Smuzhiyun depends on USB_PCI 87*4882a593Smuzhiyun default USB_DWC3 88*4882a593Smuzhiyun help 89*4882a593Smuzhiyun If you're using the DesignWare Core IP with a Synopsys PCIe HAPS 90*4882a593Smuzhiyun platform, please say 'Y' or 'M' here. 91*4882a593Smuzhiyun 92*4882a593Smuzhiyunconfig USB_DWC3_KEYSTONE 93*4882a593Smuzhiyun tristate "Texas Instruments Keystone2/AM654 Platforms" 94*4882a593Smuzhiyun depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST 95*4882a593Smuzhiyun default USB_DWC3 96*4882a593Smuzhiyun help 97*4882a593Smuzhiyun Support of USB2/3 functionality in TI Keystone2 and AM654 platforms. 98*4882a593Smuzhiyun Say 'Y' or 'M' here if you have one such device 99*4882a593Smuzhiyun 100*4882a593Smuzhiyunconfig USB_DWC3_MESON_G12A 101*4882a593Smuzhiyun tristate "Amlogic Meson G12A Platforms" 102*4882a593Smuzhiyun depends on OF && COMMON_CLK 103*4882a593Smuzhiyun depends on ARCH_MESON || COMPILE_TEST 104*4882a593Smuzhiyun default USB_DWC3 105*4882a593Smuzhiyun select USB_ROLE_SWITCH 106*4882a593Smuzhiyun select REGMAP_MMIO 107*4882a593Smuzhiyun help 108*4882a593Smuzhiyun Support USB2/3 functionality in Amlogic G12A platforms. 109*4882a593Smuzhiyun Say 'Y' or 'M' if you have one such device. 110*4882a593Smuzhiyun 111*4882a593Smuzhiyunconfig USB_DWC3_OF_SIMPLE 112*4882a593Smuzhiyun tristate "Generic OF Simple Glue Layer" 113*4882a593Smuzhiyun depends on OF && COMMON_CLK 114*4882a593Smuzhiyun default USB_DWC3 115*4882a593Smuzhiyun help 116*4882a593Smuzhiyun Support USB2/3 functionality in simple SoC integrations. 117*4882a593Smuzhiyun Currently supports Xilinx and Qualcomm DWC USB3 IP. 118*4882a593Smuzhiyun Say 'Y' or 'M' if you have one such device. 119*4882a593Smuzhiyun 120*4882a593Smuzhiyunconfig USB_DWC3_ST 121*4882a593Smuzhiyun tristate "STMicroelectronics Platforms" 122*4882a593Smuzhiyun depends on (ARCH_STI || COMPILE_TEST) && OF 123*4882a593Smuzhiyun default USB_DWC3 124*4882a593Smuzhiyun help 125*4882a593Smuzhiyun STMicroelectronics SoCs with one DesignWare Core USB3 IP 126*4882a593Smuzhiyun inside (i.e. STiH407). 127*4882a593Smuzhiyun Say 'Y' or 'M' if you have one such device. 128*4882a593Smuzhiyun 129*4882a593Smuzhiyunconfig USB_DWC3_QCOM 130*4882a593Smuzhiyun tristate "Qualcomm Platform" 131*4882a593Smuzhiyun depends on ARCH_QCOM || COMPILE_TEST 132*4882a593Smuzhiyun depends on EXTCON || !EXTCON 133*4882a593Smuzhiyun depends on (OF || ACPI) 134*4882a593Smuzhiyun default USB_DWC3 135*4882a593Smuzhiyun help 136*4882a593Smuzhiyun Some Qualcomm SoCs use DesignWare Core IP for USB2/3 137*4882a593Smuzhiyun functionality. 138*4882a593Smuzhiyun This driver also handles Qscratch wrapper which is needed 139*4882a593Smuzhiyun for peripheral mode support. 140*4882a593Smuzhiyun Say 'Y' or 'M' if you have one such device. 141*4882a593Smuzhiyun 142*4882a593Smuzhiyunconfig USB_DWC3_IMX8MP 143*4882a593Smuzhiyun tristate "NXP iMX8MP Platform" 144*4882a593Smuzhiyun depends on OF && COMMON_CLK 145*4882a593Smuzhiyun depends on (ARCH_MXC && ARM64) || COMPILE_TEST 146*4882a593Smuzhiyun default USB_DWC3 147*4882a593Smuzhiyun help 148*4882a593Smuzhiyun NXP iMX8M Plus SoC use DesignWare Core IP for USB2/3 149*4882a593Smuzhiyun functionality. 150*4882a593Smuzhiyun Say 'Y' or 'M' if you have one such device. 151*4882a593Smuzhiyun 152*4882a593Smuzhiyunendif 153