xref: /OK3568_Linux_fs/kernel/drivers/usb/c67x00/c67x00-drv.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * c67x00-drv.c: Cypress C67X00 USB Common infrastructure
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2006-2008 Barco N.V.
6*4882a593Smuzhiyun  *    Derived from the Cypress cy7c67200/300 ezusb linux driver and
7*4882a593Smuzhiyun  *    based on multiple host controller drivers inside the linux kernel.
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun /*
11*4882a593Smuzhiyun  * This file implements the common infrastructure for using the c67x00.
12*4882a593Smuzhiyun  * It is both the link between the platform configuration and subdrivers and
13*4882a593Smuzhiyun  * the link between the common hardware parts and the subdrivers (e.g.
14*4882a593Smuzhiyun  * interrupt handling).
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  * The c67x00 has 2 SIE's (serial interface engine) which can be configured
17*4882a593Smuzhiyun  * to be host, device or OTG (with some limitations, E.G. only SIE1 can be OTG).
18*4882a593Smuzhiyun  *
19*4882a593Smuzhiyun  * Depending on the platform configuration, the SIE's are created and
20*4882a593Smuzhiyun  * the corresponding subdriver is initialized (c67x00_probe_sie).
21*4882a593Smuzhiyun  */
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #include <linux/device.h>
24*4882a593Smuzhiyun #include <linux/io.h>
25*4882a593Smuzhiyun #include <linux/list.h>
26*4882a593Smuzhiyun #include <linux/slab.h>
27*4882a593Smuzhiyun #include <linux/module.h>
28*4882a593Smuzhiyun #include <linux/usb.h>
29*4882a593Smuzhiyun #include <linux/usb/c67x00.h>
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #include "c67x00.h"
32*4882a593Smuzhiyun #include "c67x00-hcd.h"
33*4882a593Smuzhiyun 
c67x00_probe_sie(struct c67x00_sie * sie,struct c67x00_device * dev,int sie_num)34*4882a593Smuzhiyun static void c67x00_probe_sie(struct c67x00_sie *sie,
35*4882a593Smuzhiyun 			     struct c67x00_device *dev, int sie_num)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun 	spin_lock_init(&sie->lock);
38*4882a593Smuzhiyun 	sie->dev = dev;
39*4882a593Smuzhiyun 	sie->sie_num = sie_num;
40*4882a593Smuzhiyun 	sie->mode = c67x00_sie_config(dev->pdata->sie_config, sie_num);
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	switch (sie->mode) {
43*4882a593Smuzhiyun 	case C67X00_SIE_HOST:
44*4882a593Smuzhiyun 		c67x00_hcd_probe(sie);
45*4882a593Smuzhiyun 		break;
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 	case C67X00_SIE_UNUSED:
48*4882a593Smuzhiyun 		dev_info(sie_dev(sie),
49*4882a593Smuzhiyun 			 "Not using SIE %d as requested\n", sie->sie_num);
50*4882a593Smuzhiyun 		break;
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	default:
53*4882a593Smuzhiyun 		dev_err(sie_dev(sie),
54*4882a593Smuzhiyun 			"Unsupported configuration: 0x%x for SIE %d\n",
55*4882a593Smuzhiyun 			sie->mode, sie->sie_num);
56*4882a593Smuzhiyun 		break;
57*4882a593Smuzhiyun 	}
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun 
c67x00_remove_sie(struct c67x00_sie * sie)60*4882a593Smuzhiyun static void c67x00_remove_sie(struct c67x00_sie *sie)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun 	switch (sie->mode) {
63*4882a593Smuzhiyun 	case C67X00_SIE_HOST:
64*4882a593Smuzhiyun 		c67x00_hcd_remove(sie);
65*4882a593Smuzhiyun 		break;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	default:
68*4882a593Smuzhiyun 		break;
69*4882a593Smuzhiyun 	}
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun 
c67x00_irq(int irq,void * __dev)72*4882a593Smuzhiyun static irqreturn_t c67x00_irq(int irq, void *__dev)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun 	struct c67x00_device *c67x00 = __dev;
75*4882a593Smuzhiyun 	struct c67x00_sie *sie;
76*4882a593Smuzhiyun 	u16 msg, int_status;
77*4882a593Smuzhiyun 	int i, count = 8;
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	int_status = c67x00_ll_hpi_status(c67x00);
80*4882a593Smuzhiyun 	if (!int_status)
81*4882a593Smuzhiyun 		return IRQ_NONE;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	while (int_status != 0 && (count-- >= 0)) {
84*4882a593Smuzhiyun 		c67x00_ll_irq(c67x00, int_status);
85*4882a593Smuzhiyun 		for (i = 0; i < C67X00_SIES; i++) {
86*4882a593Smuzhiyun 			sie = &c67x00->sie[i];
87*4882a593Smuzhiyun 			msg = 0;
88*4882a593Smuzhiyun 			if (int_status & SIEMSG_FLG(i))
89*4882a593Smuzhiyun 				msg = c67x00_ll_fetch_siemsg(c67x00, i);
90*4882a593Smuzhiyun 			if (sie->irq)
91*4882a593Smuzhiyun 				sie->irq(sie, int_status, msg);
92*4882a593Smuzhiyun 		}
93*4882a593Smuzhiyun 		int_status = c67x00_ll_hpi_status(c67x00);
94*4882a593Smuzhiyun 	}
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	if (int_status)
97*4882a593Smuzhiyun 		dev_warn(&c67x00->pdev->dev, "Not all interrupts handled! "
98*4882a593Smuzhiyun 			 "status = 0x%04x\n", int_status);
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	return IRQ_HANDLED;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun /* ------------------------------------------------------------------------- */
104*4882a593Smuzhiyun 
c67x00_drv_probe(struct platform_device * pdev)105*4882a593Smuzhiyun static int c67x00_drv_probe(struct platform_device *pdev)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun 	struct c67x00_device *c67x00;
108*4882a593Smuzhiyun 	struct c67x00_platform_data *pdata;
109*4882a593Smuzhiyun 	struct resource *res, *res2;
110*4882a593Smuzhiyun 	int ret, i;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
113*4882a593Smuzhiyun 	if (!res)
114*4882a593Smuzhiyun 		return -ENODEV;
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
117*4882a593Smuzhiyun 	if (!res2)
118*4882a593Smuzhiyun 		return -ENODEV;
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	pdata = dev_get_platdata(&pdev->dev);
121*4882a593Smuzhiyun 	if (!pdata)
122*4882a593Smuzhiyun 		return -ENODEV;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	c67x00 = kzalloc(sizeof(*c67x00), GFP_KERNEL);
125*4882a593Smuzhiyun 	if (!c67x00)
126*4882a593Smuzhiyun 		return -ENOMEM;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	if (!request_mem_region(res->start, resource_size(res),
129*4882a593Smuzhiyun 				pdev->name)) {
130*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Memory region busy\n");
131*4882a593Smuzhiyun 		ret = -EBUSY;
132*4882a593Smuzhiyun 		goto request_mem_failed;
133*4882a593Smuzhiyun 	}
134*4882a593Smuzhiyun 	c67x00->hpi.base = ioremap(res->start, resource_size(res));
135*4882a593Smuzhiyun 	if (!c67x00->hpi.base) {
136*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Unable to map HPI registers\n");
137*4882a593Smuzhiyun 		ret = -EIO;
138*4882a593Smuzhiyun 		goto map_failed;
139*4882a593Smuzhiyun 	}
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	spin_lock_init(&c67x00->hpi.lock);
142*4882a593Smuzhiyun 	c67x00->hpi.regstep = pdata->hpi_regstep;
143*4882a593Smuzhiyun 	c67x00->pdata = dev_get_platdata(&pdev->dev);
144*4882a593Smuzhiyun 	c67x00->pdev = pdev;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	c67x00_ll_init(c67x00);
147*4882a593Smuzhiyun 	c67x00_ll_hpi_reg_init(c67x00);
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	ret = request_irq(res2->start, c67x00_irq, 0, pdev->name, c67x00);
150*4882a593Smuzhiyun 	if (ret) {
151*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Cannot claim IRQ\n");
152*4882a593Smuzhiyun 		goto request_irq_failed;
153*4882a593Smuzhiyun 	}
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	ret = c67x00_ll_reset(c67x00);
156*4882a593Smuzhiyun 	if (ret) {
157*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Device reset failed\n");
158*4882a593Smuzhiyun 		goto reset_failed;
159*4882a593Smuzhiyun 	}
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	for (i = 0; i < C67X00_SIES; i++)
162*4882a593Smuzhiyun 		c67x00_probe_sie(&c67x00->sie[i], c67x00, i);
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	platform_set_drvdata(pdev, c67x00);
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	return 0;
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun  reset_failed:
169*4882a593Smuzhiyun 	free_irq(res2->start, c67x00);
170*4882a593Smuzhiyun  request_irq_failed:
171*4882a593Smuzhiyun 	iounmap(c67x00->hpi.base);
172*4882a593Smuzhiyun  map_failed:
173*4882a593Smuzhiyun 	release_mem_region(res->start, resource_size(res));
174*4882a593Smuzhiyun  request_mem_failed:
175*4882a593Smuzhiyun 	kfree(c67x00);
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	return ret;
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun 
c67x00_drv_remove(struct platform_device * pdev)180*4882a593Smuzhiyun static int c67x00_drv_remove(struct platform_device *pdev)
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun 	struct c67x00_device *c67x00 = platform_get_drvdata(pdev);
183*4882a593Smuzhiyun 	struct resource *res;
184*4882a593Smuzhiyun 	int i;
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	for (i = 0; i < C67X00_SIES; i++)
187*4882a593Smuzhiyun 		c67x00_remove_sie(&c67x00->sie[i]);
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	c67x00_ll_release(c67x00);
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
192*4882a593Smuzhiyun 	if (res)
193*4882a593Smuzhiyun 		free_irq(res->start, c67x00);
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	iounmap(c67x00->hpi.base);
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
198*4882a593Smuzhiyun 	if (res)
199*4882a593Smuzhiyun 		release_mem_region(res->start, resource_size(res));
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	kfree(c67x00);
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	return 0;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun static struct platform_driver c67x00_driver = {
207*4882a593Smuzhiyun 	.probe	= c67x00_drv_probe,
208*4882a593Smuzhiyun 	.remove	= c67x00_drv_remove,
209*4882a593Smuzhiyun 	.driver	= {
210*4882a593Smuzhiyun 		.name = "c67x00",
211*4882a593Smuzhiyun 	},
212*4882a593Smuzhiyun };
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun module_platform_driver(c67x00_driver);
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun MODULE_AUTHOR("Peter Korsgaard, Jan Veldeman, Grant Likely");
217*4882a593Smuzhiyun MODULE_DESCRIPTION("Cypress C67X00 USB Controller Driver");
218*4882a593Smuzhiyun MODULE_LICENSE("GPL");
219*4882a593Smuzhiyun MODULE_ALIAS("platform:c67x00");
220