1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /* sercos3: UIO driver for the Automata Sercos III PCI card
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun Copyright (C) 2008 Linutronix GmbH
5*4882a593Smuzhiyun Author: John Ogness <john.ogness@linutronix.de>
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun This is a straight-forward UIO driver, where interrupts are disabled
8*4882a593Smuzhiyun by the interrupt handler and re-enabled via a write to the UIO device
9*4882a593Smuzhiyun by the userspace-part.
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun The only part that may seem odd is the use of a logical OR when
12*4882a593Smuzhiyun storing and restoring enabled interrupts. This is done because the
13*4882a593Smuzhiyun userspace-part could directly modify the Interrupt Enable Register
14*4882a593Smuzhiyun at any time. To reduce possible conflicts, the kernel driver uses
15*4882a593Smuzhiyun a logical OR to make more controlled changes (rather than blindly
16*4882a593Smuzhiyun overwriting previous values).
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun Race conditions exist if the userspace-part directly modifies the
19*4882a593Smuzhiyun Interrupt Enable Register while in operation. The consequences are
20*4882a593Smuzhiyun that certain interrupts would fail to be enabled or disabled. For
21*4882a593Smuzhiyun this reason, the userspace-part should only directly modify the
22*4882a593Smuzhiyun Interrupt Enable Register at the beginning (to get things going).
23*4882a593Smuzhiyun The userspace-part can safely disable interrupts at any time using
24*4882a593Smuzhiyun a write to the UIO device.
25*4882a593Smuzhiyun */
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #include <linux/device.h>
28*4882a593Smuzhiyun #include <linux/module.h>
29*4882a593Smuzhiyun #include <linux/pci.h>
30*4882a593Smuzhiyun #include <linux/uio_driver.h>
31*4882a593Smuzhiyun #include <linux/io.h>
32*4882a593Smuzhiyun #include <linux/slab.h>
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun /* ID's for SERCOS III PCI card (PLX 9030) */
35*4882a593Smuzhiyun #define SERCOS_SUB_VENDOR_ID 0x1971
36*4882a593Smuzhiyun #define SERCOS_SUB_SYSID_3530 0x3530
37*4882a593Smuzhiyun #define SERCOS_SUB_SYSID_3535 0x3535
38*4882a593Smuzhiyun #define SERCOS_SUB_SYSID_3780 0x3780
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /* Interrupt Enable Register */
41*4882a593Smuzhiyun #define IER0_OFFSET 0x08
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun /* Interrupt Status Register */
44*4882a593Smuzhiyun #define ISR0_OFFSET 0x18
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun struct sercos3_priv {
47*4882a593Smuzhiyun u32 ier0_cache;
48*4882a593Smuzhiyun spinlock_t ier0_cache_lock;
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /* this function assumes ier0_cache_lock is locked! */
sercos3_disable_interrupts(struct uio_info * info,struct sercos3_priv * priv)52*4882a593Smuzhiyun static void sercos3_disable_interrupts(struct uio_info *info,
53*4882a593Smuzhiyun struct sercos3_priv *priv)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun void __iomem *ier0 = info->mem[3].internal_addr + IER0_OFFSET;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun /* add enabled interrupts to cache */
58*4882a593Smuzhiyun priv->ier0_cache |= ioread32(ier0);
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun /* disable interrupts */
61*4882a593Smuzhiyun iowrite32(0, ier0);
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun /* this function assumes ier0_cache_lock is locked! */
sercos3_enable_interrupts(struct uio_info * info,struct sercos3_priv * priv)65*4882a593Smuzhiyun static void sercos3_enable_interrupts(struct uio_info *info,
66*4882a593Smuzhiyun struct sercos3_priv *priv)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun void __iomem *ier0 = info->mem[3].internal_addr + IER0_OFFSET;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun /* restore previously enabled interrupts */
71*4882a593Smuzhiyun iowrite32(ioread32(ier0) | priv->ier0_cache, ier0);
72*4882a593Smuzhiyun priv->ier0_cache = 0;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
sercos3_handler(int irq,struct uio_info * info)75*4882a593Smuzhiyun static irqreturn_t sercos3_handler(int irq, struct uio_info *info)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun struct sercos3_priv *priv = info->priv;
78*4882a593Smuzhiyun void __iomem *isr0 = info->mem[3].internal_addr + ISR0_OFFSET;
79*4882a593Smuzhiyun void __iomem *ier0 = info->mem[3].internal_addr + IER0_OFFSET;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun if (!(ioread32(isr0) & ioread32(ier0)))
82*4882a593Smuzhiyun return IRQ_NONE;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun spin_lock(&priv->ier0_cache_lock);
85*4882a593Smuzhiyun sercos3_disable_interrupts(info, priv);
86*4882a593Smuzhiyun spin_unlock(&priv->ier0_cache_lock);
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun return IRQ_HANDLED;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
sercos3_irqcontrol(struct uio_info * info,s32 irq_on)91*4882a593Smuzhiyun static int sercos3_irqcontrol(struct uio_info *info, s32 irq_on)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun struct sercos3_priv *priv = info->priv;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun spin_lock_irq(&priv->ier0_cache_lock);
96*4882a593Smuzhiyun if (irq_on)
97*4882a593Smuzhiyun sercos3_enable_interrupts(info, priv);
98*4882a593Smuzhiyun else
99*4882a593Smuzhiyun sercos3_disable_interrupts(info, priv);
100*4882a593Smuzhiyun spin_unlock_irq(&priv->ier0_cache_lock);
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun return 0;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
sercos3_setup_iomem(struct pci_dev * dev,struct uio_info * info,int n,int pci_bar)105*4882a593Smuzhiyun static int sercos3_setup_iomem(struct pci_dev *dev, struct uio_info *info,
106*4882a593Smuzhiyun int n, int pci_bar)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun info->mem[n].addr = pci_resource_start(dev, pci_bar);
109*4882a593Smuzhiyun if (!info->mem[n].addr)
110*4882a593Smuzhiyun return -1;
111*4882a593Smuzhiyun info->mem[n].internal_addr = ioremap(pci_resource_start(dev, pci_bar),
112*4882a593Smuzhiyun pci_resource_len(dev, pci_bar));
113*4882a593Smuzhiyun if (!info->mem[n].internal_addr)
114*4882a593Smuzhiyun return -1;
115*4882a593Smuzhiyun info->mem[n].size = pci_resource_len(dev, pci_bar);
116*4882a593Smuzhiyun info->mem[n].memtype = UIO_MEM_PHYS;
117*4882a593Smuzhiyun return 0;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun
sercos3_pci_probe(struct pci_dev * dev,const struct pci_device_id * id)120*4882a593Smuzhiyun static int sercos3_pci_probe(struct pci_dev *dev,
121*4882a593Smuzhiyun const struct pci_device_id *id)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun struct uio_info *info;
124*4882a593Smuzhiyun struct sercos3_priv *priv;
125*4882a593Smuzhiyun int i;
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun info = kzalloc(sizeof(struct uio_info), GFP_KERNEL);
128*4882a593Smuzhiyun if (!info)
129*4882a593Smuzhiyun return -ENOMEM;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun priv = kzalloc(sizeof(struct sercos3_priv), GFP_KERNEL);
132*4882a593Smuzhiyun if (!priv)
133*4882a593Smuzhiyun goto out_free;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun if (pci_enable_device(dev))
136*4882a593Smuzhiyun goto out_free_priv;
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun if (pci_request_regions(dev, "sercos3"))
139*4882a593Smuzhiyun goto out_disable;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun /* we only need PCI BAR's 0, 2, 3, 4, 5 */
142*4882a593Smuzhiyun if (sercos3_setup_iomem(dev, info, 0, 0))
143*4882a593Smuzhiyun goto out_unmap;
144*4882a593Smuzhiyun if (sercos3_setup_iomem(dev, info, 1, 2))
145*4882a593Smuzhiyun goto out_unmap;
146*4882a593Smuzhiyun if (sercos3_setup_iomem(dev, info, 2, 3))
147*4882a593Smuzhiyun goto out_unmap;
148*4882a593Smuzhiyun if (sercos3_setup_iomem(dev, info, 3, 4))
149*4882a593Smuzhiyun goto out_unmap;
150*4882a593Smuzhiyun if (sercos3_setup_iomem(dev, info, 4, 5))
151*4882a593Smuzhiyun goto out_unmap;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun spin_lock_init(&priv->ier0_cache_lock);
154*4882a593Smuzhiyun info->priv = priv;
155*4882a593Smuzhiyun info->name = "Sercos_III_PCI";
156*4882a593Smuzhiyun info->version = "0.0.1";
157*4882a593Smuzhiyun info->irq = dev->irq;
158*4882a593Smuzhiyun info->irq_flags = IRQF_SHARED;
159*4882a593Smuzhiyun info->handler = sercos3_handler;
160*4882a593Smuzhiyun info->irqcontrol = sercos3_irqcontrol;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun pci_set_drvdata(dev, info);
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun if (uio_register_device(&dev->dev, info))
165*4882a593Smuzhiyun goto out_unmap;
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun return 0;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun out_unmap:
170*4882a593Smuzhiyun for (i = 0; i < 5; i++) {
171*4882a593Smuzhiyun if (info->mem[i].internal_addr)
172*4882a593Smuzhiyun iounmap(info->mem[i].internal_addr);
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun pci_release_regions(dev);
175*4882a593Smuzhiyun out_disable:
176*4882a593Smuzhiyun pci_disable_device(dev);
177*4882a593Smuzhiyun out_free_priv:
178*4882a593Smuzhiyun kfree(priv);
179*4882a593Smuzhiyun out_free:
180*4882a593Smuzhiyun kfree(info);
181*4882a593Smuzhiyun return -ENODEV;
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun
sercos3_pci_remove(struct pci_dev * dev)184*4882a593Smuzhiyun static void sercos3_pci_remove(struct pci_dev *dev)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun struct uio_info *info = pci_get_drvdata(dev);
187*4882a593Smuzhiyun int i;
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun uio_unregister_device(info);
190*4882a593Smuzhiyun pci_release_regions(dev);
191*4882a593Smuzhiyun pci_disable_device(dev);
192*4882a593Smuzhiyun for (i = 0; i < 5; i++) {
193*4882a593Smuzhiyun if (info->mem[i].internal_addr)
194*4882a593Smuzhiyun iounmap(info->mem[i].internal_addr);
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun kfree(info->priv);
197*4882a593Smuzhiyun kfree(info);
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun static struct pci_device_id sercos3_pci_ids[] = {
201*4882a593Smuzhiyun {
202*4882a593Smuzhiyun .vendor = PCI_VENDOR_ID_PLX,
203*4882a593Smuzhiyun .device = PCI_DEVICE_ID_PLX_9030,
204*4882a593Smuzhiyun .subvendor = SERCOS_SUB_VENDOR_ID,
205*4882a593Smuzhiyun .subdevice = SERCOS_SUB_SYSID_3530,
206*4882a593Smuzhiyun },
207*4882a593Smuzhiyun {
208*4882a593Smuzhiyun .vendor = PCI_VENDOR_ID_PLX,
209*4882a593Smuzhiyun .device = PCI_DEVICE_ID_PLX_9030,
210*4882a593Smuzhiyun .subvendor = SERCOS_SUB_VENDOR_ID,
211*4882a593Smuzhiyun .subdevice = SERCOS_SUB_SYSID_3535,
212*4882a593Smuzhiyun },
213*4882a593Smuzhiyun {
214*4882a593Smuzhiyun .vendor = PCI_VENDOR_ID_PLX,
215*4882a593Smuzhiyun .device = PCI_DEVICE_ID_PLX_9030,
216*4882a593Smuzhiyun .subvendor = SERCOS_SUB_VENDOR_ID,
217*4882a593Smuzhiyun .subdevice = SERCOS_SUB_SYSID_3780,
218*4882a593Smuzhiyun },
219*4882a593Smuzhiyun { 0, }
220*4882a593Smuzhiyun };
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun static struct pci_driver sercos3_pci_driver = {
223*4882a593Smuzhiyun .name = "sercos3",
224*4882a593Smuzhiyun .id_table = sercos3_pci_ids,
225*4882a593Smuzhiyun .probe = sercos3_pci_probe,
226*4882a593Smuzhiyun .remove = sercos3_pci_remove,
227*4882a593Smuzhiyun };
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun module_pci_driver(sercos3_pci_driver);
230*4882a593Smuzhiyun MODULE_DESCRIPTION("UIO driver for the Automata Sercos III PCI card");
231*4882a593Smuzhiyun MODULE_AUTHOR("John Ogness <john.ogness@linutronix.de>");
232*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
233