1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * drivers/uio/uio_dmem_genirq.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Userspace I/O platform driver with generic IRQ handling code.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (C) 2012 Damian Hobson-Garcia
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Based on uio_pdrv_genirq.c by Magnus Damm
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun #include <linux/uio_driver.h>
14*4882a593Smuzhiyun #include <linux/spinlock.h>
15*4882a593Smuzhiyun #include <linux/bitops.h>
16*4882a593Smuzhiyun #include <linux/module.h>
17*4882a593Smuzhiyun #include <linux/interrupt.h>
18*4882a593Smuzhiyun #include <linux/platform_data/uio_dmem_genirq.h>
19*4882a593Smuzhiyun #include <linux/stringify.h>
20*4882a593Smuzhiyun #include <linux/pm_runtime.h>
21*4882a593Smuzhiyun #include <linux/dma-mapping.h>
22*4882a593Smuzhiyun #include <linux/slab.h>
23*4882a593Smuzhiyun #include <linux/irq.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include <linux/of.h>
26*4882a593Smuzhiyun #include <linux/of_platform.h>
27*4882a593Smuzhiyun #include <linux/of_address.h>
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #define DRIVER_NAME "uio_dmem_genirq"
30*4882a593Smuzhiyun #define DMEM_MAP_ERROR (~0)
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun struct uio_dmem_genirq_platdata {
33*4882a593Smuzhiyun struct uio_info *uioinfo;
34*4882a593Smuzhiyun spinlock_t lock;
35*4882a593Smuzhiyun unsigned long flags;
36*4882a593Smuzhiyun struct platform_device *pdev;
37*4882a593Smuzhiyun unsigned int dmem_region_start;
38*4882a593Smuzhiyun unsigned int num_dmem_regions;
39*4882a593Smuzhiyun void *dmem_region_vaddr[MAX_UIO_MAPS];
40*4882a593Smuzhiyun struct mutex alloc_lock;
41*4882a593Smuzhiyun unsigned int refcnt;
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun
uio_dmem_genirq_open(struct uio_info * info,struct inode * inode)44*4882a593Smuzhiyun static int uio_dmem_genirq_open(struct uio_info *info, struct inode *inode)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun struct uio_dmem_genirq_platdata *priv = info->priv;
47*4882a593Smuzhiyun struct uio_mem *uiomem;
48*4882a593Smuzhiyun int dmem_region = priv->dmem_region_start;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun uiomem = &priv->uioinfo->mem[priv->dmem_region_start];
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun mutex_lock(&priv->alloc_lock);
53*4882a593Smuzhiyun while (!priv->refcnt && uiomem < &priv->uioinfo->mem[MAX_UIO_MAPS]) {
54*4882a593Smuzhiyun void *addr;
55*4882a593Smuzhiyun if (!uiomem->size)
56*4882a593Smuzhiyun break;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun addr = dma_alloc_coherent(&priv->pdev->dev, uiomem->size,
59*4882a593Smuzhiyun (dma_addr_t *)&uiomem->addr, GFP_KERNEL);
60*4882a593Smuzhiyun if (!addr) {
61*4882a593Smuzhiyun uiomem->addr = DMEM_MAP_ERROR;
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun priv->dmem_region_vaddr[dmem_region++] = addr;
64*4882a593Smuzhiyun ++uiomem;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun priv->refcnt++;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun mutex_unlock(&priv->alloc_lock);
69*4882a593Smuzhiyun /* Wait until the Runtime PM code has woken up the device */
70*4882a593Smuzhiyun pm_runtime_get_sync(&priv->pdev->dev);
71*4882a593Smuzhiyun return 0;
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
uio_dmem_genirq_release(struct uio_info * info,struct inode * inode)74*4882a593Smuzhiyun static int uio_dmem_genirq_release(struct uio_info *info, struct inode *inode)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun struct uio_dmem_genirq_platdata *priv = info->priv;
77*4882a593Smuzhiyun struct uio_mem *uiomem;
78*4882a593Smuzhiyun int dmem_region = priv->dmem_region_start;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun /* Tell the Runtime PM code that the device has become idle */
81*4882a593Smuzhiyun pm_runtime_put_sync(&priv->pdev->dev);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun uiomem = &priv->uioinfo->mem[priv->dmem_region_start];
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun mutex_lock(&priv->alloc_lock);
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun priv->refcnt--;
88*4882a593Smuzhiyun while (!priv->refcnt && uiomem < &priv->uioinfo->mem[MAX_UIO_MAPS]) {
89*4882a593Smuzhiyun if (!uiomem->size)
90*4882a593Smuzhiyun break;
91*4882a593Smuzhiyun if (priv->dmem_region_vaddr[dmem_region]) {
92*4882a593Smuzhiyun dma_free_coherent(&priv->pdev->dev, uiomem->size,
93*4882a593Smuzhiyun priv->dmem_region_vaddr[dmem_region],
94*4882a593Smuzhiyun uiomem->addr);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun uiomem->addr = DMEM_MAP_ERROR;
97*4882a593Smuzhiyun ++dmem_region;
98*4882a593Smuzhiyun ++uiomem;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun mutex_unlock(&priv->alloc_lock);
102*4882a593Smuzhiyun return 0;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
uio_dmem_genirq_handler(int irq,struct uio_info * dev_info)105*4882a593Smuzhiyun static irqreturn_t uio_dmem_genirq_handler(int irq, struct uio_info *dev_info)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun struct uio_dmem_genirq_platdata *priv = dev_info->priv;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun /* Just disable the interrupt in the interrupt controller, and
110*4882a593Smuzhiyun * remember the state so we can allow user space to enable it later.
111*4882a593Smuzhiyun */
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun if (!test_and_set_bit(0, &priv->flags))
114*4882a593Smuzhiyun disable_irq_nosync(irq);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun return IRQ_HANDLED;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
uio_dmem_genirq_irqcontrol(struct uio_info * dev_info,s32 irq_on)119*4882a593Smuzhiyun static int uio_dmem_genirq_irqcontrol(struct uio_info *dev_info, s32 irq_on)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun struct uio_dmem_genirq_platdata *priv = dev_info->priv;
122*4882a593Smuzhiyun unsigned long flags;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun /* Allow user space to enable and disable the interrupt
125*4882a593Smuzhiyun * in the interrupt controller, but keep track of the
126*4882a593Smuzhiyun * state to prevent per-irq depth damage.
127*4882a593Smuzhiyun *
128*4882a593Smuzhiyun * Serialize this operation to support multiple tasks.
129*4882a593Smuzhiyun */
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun spin_lock_irqsave(&priv->lock, flags);
132*4882a593Smuzhiyun if (irq_on) {
133*4882a593Smuzhiyun if (test_and_clear_bit(0, &priv->flags))
134*4882a593Smuzhiyun enable_irq(dev_info->irq);
135*4882a593Smuzhiyun spin_unlock_irqrestore(&priv->lock, flags);
136*4882a593Smuzhiyun } else {
137*4882a593Smuzhiyun if (!test_and_set_bit(0, &priv->flags)) {
138*4882a593Smuzhiyun spin_unlock_irqrestore(&priv->lock, flags);
139*4882a593Smuzhiyun disable_irq(dev_info->irq);
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun return 0;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun
uio_dmem_genirq_probe(struct platform_device * pdev)146*4882a593Smuzhiyun static int uio_dmem_genirq_probe(struct platform_device *pdev)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun struct uio_dmem_genirq_pdata *pdata = dev_get_platdata(&pdev->dev);
149*4882a593Smuzhiyun struct uio_info *uioinfo = &pdata->uioinfo;
150*4882a593Smuzhiyun struct uio_dmem_genirq_platdata *priv;
151*4882a593Smuzhiyun struct uio_mem *uiomem;
152*4882a593Smuzhiyun int ret = -EINVAL;
153*4882a593Smuzhiyun int i;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun if (pdev->dev.of_node) {
156*4882a593Smuzhiyun /* alloc uioinfo for one device */
157*4882a593Smuzhiyun uioinfo = kzalloc(sizeof(*uioinfo), GFP_KERNEL);
158*4882a593Smuzhiyun if (!uioinfo) {
159*4882a593Smuzhiyun ret = -ENOMEM;
160*4882a593Smuzhiyun dev_err(&pdev->dev, "unable to kmalloc\n");
161*4882a593Smuzhiyun goto bad2;
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun uioinfo->name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%pOFn",
164*4882a593Smuzhiyun pdev->dev.of_node);
165*4882a593Smuzhiyun uioinfo->version = "devicetree";
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun if (!uioinfo || !uioinfo->name || !uioinfo->version) {
169*4882a593Smuzhiyun dev_err(&pdev->dev, "missing platform_data\n");
170*4882a593Smuzhiyun goto bad0;
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun if (uioinfo->handler || uioinfo->irqcontrol ||
174*4882a593Smuzhiyun uioinfo->irq_flags & IRQF_SHARED) {
175*4882a593Smuzhiyun dev_err(&pdev->dev, "interrupt configuration error\n");
176*4882a593Smuzhiyun goto bad0;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun priv = kzalloc(sizeof(*priv), GFP_KERNEL);
180*4882a593Smuzhiyun if (!priv) {
181*4882a593Smuzhiyun ret = -ENOMEM;
182*4882a593Smuzhiyun dev_err(&pdev->dev, "unable to kmalloc\n");
183*4882a593Smuzhiyun goto bad0;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun priv->uioinfo = uioinfo;
189*4882a593Smuzhiyun spin_lock_init(&priv->lock);
190*4882a593Smuzhiyun priv->flags = 0; /* interrupt is enabled to begin with */
191*4882a593Smuzhiyun priv->pdev = pdev;
192*4882a593Smuzhiyun mutex_init(&priv->alloc_lock);
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun if (!uioinfo->irq) {
195*4882a593Smuzhiyun /* Multiple IRQs are not supported */
196*4882a593Smuzhiyun ret = platform_get_irq(pdev, 0);
197*4882a593Smuzhiyun if (ret == -ENXIO && pdev->dev.of_node)
198*4882a593Smuzhiyun ret = UIO_IRQ_NONE;
199*4882a593Smuzhiyun else if (ret < 0)
200*4882a593Smuzhiyun goto bad1;
201*4882a593Smuzhiyun uioinfo->irq = ret;
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun if (uioinfo->irq) {
205*4882a593Smuzhiyun struct irq_data *irq_data = irq_get_irq_data(uioinfo->irq);
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun /*
208*4882a593Smuzhiyun * If a level interrupt, dont do lazy disable. Otherwise the
209*4882a593Smuzhiyun * irq will fire again since clearing of the actual cause, on
210*4882a593Smuzhiyun * device level, is done in userspace
211*4882a593Smuzhiyun * irqd_is_level_type() isn't used since isn't valid until
212*4882a593Smuzhiyun * irq is configured.
213*4882a593Smuzhiyun */
214*4882a593Smuzhiyun if (irq_data &&
215*4882a593Smuzhiyun irqd_get_trigger_type(irq_data) & IRQ_TYPE_LEVEL_MASK) {
216*4882a593Smuzhiyun dev_dbg(&pdev->dev, "disable lazy unmask\n");
217*4882a593Smuzhiyun irq_set_status_flags(uioinfo->irq, IRQ_DISABLE_UNLAZY);
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun uiomem = &uioinfo->mem[0];
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun for (i = 0; i < pdev->num_resources; ++i) {
224*4882a593Smuzhiyun struct resource *r = &pdev->resource[i];
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun if (r->flags != IORESOURCE_MEM)
227*4882a593Smuzhiyun continue;
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun if (uiomem >= &uioinfo->mem[MAX_UIO_MAPS]) {
230*4882a593Smuzhiyun dev_warn(&pdev->dev, "device has more than "
231*4882a593Smuzhiyun __stringify(MAX_UIO_MAPS)
232*4882a593Smuzhiyun " I/O memory resources.\n");
233*4882a593Smuzhiyun break;
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun uiomem->memtype = UIO_MEM_PHYS;
237*4882a593Smuzhiyun uiomem->addr = r->start;
238*4882a593Smuzhiyun uiomem->size = resource_size(r);
239*4882a593Smuzhiyun ++uiomem;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun priv->dmem_region_start = uiomem - &uioinfo->mem[0];
243*4882a593Smuzhiyun priv->num_dmem_regions = pdata->num_dynamic_regions;
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun for (i = 0; i < pdata->num_dynamic_regions; ++i) {
246*4882a593Smuzhiyun if (uiomem >= &uioinfo->mem[MAX_UIO_MAPS]) {
247*4882a593Smuzhiyun dev_warn(&pdev->dev, "device has more than "
248*4882a593Smuzhiyun __stringify(MAX_UIO_MAPS)
249*4882a593Smuzhiyun " dynamic and fixed memory regions.\n");
250*4882a593Smuzhiyun break;
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun uiomem->memtype = UIO_MEM_PHYS;
253*4882a593Smuzhiyun uiomem->addr = DMEM_MAP_ERROR;
254*4882a593Smuzhiyun uiomem->size = pdata->dynamic_region_sizes[i];
255*4882a593Smuzhiyun ++uiomem;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun while (uiomem < &uioinfo->mem[MAX_UIO_MAPS]) {
259*4882a593Smuzhiyun uiomem->size = 0;
260*4882a593Smuzhiyun ++uiomem;
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun /* This driver requires no hardware specific kernel code to handle
264*4882a593Smuzhiyun * interrupts. Instead, the interrupt handler simply disables the
265*4882a593Smuzhiyun * interrupt in the interrupt controller. User space is responsible
266*4882a593Smuzhiyun * for performing hardware specific acknowledge and re-enabling of
267*4882a593Smuzhiyun * the interrupt in the interrupt controller.
268*4882a593Smuzhiyun *
269*4882a593Smuzhiyun * Interrupt sharing is not supported.
270*4882a593Smuzhiyun */
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun uioinfo->handler = uio_dmem_genirq_handler;
273*4882a593Smuzhiyun uioinfo->irqcontrol = uio_dmem_genirq_irqcontrol;
274*4882a593Smuzhiyun uioinfo->open = uio_dmem_genirq_open;
275*4882a593Smuzhiyun uioinfo->release = uio_dmem_genirq_release;
276*4882a593Smuzhiyun uioinfo->priv = priv;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun /* Enable Runtime PM for this device:
279*4882a593Smuzhiyun * The device starts in suspended state to allow the hardware to be
280*4882a593Smuzhiyun * turned off by default. The Runtime PM bus code should power on the
281*4882a593Smuzhiyun * hardware and enable clocks at open().
282*4882a593Smuzhiyun */
283*4882a593Smuzhiyun pm_runtime_enable(&pdev->dev);
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun ret = uio_register_device(&pdev->dev, priv->uioinfo);
286*4882a593Smuzhiyun if (ret) {
287*4882a593Smuzhiyun dev_err(&pdev->dev, "unable to register uio device\n");
288*4882a593Smuzhiyun pm_runtime_disable(&pdev->dev);
289*4882a593Smuzhiyun goto bad1;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun platform_set_drvdata(pdev, priv);
293*4882a593Smuzhiyun return 0;
294*4882a593Smuzhiyun bad1:
295*4882a593Smuzhiyun kfree(priv);
296*4882a593Smuzhiyun bad0:
297*4882a593Smuzhiyun /* kfree uioinfo for OF */
298*4882a593Smuzhiyun if (pdev->dev.of_node)
299*4882a593Smuzhiyun kfree(uioinfo);
300*4882a593Smuzhiyun bad2:
301*4882a593Smuzhiyun return ret;
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun
uio_dmem_genirq_remove(struct platform_device * pdev)304*4882a593Smuzhiyun static int uio_dmem_genirq_remove(struct platform_device *pdev)
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun struct uio_dmem_genirq_platdata *priv = platform_get_drvdata(pdev);
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun uio_unregister_device(priv->uioinfo);
309*4882a593Smuzhiyun pm_runtime_disable(&pdev->dev);
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun priv->uioinfo->handler = NULL;
312*4882a593Smuzhiyun priv->uioinfo->irqcontrol = NULL;
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun /* kfree uioinfo for OF */
315*4882a593Smuzhiyun if (pdev->dev.of_node)
316*4882a593Smuzhiyun kfree(priv->uioinfo);
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun kfree(priv);
319*4882a593Smuzhiyun return 0;
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun
uio_dmem_genirq_runtime_nop(struct device * dev)322*4882a593Smuzhiyun static int uio_dmem_genirq_runtime_nop(struct device *dev)
323*4882a593Smuzhiyun {
324*4882a593Smuzhiyun /* Runtime PM callback shared between ->runtime_suspend()
325*4882a593Smuzhiyun * and ->runtime_resume(). Simply returns success.
326*4882a593Smuzhiyun *
327*4882a593Smuzhiyun * In this driver pm_runtime_get_sync() and pm_runtime_put_sync()
328*4882a593Smuzhiyun * are used at open() and release() time. This allows the
329*4882a593Smuzhiyun * Runtime PM code to turn off power to the device while the
330*4882a593Smuzhiyun * device is unused, ie before open() and after release().
331*4882a593Smuzhiyun *
332*4882a593Smuzhiyun * This Runtime PM callback does not need to save or restore
333*4882a593Smuzhiyun * any registers since user space is responsbile for hardware
334*4882a593Smuzhiyun * register reinitialization after open().
335*4882a593Smuzhiyun */
336*4882a593Smuzhiyun return 0;
337*4882a593Smuzhiyun }
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun static const struct dev_pm_ops uio_dmem_genirq_dev_pm_ops = {
340*4882a593Smuzhiyun .runtime_suspend = uio_dmem_genirq_runtime_nop,
341*4882a593Smuzhiyun .runtime_resume = uio_dmem_genirq_runtime_nop,
342*4882a593Smuzhiyun };
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun #ifdef CONFIG_OF
345*4882a593Smuzhiyun static const struct of_device_id uio_of_genirq_match[] = {
346*4882a593Smuzhiyun { /* empty for now */ },
347*4882a593Smuzhiyun };
348*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, uio_of_genirq_match);
349*4882a593Smuzhiyun #endif
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun static struct platform_driver uio_dmem_genirq = {
352*4882a593Smuzhiyun .probe = uio_dmem_genirq_probe,
353*4882a593Smuzhiyun .remove = uio_dmem_genirq_remove,
354*4882a593Smuzhiyun .driver = {
355*4882a593Smuzhiyun .name = DRIVER_NAME,
356*4882a593Smuzhiyun .pm = &uio_dmem_genirq_dev_pm_ops,
357*4882a593Smuzhiyun .of_match_table = of_match_ptr(uio_of_genirq_match),
358*4882a593Smuzhiyun },
359*4882a593Smuzhiyun };
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun module_platform_driver(uio_dmem_genirq);
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun MODULE_AUTHOR("Damian Hobson-Garcia");
364*4882a593Smuzhiyun MODULE_DESCRIPTION("Userspace I/O platform driver with dynamic memory.");
365*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
366*4882a593Smuzhiyun MODULE_ALIAS("platform:" DRIVER_NAME);
367