1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/console.h>
7*4882a593Smuzhiyun #include <linux/mailbox_client.h>
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/of.h>
10*4882a593Smuzhiyun #include <linux/of_device.h>
11*4882a593Smuzhiyun #include <linux/platform_device.h>
12*4882a593Smuzhiyun #include <linux/serial.h>
13*4882a593Smuzhiyun #include <linux/serial_core.h>
14*4882a593Smuzhiyun #include <linux/slab.h>
15*4882a593Smuzhiyun #include <linux/tty.h>
16*4882a593Smuzhiyun #include <linux/tty_flip.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define TCU_MBOX_BYTE(i, x) ((x) << (i * 8))
19*4882a593Smuzhiyun #define TCU_MBOX_BYTE_V(x, i) (((x) >> (i * 8)) & 0xff)
20*4882a593Smuzhiyun #define TCU_MBOX_NUM_BYTES(x) ((x) << 24)
21*4882a593Smuzhiyun #define TCU_MBOX_NUM_BYTES_V(x) (((x) >> 24) & 0x3)
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun struct tegra_tcu {
24*4882a593Smuzhiyun struct uart_driver driver;
25*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_SERIAL_TEGRA_TCU_CONSOLE)
26*4882a593Smuzhiyun struct console console;
27*4882a593Smuzhiyun #endif
28*4882a593Smuzhiyun struct uart_port port;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun struct mbox_client tx_client, rx_client;
31*4882a593Smuzhiyun struct mbox_chan *tx, *rx;
32*4882a593Smuzhiyun };
33*4882a593Smuzhiyun
tegra_tcu_uart_tx_empty(struct uart_port * port)34*4882a593Smuzhiyun static unsigned int tegra_tcu_uart_tx_empty(struct uart_port *port)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun return TIOCSER_TEMT;
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
tegra_tcu_uart_set_mctrl(struct uart_port * port,unsigned int mctrl)39*4882a593Smuzhiyun static void tegra_tcu_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
tegra_tcu_uart_get_mctrl(struct uart_port * port)43*4882a593Smuzhiyun static unsigned int tegra_tcu_uart_get_mctrl(struct uart_port *port)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun return 0;
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun
tegra_tcu_uart_stop_tx(struct uart_port * port)48*4882a593Smuzhiyun static void tegra_tcu_uart_stop_tx(struct uart_port *port)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
tegra_tcu_write_one(struct tegra_tcu * tcu,u32 value,unsigned int count)52*4882a593Smuzhiyun static void tegra_tcu_write_one(struct tegra_tcu *tcu, u32 value,
53*4882a593Smuzhiyun unsigned int count)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun void *msg;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun value |= TCU_MBOX_NUM_BYTES(count);
58*4882a593Smuzhiyun msg = (void *)(unsigned long)value;
59*4882a593Smuzhiyun mbox_send_message(tcu->tx, msg);
60*4882a593Smuzhiyun mbox_flush(tcu->tx, 1000);
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
tegra_tcu_write(struct tegra_tcu * tcu,const char * s,unsigned int count)63*4882a593Smuzhiyun static void tegra_tcu_write(struct tegra_tcu *tcu, const char *s,
64*4882a593Smuzhiyun unsigned int count)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun unsigned int written = 0, i = 0;
67*4882a593Smuzhiyun bool insert_nl = false;
68*4882a593Smuzhiyun u32 value = 0;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun while (i < count) {
71*4882a593Smuzhiyun if (insert_nl) {
72*4882a593Smuzhiyun value |= TCU_MBOX_BYTE(written++, '\n');
73*4882a593Smuzhiyun insert_nl = false;
74*4882a593Smuzhiyun i++;
75*4882a593Smuzhiyun } else if (s[i] == '\n') {
76*4882a593Smuzhiyun value |= TCU_MBOX_BYTE(written++, '\r');
77*4882a593Smuzhiyun insert_nl = true;
78*4882a593Smuzhiyun } else {
79*4882a593Smuzhiyun value |= TCU_MBOX_BYTE(written++, s[i++]);
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun if (written == 3) {
83*4882a593Smuzhiyun tegra_tcu_write_one(tcu, value, 3);
84*4882a593Smuzhiyun value = written = 0;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun if (written)
89*4882a593Smuzhiyun tegra_tcu_write_one(tcu, value, written);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
tegra_tcu_uart_start_tx(struct uart_port * port)92*4882a593Smuzhiyun static void tegra_tcu_uart_start_tx(struct uart_port *port)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun struct tegra_tcu *tcu = port->private_data;
95*4882a593Smuzhiyun struct circ_buf *xmit = &port->state->xmit;
96*4882a593Smuzhiyun unsigned long count;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun for (;;) {
99*4882a593Smuzhiyun count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
100*4882a593Smuzhiyun if (!count)
101*4882a593Smuzhiyun break;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun tegra_tcu_write(tcu, &xmit->buf[xmit->tail], count);
104*4882a593Smuzhiyun uart_xmit_advance(port, count);
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun uart_write_wakeup(port);
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
tegra_tcu_uart_stop_rx(struct uart_port * port)110*4882a593Smuzhiyun static void tegra_tcu_uart_stop_rx(struct uart_port *port)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
tegra_tcu_uart_break_ctl(struct uart_port * port,int ctl)114*4882a593Smuzhiyun static void tegra_tcu_uart_break_ctl(struct uart_port *port, int ctl)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
tegra_tcu_uart_startup(struct uart_port * port)118*4882a593Smuzhiyun static int tegra_tcu_uart_startup(struct uart_port *port)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun return 0;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
tegra_tcu_uart_shutdown(struct uart_port * port)123*4882a593Smuzhiyun static void tegra_tcu_uart_shutdown(struct uart_port *port)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun
tegra_tcu_uart_set_termios(struct uart_port * port,struct ktermios * new,struct ktermios * old)127*4882a593Smuzhiyun static void tegra_tcu_uart_set_termios(struct uart_port *port,
128*4882a593Smuzhiyun struct ktermios *new,
129*4882a593Smuzhiyun struct ktermios *old)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun static const struct uart_ops tegra_tcu_uart_ops = {
134*4882a593Smuzhiyun .tx_empty = tegra_tcu_uart_tx_empty,
135*4882a593Smuzhiyun .set_mctrl = tegra_tcu_uart_set_mctrl,
136*4882a593Smuzhiyun .get_mctrl = tegra_tcu_uart_get_mctrl,
137*4882a593Smuzhiyun .stop_tx = tegra_tcu_uart_stop_tx,
138*4882a593Smuzhiyun .start_tx = tegra_tcu_uart_start_tx,
139*4882a593Smuzhiyun .stop_rx = tegra_tcu_uart_stop_rx,
140*4882a593Smuzhiyun .break_ctl = tegra_tcu_uart_break_ctl,
141*4882a593Smuzhiyun .startup = tegra_tcu_uart_startup,
142*4882a593Smuzhiyun .shutdown = tegra_tcu_uart_shutdown,
143*4882a593Smuzhiyun .set_termios = tegra_tcu_uart_set_termios,
144*4882a593Smuzhiyun };
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_SERIAL_TEGRA_TCU_CONSOLE)
tegra_tcu_console_write(struct console * cons,const char * s,unsigned int count)147*4882a593Smuzhiyun static void tegra_tcu_console_write(struct console *cons, const char *s,
148*4882a593Smuzhiyun unsigned int count)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun struct tegra_tcu *tcu = container_of(cons, struct tegra_tcu, console);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun tegra_tcu_write(tcu, s, count);
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
tegra_tcu_console_setup(struct console * cons,char * options)155*4882a593Smuzhiyun static int tegra_tcu_console_setup(struct console *cons, char *options)
156*4882a593Smuzhiyun {
157*4882a593Smuzhiyun return 0;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun #endif
160*4882a593Smuzhiyun
tegra_tcu_receive(struct mbox_client * cl,void * msg)161*4882a593Smuzhiyun static void tegra_tcu_receive(struct mbox_client *cl, void *msg)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun struct tegra_tcu *tcu = container_of(cl, struct tegra_tcu, rx_client);
164*4882a593Smuzhiyun struct tty_port *port = &tcu->port.state->port;
165*4882a593Smuzhiyun u32 value = (u32)(unsigned long)msg;
166*4882a593Smuzhiyun unsigned int num_bytes, i;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun num_bytes = TCU_MBOX_NUM_BYTES_V(value);
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun for (i = 0; i < num_bytes; i++)
171*4882a593Smuzhiyun tty_insert_flip_char(port, TCU_MBOX_BYTE_V(value, i),
172*4882a593Smuzhiyun TTY_NORMAL);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun tty_flip_buffer_push(port);
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
tegra_tcu_probe(struct platform_device * pdev)177*4882a593Smuzhiyun static int tegra_tcu_probe(struct platform_device *pdev)
178*4882a593Smuzhiyun {
179*4882a593Smuzhiyun struct uart_port *port;
180*4882a593Smuzhiyun struct tegra_tcu *tcu;
181*4882a593Smuzhiyun int err;
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun tcu = devm_kzalloc(&pdev->dev, sizeof(*tcu), GFP_KERNEL);
184*4882a593Smuzhiyun if (!tcu)
185*4882a593Smuzhiyun return -ENOMEM;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun tcu->tx_client.dev = &pdev->dev;
188*4882a593Smuzhiyun tcu->rx_client.dev = &pdev->dev;
189*4882a593Smuzhiyun tcu->rx_client.rx_callback = tegra_tcu_receive;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun tcu->tx = mbox_request_channel_byname(&tcu->tx_client, "tx");
192*4882a593Smuzhiyun if (IS_ERR(tcu->tx)) {
193*4882a593Smuzhiyun err = PTR_ERR(tcu->tx);
194*4882a593Smuzhiyun dev_err(&pdev->dev, "failed to get tx mailbox: %d\n", err);
195*4882a593Smuzhiyun return err;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun tcu->rx = mbox_request_channel_byname(&tcu->rx_client, "rx");
199*4882a593Smuzhiyun if (IS_ERR(tcu->rx)) {
200*4882a593Smuzhiyun err = PTR_ERR(tcu->rx);
201*4882a593Smuzhiyun dev_err(&pdev->dev, "failed to get rx mailbox: %d\n", err);
202*4882a593Smuzhiyun goto free_tx;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_SERIAL_TEGRA_TCU_CONSOLE)
206*4882a593Smuzhiyun /* setup the console */
207*4882a593Smuzhiyun strcpy(tcu->console.name, "ttyTCU");
208*4882a593Smuzhiyun tcu->console.device = uart_console_device;
209*4882a593Smuzhiyun tcu->console.flags = CON_PRINTBUFFER | CON_ANYTIME;
210*4882a593Smuzhiyun tcu->console.index = -1;
211*4882a593Smuzhiyun tcu->console.write = tegra_tcu_console_write;
212*4882a593Smuzhiyun tcu->console.setup = tegra_tcu_console_setup;
213*4882a593Smuzhiyun tcu->console.data = &tcu->driver;
214*4882a593Smuzhiyun #endif
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun /* setup the driver */
217*4882a593Smuzhiyun tcu->driver.owner = THIS_MODULE;
218*4882a593Smuzhiyun tcu->driver.driver_name = "tegra-tcu";
219*4882a593Smuzhiyun tcu->driver.dev_name = "ttyTCU";
220*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_SERIAL_TEGRA_TCU_CONSOLE)
221*4882a593Smuzhiyun tcu->driver.cons = &tcu->console;
222*4882a593Smuzhiyun #endif
223*4882a593Smuzhiyun tcu->driver.nr = 1;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun err = uart_register_driver(&tcu->driver);
226*4882a593Smuzhiyun if (err) {
227*4882a593Smuzhiyun dev_err(&pdev->dev, "failed to register UART driver: %d\n",
228*4882a593Smuzhiyun err);
229*4882a593Smuzhiyun goto free_rx;
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun /* setup the port */
233*4882a593Smuzhiyun port = &tcu->port;
234*4882a593Smuzhiyun spin_lock_init(&port->lock);
235*4882a593Smuzhiyun port->dev = &pdev->dev;
236*4882a593Smuzhiyun port->type = PORT_TEGRA_TCU;
237*4882a593Smuzhiyun port->ops = &tegra_tcu_uart_ops;
238*4882a593Smuzhiyun port->fifosize = 1;
239*4882a593Smuzhiyun port->iotype = UPIO_MEM;
240*4882a593Smuzhiyun port->flags = UPF_BOOT_AUTOCONF;
241*4882a593Smuzhiyun port->private_data = tcu;
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun err = uart_add_one_port(&tcu->driver, port);
244*4882a593Smuzhiyun if (err) {
245*4882a593Smuzhiyun dev_err(&pdev->dev, "failed to add UART port: %d\n", err);
246*4882a593Smuzhiyun goto unregister_uart;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun platform_set_drvdata(pdev, tcu);
250*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_SERIAL_TEGRA_TCU_CONSOLE)
251*4882a593Smuzhiyun register_console(&tcu->console);
252*4882a593Smuzhiyun #endif
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun return 0;
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun unregister_uart:
257*4882a593Smuzhiyun uart_unregister_driver(&tcu->driver);
258*4882a593Smuzhiyun free_rx:
259*4882a593Smuzhiyun mbox_free_channel(tcu->rx);
260*4882a593Smuzhiyun free_tx:
261*4882a593Smuzhiyun mbox_free_channel(tcu->tx);
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun return err;
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun
tegra_tcu_remove(struct platform_device * pdev)266*4882a593Smuzhiyun static int tegra_tcu_remove(struct platform_device *pdev)
267*4882a593Smuzhiyun {
268*4882a593Smuzhiyun struct tegra_tcu *tcu = platform_get_drvdata(pdev);
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_SERIAL_TEGRA_TCU_CONSOLE)
271*4882a593Smuzhiyun unregister_console(&tcu->console);
272*4882a593Smuzhiyun #endif
273*4882a593Smuzhiyun uart_remove_one_port(&tcu->driver, &tcu->port);
274*4882a593Smuzhiyun uart_unregister_driver(&tcu->driver);
275*4882a593Smuzhiyun mbox_free_channel(tcu->rx);
276*4882a593Smuzhiyun mbox_free_channel(tcu->tx);
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun return 0;
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun static const struct of_device_id tegra_tcu_match[] = {
282*4882a593Smuzhiyun { .compatible = "nvidia,tegra194-tcu" },
283*4882a593Smuzhiyun { }
284*4882a593Smuzhiyun };
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun static struct platform_driver tegra_tcu_driver = {
287*4882a593Smuzhiyun .driver = {
288*4882a593Smuzhiyun .name = "tegra-tcu",
289*4882a593Smuzhiyun .of_match_table = tegra_tcu_match,
290*4882a593Smuzhiyun },
291*4882a593Smuzhiyun .probe = tegra_tcu_probe,
292*4882a593Smuzhiyun .remove = tegra_tcu_remove,
293*4882a593Smuzhiyun };
294*4882a593Smuzhiyun module_platform_driver(tegra_tcu_driver);
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun MODULE_AUTHOR("Mikko Perttunen <mperttunen@nvidia.com>");
297*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
298*4882a593Smuzhiyun MODULE_DESCRIPTION("NVIDIA Tegra Combined UART driver");
299