xref: /OK3568_Linux_fs/kernel/drivers/tty/serial/sunsu.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 1997  Eddie C. Dost  (ecd@skynet.be)
6*4882a593Smuzhiyun  * Copyright (C) 1998-1999  Pete Zaitcev   (zaitcev@yahoo.com)
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * This is mainly a variation of 8250.c, credits go to authors mentioned
9*4882a593Smuzhiyun  * therein.  In fact this driver should be merged into the generic 8250.c
10*4882a593Smuzhiyun  * infrastructure perhaps using a 8250_sparc.c module.
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * Fixed to use tty_get_baud_rate().
13*4882a593Smuzhiyun  *   Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
14*4882a593Smuzhiyun  *
15*4882a593Smuzhiyun  * Converted to new 2.5.x UART layer.
16*4882a593Smuzhiyun  *   David S. Miller (davem@davemloft.net), 2002-Jul-29
17*4882a593Smuzhiyun  */
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include <linux/module.h>
20*4882a593Smuzhiyun #include <linux/kernel.h>
21*4882a593Smuzhiyun #include <linux/spinlock.h>
22*4882a593Smuzhiyun #include <linux/errno.h>
23*4882a593Smuzhiyun #include <linux/tty.h>
24*4882a593Smuzhiyun #include <linux/tty_flip.h>
25*4882a593Smuzhiyun #include <linux/major.h>
26*4882a593Smuzhiyun #include <linux/string.h>
27*4882a593Smuzhiyun #include <linux/ptrace.h>
28*4882a593Smuzhiyun #include <linux/ioport.h>
29*4882a593Smuzhiyun #include <linux/circ_buf.h>
30*4882a593Smuzhiyun #include <linux/serial.h>
31*4882a593Smuzhiyun #include <linux/sysrq.h>
32*4882a593Smuzhiyun #include <linux/console.h>
33*4882a593Smuzhiyun #include <linux/slab.h>
34*4882a593Smuzhiyun #ifdef CONFIG_SERIO
35*4882a593Smuzhiyun #include <linux/serio.h>
36*4882a593Smuzhiyun #endif
37*4882a593Smuzhiyun #include <linux/serial_reg.h>
38*4882a593Smuzhiyun #include <linux/init.h>
39*4882a593Smuzhiyun #include <linux/delay.h>
40*4882a593Smuzhiyun #include <linux/of_device.h>
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #include <asm/io.h>
43*4882a593Smuzhiyun #include <asm/irq.h>
44*4882a593Smuzhiyun #include <asm/prom.h>
45*4882a593Smuzhiyun #include <asm/setup.h>
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #include <linux/serial_core.h>
48*4882a593Smuzhiyun #include <linux/sunserialcore.h>
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun /* We are on a NS PC87303 clocked with 24.0 MHz, which results
51*4882a593Smuzhiyun  * in a UART clock of 1.8462 MHz.
52*4882a593Smuzhiyun  */
53*4882a593Smuzhiyun #define SU_BASE_BAUD	(1846200 / 16)
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
56*4882a593Smuzhiyun static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun struct serial_uart_config {
59*4882a593Smuzhiyun 	char	*name;
60*4882a593Smuzhiyun 	int	dfl_xmit_fifo_size;
61*4882a593Smuzhiyun 	int	flags;
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun /*
65*4882a593Smuzhiyun  * Here we define the default xmit fifo size used for each type of UART.
66*4882a593Smuzhiyun  */
67*4882a593Smuzhiyun static const struct serial_uart_config uart_config[] = {
68*4882a593Smuzhiyun 	{ "unknown",	1,	0 },
69*4882a593Smuzhiyun 	{ "8250",	1,	0 },
70*4882a593Smuzhiyun 	{ "16450",	1,	0 },
71*4882a593Smuzhiyun 	{ "16550",	1,	0 },
72*4882a593Smuzhiyun 	{ "16550A",	16,	UART_CLEAR_FIFO | UART_USE_FIFO },
73*4882a593Smuzhiyun 	{ "Cirrus",	1, 	0 },
74*4882a593Smuzhiyun 	{ "ST16650",	1,	UART_CLEAR_FIFO | UART_STARTECH },
75*4882a593Smuzhiyun 	{ "ST16650V2",	32,	UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
76*4882a593Smuzhiyun 	{ "TI16750",	64,	UART_CLEAR_FIFO | UART_USE_FIFO },
77*4882a593Smuzhiyun 	{ "Startech",	1,	0 },
78*4882a593Smuzhiyun 	{ "16C950/954",	128,	UART_CLEAR_FIFO | UART_USE_FIFO },
79*4882a593Smuzhiyun 	{ "ST16654",	64,	UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
80*4882a593Smuzhiyun 	{ "XR16850",	128,	UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
81*4882a593Smuzhiyun 	{ "RSA",	2048,	UART_CLEAR_FIFO | UART_USE_FIFO }
82*4882a593Smuzhiyun };
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun struct uart_sunsu_port {
85*4882a593Smuzhiyun 	struct uart_port	port;
86*4882a593Smuzhiyun 	unsigned char		acr;
87*4882a593Smuzhiyun 	unsigned char		ier;
88*4882a593Smuzhiyun 	unsigned short		rev;
89*4882a593Smuzhiyun 	unsigned char		lcr;
90*4882a593Smuzhiyun 	unsigned int		lsr_break_flag;
91*4882a593Smuzhiyun 	unsigned int		cflag;
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	/* Probing information.  */
94*4882a593Smuzhiyun 	enum su_type		su_type;
95*4882a593Smuzhiyun 	unsigned int		type_probed;	/* XXX Stupid */
96*4882a593Smuzhiyun 	unsigned long		reg_size;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun #ifdef CONFIG_SERIO
99*4882a593Smuzhiyun 	struct serio		serio;
100*4882a593Smuzhiyun 	int			serio_open;
101*4882a593Smuzhiyun #endif
102*4882a593Smuzhiyun };
103*4882a593Smuzhiyun 
serial_in(struct uart_sunsu_port * up,int offset)104*4882a593Smuzhiyun static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun 	offset <<= up->port.regshift;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	switch (up->port.iotype) {
109*4882a593Smuzhiyun 	case UPIO_HUB6:
110*4882a593Smuzhiyun 		outb(up->port.hub6 - 1 + offset, up->port.iobase);
111*4882a593Smuzhiyun 		return inb(up->port.iobase + 1);
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	case UPIO_MEM:
114*4882a593Smuzhiyun 		return readb(up->port.membase + offset);
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	default:
117*4882a593Smuzhiyun 		return inb(up->port.iobase + offset);
118*4882a593Smuzhiyun 	}
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun 
serial_out(struct uart_sunsu_port * up,int offset,int value)121*4882a593Smuzhiyun static void serial_out(struct uart_sunsu_port *up, int offset, int value)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun #ifndef CONFIG_SPARC64
124*4882a593Smuzhiyun 	/*
125*4882a593Smuzhiyun 	 * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
126*4882a593Smuzhiyun 	 * connected with a gate then go to SlavIO. When IRQ4 goes tristated
127*4882a593Smuzhiyun 	 * gate outputs a logical one. Since we use level triggered interrupts
128*4882a593Smuzhiyun 	 * we have lockup and watchdog reset. We cannot mask IRQ because
129*4882a593Smuzhiyun 	 * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
130*4882a593Smuzhiyun 	 * This problem is similar to what Alpha people suffer, see serial.c.
131*4882a593Smuzhiyun 	 */
132*4882a593Smuzhiyun 	if (offset == UART_MCR)
133*4882a593Smuzhiyun 		value |= UART_MCR_OUT2;
134*4882a593Smuzhiyun #endif
135*4882a593Smuzhiyun 	offset <<= up->port.regshift;
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	switch (up->port.iotype) {
138*4882a593Smuzhiyun 	case UPIO_HUB6:
139*4882a593Smuzhiyun 		outb(up->port.hub6 - 1 + offset, up->port.iobase);
140*4882a593Smuzhiyun 		outb(value, up->port.iobase + 1);
141*4882a593Smuzhiyun 		break;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	case UPIO_MEM:
144*4882a593Smuzhiyun 		writeb(value, up->port.membase + offset);
145*4882a593Smuzhiyun 		break;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	default:
148*4882a593Smuzhiyun 		outb(value, up->port.iobase + offset);
149*4882a593Smuzhiyun 	}
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun /*
153*4882a593Smuzhiyun  * We used to support using pause I/O for certain machines.  We
154*4882a593Smuzhiyun  * haven't supported this for a while, but just in case it's badly
155*4882a593Smuzhiyun  * needed for certain old 386 machines, I've left these #define's
156*4882a593Smuzhiyun  * in....
157*4882a593Smuzhiyun  */
158*4882a593Smuzhiyun #define serial_inp(up, offset)		serial_in(up, offset)
159*4882a593Smuzhiyun #define serial_outp(up, offset, value)	serial_out(up, offset, value)
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun /*
163*4882a593Smuzhiyun  * For the 16C950
164*4882a593Smuzhiyun  */
serial_icr_write(struct uart_sunsu_port * up,int offset,int value)165*4882a593Smuzhiyun static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun 	serial_out(up, UART_SCR, offset);
168*4882a593Smuzhiyun 	serial_out(up, UART_ICR, value);
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun #if 0 /* Unused currently */
172*4882a593Smuzhiyun static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun 	unsigned int value;
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
177*4882a593Smuzhiyun 	serial_out(up, UART_SCR, offset);
178*4882a593Smuzhiyun 	value = serial_in(up, UART_ICR);
179*4882a593Smuzhiyun 	serial_icr_write(up, UART_ACR, up->acr);
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	return value;
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun #endif
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun #ifdef CONFIG_SERIAL_8250_RSA
186*4882a593Smuzhiyun /*
187*4882a593Smuzhiyun  * Attempts to turn on the RSA FIFO.  Returns zero on failure.
188*4882a593Smuzhiyun  * We set the port uart clock rate if we succeed.
189*4882a593Smuzhiyun  */
__enable_rsa(struct uart_sunsu_port * up)190*4882a593Smuzhiyun static int __enable_rsa(struct uart_sunsu_port *up)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun 	unsigned char mode;
193*4882a593Smuzhiyun 	int result;
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	mode = serial_inp(up, UART_RSA_MSR);
196*4882a593Smuzhiyun 	result = mode & UART_RSA_MSR_FIFO;
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	if (!result) {
199*4882a593Smuzhiyun 		serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
200*4882a593Smuzhiyun 		mode = serial_inp(up, UART_RSA_MSR);
201*4882a593Smuzhiyun 		result = mode & UART_RSA_MSR_FIFO;
202*4882a593Smuzhiyun 	}
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	if (result)
205*4882a593Smuzhiyun 		up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	return result;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
enable_rsa(struct uart_sunsu_port * up)210*4882a593Smuzhiyun static void enable_rsa(struct uart_sunsu_port *up)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun 	if (up->port.type == PORT_RSA) {
213*4882a593Smuzhiyun 		if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
214*4882a593Smuzhiyun 			spin_lock_irq(&up->port.lock);
215*4882a593Smuzhiyun 			__enable_rsa(up);
216*4882a593Smuzhiyun 			spin_unlock_irq(&up->port.lock);
217*4882a593Smuzhiyun 		}
218*4882a593Smuzhiyun 		if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
219*4882a593Smuzhiyun 			serial_outp(up, UART_RSA_FRR, 0);
220*4882a593Smuzhiyun 	}
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun /*
224*4882a593Smuzhiyun  * Attempts to turn off the RSA FIFO.  Returns zero on failure.
225*4882a593Smuzhiyun  * It is unknown why interrupts were disabled in here.  However,
226*4882a593Smuzhiyun  * the caller is expected to preserve this behaviour by grabbing
227*4882a593Smuzhiyun  * the spinlock before calling this function.
228*4882a593Smuzhiyun  */
disable_rsa(struct uart_sunsu_port * up)229*4882a593Smuzhiyun static void disable_rsa(struct uart_sunsu_port *up)
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun 	unsigned char mode;
232*4882a593Smuzhiyun 	int result;
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	if (up->port.type == PORT_RSA &&
235*4882a593Smuzhiyun 	    up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
236*4882a593Smuzhiyun 		spin_lock_irq(&up->port.lock);
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 		mode = serial_inp(up, UART_RSA_MSR);
239*4882a593Smuzhiyun 		result = !(mode & UART_RSA_MSR_FIFO);
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 		if (!result) {
242*4882a593Smuzhiyun 			serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
243*4882a593Smuzhiyun 			mode = serial_inp(up, UART_RSA_MSR);
244*4882a593Smuzhiyun 			result = !(mode & UART_RSA_MSR_FIFO);
245*4882a593Smuzhiyun 		}
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 		if (result)
248*4882a593Smuzhiyun 			up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
249*4882a593Smuzhiyun 		spin_unlock_irq(&up->port.lock);
250*4882a593Smuzhiyun 	}
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun #endif /* CONFIG_SERIAL_8250_RSA */
253*4882a593Smuzhiyun 
__stop_tx(struct uart_sunsu_port * p)254*4882a593Smuzhiyun static inline void __stop_tx(struct uart_sunsu_port *p)
255*4882a593Smuzhiyun {
256*4882a593Smuzhiyun 	if (p->ier & UART_IER_THRI) {
257*4882a593Smuzhiyun 		p->ier &= ~UART_IER_THRI;
258*4882a593Smuzhiyun 		serial_out(p, UART_IER, p->ier);
259*4882a593Smuzhiyun 	}
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun 
sunsu_stop_tx(struct uart_port * port)262*4882a593Smuzhiyun static void sunsu_stop_tx(struct uart_port *port)
263*4882a593Smuzhiyun {
264*4882a593Smuzhiyun 	struct uart_sunsu_port *up =
265*4882a593Smuzhiyun 		container_of(port, struct uart_sunsu_port, port);
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	__stop_tx(up);
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	/*
270*4882a593Smuzhiyun 	 * We really want to stop the transmitter from sending.
271*4882a593Smuzhiyun 	 */
272*4882a593Smuzhiyun 	if (up->port.type == PORT_16C950) {
273*4882a593Smuzhiyun 		up->acr |= UART_ACR_TXDIS;
274*4882a593Smuzhiyun 		serial_icr_write(up, UART_ACR, up->acr);
275*4882a593Smuzhiyun 	}
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun 
sunsu_start_tx(struct uart_port * port)278*4882a593Smuzhiyun static void sunsu_start_tx(struct uart_port *port)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun 	struct uart_sunsu_port *up =
281*4882a593Smuzhiyun 		container_of(port, struct uart_sunsu_port, port);
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	if (!(up->ier & UART_IER_THRI)) {
284*4882a593Smuzhiyun 		up->ier |= UART_IER_THRI;
285*4882a593Smuzhiyun 		serial_out(up, UART_IER, up->ier);
286*4882a593Smuzhiyun 	}
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 	/*
289*4882a593Smuzhiyun 	 * Re-enable the transmitter if we disabled it.
290*4882a593Smuzhiyun 	 */
291*4882a593Smuzhiyun 	if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
292*4882a593Smuzhiyun 		up->acr &= ~UART_ACR_TXDIS;
293*4882a593Smuzhiyun 		serial_icr_write(up, UART_ACR, up->acr);
294*4882a593Smuzhiyun 	}
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun 
sunsu_stop_rx(struct uart_port * port)297*4882a593Smuzhiyun static void sunsu_stop_rx(struct uart_port *port)
298*4882a593Smuzhiyun {
299*4882a593Smuzhiyun 	struct uart_sunsu_port *up =
300*4882a593Smuzhiyun 		container_of(port, struct uart_sunsu_port, port);
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	up->ier &= ~UART_IER_RLSI;
303*4882a593Smuzhiyun 	up->port.read_status_mask &= ~UART_LSR_DR;
304*4882a593Smuzhiyun 	serial_out(up, UART_IER, up->ier);
305*4882a593Smuzhiyun }
306*4882a593Smuzhiyun 
sunsu_enable_ms(struct uart_port * port)307*4882a593Smuzhiyun static void sunsu_enable_ms(struct uart_port *port)
308*4882a593Smuzhiyun {
309*4882a593Smuzhiyun 	struct uart_sunsu_port *up =
310*4882a593Smuzhiyun 		container_of(port, struct uart_sunsu_port, port);
311*4882a593Smuzhiyun 	unsigned long flags;
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	spin_lock_irqsave(&up->port.lock, flags);
314*4882a593Smuzhiyun 	up->ier |= UART_IER_MSI;
315*4882a593Smuzhiyun 	serial_out(up, UART_IER, up->ier);
316*4882a593Smuzhiyun 	spin_unlock_irqrestore(&up->port.lock, flags);
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun static void
receive_chars(struct uart_sunsu_port * up,unsigned char * status)320*4882a593Smuzhiyun receive_chars(struct uart_sunsu_port *up, unsigned char *status)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun 	struct tty_port *port = &up->port.state->port;
323*4882a593Smuzhiyun 	unsigned char ch, flag;
324*4882a593Smuzhiyun 	int max_count = 256;
325*4882a593Smuzhiyun 	int saw_console_brk = 0;
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	do {
328*4882a593Smuzhiyun 		ch = serial_inp(up, UART_RX);
329*4882a593Smuzhiyun 		flag = TTY_NORMAL;
330*4882a593Smuzhiyun 		up->port.icount.rx++;
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 		if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
333*4882a593Smuzhiyun 				       UART_LSR_FE | UART_LSR_OE))) {
334*4882a593Smuzhiyun 			/*
335*4882a593Smuzhiyun 			 * For statistics only
336*4882a593Smuzhiyun 			 */
337*4882a593Smuzhiyun 			if (*status & UART_LSR_BI) {
338*4882a593Smuzhiyun 				*status &= ~(UART_LSR_FE | UART_LSR_PE);
339*4882a593Smuzhiyun 				up->port.icount.brk++;
340*4882a593Smuzhiyun 				if (up->port.cons != NULL &&
341*4882a593Smuzhiyun 				    up->port.line == up->port.cons->index)
342*4882a593Smuzhiyun 					saw_console_brk = 1;
343*4882a593Smuzhiyun 				/*
344*4882a593Smuzhiyun 				 * We do the SysRQ and SAK checking
345*4882a593Smuzhiyun 				 * here because otherwise the break
346*4882a593Smuzhiyun 				 * may get masked by ignore_status_mask
347*4882a593Smuzhiyun 				 * or read_status_mask.
348*4882a593Smuzhiyun 				 */
349*4882a593Smuzhiyun 				if (uart_handle_break(&up->port))
350*4882a593Smuzhiyun 					goto ignore_char;
351*4882a593Smuzhiyun 			} else if (*status & UART_LSR_PE)
352*4882a593Smuzhiyun 				up->port.icount.parity++;
353*4882a593Smuzhiyun 			else if (*status & UART_LSR_FE)
354*4882a593Smuzhiyun 				up->port.icount.frame++;
355*4882a593Smuzhiyun 			if (*status & UART_LSR_OE)
356*4882a593Smuzhiyun 				up->port.icount.overrun++;
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 			/*
359*4882a593Smuzhiyun 			 * Mask off conditions which should be ingored.
360*4882a593Smuzhiyun 			 */
361*4882a593Smuzhiyun 			*status &= up->port.read_status_mask;
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 			if (up->port.cons != NULL &&
364*4882a593Smuzhiyun 			    up->port.line == up->port.cons->index) {
365*4882a593Smuzhiyun 				/* Recover the break flag from console xmit */
366*4882a593Smuzhiyun 				*status |= up->lsr_break_flag;
367*4882a593Smuzhiyun 				up->lsr_break_flag = 0;
368*4882a593Smuzhiyun 			}
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun 			if (*status & UART_LSR_BI) {
371*4882a593Smuzhiyun 				flag = TTY_BREAK;
372*4882a593Smuzhiyun 			} else if (*status & UART_LSR_PE)
373*4882a593Smuzhiyun 				flag = TTY_PARITY;
374*4882a593Smuzhiyun 			else if (*status & UART_LSR_FE)
375*4882a593Smuzhiyun 				flag = TTY_FRAME;
376*4882a593Smuzhiyun 		}
377*4882a593Smuzhiyun 		if (uart_handle_sysrq_char(&up->port, ch))
378*4882a593Smuzhiyun 			goto ignore_char;
379*4882a593Smuzhiyun 		if ((*status & up->port.ignore_status_mask) == 0)
380*4882a593Smuzhiyun 			tty_insert_flip_char(port, ch, flag);
381*4882a593Smuzhiyun 		if (*status & UART_LSR_OE)
382*4882a593Smuzhiyun 			/*
383*4882a593Smuzhiyun 			 * Overrun is special, since it's reported
384*4882a593Smuzhiyun 			 * immediately, and doesn't affect the current
385*4882a593Smuzhiyun 			 * character.
386*4882a593Smuzhiyun 			 */
387*4882a593Smuzhiyun 			 tty_insert_flip_char(port, 0, TTY_OVERRUN);
388*4882a593Smuzhiyun 	ignore_char:
389*4882a593Smuzhiyun 		*status = serial_inp(up, UART_LSR);
390*4882a593Smuzhiyun 	} while ((*status & UART_LSR_DR) && (max_count-- > 0));
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 	if (saw_console_brk)
393*4882a593Smuzhiyun 		sun_do_break();
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun 
transmit_chars(struct uart_sunsu_port * up)396*4882a593Smuzhiyun static void transmit_chars(struct uart_sunsu_port *up)
397*4882a593Smuzhiyun {
398*4882a593Smuzhiyun 	struct circ_buf *xmit = &up->port.state->xmit;
399*4882a593Smuzhiyun 	int count;
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 	if (up->port.x_char) {
402*4882a593Smuzhiyun 		serial_outp(up, UART_TX, up->port.x_char);
403*4882a593Smuzhiyun 		up->port.icount.tx++;
404*4882a593Smuzhiyun 		up->port.x_char = 0;
405*4882a593Smuzhiyun 		return;
406*4882a593Smuzhiyun 	}
407*4882a593Smuzhiyun 	if (uart_tx_stopped(&up->port)) {
408*4882a593Smuzhiyun 		sunsu_stop_tx(&up->port);
409*4882a593Smuzhiyun 		return;
410*4882a593Smuzhiyun 	}
411*4882a593Smuzhiyun 	if (uart_circ_empty(xmit)) {
412*4882a593Smuzhiyun 		__stop_tx(up);
413*4882a593Smuzhiyun 		return;
414*4882a593Smuzhiyun 	}
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun 	count = up->port.fifosize;
417*4882a593Smuzhiyun 	do {
418*4882a593Smuzhiyun 		serial_out(up, UART_TX, xmit->buf[xmit->tail]);
419*4882a593Smuzhiyun 		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
420*4882a593Smuzhiyun 		up->port.icount.tx++;
421*4882a593Smuzhiyun 		if (uart_circ_empty(xmit))
422*4882a593Smuzhiyun 			break;
423*4882a593Smuzhiyun 	} while (--count > 0);
424*4882a593Smuzhiyun 
425*4882a593Smuzhiyun 	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
426*4882a593Smuzhiyun 		uart_write_wakeup(&up->port);
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun 	if (uart_circ_empty(xmit))
429*4882a593Smuzhiyun 		__stop_tx(up);
430*4882a593Smuzhiyun }
431*4882a593Smuzhiyun 
check_modem_status(struct uart_sunsu_port * up)432*4882a593Smuzhiyun static void check_modem_status(struct uart_sunsu_port *up)
433*4882a593Smuzhiyun {
434*4882a593Smuzhiyun 	int status;
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 	status = serial_in(up, UART_MSR);
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	if ((status & UART_MSR_ANY_DELTA) == 0)
439*4882a593Smuzhiyun 		return;
440*4882a593Smuzhiyun 
441*4882a593Smuzhiyun 	if (status & UART_MSR_TERI)
442*4882a593Smuzhiyun 		up->port.icount.rng++;
443*4882a593Smuzhiyun 	if (status & UART_MSR_DDSR)
444*4882a593Smuzhiyun 		up->port.icount.dsr++;
445*4882a593Smuzhiyun 	if (status & UART_MSR_DDCD)
446*4882a593Smuzhiyun 		uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
447*4882a593Smuzhiyun 	if (status & UART_MSR_DCTS)
448*4882a593Smuzhiyun 		uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun 	wake_up_interruptible(&up->port.state->port.delta_msr_wait);
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun 
sunsu_serial_interrupt(int irq,void * dev_id)453*4882a593Smuzhiyun static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
454*4882a593Smuzhiyun {
455*4882a593Smuzhiyun 	struct uart_sunsu_port *up = dev_id;
456*4882a593Smuzhiyun 	unsigned long flags;
457*4882a593Smuzhiyun 	unsigned char status;
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun 	spin_lock_irqsave(&up->port.lock, flags);
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 	do {
462*4882a593Smuzhiyun 		status = serial_inp(up, UART_LSR);
463*4882a593Smuzhiyun 		if (status & UART_LSR_DR)
464*4882a593Smuzhiyun 			receive_chars(up, &status);
465*4882a593Smuzhiyun 		check_modem_status(up);
466*4882a593Smuzhiyun 		if (status & UART_LSR_THRE)
467*4882a593Smuzhiyun 			transmit_chars(up);
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 		spin_unlock_irqrestore(&up->port.lock, flags);
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun 		tty_flip_buffer_push(&up->port.state->port);
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun 		spin_lock_irqsave(&up->port.lock, flags);
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun 	} while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	spin_unlock_irqrestore(&up->port.lock, flags);
478*4882a593Smuzhiyun 
479*4882a593Smuzhiyun 	return IRQ_HANDLED;
480*4882a593Smuzhiyun }
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun /* Separate interrupt handling path for keyboard/mouse ports.  */
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun static void
485*4882a593Smuzhiyun sunsu_change_speed(struct uart_port *port, unsigned int cflag,
486*4882a593Smuzhiyun 		   unsigned int iflag, unsigned int quot);
487*4882a593Smuzhiyun 
sunsu_change_mouse_baud(struct uart_sunsu_port * up)488*4882a593Smuzhiyun static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
489*4882a593Smuzhiyun {
490*4882a593Smuzhiyun 	unsigned int cur_cflag = up->cflag;
491*4882a593Smuzhiyun 	int quot, new_baud;
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun 	up->cflag &= ~CBAUD;
494*4882a593Smuzhiyun 	up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun 	quot = up->port.uartclk / (16 * new_baud);
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun 	sunsu_change_speed(&up->port, up->cflag, 0, quot);
499*4882a593Smuzhiyun }
500*4882a593Smuzhiyun 
receive_kbd_ms_chars(struct uart_sunsu_port * up,int is_break)501*4882a593Smuzhiyun static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
502*4882a593Smuzhiyun {
503*4882a593Smuzhiyun 	do {
504*4882a593Smuzhiyun 		unsigned char ch = serial_inp(up, UART_RX);
505*4882a593Smuzhiyun 
506*4882a593Smuzhiyun 		/* Stop-A is handled by drivers/char/keyboard.c now. */
507*4882a593Smuzhiyun 		if (up->su_type == SU_PORT_KBD) {
508*4882a593Smuzhiyun #ifdef CONFIG_SERIO
509*4882a593Smuzhiyun 			serio_interrupt(&up->serio, ch, 0);
510*4882a593Smuzhiyun #endif
511*4882a593Smuzhiyun 		} else if (up->su_type == SU_PORT_MS) {
512*4882a593Smuzhiyun 			int ret = suncore_mouse_baud_detection(ch, is_break);
513*4882a593Smuzhiyun 
514*4882a593Smuzhiyun 			switch (ret) {
515*4882a593Smuzhiyun 			case 2:
516*4882a593Smuzhiyun 				sunsu_change_mouse_baud(up);
517*4882a593Smuzhiyun 				fallthrough;
518*4882a593Smuzhiyun 			case 1:
519*4882a593Smuzhiyun 				break;
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun 			case 0:
522*4882a593Smuzhiyun #ifdef CONFIG_SERIO
523*4882a593Smuzhiyun 				serio_interrupt(&up->serio, ch, 0);
524*4882a593Smuzhiyun #endif
525*4882a593Smuzhiyun 				break;
526*4882a593Smuzhiyun 			}
527*4882a593Smuzhiyun 		}
528*4882a593Smuzhiyun 	} while (serial_in(up, UART_LSR) & UART_LSR_DR);
529*4882a593Smuzhiyun }
530*4882a593Smuzhiyun 
sunsu_kbd_ms_interrupt(int irq,void * dev_id)531*4882a593Smuzhiyun static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)
532*4882a593Smuzhiyun {
533*4882a593Smuzhiyun 	struct uart_sunsu_port *up = dev_id;
534*4882a593Smuzhiyun 
535*4882a593Smuzhiyun 	if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
536*4882a593Smuzhiyun 		unsigned char status = serial_inp(up, UART_LSR);
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun 		if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
539*4882a593Smuzhiyun 			receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
540*4882a593Smuzhiyun 	}
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun 	return IRQ_HANDLED;
543*4882a593Smuzhiyun }
544*4882a593Smuzhiyun 
sunsu_tx_empty(struct uart_port * port)545*4882a593Smuzhiyun static unsigned int sunsu_tx_empty(struct uart_port *port)
546*4882a593Smuzhiyun {
547*4882a593Smuzhiyun 	struct uart_sunsu_port *up =
548*4882a593Smuzhiyun 		container_of(port, struct uart_sunsu_port, port);
549*4882a593Smuzhiyun 	unsigned long flags;
550*4882a593Smuzhiyun 	unsigned int ret;
551*4882a593Smuzhiyun 
552*4882a593Smuzhiyun 	spin_lock_irqsave(&up->port.lock, flags);
553*4882a593Smuzhiyun 	ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
554*4882a593Smuzhiyun 	spin_unlock_irqrestore(&up->port.lock, flags);
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun 	return ret;
557*4882a593Smuzhiyun }
558*4882a593Smuzhiyun 
sunsu_get_mctrl(struct uart_port * port)559*4882a593Smuzhiyun static unsigned int sunsu_get_mctrl(struct uart_port *port)
560*4882a593Smuzhiyun {
561*4882a593Smuzhiyun 	struct uart_sunsu_port *up =
562*4882a593Smuzhiyun 		container_of(port, struct uart_sunsu_port, port);
563*4882a593Smuzhiyun 	unsigned char status;
564*4882a593Smuzhiyun 	unsigned int ret;
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun 	status = serial_in(up, UART_MSR);
567*4882a593Smuzhiyun 
568*4882a593Smuzhiyun 	ret = 0;
569*4882a593Smuzhiyun 	if (status & UART_MSR_DCD)
570*4882a593Smuzhiyun 		ret |= TIOCM_CAR;
571*4882a593Smuzhiyun 	if (status & UART_MSR_RI)
572*4882a593Smuzhiyun 		ret |= TIOCM_RNG;
573*4882a593Smuzhiyun 	if (status & UART_MSR_DSR)
574*4882a593Smuzhiyun 		ret |= TIOCM_DSR;
575*4882a593Smuzhiyun 	if (status & UART_MSR_CTS)
576*4882a593Smuzhiyun 		ret |= TIOCM_CTS;
577*4882a593Smuzhiyun 	return ret;
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun 
sunsu_set_mctrl(struct uart_port * port,unsigned int mctrl)580*4882a593Smuzhiyun static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
581*4882a593Smuzhiyun {
582*4882a593Smuzhiyun 	struct uart_sunsu_port *up =
583*4882a593Smuzhiyun 		container_of(port, struct uart_sunsu_port, port);
584*4882a593Smuzhiyun 	unsigned char mcr = 0;
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	if (mctrl & TIOCM_RTS)
587*4882a593Smuzhiyun 		mcr |= UART_MCR_RTS;
588*4882a593Smuzhiyun 	if (mctrl & TIOCM_DTR)
589*4882a593Smuzhiyun 		mcr |= UART_MCR_DTR;
590*4882a593Smuzhiyun 	if (mctrl & TIOCM_OUT1)
591*4882a593Smuzhiyun 		mcr |= UART_MCR_OUT1;
592*4882a593Smuzhiyun 	if (mctrl & TIOCM_OUT2)
593*4882a593Smuzhiyun 		mcr |= UART_MCR_OUT2;
594*4882a593Smuzhiyun 	if (mctrl & TIOCM_LOOP)
595*4882a593Smuzhiyun 		mcr |= UART_MCR_LOOP;
596*4882a593Smuzhiyun 
597*4882a593Smuzhiyun 	serial_out(up, UART_MCR, mcr);
598*4882a593Smuzhiyun }
599*4882a593Smuzhiyun 
sunsu_break_ctl(struct uart_port * port,int break_state)600*4882a593Smuzhiyun static void sunsu_break_ctl(struct uart_port *port, int break_state)
601*4882a593Smuzhiyun {
602*4882a593Smuzhiyun 	struct uart_sunsu_port *up =
603*4882a593Smuzhiyun 		container_of(port, struct uart_sunsu_port, port);
604*4882a593Smuzhiyun 	unsigned long flags;
605*4882a593Smuzhiyun 
606*4882a593Smuzhiyun 	spin_lock_irqsave(&up->port.lock, flags);
607*4882a593Smuzhiyun 	if (break_state == -1)
608*4882a593Smuzhiyun 		up->lcr |= UART_LCR_SBC;
609*4882a593Smuzhiyun 	else
610*4882a593Smuzhiyun 		up->lcr &= ~UART_LCR_SBC;
611*4882a593Smuzhiyun 	serial_out(up, UART_LCR, up->lcr);
612*4882a593Smuzhiyun 	spin_unlock_irqrestore(&up->port.lock, flags);
613*4882a593Smuzhiyun }
614*4882a593Smuzhiyun 
sunsu_startup(struct uart_port * port)615*4882a593Smuzhiyun static int sunsu_startup(struct uart_port *port)
616*4882a593Smuzhiyun {
617*4882a593Smuzhiyun 	struct uart_sunsu_port *up =
618*4882a593Smuzhiyun 		container_of(port, struct uart_sunsu_port, port);
619*4882a593Smuzhiyun 	unsigned long flags;
620*4882a593Smuzhiyun 	int retval;
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun 	if (up->port.type == PORT_16C950) {
623*4882a593Smuzhiyun 		/* Wake up and initialize UART */
624*4882a593Smuzhiyun 		up->acr = 0;
625*4882a593Smuzhiyun 		serial_outp(up, UART_LCR, 0xBF);
626*4882a593Smuzhiyun 		serial_outp(up, UART_EFR, UART_EFR_ECB);
627*4882a593Smuzhiyun 		serial_outp(up, UART_IER, 0);
628*4882a593Smuzhiyun 		serial_outp(up, UART_LCR, 0);
629*4882a593Smuzhiyun 		serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
630*4882a593Smuzhiyun 		serial_outp(up, UART_LCR, 0xBF);
631*4882a593Smuzhiyun 		serial_outp(up, UART_EFR, UART_EFR_ECB);
632*4882a593Smuzhiyun 		serial_outp(up, UART_LCR, 0);
633*4882a593Smuzhiyun 	}
634*4882a593Smuzhiyun 
635*4882a593Smuzhiyun #ifdef CONFIG_SERIAL_8250_RSA
636*4882a593Smuzhiyun 	/*
637*4882a593Smuzhiyun 	 * If this is an RSA port, see if we can kick it up to the
638*4882a593Smuzhiyun 	 * higher speed clock.
639*4882a593Smuzhiyun 	 */
640*4882a593Smuzhiyun 	enable_rsa(up);
641*4882a593Smuzhiyun #endif
642*4882a593Smuzhiyun 
643*4882a593Smuzhiyun 	/*
644*4882a593Smuzhiyun 	 * Clear the FIFO buffers and disable them.
645*4882a593Smuzhiyun 	 * (they will be reenabled in set_termios())
646*4882a593Smuzhiyun 	 */
647*4882a593Smuzhiyun 	if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
648*4882a593Smuzhiyun 		serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
649*4882a593Smuzhiyun 		serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
650*4882a593Smuzhiyun 				UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
651*4882a593Smuzhiyun 		serial_outp(up, UART_FCR, 0);
652*4882a593Smuzhiyun 	}
653*4882a593Smuzhiyun 
654*4882a593Smuzhiyun 	/*
655*4882a593Smuzhiyun 	 * Clear the interrupt registers.
656*4882a593Smuzhiyun 	 */
657*4882a593Smuzhiyun 	(void) serial_inp(up, UART_LSR);
658*4882a593Smuzhiyun 	(void) serial_inp(up, UART_RX);
659*4882a593Smuzhiyun 	(void) serial_inp(up, UART_IIR);
660*4882a593Smuzhiyun 	(void) serial_inp(up, UART_MSR);
661*4882a593Smuzhiyun 
662*4882a593Smuzhiyun 	/*
663*4882a593Smuzhiyun 	 * At this point, there's no way the LSR could still be 0xff;
664*4882a593Smuzhiyun 	 * if it is, then bail out, because there's likely no UART
665*4882a593Smuzhiyun 	 * here.
666*4882a593Smuzhiyun 	 */
667*4882a593Smuzhiyun 	if (!(up->port.flags & UPF_BUGGY_UART) &&
668*4882a593Smuzhiyun 	    (serial_inp(up, UART_LSR) == 0xff)) {
669*4882a593Smuzhiyun 		printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
670*4882a593Smuzhiyun 		return -ENODEV;
671*4882a593Smuzhiyun 	}
672*4882a593Smuzhiyun 
673*4882a593Smuzhiyun 	if (up->su_type != SU_PORT_PORT) {
674*4882a593Smuzhiyun 		retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
675*4882a593Smuzhiyun 				     IRQF_SHARED, su_typev[up->su_type], up);
676*4882a593Smuzhiyun 	} else {
677*4882a593Smuzhiyun 		retval = request_irq(up->port.irq, sunsu_serial_interrupt,
678*4882a593Smuzhiyun 				     IRQF_SHARED, su_typev[up->su_type], up);
679*4882a593Smuzhiyun 	}
680*4882a593Smuzhiyun 	if (retval) {
681*4882a593Smuzhiyun 		printk("su: Cannot register IRQ %d\n", up->port.irq);
682*4882a593Smuzhiyun 		return retval;
683*4882a593Smuzhiyun 	}
684*4882a593Smuzhiyun 
685*4882a593Smuzhiyun 	/*
686*4882a593Smuzhiyun 	 * Now, initialize the UART
687*4882a593Smuzhiyun 	 */
688*4882a593Smuzhiyun 	serial_outp(up, UART_LCR, UART_LCR_WLEN8);
689*4882a593Smuzhiyun 
690*4882a593Smuzhiyun 	spin_lock_irqsave(&up->port.lock, flags);
691*4882a593Smuzhiyun 
692*4882a593Smuzhiyun 	up->port.mctrl |= TIOCM_OUT2;
693*4882a593Smuzhiyun 
694*4882a593Smuzhiyun 	sunsu_set_mctrl(&up->port, up->port.mctrl);
695*4882a593Smuzhiyun 	spin_unlock_irqrestore(&up->port.lock, flags);
696*4882a593Smuzhiyun 
697*4882a593Smuzhiyun 	/*
698*4882a593Smuzhiyun 	 * Finally, enable interrupts.  Note: Modem status interrupts
699*4882a593Smuzhiyun 	 * are set via set_termios(), which will be occurring imminently
700*4882a593Smuzhiyun 	 * anyway, so we don't enable them here.
701*4882a593Smuzhiyun 	 */
702*4882a593Smuzhiyun 	up->ier = UART_IER_RLSI | UART_IER_RDI;
703*4882a593Smuzhiyun 	serial_outp(up, UART_IER, up->ier);
704*4882a593Smuzhiyun 
705*4882a593Smuzhiyun 	if (up->port.flags & UPF_FOURPORT) {
706*4882a593Smuzhiyun 		unsigned int icp;
707*4882a593Smuzhiyun 		/*
708*4882a593Smuzhiyun 		 * Enable interrupts on the AST Fourport board
709*4882a593Smuzhiyun 		 */
710*4882a593Smuzhiyun 		icp = (up->port.iobase & 0xfe0) | 0x01f;
711*4882a593Smuzhiyun 		outb_p(0x80, icp);
712*4882a593Smuzhiyun 		(void) inb_p(icp);
713*4882a593Smuzhiyun 	}
714*4882a593Smuzhiyun 
715*4882a593Smuzhiyun 	/*
716*4882a593Smuzhiyun 	 * And clear the interrupt registers again for luck.
717*4882a593Smuzhiyun 	 */
718*4882a593Smuzhiyun 	(void) serial_inp(up, UART_LSR);
719*4882a593Smuzhiyun 	(void) serial_inp(up, UART_RX);
720*4882a593Smuzhiyun 	(void) serial_inp(up, UART_IIR);
721*4882a593Smuzhiyun 	(void) serial_inp(up, UART_MSR);
722*4882a593Smuzhiyun 
723*4882a593Smuzhiyun 	return 0;
724*4882a593Smuzhiyun }
725*4882a593Smuzhiyun 
sunsu_shutdown(struct uart_port * port)726*4882a593Smuzhiyun static void sunsu_shutdown(struct uart_port *port)
727*4882a593Smuzhiyun {
728*4882a593Smuzhiyun 	struct uart_sunsu_port *up =
729*4882a593Smuzhiyun 		container_of(port, struct uart_sunsu_port, port);
730*4882a593Smuzhiyun 	unsigned long flags;
731*4882a593Smuzhiyun 
732*4882a593Smuzhiyun 	/*
733*4882a593Smuzhiyun 	 * Disable interrupts from this port
734*4882a593Smuzhiyun 	 */
735*4882a593Smuzhiyun 	up->ier = 0;
736*4882a593Smuzhiyun 	serial_outp(up, UART_IER, 0);
737*4882a593Smuzhiyun 
738*4882a593Smuzhiyun 	spin_lock_irqsave(&up->port.lock, flags);
739*4882a593Smuzhiyun 	if (up->port.flags & UPF_FOURPORT) {
740*4882a593Smuzhiyun 		/* reset interrupts on the AST Fourport board */
741*4882a593Smuzhiyun 		inb((up->port.iobase & 0xfe0) | 0x1f);
742*4882a593Smuzhiyun 		up->port.mctrl |= TIOCM_OUT1;
743*4882a593Smuzhiyun 	} else
744*4882a593Smuzhiyun 		up->port.mctrl &= ~TIOCM_OUT2;
745*4882a593Smuzhiyun 
746*4882a593Smuzhiyun 	sunsu_set_mctrl(&up->port, up->port.mctrl);
747*4882a593Smuzhiyun 	spin_unlock_irqrestore(&up->port.lock, flags);
748*4882a593Smuzhiyun 
749*4882a593Smuzhiyun 	/*
750*4882a593Smuzhiyun 	 * Disable break condition and FIFOs
751*4882a593Smuzhiyun 	 */
752*4882a593Smuzhiyun 	serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
753*4882a593Smuzhiyun 	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
754*4882a593Smuzhiyun 				  UART_FCR_CLEAR_RCVR |
755*4882a593Smuzhiyun 				  UART_FCR_CLEAR_XMIT);
756*4882a593Smuzhiyun 	serial_outp(up, UART_FCR, 0);
757*4882a593Smuzhiyun 
758*4882a593Smuzhiyun #ifdef CONFIG_SERIAL_8250_RSA
759*4882a593Smuzhiyun 	/*
760*4882a593Smuzhiyun 	 * Reset the RSA board back to 115kbps compat mode.
761*4882a593Smuzhiyun 	 */
762*4882a593Smuzhiyun 	disable_rsa(up);
763*4882a593Smuzhiyun #endif
764*4882a593Smuzhiyun 
765*4882a593Smuzhiyun 	/*
766*4882a593Smuzhiyun 	 * Read data port to reset things.
767*4882a593Smuzhiyun 	 */
768*4882a593Smuzhiyun 	(void) serial_in(up, UART_RX);
769*4882a593Smuzhiyun 
770*4882a593Smuzhiyun 	free_irq(up->port.irq, up);
771*4882a593Smuzhiyun }
772*4882a593Smuzhiyun 
773*4882a593Smuzhiyun static void
sunsu_change_speed(struct uart_port * port,unsigned int cflag,unsigned int iflag,unsigned int quot)774*4882a593Smuzhiyun sunsu_change_speed(struct uart_port *port, unsigned int cflag,
775*4882a593Smuzhiyun 		   unsigned int iflag, unsigned int quot)
776*4882a593Smuzhiyun {
777*4882a593Smuzhiyun 	struct uart_sunsu_port *up =
778*4882a593Smuzhiyun 		container_of(port, struct uart_sunsu_port, port);
779*4882a593Smuzhiyun 	unsigned char cval, fcr = 0;
780*4882a593Smuzhiyun 	unsigned long flags;
781*4882a593Smuzhiyun 
782*4882a593Smuzhiyun 	switch (cflag & CSIZE) {
783*4882a593Smuzhiyun 	case CS5:
784*4882a593Smuzhiyun 		cval = 0x00;
785*4882a593Smuzhiyun 		break;
786*4882a593Smuzhiyun 	case CS6:
787*4882a593Smuzhiyun 		cval = 0x01;
788*4882a593Smuzhiyun 		break;
789*4882a593Smuzhiyun 	case CS7:
790*4882a593Smuzhiyun 		cval = 0x02;
791*4882a593Smuzhiyun 		break;
792*4882a593Smuzhiyun 	default:
793*4882a593Smuzhiyun 	case CS8:
794*4882a593Smuzhiyun 		cval = 0x03;
795*4882a593Smuzhiyun 		break;
796*4882a593Smuzhiyun 	}
797*4882a593Smuzhiyun 
798*4882a593Smuzhiyun 	if (cflag & CSTOPB)
799*4882a593Smuzhiyun 		cval |= 0x04;
800*4882a593Smuzhiyun 	if (cflag & PARENB)
801*4882a593Smuzhiyun 		cval |= UART_LCR_PARITY;
802*4882a593Smuzhiyun 	if (!(cflag & PARODD))
803*4882a593Smuzhiyun 		cval |= UART_LCR_EPAR;
804*4882a593Smuzhiyun #ifdef CMSPAR
805*4882a593Smuzhiyun 	if (cflag & CMSPAR)
806*4882a593Smuzhiyun 		cval |= UART_LCR_SPAR;
807*4882a593Smuzhiyun #endif
808*4882a593Smuzhiyun 
809*4882a593Smuzhiyun 	/*
810*4882a593Smuzhiyun 	 * Work around a bug in the Oxford Semiconductor 952 rev B
811*4882a593Smuzhiyun 	 * chip which causes it to seriously miscalculate baud rates
812*4882a593Smuzhiyun 	 * when DLL is 0.
813*4882a593Smuzhiyun 	 */
814*4882a593Smuzhiyun 	if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
815*4882a593Smuzhiyun 	    up->rev == 0x5201)
816*4882a593Smuzhiyun 		quot ++;
817*4882a593Smuzhiyun 
818*4882a593Smuzhiyun 	if (uart_config[up->port.type].flags & UART_USE_FIFO) {
819*4882a593Smuzhiyun 		if ((up->port.uartclk / quot) < (2400 * 16))
820*4882a593Smuzhiyun 			fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
821*4882a593Smuzhiyun #ifdef CONFIG_SERIAL_8250_RSA
822*4882a593Smuzhiyun 		else if (up->port.type == PORT_RSA)
823*4882a593Smuzhiyun 			fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
824*4882a593Smuzhiyun #endif
825*4882a593Smuzhiyun 		else
826*4882a593Smuzhiyun 			fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
827*4882a593Smuzhiyun 	}
828*4882a593Smuzhiyun 	if (up->port.type == PORT_16750)
829*4882a593Smuzhiyun 		fcr |= UART_FCR7_64BYTE;
830*4882a593Smuzhiyun 
831*4882a593Smuzhiyun 	/*
832*4882a593Smuzhiyun 	 * Ok, we're now changing the port state.  Do it with
833*4882a593Smuzhiyun 	 * interrupts disabled.
834*4882a593Smuzhiyun 	 */
835*4882a593Smuzhiyun 	spin_lock_irqsave(&up->port.lock, flags);
836*4882a593Smuzhiyun 
837*4882a593Smuzhiyun 	/*
838*4882a593Smuzhiyun 	 * Update the per-port timeout.
839*4882a593Smuzhiyun 	 */
840*4882a593Smuzhiyun 	uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
841*4882a593Smuzhiyun 
842*4882a593Smuzhiyun 	up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
843*4882a593Smuzhiyun 	if (iflag & INPCK)
844*4882a593Smuzhiyun 		up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
845*4882a593Smuzhiyun 	if (iflag & (IGNBRK | BRKINT | PARMRK))
846*4882a593Smuzhiyun 		up->port.read_status_mask |= UART_LSR_BI;
847*4882a593Smuzhiyun 
848*4882a593Smuzhiyun 	/*
849*4882a593Smuzhiyun 	 * Characteres to ignore
850*4882a593Smuzhiyun 	 */
851*4882a593Smuzhiyun 	up->port.ignore_status_mask = 0;
852*4882a593Smuzhiyun 	if (iflag & IGNPAR)
853*4882a593Smuzhiyun 		up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
854*4882a593Smuzhiyun 	if (iflag & IGNBRK) {
855*4882a593Smuzhiyun 		up->port.ignore_status_mask |= UART_LSR_BI;
856*4882a593Smuzhiyun 		/*
857*4882a593Smuzhiyun 		 * If we're ignoring parity and break indicators,
858*4882a593Smuzhiyun 		 * ignore overruns too (for real raw support).
859*4882a593Smuzhiyun 		 */
860*4882a593Smuzhiyun 		if (iflag & IGNPAR)
861*4882a593Smuzhiyun 			up->port.ignore_status_mask |= UART_LSR_OE;
862*4882a593Smuzhiyun 	}
863*4882a593Smuzhiyun 
864*4882a593Smuzhiyun 	/*
865*4882a593Smuzhiyun 	 * ignore all characters if CREAD is not set
866*4882a593Smuzhiyun 	 */
867*4882a593Smuzhiyun 	if ((cflag & CREAD) == 0)
868*4882a593Smuzhiyun 		up->port.ignore_status_mask |= UART_LSR_DR;
869*4882a593Smuzhiyun 
870*4882a593Smuzhiyun 	/*
871*4882a593Smuzhiyun 	 * CTS flow control flag and modem status interrupts
872*4882a593Smuzhiyun 	 */
873*4882a593Smuzhiyun 	up->ier &= ~UART_IER_MSI;
874*4882a593Smuzhiyun 	if (UART_ENABLE_MS(&up->port, cflag))
875*4882a593Smuzhiyun 		up->ier |= UART_IER_MSI;
876*4882a593Smuzhiyun 
877*4882a593Smuzhiyun 	serial_out(up, UART_IER, up->ier);
878*4882a593Smuzhiyun 
879*4882a593Smuzhiyun 	if (uart_config[up->port.type].flags & UART_STARTECH) {
880*4882a593Smuzhiyun 		serial_outp(up, UART_LCR, 0xBF);
881*4882a593Smuzhiyun 		serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
882*4882a593Smuzhiyun 	}
883*4882a593Smuzhiyun 	serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
884*4882a593Smuzhiyun 	serial_outp(up, UART_DLL, quot & 0xff);		/* LS of divisor */
885*4882a593Smuzhiyun 	serial_outp(up, UART_DLM, quot >> 8);		/* MS of divisor */
886*4882a593Smuzhiyun 	if (up->port.type == PORT_16750)
887*4882a593Smuzhiyun 		serial_outp(up, UART_FCR, fcr);		/* set fcr */
888*4882a593Smuzhiyun 	serial_outp(up, UART_LCR, cval);		/* reset DLAB */
889*4882a593Smuzhiyun 	up->lcr = cval;					/* Save LCR */
890*4882a593Smuzhiyun 	if (up->port.type != PORT_16750) {
891*4882a593Smuzhiyun 		if (fcr & UART_FCR_ENABLE_FIFO) {
892*4882a593Smuzhiyun 			/* emulated UARTs (Lucent Venus 167x) need two steps */
893*4882a593Smuzhiyun 			serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
894*4882a593Smuzhiyun 		}
895*4882a593Smuzhiyun 		serial_outp(up, UART_FCR, fcr);		/* set fcr */
896*4882a593Smuzhiyun 	}
897*4882a593Smuzhiyun 
898*4882a593Smuzhiyun 	up->cflag = cflag;
899*4882a593Smuzhiyun 
900*4882a593Smuzhiyun 	spin_unlock_irqrestore(&up->port.lock, flags);
901*4882a593Smuzhiyun }
902*4882a593Smuzhiyun 
903*4882a593Smuzhiyun static void
sunsu_set_termios(struct uart_port * port,struct ktermios * termios,struct ktermios * old)904*4882a593Smuzhiyun sunsu_set_termios(struct uart_port *port, struct ktermios *termios,
905*4882a593Smuzhiyun 		  struct ktermios *old)
906*4882a593Smuzhiyun {
907*4882a593Smuzhiyun 	unsigned int baud, quot;
908*4882a593Smuzhiyun 
909*4882a593Smuzhiyun 	/*
910*4882a593Smuzhiyun 	 * Ask the core to calculate the divisor for us.
911*4882a593Smuzhiyun 	 */
912*4882a593Smuzhiyun 	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
913*4882a593Smuzhiyun 	quot = uart_get_divisor(port, baud);
914*4882a593Smuzhiyun 
915*4882a593Smuzhiyun 	sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
916*4882a593Smuzhiyun }
917*4882a593Smuzhiyun 
sunsu_release_port(struct uart_port * port)918*4882a593Smuzhiyun static void sunsu_release_port(struct uart_port *port)
919*4882a593Smuzhiyun {
920*4882a593Smuzhiyun }
921*4882a593Smuzhiyun 
sunsu_request_port(struct uart_port * port)922*4882a593Smuzhiyun static int sunsu_request_port(struct uart_port *port)
923*4882a593Smuzhiyun {
924*4882a593Smuzhiyun 	return 0;
925*4882a593Smuzhiyun }
926*4882a593Smuzhiyun 
sunsu_config_port(struct uart_port * port,int flags)927*4882a593Smuzhiyun static void sunsu_config_port(struct uart_port *port, int flags)
928*4882a593Smuzhiyun {
929*4882a593Smuzhiyun 	struct uart_sunsu_port *up =
930*4882a593Smuzhiyun 		container_of(port, struct uart_sunsu_port, port);
931*4882a593Smuzhiyun 
932*4882a593Smuzhiyun 	if (flags & UART_CONFIG_TYPE) {
933*4882a593Smuzhiyun 		/*
934*4882a593Smuzhiyun 		 * We are supposed to call autoconfig here, but this requires
935*4882a593Smuzhiyun 		 * splitting all the OBP probing crap from the UART probing.
936*4882a593Smuzhiyun 		 * We'll do it when we kill sunsu.c altogether.
937*4882a593Smuzhiyun 		 */
938*4882a593Smuzhiyun 		port->type = up->type_probed;	/* XXX */
939*4882a593Smuzhiyun 	}
940*4882a593Smuzhiyun }
941*4882a593Smuzhiyun 
942*4882a593Smuzhiyun static int
sunsu_verify_port(struct uart_port * port,struct serial_struct * ser)943*4882a593Smuzhiyun sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
944*4882a593Smuzhiyun {
945*4882a593Smuzhiyun 	return -EINVAL;
946*4882a593Smuzhiyun }
947*4882a593Smuzhiyun 
948*4882a593Smuzhiyun static const char *
sunsu_type(struct uart_port * port)949*4882a593Smuzhiyun sunsu_type(struct uart_port *port)
950*4882a593Smuzhiyun {
951*4882a593Smuzhiyun 	int type = port->type;
952*4882a593Smuzhiyun 
953*4882a593Smuzhiyun 	if (type >= ARRAY_SIZE(uart_config))
954*4882a593Smuzhiyun 		type = 0;
955*4882a593Smuzhiyun 	return uart_config[type].name;
956*4882a593Smuzhiyun }
957*4882a593Smuzhiyun 
958*4882a593Smuzhiyun static const struct uart_ops sunsu_pops = {
959*4882a593Smuzhiyun 	.tx_empty	= sunsu_tx_empty,
960*4882a593Smuzhiyun 	.set_mctrl	= sunsu_set_mctrl,
961*4882a593Smuzhiyun 	.get_mctrl	= sunsu_get_mctrl,
962*4882a593Smuzhiyun 	.stop_tx	= sunsu_stop_tx,
963*4882a593Smuzhiyun 	.start_tx	= sunsu_start_tx,
964*4882a593Smuzhiyun 	.stop_rx	= sunsu_stop_rx,
965*4882a593Smuzhiyun 	.enable_ms	= sunsu_enable_ms,
966*4882a593Smuzhiyun 	.break_ctl	= sunsu_break_ctl,
967*4882a593Smuzhiyun 	.startup	= sunsu_startup,
968*4882a593Smuzhiyun 	.shutdown	= sunsu_shutdown,
969*4882a593Smuzhiyun 	.set_termios	= sunsu_set_termios,
970*4882a593Smuzhiyun 	.type		= sunsu_type,
971*4882a593Smuzhiyun 	.release_port	= sunsu_release_port,
972*4882a593Smuzhiyun 	.request_port	= sunsu_request_port,
973*4882a593Smuzhiyun 	.config_port	= sunsu_config_port,
974*4882a593Smuzhiyun 	.verify_port	= sunsu_verify_port,
975*4882a593Smuzhiyun };
976*4882a593Smuzhiyun 
977*4882a593Smuzhiyun #define UART_NR	4
978*4882a593Smuzhiyun 
979*4882a593Smuzhiyun static struct uart_sunsu_port sunsu_ports[UART_NR];
980*4882a593Smuzhiyun static int nr_inst; /* Number of already registered ports */
981*4882a593Smuzhiyun 
982*4882a593Smuzhiyun #ifdef CONFIG_SERIO
983*4882a593Smuzhiyun 
984*4882a593Smuzhiyun static DEFINE_SPINLOCK(sunsu_serio_lock);
985*4882a593Smuzhiyun 
sunsu_serio_write(struct serio * serio,unsigned char ch)986*4882a593Smuzhiyun static int sunsu_serio_write(struct serio *serio, unsigned char ch)
987*4882a593Smuzhiyun {
988*4882a593Smuzhiyun 	struct uart_sunsu_port *up = serio->port_data;
989*4882a593Smuzhiyun 	unsigned long flags;
990*4882a593Smuzhiyun 	int lsr;
991*4882a593Smuzhiyun 
992*4882a593Smuzhiyun 	spin_lock_irqsave(&sunsu_serio_lock, flags);
993*4882a593Smuzhiyun 
994*4882a593Smuzhiyun 	do {
995*4882a593Smuzhiyun 		lsr = serial_in(up, UART_LSR);
996*4882a593Smuzhiyun 	} while (!(lsr & UART_LSR_THRE));
997*4882a593Smuzhiyun 
998*4882a593Smuzhiyun 	/* Send the character out. */
999*4882a593Smuzhiyun 	serial_out(up, UART_TX, ch);
1000*4882a593Smuzhiyun 
1001*4882a593Smuzhiyun 	spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1002*4882a593Smuzhiyun 
1003*4882a593Smuzhiyun 	return 0;
1004*4882a593Smuzhiyun }
1005*4882a593Smuzhiyun 
sunsu_serio_open(struct serio * serio)1006*4882a593Smuzhiyun static int sunsu_serio_open(struct serio *serio)
1007*4882a593Smuzhiyun {
1008*4882a593Smuzhiyun 	struct uart_sunsu_port *up = serio->port_data;
1009*4882a593Smuzhiyun 	unsigned long flags;
1010*4882a593Smuzhiyun 	int ret;
1011*4882a593Smuzhiyun 
1012*4882a593Smuzhiyun 	spin_lock_irqsave(&sunsu_serio_lock, flags);
1013*4882a593Smuzhiyun 	if (!up->serio_open) {
1014*4882a593Smuzhiyun 		up->serio_open = 1;
1015*4882a593Smuzhiyun 		ret = 0;
1016*4882a593Smuzhiyun 	} else
1017*4882a593Smuzhiyun 		ret = -EBUSY;
1018*4882a593Smuzhiyun 	spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1019*4882a593Smuzhiyun 
1020*4882a593Smuzhiyun 	return ret;
1021*4882a593Smuzhiyun }
1022*4882a593Smuzhiyun 
sunsu_serio_close(struct serio * serio)1023*4882a593Smuzhiyun static void sunsu_serio_close(struct serio *serio)
1024*4882a593Smuzhiyun {
1025*4882a593Smuzhiyun 	struct uart_sunsu_port *up = serio->port_data;
1026*4882a593Smuzhiyun 	unsigned long flags;
1027*4882a593Smuzhiyun 
1028*4882a593Smuzhiyun 	spin_lock_irqsave(&sunsu_serio_lock, flags);
1029*4882a593Smuzhiyun 	up->serio_open = 0;
1030*4882a593Smuzhiyun 	spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1031*4882a593Smuzhiyun }
1032*4882a593Smuzhiyun 
1033*4882a593Smuzhiyun #endif /* CONFIG_SERIO */
1034*4882a593Smuzhiyun 
sunsu_autoconfig(struct uart_sunsu_port * up)1035*4882a593Smuzhiyun static void sunsu_autoconfig(struct uart_sunsu_port *up)
1036*4882a593Smuzhiyun {
1037*4882a593Smuzhiyun 	unsigned char status1, status2, scratch, scratch2, scratch3;
1038*4882a593Smuzhiyun 	unsigned char save_lcr, save_mcr;
1039*4882a593Smuzhiyun 	unsigned long flags;
1040*4882a593Smuzhiyun 
1041*4882a593Smuzhiyun 	if (up->su_type == SU_PORT_NONE)
1042*4882a593Smuzhiyun 		return;
1043*4882a593Smuzhiyun 
1044*4882a593Smuzhiyun 	up->type_probed = PORT_UNKNOWN;
1045*4882a593Smuzhiyun 	up->port.iotype = UPIO_MEM;
1046*4882a593Smuzhiyun 
1047*4882a593Smuzhiyun 	spin_lock_irqsave(&up->port.lock, flags);
1048*4882a593Smuzhiyun 
1049*4882a593Smuzhiyun 	if (!(up->port.flags & UPF_BUGGY_UART)) {
1050*4882a593Smuzhiyun 		/*
1051*4882a593Smuzhiyun 		 * Do a simple existence test first; if we fail this, there's
1052*4882a593Smuzhiyun 		 * no point trying anything else.
1053*4882a593Smuzhiyun 		 *
1054*4882a593Smuzhiyun 		 * 0x80 is used as a nonsense port to prevent against false
1055*4882a593Smuzhiyun 		 * positives due to ISA bus float.  The assumption is that
1056*4882a593Smuzhiyun 		 * 0x80 is a non-existent port; which should be safe since
1057*4882a593Smuzhiyun 		 * include/asm/io.h also makes this assumption.
1058*4882a593Smuzhiyun 		 */
1059*4882a593Smuzhiyun 		scratch = serial_inp(up, UART_IER);
1060*4882a593Smuzhiyun 		serial_outp(up, UART_IER, 0);
1061*4882a593Smuzhiyun #ifdef __i386__
1062*4882a593Smuzhiyun 		outb(0xff, 0x080);
1063*4882a593Smuzhiyun #endif
1064*4882a593Smuzhiyun 		scratch2 = serial_inp(up, UART_IER);
1065*4882a593Smuzhiyun 		serial_outp(up, UART_IER, 0x0f);
1066*4882a593Smuzhiyun #ifdef __i386__
1067*4882a593Smuzhiyun 		outb(0, 0x080);
1068*4882a593Smuzhiyun #endif
1069*4882a593Smuzhiyun 		scratch3 = serial_inp(up, UART_IER);
1070*4882a593Smuzhiyun 		serial_outp(up, UART_IER, scratch);
1071*4882a593Smuzhiyun 		if (scratch2 != 0 || scratch3 != 0x0F)
1072*4882a593Smuzhiyun 			goto out;	/* We failed; there's nothing here */
1073*4882a593Smuzhiyun 	}
1074*4882a593Smuzhiyun 
1075*4882a593Smuzhiyun 	save_mcr = serial_in(up, UART_MCR);
1076*4882a593Smuzhiyun 	save_lcr = serial_in(up, UART_LCR);
1077*4882a593Smuzhiyun 
1078*4882a593Smuzhiyun 	/*
1079*4882a593Smuzhiyun 	 * Check to see if a UART is really there.  Certain broken
1080*4882a593Smuzhiyun 	 * internal modems based on the Rockwell chipset fail this
1081*4882a593Smuzhiyun 	 * test, because they apparently don't implement the loopback
1082*4882a593Smuzhiyun 	 * test mode.  So this test is skipped on the COM 1 through
1083*4882a593Smuzhiyun 	 * COM 4 ports.  This *should* be safe, since no board
1084*4882a593Smuzhiyun 	 * manufacturer would be stupid enough to design a board
1085*4882a593Smuzhiyun 	 * that conflicts with COM 1-4 --- we hope!
1086*4882a593Smuzhiyun 	 */
1087*4882a593Smuzhiyun 	if (!(up->port.flags & UPF_SKIP_TEST)) {
1088*4882a593Smuzhiyun 		serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1089*4882a593Smuzhiyun 		status1 = serial_inp(up, UART_MSR) & 0xF0;
1090*4882a593Smuzhiyun 		serial_outp(up, UART_MCR, save_mcr);
1091*4882a593Smuzhiyun 		if (status1 != 0x90)
1092*4882a593Smuzhiyun 			goto out;	/* We failed loopback test */
1093*4882a593Smuzhiyun 	}
1094*4882a593Smuzhiyun 	serial_outp(up, UART_LCR, 0xBF);	/* set up for StarTech test */
1095*4882a593Smuzhiyun 	serial_outp(up, UART_EFR, 0);		/* EFR is the same as FCR */
1096*4882a593Smuzhiyun 	serial_outp(up, UART_LCR, 0);
1097*4882a593Smuzhiyun 	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1098*4882a593Smuzhiyun 	scratch = serial_in(up, UART_IIR) >> 6;
1099*4882a593Smuzhiyun 	switch (scratch) {
1100*4882a593Smuzhiyun 		case 0:
1101*4882a593Smuzhiyun 			up->port.type = PORT_16450;
1102*4882a593Smuzhiyun 			break;
1103*4882a593Smuzhiyun 		case 1:
1104*4882a593Smuzhiyun 			up->port.type = PORT_UNKNOWN;
1105*4882a593Smuzhiyun 			break;
1106*4882a593Smuzhiyun 		case 2:
1107*4882a593Smuzhiyun 			up->port.type = PORT_16550;
1108*4882a593Smuzhiyun 			break;
1109*4882a593Smuzhiyun 		case 3:
1110*4882a593Smuzhiyun 			up->port.type = PORT_16550A;
1111*4882a593Smuzhiyun 			break;
1112*4882a593Smuzhiyun 	}
1113*4882a593Smuzhiyun 	if (up->port.type == PORT_16550A) {
1114*4882a593Smuzhiyun 		/* Check for Startech UART's */
1115*4882a593Smuzhiyun 		serial_outp(up, UART_LCR, UART_LCR_DLAB);
1116*4882a593Smuzhiyun 		if (serial_in(up, UART_EFR) == 0) {
1117*4882a593Smuzhiyun 			up->port.type = PORT_16650;
1118*4882a593Smuzhiyun 		} else {
1119*4882a593Smuzhiyun 			serial_outp(up, UART_LCR, 0xBF);
1120*4882a593Smuzhiyun 			if (serial_in(up, UART_EFR) == 0)
1121*4882a593Smuzhiyun 				up->port.type = PORT_16650V2;
1122*4882a593Smuzhiyun 		}
1123*4882a593Smuzhiyun 	}
1124*4882a593Smuzhiyun 	if (up->port.type == PORT_16550A) {
1125*4882a593Smuzhiyun 		/* Check for TI 16750 */
1126*4882a593Smuzhiyun 		serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1127*4882a593Smuzhiyun 		serial_outp(up, UART_FCR,
1128*4882a593Smuzhiyun 			    UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1129*4882a593Smuzhiyun 		scratch = serial_in(up, UART_IIR) >> 5;
1130*4882a593Smuzhiyun 		if (scratch == 7) {
1131*4882a593Smuzhiyun 			/*
1132*4882a593Smuzhiyun 			 * If this is a 16750, and not a cheap UART
1133*4882a593Smuzhiyun 			 * clone, then it should only go into 64 byte
1134*4882a593Smuzhiyun 			 * mode if the UART_FCR7_64BYTE bit was set
1135*4882a593Smuzhiyun 			 * while UART_LCR_DLAB was latched.
1136*4882a593Smuzhiyun 			 */
1137*4882a593Smuzhiyun  			serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1138*4882a593Smuzhiyun 			serial_outp(up, UART_LCR, 0);
1139*4882a593Smuzhiyun 			serial_outp(up, UART_FCR,
1140*4882a593Smuzhiyun 				    UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1141*4882a593Smuzhiyun 			scratch = serial_in(up, UART_IIR) >> 5;
1142*4882a593Smuzhiyun 			if (scratch == 6)
1143*4882a593Smuzhiyun 				up->port.type = PORT_16750;
1144*4882a593Smuzhiyun 		}
1145*4882a593Smuzhiyun 		serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1146*4882a593Smuzhiyun 	}
1147*4882a593Smuzhiyun 	serial_outp(up, UART_LCR, save_lcr);
1148*4882a593Smuzhiyun 	if (up->port.type == PORT_16450) {
1149*4882a593Smuzhiyun 		scratch = serial_in(up, UART_SCR);
1150*4882a593Smuzhiyun 		serial_outp(up, UART_SCR, 0xa5);
1151*4882a593Smuzhiyun 		status1 = serial_in(up, UART_SCR);
1152*4882a593Smuzhiyun 		serial_outp(up, UART_SCR, 0x5a);
1153*4882a593Smuzhiyun 		status2 = serial_in(up, UART_SCR);
1154*4882a593Smuzhiyun 		serial_outp(up, UART_SCR, scratch);
1155*4882a593Smuzhiyun 
1156*4882a593Smuzhiyun 		if ((status1 != 0xa5) || (status2 != 0x5a))
1157*4882a593Smuzhiyun 			up->port.type = PORT_8250;
1158*4882a593Smuzhiyun 	}
1159*4882a593Smuzhiyun 
1160*4882a593Smuzhiyun 	up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1161*4882a593Smuzhiyun 
1162*4882a593Smuzhiyun 	if (up->port.type == PORT_UNKNOWN)
1163*4882a593Smuzhiyun 		goto out;
1164*4882a593Smuzhiyun 	up->type_probed = up->port.type;	/* XXX */
1165*4882a593Smuzhiyun 
1166*4882a593Smuzhiyun 	/*
1167*4882a593Smuzhiyun 	 * Reset the UART.
1168*4882a593Smuzhiyun 	 */
1169*4882a593Smuzhiyun #ifdef CONFIG_SERIAL_8250_RSA
1170*4882a593Smuzhiyun 	if (up->port.type == PORT_RSA)
1171*4882a593Smuzhiyun 		serial_outp(up, UART_RSA_FRR, 0);
1172*4882a593Smuzhiyun #endif
1173*4882a593Smuzhiyun 	serial_outp(up, UART_MCR, save_mcr);
1174*4882a593Smuzhiyun 	serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1175*4882a593Smuzhiyun 				     UART_FCR_CLEAR_RCVR |
1176*4882a593Smuzhiyun 				     UART_FCR_CLEAR_XMIT));
1177*4882a593Smuzhiyun 	serial_outp(up, UART_FCR, 0);
1178*4882a593Smuzhiyun 	(void)serial_in(up, UART_RX);
1179*4882a593Smuzhiyun 	serial_outp(up, UART_IER, 0);
1180*4882a593Smuzhiyun 
1181*4882a593Smuzhiyun out:
1182*4882a593Smuzhiyun 	spin_unlock_irqrestore(&up->port.lock, flags);
1183*4882a593Smuzhiyun }
1184*4882a593Smuzhiyun 
1185*4882a593Smuzhiyun static struct uart_driver sunsu_reg = {
1186*4882a593Smuzhiyun 	.owner			= THIS_MODULE,
1187*4882a593Smuzhiyun 	.driver_name		= "sunsu",
1188*4882a593Smuzhiyun 	.dev_name		= "ttyS",
1189*4882a593Smuzhiyun 	.major			= TTY_MAJOR,
1190*4882a593Smuzhiyun };
1191*4882a593Smuzhiyun 
sunsu_kbd_ms_init(struct uart_sunsu_port * up)1192*4882a593Smuzhiyun static int sunsu_kbd_ms_init(struct uart_sunsu_port *up)
1193*4882a593Smuzhiyun {
1194*4882a593Smuzhiyun 	int quot, baud;
1195*4882a593Smuzhiyun #ifdef CONFIG_SERIO
1196*4882a593Smuzhiyun 	struct serio *serio;
1197*4882a593Smuzhiyun #endif
1198*4882a593Smuzhiyun 
1199*4882a593Smuzhiyun 	if (up->su_type == SU_PORT_KBD) {
1200*4882a593Smuzhiyun 		up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1201*4882a593Smuzhiyun 		baud = 1200;
1202*4882a593Smuzhiyun 	} else {
1203*4882a593Smuzhiyun 		up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1204*4882a593Smuzhiyun 		baud = 4800;
1205*4882a593Smuzhiyun 	}
1206*4882a593Smuzhiyun 	quot = up->port.uartclk / (16 * baud);
1207*4882a593Smuzhiyun 
1208*4882a593Smuzhiyun 	sunsu_autoconfig(up);
1209*4882a593Smuzhiyun 	if (up->port.type == PORT_UNKNOWN)
1210*4882a593Smuzhiyun 		return -ENODEV;
1211*4882a593Smuzhiyun 
1212*4882a593Smuzhiyun 	printk("%pOF: %s port at %llx, irq %u\n",
1213*4882a593Smuzhiyun 	       up->port.dev->of_node,
1214*4882a593Smuzhiyun 	       (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
1215*4882a593Smuzhiyun 	       (unsigned long long) up->port.mapbase,
1216*4882a593Smuzhiyun 	       up->port.irq);
1217*4882a593Smuzhiyun 
1218*4882a593Smuzhiyun #ifdef CONFIG_SERIO
1219*4882a593Smuzhiyun 	serio = &up->serio;
1220*4882a593Smuzhiyun 	serio->port_data = up;
1221*4882a593Smuzhiyun 
1222*4882a593Smuzhiyun 	serio->id.type = SERIO_RS232;
1223*4882a593Smuzhiyun 	if (up->su_type == SU_PORT_KBD) {
1224*4882a593Smuzhiyun 		serio->id.proto = SERIO_SUNKBD;
1225*4882a593Smuzhiyun 		strlcpy(serio->name, "sukbd", sizeof(serio->name));
1226*4882a593Smuzhiyun 	} else {
1227*4882a593Smuzhiyun 		serio->id.proto = SERIO_SUN;
1228*4882a593Smuzhiyun 		serio->id.extra = 1;
1229*4882a593Smuzhiyun 		strlcpy(serio->name, "sums", sizeof(serio->name));
1230*4882a593Smuzhiyun 	}
1231*4882a593Smuzhiyun 	strlcpy(serio->phys,
1232*4882a593Smuzhiyun 		(!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
1233*4882a593Smuzhiyun 		sizeof(serio->phys));
1234*4882a593Smuzhiyun 
1235*4882a593Smuzhiyun 	serio->write = sunsu_serio_write;
1236*4882a593Smuzhiyun 	serio->open = sunsu_serio_open;
1237*4882a593Smuzhiyun 	serio->close = sunsu_serio_close;
1238*4882a593Smuzhiyun 	serio->dev.parent = up->port.dev;
1239*4882a593Smuzhiyun 
1240*4882a593Smuzhiyun 	serio_register_port(serio);
1241*4882a593Smuzhiyun #endif
1242*4882a593Smuzhiyun 
1243*4882a593Smuzhiyun 	sunsu_change_speed(&up->port, up->cflag, 0, quot);
1244*4882a593Smuzhiyun 
1245*4882a593Smuzhiyun 	sunsu_startup(&up->port);
1246*4882a593Smuzhiyun 	return 0;
1247*4882a593Smuzhiyun }
1248*4882a593Smuzhiyun 
1249*4882a593Smuzhiyun /*
1250*4882a593Smuzhiyun  * ------------------------------------------------------------
1251*4882a593Smuzhiyun  * Serial console driver
1252*4882a593Smuzhiyun  * ------------------------------------------------------------
1253*4882a593Smuzhiyun  */
1254*4882a593Smuzhiyun 
1255*4882a593Smuzhiyun #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1256*4882a593Smuzhiyun 
1257*4882a593Smuzhiyun #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1258*4882a593Smuzhiyun 
1259*4882a593Smuzhiyun /*
1260*4882a593Smuzhiyun  *	Wait for transmitter & holding register to empty
1261*4882a593Smuzhiyun  */
wait_for_xmitr(struct uart_sunsu_port * up)1262*4882a593Smuzhiyun static void wait_for_xmitr(struct uart_sunsu_port *up)
1263*4882a593Smuzhiyun {
1264*4882a593Smuzhiyun 	unsigned int status, tmout = 10000;
1265*4882a593Smuzhiyun 
1266*4882a593Smuzhiyun 	/* Wait up to 10ms for the character(s) to be sent. */
1267*4882a593Smuzhiyun 	do {
1268*4882a593Smuzhiyun 		status = serial_in(up, UART_LSR);
1269*4882a593Smuzhiyun 
1270*4882a593Smuzhiyun 		if (status & UART_LSR_BI)
1271*4882a593Smuzhiyun 			up->lsr_break_flag = UART_LSR_BI;
1272*4882a593Smuzhiyun 
1273*4882a593Smuzhiyun 		if (--tmout == 0)
1274*4882a593Smuzhiyun 			break;
1275*4882a593Smuzhiyun 		udelay(1);
1276*4882a593Smuzhiyun 	} while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1277*4882a593Smuzhiyun 
1278*4882a593Smuzhiyun 	/* Wait up to 1s for flow control if necessary */
1279*4882a593Smuzhiyun 	if (up->port.flags & UPF_CONS_FLOW) {
1280*4882a593Smuzhiyun 		tmout = 1000000;
1281*4882a593Smuzhiyun 		while (--tmout &&
1282*4882a593Smuzhiyun 		       ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1283*4882a593Smuzhiyun 			udelay(1);
1284*4882a593Smuzhiyun 	}
1285*4882a593Smuzhiyun }
1286*4882a593Smuzhiyun 
sunsu_console_putchar(struct uart_port * port,int ch)1287*4882a593Smuzhiyun static void sunsu_console_putchar(struct uart_port *port, int ch)
1288*4882a593Smuzhiyun {
1289*4882a593Smuzhiyun 	struct uart_sunsu_port *up =
1290*4882a593Smuzhiyun 		container_of(port, struct uart_sunsu_port, port);
1291*4882a593Smuzhiyun 
1292*4882a593Smuzhiyun 	wait_for_xmitr(up);
1293*4882a593Smuzhiyun 	serial_out(up, UART_TX, ch);
1294*4882a593Smuzhiyun }
1295*4882a593Smuzhiyun 
1296*4882a593Smuzhiyun /*
1297*4882a593Smuzhiyun  *	Print a string to the serial port trying not to disturb
1298*4882a593Smuzhiyun  *	any possible real use of the port...
1299*4882a593Smuzhiyun  */
sunsu_console_write(struct console * co,const char * s,unsigned int count)1300*4882a593Smuzhiyun static void sunsu_console_write(struct console *co, const char *s,
1301*4882a593Smuzhiyun 				unsigned int count)
1302*4882a593Smuzhiyun {
1303*4882a593Smuzhiyun 	struct uart_sunsu_port *up = &sunsu_ports[co->index];
1304*4882a593Smuzhiyun 	unsigned long flags;
1305*4882a593Smuzhiyun 	unsigned int ier;
1306*4882a593Smuzhiyun 	int locked = 1;
1307*4882a593Smuzhiyun 
1308*4882a593Smuzhiyun 	if (up->port.sysrq || oops_in_progress)
1309*4882a593Smuzhiyun 		locked = spin_trylock_irqsave(&up->port.lock, flags);
1310*4882a593Smuzhiyun 	else
1311*4882a593Smuzhiyun 		spin_lock_irqsave(&up->port.lock, flags);
1312*4882a593Smuzhiyun 
1313*4882a593Smuzhiyun 	/*
1314*4882a593Smuzhiyun 	 *	First save the UER then disable the interrupts
1315*4882a593Smuzhiyun 	 */
1316*4882a593Smuzhiyun 	ier = serial_in(up, UART_IER);
1317*4882a593Smuzhiyun 	serial_out(up, UART_IER, 0);
1318*4882a593Smuzhiyun 
1319*4882a593Smuzhiyun 	uart_console_write(&up->port, s, count, sunsu_console_putchar);
1320*4882a593Smuzhiyun 
1321*4882a593Smuzhiyun 	/*
1322*4882a593Smuzhiyun 	 *	Finally, wait for transmitter to become empty
1323*4882a593Smuzhiyun 	 *	and restore the IER
1324*4882a593Smuzhiyun 	 */
1325*4882a593Smuzhiyun 	wait_for_xmitr(up);
1326*4882a593Smuzhiyun 	serial_out(up, UART_IER, ier);
1327*4882a593Smuzhiyun 
1328*4882a593Smuzhiyun 	if (locked)
1329*4882a593Smuzhiyun 		spin_unlock_irqrestore(&up->port.lock, flags);
1330*4882a593Smuzhiyun }
1331*4882a593Smuzhiyun 
1332*4882a593Smuzhiyun /*
1333*4882a593Smuzhiyun  *	Setup initial baud/bits/parity. We do two things here:
1334*4882a593Smuzhiyun  *	- construct a cflag setting for the first su_open()
1335*4882a593Smuzhiyun  *	- initialize the serial port
1336*4882a593Smuzhiyun  *	Return non-zero if we didn't find a serial port.
1337*4882a593Smuzhiyun  */
sunsu_console_setup(struct console * co,char * options)1338*4882a593Smuzhiyun static int __init sunsu_console_setup(struct console *co, char *options)
1339*4882a593Smuzhiyun {
1340*4882a593Smuzhiyun 	static struct ktermios dummy;
1341*4882a593Smuzhiyun 	struct ktermios termios;
1342*4882a593Smuzhiyun 	struct uart_port *port;
1343*4882a593Smuzhiyun 
1344*4882a593Smuzhiyun 	printk("Console: ttyS%d (SU)\n",
1345*4882a593Smuzhiyun 	       (sunsu_reg.minor - 64) + co->index);
1346*4882a593Smuzhiyun 
1347*4882a593Smuzhiyun 	if (co->index > nr_inst)
1348*4882a593Smuzhiyun 		return -ENODEV;
1349*4882a593Smuzhiyun 	port = &sunsu_ports[co->index].port;
1350*4882a593Smuzhiyun 
1351*4882a593Smuzhiyun 	/*
1352*4882a593Smuzhiyun 	 * Temporary fix.
1353*4882a593Smuzhiyun 	 */
1354*4882a593Smuzhiyun 	spin_lock_init(&port->lock);
1355*4882a593Smuzhiyun 
1356*4882a593Smuzhiyun 	/* Get firmware console settings.  */
1357*4882a593Smuzhiyun 	sunserial_console_termios(co, port->dev->of_node);
1358*4882a593Smuzhiyun 
1359*4882a593Smuzhiyun 	memset(&termios, 0, sizeof(struct ktermios));
1360*4882a593Smuzhiyun 	termios.c_cflag = co->cflag;
1361*4882a593Smuzhiyun 	port->mctrl |= TIOCM_DTR;
1362*4882a593Smuzhiyun 	port->ops->set_termios(port, &termios, &dummy);
1363*4882a593Smuzhiyun 
1364*4882a593Smuzhiyun 	return 0;
1365*4882a593Smuzhiyun }
1366*4882a593Smuzhiyun 
1367*4882a593Smuzhiyun static struct console sunsu_console = {
1368*4882a593Smuzhiyun 	.name	=	"ttyS",
1369*4882a593Smuzhiyun 	.write	=	sunsu_console_write,
1370*4882a593Smuzhiyun 	.device	=	uart_console_device,
1371*4882a593Smuzhiyun 	.setup	=	sunsu_console_setup,
1372*4882a593Smuzhiyun 	.flags	=	CON_PRINTBUFFER,
1373*4882a593Smuzhiyun 	.index	=	-1,
1374*4882a593Smuzhiyun 	.data	=	&sunsu_reg,
1375*4882a593Smuzhiyun };
1376*4882a593Smuzhiyun 
1377*4882a593Smuzhiyun /*
1378*4882a593Smuzhiyun  *	Register console.
1379*4882a593Smuzhiyun  */
1380*4882a593Smuzhiyun 
SUNSU_CONSOLE(void)1381*4882a593Smuzhiyun static inline struct console *SUNSU_CONSOLE(void)
1382*4882a593Smuzhiyun {
1383*4882a593Smuzhiyun 	return &sunsu_console;
1384*4882a593Smuzhiyun }
1385*4882a593Smuzhiyun #else
1386*4882a593Smuzhiyun #define SUNSU_CONSOLE()			(NULL)
1387*4882a593Smuzhiyun #define sunsu_serial_console_init()	do { } while (0)
1388*4882a593Smuzhiyun #endif
1389*4882a593Smuzhiyun 
su_get_type(struct device_node * dp)1390*4882a593Smuzhiyun static enum su_type su_get_type(struct device_node *dp)
1391*4882a593Smuzhiyun {
1392*4882a593Smuzhiyun 	struct device_node *ap = of_find_node_by_path("/aliases");
1393*4882a593Smuzhiyun 	enum su_type rc = SU_PORT_PORT;
1394*4882a593Smuzhiyun 
1395*4882a593Smuzhiyun 	if (ap) {
1396*4882a593Smuzhiyun 		const char *keyb = of_get_property(ap, "keyboard", NULL);
1397*4882a593Smuzhiyun 		const char *ms = of_get_property(ap, "mouse", NULL);
1398*4882a593Smuzhiyun 		struct device_node *match;
1399*4882a593Smuzhiyun 
1400*4882a593Smuzhiyun 		if (keyb) {
1401*4882a593Smuzhiyun 			match = of_find_node_by_path(keyb);
1402*4882a593Smuzhiyun 
1403*4882a593Smuzhiyun 			/*
1404*4882a593Smuzhiyun 			 * The pointer is used as an identifier not
1405*4882a593Smuzhiyun 			 * as a pointer, we can drop the refcount on
1406*4882a593Smuzhiyun 			 * the of__node immediately after getting it.
1407*4882a593Smuzhiyun 			 */
1408*4882a593Smuzhiyun 			of_node_put(match);
1409*4882a593Smuzhiyun 
1410*4882a593Smuzhiyun 			if (dp == match) {
1411*4882a593Smuzhiyun 				rc = SU_PORT_KBD;
1412*4882a593Smuzhiyun 				goto out;
1413*4882a593Smuzhiyun 			}
1414*4882a593Smuzhiyun 		}
1415*4882a593Smuzhiyun 		if (ms) {
1416*4882a593Smuzhiyun 			match = of_find_node_by_path(ms);
1417*4882a593Smuzhiyun 
1418*4882a593Smuzhiyun 			of_node_put(match);
1419*4882a593Smuzhiyun 
1420*4882a593Smuzhiyun 			if (dp == match) {
1421*4882a593Smuzhiyun 				rc = SU_PORT_MS;
1422*4882a593Smuzhiyun 				goto out;
1423*4882a593Smuzhiyun 			}
1424*4882a593Smuzhiyun 		}
1425*4882a593Smuzhiyun 	}
1426*4882a593Smuzhiyun 
1427*4882a593Smuzhiyun out:
1428*4882a593Smuzhiyun 	of_node_put(ap);
1429*4882a593Smuzhiyun 	return rc;
1430*4882a593Smuzhiyun }
1431*4882a593Smuzhiyun 
su_probe(struct platform_device * op)1432*4882a593Smuzhiyun static int su_probe(struct platform_device *op)
1433*4882a593Smuzhiyun {
1434*4882a593Smuzhiyun 	struct device_node *dp = op->dev.of_node;
1435*4882a593Smuzhiyun 	struct uart_sunsu_port *up;
1436*4882a593Smuzhiyun 	struct resource *rp;
1437*4882a593Smuzhiyun 	enum su_type type;
1438*4882a593Smuzhiyun 	bool ignore_line;
1439*4882a593Smuzhiyun 	int err;
1440*4882a593Smuzhiyun 
1441*4882a593Smuzhiyun 	type = su_get_type(dp);
1442*4882a593Smuzhiyun 	if (type == SU_PORT_PORT) {
1443*4882a593Smuzhiyun 		if (nr_inst >= UART_NR)
1444*4882a593Smuzhiyun 			return -EINVAL;
1445*4882a593Smuzhiyun 		up = &sunsu_ports[nr_inst];
1446*4882a593Smuzhiyun 	} else {
1447*4882a593Smuzhiyun 		up = kzalloc(sizeof(*up), GFP_KERNEL);
1448*4882a593Smuzhiyun 		if (!up)
1449*4882a593Smuzhiyun 			return -ENOMEM;
1450*4882a593Smuzhiyun 	}
1451*4882a593Smuzhiyun 
1452*4882a593Smuzhiyun 	up->port.line = nr_inst;
1453*4882a593Smuzhiyun 
1454*4882a593Smuzhiyun 	spin_lock_init(&up->port.lock);
1455*4882a593Smuzhiyun 
1456*4882a593Smuzhiyun 	up->su_type = type;
1457*4882a593Smuzhiyun 
1458*4882a593Smuzhiyun 	rp = &op->resource[0];
1459*4882a593Smuzhiyun 	up->port.mapbase = rp->start;
1460*4882a593Smuzhiyun 	up->reg_size = resource_size(rp);
1461*4882a593Smuzhiyun 	up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
1462*4882a593Smuzhiyun 	if (!up->port.membase) {
1463*4882a593Smuzhiyun 		if (type != SU_PORT_PORT)
1464*4882a593Smuzhiyun 			kfree(up);
1465*4882a593Smuzhiyun 		return -ENOMEM;
1466*4882a593Smuzhiyun 	}
1467*4882a593Smuzhiyun 
1468*4882a593Smuzhiyun 	up->port.irq = op->archdata.irqs[0];
1469*4882a593Smuzhiyun 
1470*4882a593Smuzhiyun 	up->port.dev = &op->dev;
1471*4882a593Smuzhiyun 
1472*4882a593Smuzhiyun 	up->port.type = PORT_UNKNOWN;
1473*4882a593Smuzhiyun 	up->port.uartclk = (SU_BASE_BAUD * 16);
1474*4882a593Smuzhiyun 	up->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_SUNSU_CONSOLE);
1475*4882a593Smuzhiyun 
1476*4882a593Smuzhiyun 	err = 0;
1477*4882a593Smuzhiyun 	if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
1478*4882a593Smuzhiyun 		err = sunsu_kbd_ms_init(up);
1479*4882a593Smuzhiyun 		if (err) {
1480*4882a593Smuzhiyun 			of_iounmap(&op->resource[0],
1481*4882a593Smuzhiyun 				   up->port.membase, up->reg_size);
1482*4882a593Smuzhiyun 			kfree(up);
1483*4882a593Smuzhiyun 			return err;
1484*4882a593Smuzhiyun 		}
1485*4882a593Smuzhiyun 		platform_set_drvdata(op, up);
1486*4882a593Smuzhiyun 
1487*4882a593Smuzhiyun 		nr_inst++;
1488*4882a593Smuzhiyun 
1489*4882a593Smuzhiyun 		return 0;
1490*4882a593Smuzhiyun 	}
1491*4882a593Smuzhiyun 
1492*4882a593Smuzhiyun 	up->port.flags |= UPF_BOOT_AUTOCONF;
1493*4882a593Smuzhiyun 
1494*4882a593Smuzhiyun 	sunsu_autoconfig(up);
1495*4882a593Smuzhiyun 
1496*4882a593Smuzhiyun 	err = -ENODEV;
1497*4882a593Smuzhiyun 	if (up->port.type == PORT_UNKNOWN)
1498*4882a593Smuzhiyun 		goto out_unmap;
1499*4882a593Smuzhiyun 
1500*4882a593Smuzhiyun 	up->port.ops = &sunsu_pops;
1501*4882a593Smuzhiyun 
1502*4882a593Smuzhiyun 	ignore_line = false;
1503*4882a593Smuzhiyun 	if (of_node_name_eq(dp, "rsc-console") ||
1504*4882a593Smuzhiyun 	    of_node_name_eq(dp, "lom-console"))
1505*4882a593Smuzhiyun 		ignore_line = true;
1506*4882a593Smuzhiyun 
1507*4882a593Smuzhiyun 	sunserial_console_match(SUNSU_CONSOLE(), dp,
1508*4882a593Smuzhiyun 				&sunsu_reg, up->port.line,
1509*4882a593Smuzhiyun 				ignore_line);
1510*4882a593Smuzhiyun 	err = uart_add_one_port(&sunsu_reg, &up->port);
1511*4882a593Smuzhiyun 	if (err)
1512*4882a593Smuzhiyun 		goto out_unmap;
1513*4882a593Smuzhiyun 
1514*4882a593Smuzhiyun 	platform_set_drvdata(op, up);
1515*4882a593Smuzhiyun 
1516*4882a593Smuzhiyun 	nr_inst++;
1517*4882a593Smuzhiyun 
1518*4882a593Smuzhiyun 	return 0;
1519*4882a593Smuzhiyun 
1520*4882a593Smuzhiyun out_unmap:
1521*4882a593Smuzhiyun 	of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1522*4882a593Smuzhiyun 	kfree(up);
1523*4882a593Smuzhiyun 	return err;
1524*4882a593Smuzhiyun }
1525*4882a593Smuzhiyun 
su_remove(struct platform_device * op)1526*4882a593Smuzhiyun static int su_remove(struct platform_device *op)
1527*4882a593Smuzhiyun {
1528*4882a593Smuzhiyun 	struct uart_sunsu_port *up = platform_get_drvdata(op);
1529*4882a593Smuzhiyun 	bool kbdms = false;
1530*4882a593Smuzhiyun 
1531*4882a593Smuzhiyun 	if (up->su_type == SU_PORT_MS ||
1532*4882a593Smuzhiyun 	    up->su_type == SU_PORT_KBD)
1533*4882a593Smuzhiyun 		kbdms = true;
1534*4882a593Smuzhiyun 
1535*4882a593Smuzhiyun 	if (kbdms) {
1536*4882a593Smuzhiyun #ifdef CONFIG_SERIO
1537*4882a593Smuzhiyun 		serio_unregister_port(&up->serio);
1538*4882a593Smuzhiyun #endif
1539*4882a593Smuzhiyun 	} else if (up->port.type != PORT_UNKNOWN)
1540*4882a593Smuzhiyun 		uart_remove_one_port(&sunsu_reg, &up->port);
1541*4882a593Smuzhiyun 
1542*4882a593Smuzhiyun 	if (up->port.membase)
1543*4882a593Smuzhiyun 		of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1544*4882a593Smuzhiyun 
1545*4882a593Smuzhiyun 	if (kbdms)
1546*4882a593Smuzhiyun 		kfree(up);
1547*4882a593Smuzhiyun 
1548*4882a593Smuzhiyun 	return 0;
1549*4882a593Smuzhiyun }
1550*4882a593Smuzhiyun 
1551*4882a593Smuzhiyun static const struct of_device_id su_match[] = {
1552*4882a593Smuzhiyun 	{
1553*4882a593Smuzhiyun 		.name = "su",
1554*4882a593Smuzhiyun 	},
1555*4882a593Smuzhiyun 	{
1556*4882a593Smuzhiyun 		.name = "su_pnp",
1557*4882a593Smuzhiyun 	},
1558*4882a593Smuzhiyun 	{
1559*4882a593Smuzhiyun 		.name = "serial",
1560*4882a593Smuzhiyun 		.compatible = "su",
1561*4882a593Smuzhiyun 	},
1562*4882a593Smuzhiyun 	{
1563*4882a593Smuzhiyun 		.type = "serial",
1564*4882a593Smuzhiyun 		.compatible = "su",
1565*4882a593Smuzhiyun 	},
1566*4882a593Smuzhiyun 	{},
1567*4882a593Smuzhiyun };
1568*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, su_match);
1569*4882a593Smuzhiyun 
1570*4882a593Smuzhiyun static struct platform_driver su_driver = {
1571*4882a593Smuzhiyun 	.driver = {
1572*4882a593Smuzhiyun 		.name = "su",
1573*4882a593Smuzhiyun 		.of_match_table = su_match,
1574*4882a593Smuzhiyun 	},
1575*4882a593Smuzhiyun 	.probe		= su_probe,
1576*4882a593Smuzhiyun 	.remove		= su_remove,
1577*4882a593Smuzhiyun };
1578*4882a593Smuzhiyun 
sunsu_init(void)1579*4882a593Smuzhiyun static int __init sunsu_init(void)
1580*4882a593Smuzhiyun {
1581*4882a593Smuzhiyun 	struct device_node *dp;
1582*4882a593Smuzhiyun 	int err;
1583*4882a593Smuzhiyun 	int num_uart = 0;
1584*4882a593Smuzhiyun 
1585*4882a593Smuzhiyun 	for_each_node_by_name(dp, "su") {
1586*4882a593Smuzhiyun 		if (su_get_type(dp) == SU_PORT_PORT)
1587*4882a593Smuzhiyun 			num_uart++;
1588*4882a593Smuzhiyun 	}
1589*4882a593Smuzhiyun 	for_each_node_by_name(dp, "su_pnp") {
1590*4882a593Smuzhiyun 		if (su_get_type(dp) == SU_PORT_PORT)
1591*4882a593Smuzhiyun 			num_uart++;
1592*4882a593Smuzhiyun 	}
1593*4882a593Smuzhiyun 	for_each_node_by_name(dp, "serial") {
1594*4882a593Smuzhiyun 		if (of_device_is_compatible(dp, "su")) {
1595*4882a593Smuzhiyun 			if (su_get_type(dp) == SU_PORT_PORT)
1596*4882a593Smuzhiyun 				num_uart++;
1597*4882a593Smuzhiyun 		}
1598*4882a593Smuzhiyun 	}
1599*4882a593Smuzhiyun 	for_each_node_by_type(dp, "serial") {
1600*4882a593Smuzhiyun 		if (of_device_is_compatible(dp, "su")) {
1601*4882a593Smuzhiyun 			if (su_get_type(dp) == SU_PORT_PORT)
1602*4882a593Smuzhiyun 				num_uart++;
1603*4882a593Smuzhiyun 		}
1604*4882a593Smuzhiyun 	}
1605*4882a593Smuzhiyun 
1606*4882a593Smuzhiyun 	if (num_uart) {
1607*4882a593Smuzhiyun 		err = sunserial_register_minors(&sunsu_reg, num_uart);
1608*4882a593Smuzhiyun 		if (err)
1609*4882a593Smuzhiyun 			return err;
1610*4882a593Smuzhiyun 	}
1611*4882a593Smuzhiyun 
1612*4882a593Smuzhiyun 	err = platform_driver_register(&su_driver);
1613*4882a593Smuzhiyun 	if (err && num_uart)
1614*4882a593Smuzhiyun 		sunserial_unregister_minors(&sunsu_reg, num_uart);
1615*4882a593Smuzhiyun 
1616*4882a593Smuzhiyun 	return err;
1617*4882a593Smuzhiyun }
1618*4882a593Smuzhiyun 
sunsu_exit(void)1619*4882a593Smuzhiyun static void __exit sunsu_exit(void)
1620*4882a593Smuzhiyun {
1621*4882a593Smuzhiyun 	platform_driver_unregister(&su_driver);
1622*4882a593Smuzhiyun 	if (sunsu_reg.nr)
1623*4882a593Smuzhiyun 		sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);
1624*4882a593Smuzhiyun }
1625*4882a593Smuzhiyun 
1626*4882a593Smuzhiyun module_init(sunsu_init);
1627*4882a593Smuzhiyun module_exit(sunsu_exit);
1628*4882a593Smuzhiyun 
1629*4882a593Smuzhiyun MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
1630*4882a593Smuzhiyun MODULE_DESCRIPTION("Sun SU serial port driver");
1631*4882a593Smuzhiyun MODULE_VERSION("2.0");
1632*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1633