xref: /OK3568_Linux_fs/kernel/drivers/tty/serial/sprd_serial.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2012-2015 Spreadtrum Communications Inc.
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include <linux/clk.h>
7*4882a593Smuzhiyun #include <linux/console.h>
8*4882a593Smuzhiyun #include <linux/delay.h>
9*4882a593Smuzhiyun #include <linux/dmaengine.h>
10*4882a593Smuzhiyun #include <linux/dma-mapping.h>
11*4882a593Smuzhiyun #include <linux/dma/sprd-dma.h>
12*4882a593Smuzhiyun #include <linux/io.h>
13*4882a593Smuzhiyun #include <linux/ioport.h>
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/of.h>
17*4882a593Smuzhiyun #include <linux/platform_device.h>
18*4882a593Smuzhiyun #include <linux/serial_core.h>
19*4882a593Smuzhiyun #include <linux/serial.h>
20*4882a593Smuzhiyun #include <linux/slab.h>
21*4882a593Smuzhiyun #include <linux/tty.h>
22*4882a593Smuzhiyun #include <linux/tty_flip.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun /* device name */
25*4882a593Smuzhiyun #define UART_NR_MAX		8
26*4882a593Smuzhiyun #define SPRD_TTY_NAME		"ttyS"
27*4882a593Smuzhiyun #define SPRD_FIFO_SIZE		128
28*4882a593Smuzhiyun #define SPRD_DEF_RATE		26000000
29*4882a593Smuzhiyun #define SPRD_BAUD_IO_LIMIT	3000000
30*4882a593Smuzhiyun #define SPRD_TIMEOUT		256000
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun /* the offset of serial registers and BITs for them */
33*4882a593Smuzhiyun /* data registers */
34*4882a593Smuzhiyun #define SPRD_TXD		0x0000
35*4882a593Smuzhiyun #define SPRD_RXD		0x0004
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun /* line status register and its BITs  */
38*4882a593Smuzhiyun #define SPRD_LSR		0x0008
39*4882a593Smuzhiyun #define SPRD_LSR_OE		BIT(4)
40*4882a593Smuzhiyun #define SPRD_LSR_FE		BIT(3)
41*4882a593Smuzhiyun #define SPRD_LSR_PE		BIT(2)
42*4882a593Smuzhiyun #define SPRD_LSR_BI		BIT(7)
43*4882a593Smuzhiyun #define SPRD_LSR_TX_OVER	BIT(15)
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun /* data number in TX and RX fifo */
46*4882a593Smuzhiyun #define SPRD_STS1		0x000C
47*4882a593Smuzhiyun #define SPRD_RX_FIFO_CNT_MASK	GENMASK(7, 0)
48*4882a593Smuzhiyun #define SPRD_TX_FIFO_CNT_MASK	GENMASK(15, 8)
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun /* interrupt enable register and its BITs */
51*4882a593Smuzhiyun #define SPRD_IEN		0x0010
52*4882a593Smuzhiyun #define SPRD_IEN_RX_FULL	BIT(0)
53*4882a593Smuzhiyun #define SPRD_IEN_TX_EMPTY	BIT(1)
54*4882a593Smuzhiyun #define SPRD_IEN_BREAK_DETECT	BIT(7)
55*4882a593Smuzhiyun #define SPRD_IEN_TIMEOUT	BIT(13)
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun /* interrupt clear register */
58*4882a593Smuzhiyun #define SPRD_ICLR		0x0014
59*4882a593Smuzhiyun #define SPRD_ICLR_TIMEOUT	BIT(13)
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun /* line control register */
62*4882a593Smuzhiyun #define SPRD_LCR		0x0018
63*4882a593Smuzhiyun #define SPRD_LCR_STOP_1BIT	0x10
64*4882a593Smuzhiyun #define SPRD_LCR_STOP_2BIT	0x30
65*4882a593Smuzhiyun #define SPRD_LCR_DATA_LEN	(BIT(2) | BIT(3))
66*4882a593Smuzhiyun #define SPRD_LCR_DATA_LEN5	0x0
67*4882a593Smuzhiyun #define SPRD_LCR_DATA_LEN6	0x4
68*4882a593Smuzhiyun #define SPRD_LCR_DATA_LEN7	0x8
69*4882a593Smuzhiyun #define SPRD_LCR_DATA_LEN8	0xc
70*4882a593Smuzhiyun #define SPRD_LCR_PARITY		(BIT(0) | BIT(1))
71*4882a593Smuzhiyun #define SPRD_LCR_PARITY_EN	0x2
72*4882a593Smuzhiyun #define SPRD_LCR_EVEN_PAR	0x0
73*4882a593Smuzhiyun #define SPRD_LCR_ODD_PAR	0x1
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun /* control register 1 */
76*4882a593Smuzhiyun #define SPRD_CTL1		0x001C
77*4882a593Smuzhiyun #define SPRD_DMA_EN		BIT(15)
78*4882a593Smuzhiyun #define SPRD_LOOPBACK_EN	BIT(14)
79*4882a593Smuzhiyun #define RX_HW_FLOW_CTL_THLD	BIT(6)
80*4882a593Smuzhiyun #define RX_HW_FLOW_CTL_EN	BIT(7)
81*4882a593Smuzhiyun #define TX_HW_FLOW_CTL_EN	BIT(8)
82*4882a593Smuzhiyun #define RX_TOUT_THLD_DEF	0x3E00
83*4882a593Smuzhiyun #define RX_HFC_THLD_DEF		0x40
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun /* fifo threshold register */
86*4882a593Smuzhiyun #define SPRD_CTL2		0x0020
87*4882a593Smuzhiyun #define THLD_TX_EMPTY		0x40
88*4882a593Smuzhiyun #define THLD_TX_EMPTY_SHIFT	8
89*4882a593Smuzhiyun #define THLD_RX_FULL		0x40
90*4882a593Smuzhiyun #define THLD_RX_FULL_MASK	GENMASK(6, 0)
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun /* config baud rate register */
93*4882a593Smuzhiyun #define SPRD_CLKD0		0x0024
94*4882a593Smuzhiyun #define SPRD_CLKD0_MASK		GENMASK(15, 0)
95*4882a593Smuzhiyun #define SPRD_CLKD1		0x0028
96*4882a593Smuzhiyun #define SPRD_CLKD1_MASK		GENMASK(20, 16)
97*4882a593Smuzhiyun #define SPRD_CLKD1_SHIFT	16
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun /* interrupt mask status register */
100*4882a593Smuzhiyun #define SPRD_IMSR		0x002C
101*4882a593Smuzhiyun #define SPRD_IMSR_RX_FIFO_FULL	BIT(0)
102*4882a593Smuzhiyun #define SPRD_IMSR_TX_FIFO_EMPTY	BIT(1)
103*4882a593Smuzhiyun #define SPRD_IMSR_BREAK_DETECT	BIT(7)
104*4882a593Smuzhiyun #define SPRD_IMSR_TIMEOUT	BIT(13)
105*4882a593Smuzhiyun #define SPRD_DEFAULT_SOURCE_CLK	26000000
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun #define SPRD_RX_DMA_STEP	1
108*4882a593Smuzhiyun #define SPRD_RX_FIFO_FULL	1
109*4882a593Smuzhiyun #define SPRD_TX_FIFO_FULL	0x20
110*4882a593Smuzhiyun #define SPRD_UART_RX_SIZE	(UART_XMIT_SIZE / 4)
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun struct sprd_uart_dma {
113*4882a593Smuzhiyun 	struct dma_chan *chn;
114*4882a593Smuzhiyun 	unsigned char *virt;
115*4882a593Smuzhiyun 	dma_addr_t phys_addr;
116*4882a593Smuzhiyun 	dma_cookie_t cookie;
117*4882a593Smuzhiyun 	u32 trans_len;
118*4882a593Smuzhiyun 	bool enable;
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun struct sprd_uart_port {
122*4882a593Smuzhiyun 	struct uart_port port;
123*4882a593Smuzhiyun 	char name[16];
124*4882a593Smuzhiyun 	struct clk *clk;
125*4882a593Smuzhiyun 	struct sprd_uart_dma tx_dma;
126*4882a593Smuzhiyun 	struct sprd_uart_dma rx_dma;
127*4882a593Smuzhiyun 	dma_addr_t pos;
128*4882a593Smuzhiyun 	unsigned char *rx_buf_tail;
129*4882a593Smuzhiyun };
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun static struct sprd_uart_port *sprd_port[UART_NR_MAX];
132*4882a593Smuzhiyun static int sprd_ports_num;
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun static int sprd_start_dma_rx(struct uart_port *port);
135*4882a593Smuzhiyun static int sprd_tx_dma_config(struct uart_port *port);
136*4882a593Smuzhiyun 
serial_in(struct uart_port * port,unsigned int offset)137*4882a593Smuzhiyun static inline unsigned int serial_in(struct uart_port *port,
138*4882a593Smuzhiyun 				     unsigned int offset)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun 	return readl_relaxed(port->membase + offset);
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun 
serial_out(struct uart_port * port,unsigned int offset,int value)143*4882a593Smuzhiyun static inline void serial_out(struct uart_port *port, unsigned int offset,
144*4882a593Smuzhiyun 			      int value)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun 	writel_relaxed(value, port->membase + offset);
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun 
sprd_tx_empty(struct uart_port * port)149*4882a593Smuzhiyun static unsigned int sprd_tx_empty(struct uart_port *port)
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun 	if (serial_in(port, SPRD_STS1) & SPRD_TX_FIFO_CNT_MASK)
152*4882a593Smuzhiyun 		return 0;
153*4882a593Smuzhiyun 	else
154*4882a593Smuzhiyun 		return TIOCSER_TEMT;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun 
sprd_get_mctrl(struct uart_port * port)157*4882a593Smuzhiyun static unsigned int sprd_get_mctrl(struct uart_port *port)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun 	return TIOCM_DSR | TIOCM_CTS;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun 
sprd_set_mctrl(struct uart_port * port,unsigned int mctrl)162*4882a593Smuzhiyun static void sprd_set_mctrl(struct uart_port *port, unsigned int mctrl)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	u32 val = serial_in(port, SPRD_CTL1);
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	if (mctrl & TIOCM_LOOP)
167*4882a593Smuzhiyun 		val |= SPRD_LOOPBACK_EN;
168*4882a593Smuzhiyun 	else
169*4882a593Smuzhiyun 		val &= ~SPRD_LOOPBACK_EN;
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	serial_out(port, SPRD_CTL1, val);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun 
sprd_stop_rx(struct uart_port * port)174*4882a593Smuzhiyun static void sprd_stop_rx(struct uart_port *port)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun 	struct sprd_uart_port *sp =
177*4882a593Smuzhiyun 		container_of(port, struct sprd_uart_port, port);
178*4882a593Smuzhiyun 	unsigned int ien, iclr;
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	if (sp->rx_dma.enable)
181*4882a593Smuzhiyun 		dmaengine_terminate_all(sp->rx_dma.chn);
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	iclr = serial_in(port, SPRD_ICLR);
184*4882a593Smuzhiyun 	ien = serial_in(port, SPRD_IEN);
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	ien &= ~(SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT);
187*4882a593Smuzhiyun 	iclr |= SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT;
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	serial_out(port, SPRD_IEN, ien);
190*4882a593Smuzhiyun 	serial_out(port, SPRD_ICLR, iclr);
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun 
sprd_uart_dma_enable(struct uart_port * port,bool enable)193*4882a593Smuzhiyun static void sprd_uart_dma_enable(struct uart_port *port, bool enable)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun 	u32 val = serial_in(port, SPRD_CTL1);
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	if (enable)
198*4882a593Smuzhiyun 		val |= SPRD_DMA_EN;
199*4882a593Smuzhiyun 	else
200*4882a593Smuzhiyun 		val &= ~SPRD_DMA_EN;
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	serial_out(port, SPRD_CTL1, val);
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun 
sprd_stop_tx_dma(struct uart_port * port)205*4882a593Smuzhiyun static void sprd_stop_tx_dma(struct uart_port *port)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun 	struct sprd_uart_port *sp =
208*4882a593Smuzhiyun 		container_of(port, struct sprd_uart_port, port);
209*4882a593Smuzhiyun 	struct circ_buf *xmit = &port->state->xmit;
210*4882a593Smuzhiyun 	struct dma_tx_state state;
211*4882a593Smuzhiyun 	u32 trans_len;
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	dmaengine_pause(sp->tx_dma.chn);
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	dmaengine_tx_status(sp->tx_dma.chn, sp->tx_dma.cookie, &state);
216*4882a593Smuzhiyun 	if (state.residue) {
217*4882a593Smuzhiyun 		trans_len = state.residue - sp->tx_dma.phys_addr;
218*4882a593Smuzhiyun 		xmit->tail = (xmit->tail + trans_len) & (UART_XMIT_SIZE - 1);
219*4882a593Smuzhiyun 		port->icount.tx += trans_len;
220*4882a593Smuzhiyun 		dma_unmap_single(port->dev, sp->tx_dma.phys_addr,
221*4882a593Smuzhiyun 				 sp->tx_dma.trans_len, DMA_TO_DEVICE);
222*4882a593Smuzhiyun 	}
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	dmaengine_terminate_all(sp->tx_dma.chn);
225*4882a593Smuzhiyun 	sp->tx_dma.trans_len = 0;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun 
sprd_tx_buf_remap(struct uart_port * port)228*4882a593Smuzhiyun static int sprd_tx_buf_remap(struct uart_port *port)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun 	struct sprd_uart_port *sp =
231*4882a593Smuzhiyun 		container_of(port, struct sprd_uart_port, port);
232*4882a593Smuzhiyun 	struct circ_buf *xmit = &port->state->xmit;
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	sp->tx_dma.trans_len =
235*4882a593Smuzhiyun 		CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	sp->tx_dma.phys_addr = dma_map_single(port->dev,
238*4882a593Smuzhiyun 					      (void *)&(xmit->buf[xmit->tail]),
239*4882a593Smuzhiyun 					      sp->tx_dma.trans_len,
240*4882a593Smuzhiyun 					      DMA_TO_DEVICE);
241*4882a593Smuzhiyun 	return dma_mapping_error(port->dev, sp->tx_dma.phys_addr);
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun 
sprd_complete_tx_dma(void * data)244*4882a593Smuzhiyun static void sprd_complete_tx_dma(void *data)
245*4882a593Smuzhiyun {
246*4882a593Smuzhiyun 	struct uart_port *port = (struct uart_port *)data;
247*4882a593Smuzhiyun 	struct sprd_uart_port *sp =
248*4882a593Smuzhiyun 		container_of(port, struct sprd_uart_port, port);
249*4882a593Smuzhiyun 	struct circ_buf *xmit = &port->state->xmit;
250*4882a593Smuzhiyun 	unsigned long flags;
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	spin_lock_irqsave(&port->lock, flags);
253*4882a593Smuzhiyun 	dma_unmap_single(port->dev, sp->tx_dma.phys_addr,
254*4882a593Smuzhiyun 			 sp->tx_dma.trans_len, DMA_TO_DEVICE);
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	xmit->tail = (xmit->tail + sp->tx_dma.trans_len) & (UART_XMIT_SIZE - 1);
257*4882a593Smuzhiyun 	port->icount.tx += sp->tx_dma.trans_len;
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
260*4882a593Smuzhiyun 		uart_write_wakeup(port);
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	if (uart_circ_empty(xmit) || sprd_tx_buf_remap(port) ||
263*4882a593Smuzhiyun 	    sprd_tx_dma_config(port))
264*4882a593Smuzhiyun 		sp->tx_dma.trans_len = 0;
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	spin_unlock_irqrestore(&port->lock, flags);
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun 
sprd_uart_dma_submit(struct uart_port * port,struct sprd_uart_dma * ud,u32 trans_len,enum dma_transfer_direction direction,dma_async_tx_callback callback)269*4882a593Smuzhiyun static int sprd_uart_dma_submit(struct uart_port *port,
270*4882a593Smuzhiyun 				struct sprd_uart_dma *ud, u32 trans_len,
271*4882a593Smuzhiyun 				enum dma_transfer_direction direction,
272*4882a593Smuzhiyun 				dma_async_tx_callback callback)
273*4882a593Smuzhiyun {
274*4882a593Smuzhiyun 	struct dma_async_tx_descriptor *dma_des;
275*4882a593Smuzhiyun 	unsigned long flags;
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	flags = SPRD_DMA_FLAGS(SPRD_DMA_CHN_MODE_NONE,
278*4882a593Smuzhiyun 			       SPRD_DMA_NO_TRG,
279*4882a593Smuzhiyun 			       SPRD_DMA_FRAG_REQ,
280*4882a593Smuzhiyun 			       SPRD_DMA_TRANS_INT);
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	dma_des = dmaengine_prep_slave_single(ud->chn, ud->phys_addr, trans_len,
283*4882a593Smuzhiyun 					      direction, flags);
284*4882a593Smuzhiyun 	if (!dma_des)
285*4882a593Smuzhiyun 		return -ENODEV;
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	dma_des->callback = callback;
288*4882a593Smuzhiyun 	dma_des->callback_param = port;
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 	ud->cookie = dmaengine_submit(dma_des);
291*4882a593Smuzhiyun 	if (dma_submit_error(ud->cookie))
292*4882a593Smuzhiyun 		return dma_submit_error(ud->cookie);
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun 	dma_async_issue_pending(ud->chn);
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	return 0;
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun 
sprd_tx_dma_config(struct uart_port * port)299*4882a593Smuzhiyun static int sprd_tx_dma_config(struct uart_port *port)
300*4882a593Smuzhiyun {
301*4882a593Smuzhiyun 	struct sprd_uart_port *sp =
302*4882a593Smuzhiyun 		container_of(port, struct sprd_uart_port, port);
303*4882a593Smuzhiyun 	u32 burst = sp->tx_dma.trans_len > SPRD_TX_FIFO_FULL ?
304*4882a593Smuzhiyun 		SPRD_TX_FIFO_FULL : sp->tx_dma.trans_len;
305*4882a593Smuzhiyun 	int ret;
306*4882a593Smuzhiyun 	struct dma_slave_config cfg = {
307*4882a593Smuzhiyun 		.dst_addr = port->mapbase + SPRD_TXD,
308*4882a593Smuzhiyun 		.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
309*4882a593Smuzhiyun 		.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
310*4882a593Smuzhiyun 		.src_maxburst = burst,
311*4882a593Smuzhiyun 	};
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	ret = dmaengine_slave_config(sp->tx_dma.chn, &cfg);
314*4882a593Smuzhiyun 	if (ret < 0)
315*4882a593Smuzhiyun 		return ret;
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	return sprd_uart_dma_submit(port, &sp->tx_dma, sp->tx_dma.trans_len,
318*4882a593Smuzhiyun 				    DMA_MEM_TO_DEV, sprd_complete_tx_dma);
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun 
sprd_start_tx_dma(struct uart_port * port)321*4882a593Smuzhiyun static void sprd_start_tx_dma(struct uart_port *port)
322*4882a593Smuzhiyun {
323*4882a593Smuzhiyun 	struct sprd_uart_port *sp =
324*4882a593Smuzhiyun 		container_of(port, struct sprd_uart_port, port);
325*4882a593Smuzhiyun 	struct circ_buf *xmit = &port->state->xmit;
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	if (port->x_char) {
328*4882a593Smuzhiyun 		serial_out(port, SPRD_TXD, port->x_char);
329*4882a593Smuzhiyun 		port->icount.tx++;
330*4882a593Smuzhiyun 		port->x_char = 0;
331*4882a593Smuzhiyun 		return;
332*4882a593Smuzhiyun 	}
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
335*4882a593Smuzhiyun 		sprd_stop_tx_dma(port);
336*4882a593Smuzhiyun 		return;
337*4882a593Smuzhiyun 	}
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun 	if (sp->tx_dma.trans_len)
340*4882a593Smuzhiyun 		return;
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	if (sprd_tx_buf_remap(port) || sprd_tx_dma_config(port))
343*4882a593Smuzhiyun 		sp->tx_dma.trans_len = 0;
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun 
sprd_rx_full_thld(struct uart_port * port,u32 thld)346*4882a593Smuzhiyun static void sprd_rx_full_thld(struct uart_port *port, u32 thld)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun 	u32 val = serial_in(port, SPRD_CTL2);
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 	val &= ~THLD_RX_FULL_MASK;
351*4882a593Smuzhiyun 	val |= thld & THLD_RX_FULL_MASK;
352*4882a593Smuzhiyun 	serial_out(port, SPRD_CTL2, val);
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun 
sprd_rx_alloc_buf(struct sprd_uart_port * sp)355*4882a593Smuzhiyun static int sprd_rx_alloc_buf(struct sprd_uart_port *sp)
356*4882a593Smuzhiyun {
357*4882a593Smuzhiyun 	sp->rx_dma.virt = dma_alloc_coherent(sp->port.dev, SPRD_UART_RX_SIZE,
358*4882a593Smuzhiyun 					     &sp->rx_dma.phys_addr, GFP_KERNEL);
359*4882a593Smuzhiyun 	if (!sp->rx_dma.virt)
360*4882a593Smuzhiyun 		return -ENOMEM;
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun 	return 0;
363*4882a593Smuzhiyun }
364*4882a593Smuzhiyun 
sprd_rx_free_buf(struct sprd_uart_port * sp)365*4882a593Smuzhiyun static void sprd_rx_free_buf(struct sprd_uart_port *sp)
366*4882a593Smuzhiyun {
367*4882a593Smuzhiyun 	if (sp->rx_dma.virt)
368*4882a593Smuzhiyun 		dma_free_coherent(sp->port.dev, SPRD_UART_RX_SIZE,
369*4882a593Smuzhiyun 				  sp->rx_dma.virt, sp->rx_dma.phys_addr);
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun 
sprd_rx_dma_config(struct uart_port * port,u32 burst)373*4882a593Smuzhiyun static int sprd_rx_dma_config(struct uart_port *port, u32 burst)
374*4882a593Smuzhiyun {
375*4882a593Smuzhiyun 	struct sprd_uart_port *sp =
376*4882a593Smuzhiyun 		container_of(port, struct sprd_uart_port, port);
377*4882a593Smuzhiyun 	struct dma_slave_config cfg = {
378*4882a593Smuzhiyun 		.src_addr = port->mapbase + SPRD_RXD,
379*4882a593Smuzhiyun 		.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
380*4882a593Smuzhiyun 		.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
381*4882a593Smuzhiyun 		.src_maxburst = burst,
382*4882a593Smuzhiyun 	};
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun 	return dmaengine_slave_config(sp->rx_dma.chn, &cfg);
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun 
sprd_uart_dma_rx(struct uart_port * port)387*4882a593Smuzhiyun static void sprd_uart_dma_rx(struct uart_port *port)
388*4882a593Smuzhiyun {
389*4882a593Smuzhiyun 	struct sprd_uart_port *sp =
390*4882a593Smuzhiyun 		container_of(port, struct sprd_uart_port, port);
391*4882a593Smuzhiyun 	struct tty_port *tty = &port->state->port;
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 	port->icount.rx += sp->rx_dma.trans_len;
394*4882a593Smuzhiyun 	tty_insert_flip_string(tty, sp->rx_buf_tail, sp->rx_dma.trans_len);
395*4882a593Smuzhiyun 	tty_flip_buffer_push(tty);
396*4882a593Smuzhiyun }
397*4882a593Smuzhiyun 
sprd_uart_dma_irq(struct uart_port * port)398*4882a593Smuzhiyun static void sprd_uart_dma_irq(struct uart_port *port)
399*4882a593Smuzhiyun {
400*4882a593Smuzhiyun 	struct sprd_uart_port *sp =
401*4882a593Smuzhiyun 		container_of(port, struct sprd_uart_port, port);
402*4882a593Smuzhiyun 	struct dma_tx_state state;
403*4882a593Smuzhiyun 	enum dma_status status;
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	status = dmaengine_tx_status(sp->rx_dma.chn,
406*4882a593Smuzhiyun 				     sp->rx_dma.cookie, &state);
407*4882a593Smuzhiyun 	if (status == DMA_ERROR)
408*4882a593Smuzhiyun 		sprd_stop_rx(port);
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun 	if (!state.residue && sp->pos == sp->rx_dma.phys_addr)
411*4882a593Smuzhiyun 		return;
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun 	if (!state.residue) {
414*4882a593Smuzhiyun 		sp->rx_dma.trans_len = SPRD_UART_RX_SIZE +
415*4882a593Smuzhiyun 			sp->rx_dma.phys_addr - sp->pos;
416*4882a593Smuzhiyun 		sp->pos = sp->rx_dma.phys_addr;
417*4882a593Smuzhiyun 	} else {
418*4882a593Smuzhiyun 		sp->rx_dma.trans_len = state.residue - sp->pos;
419*4882a593Smuzhiyun 		sp->pos = state.residue;
420*4882a593Smuzhiyun 	}
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun 	sprd_uart_dma_rx(port);
423*4882a593Smuzhiyun 	sp->rx_buf_tail += sp->rx_dma.trans_len;
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun 
sprd_complete_rx_dma(void * data)426*4882a593Smuzhiyun static void sprd_complete_rx_dma(void *data)
427*4882a593Smuzhiyun {
428*4882a593Smuzhiyun 	struct uart_port *port = (struct uart_port *)data;
429*4882a593Smuzhiyun 	struct sprd_uart_port *sp =
430*4882a593Smuzhiyun 		container_of(port, struct sprd_uart_port, port);
431*4882a593Smuzhiyun 	struct dma_tx_state state;
432*4882a593Smuzhiyun 	enum dma_status status;
433*4882a593Smuzhiyun 	unsigned long flags;
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun 	spin_lock_irqsave(&port->lock, flags);
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun 	status = dmaengine_tx_status(sp->rx_dma.chn,
438*4882a593Smuzhiyun 				     sp->rx_dma.cookie, &state);
439*4882a593Smuzhiyun 	if (status != DMA_COMPLETE) {
440*4882a593Smuzhiyun 		sprd_stop_rx(port);
441*4882a593Smuzhiyun 		spin_unlock_irqrestore(&port->lock, flags);
442*4882a593Smuzhiyun 		return;
443*4882a593Smuzhiyun 	}
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun 	if (sp->pos != sp->rx_dma.phys_addr) {
446*4882a593Smuzhiyun 		sp->rx_dma.trans_len =  SPRD_UART_RX_SIZE +
447*4882a593Smuzhiyun 			sp->rx_dma.phys_addr - sp->pos;
448*4882a593Smuzhiyun 		sprd_uart_dma_rx(port);
449*4882a593Smuzhiyun 		sp->rx_buf_tail += sp->rx_dma.trans_len;
450*4882a593Smuzhiyun 	}
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun 	if (sprd_start_dma_rx(port))
453*4882a593Smuzhiyun 		sprd_stop_rx(port);
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun 	spin_unlock_irqrestore(&port->lock, flags);
456*4882a593Smuzhiyun }
457*4882a593Smuzhiyun 
sprd_start_dma_rx(struct uart_port * port)458*4882a593Smuzhiyun static int sprd_start_dma_rx(struct uart_port *port)
459*4882a593Smuzhiyun {
460*4882a593Smuzhiyun 	struct sprd_uart_port *sp =
461*4882a593Smuzhiyun 		container_of(port, struct sprd_uart_port, port);
462*4882a593Smuzhiyun 	int ret;
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	if (!sp->rx_dma.enable)
465*4882a593Smuzhiyun 		return 0;
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun 	sp->pos = sp->rx_dma.phys_addr;
468*4882a593Smuzhiyun 	sp->rx_buf_tail = sp->rx_dma.virt;
469*4882a593Smuzhiyun 	sprd_rx_full_thld(port, SPRD_RX_FIFO_FULL);
470*4882a593Smuzhiyun 	ret = sprd_rx_dma_config(port, SPRD_RX_DMA_STEP);
471*4882a593Smuzhiyun 	if (ret)
472*4882a593Smuzhiyun 		return ret;
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 	return sprd_uart_dma_submit(port, &sp->rx_dma, SPRD_UART_RX_SIZE,
475*4882a593Smuzhiyun 				    DMA_DEV_TO_MEM, sprd_complete_rx_dma);
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun 
sprd_release_dma(struct uart_port * port)478*4882a593Smuzhiyun static void sprd_release_dma(struct uart_port *port)
479*4882a593Smuzhiyun {
480*4882a593Smuzhiyun 	struct sprd_uart_port *sp =
481*4882a593Smuzhiyun 		container_of(port, struct sprd_uart_port, port);
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 	sprd_uart_dma_enable(port, false);
484*4882a593Smuzhiyun 
485*4882a593Smuzhiyun 	if (sp->rx_dma.enable)
486*4882a593Smuzhiyun 		dma_release_channel(sp->rx_dma.chn);
487*4882a593Smuzhiyun 
488*4882a593Smuzhiyun 	if (sp->tx_dma.enable)
489*4882a593Smuzhiyun 		dma_release_channel(sp->tx_dma.chn);
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 	sp->tx_dma.enable = false;
492*4882a593Smuzhiyun 	sp->rx_dma.enable = false;
493*4882a593Smuzhiyun }
494*4882a593Smuzhiyun 
sprd_request_dma(struct uart_port * port)495*4882a593Smuzhiyun static void sprd_request_dma(struct uart_port *port)
496*4882a593Smuzhiyun {
497*4882a593Smuzhiyun 	struct sprd_uart_port *sp =
498*4882a593Smuzhiyun 		container_of(port, struct sprd_uart_port, port);
499*4882a593Smuzhiyun 
500*4882a593Smuzhiyun 	sp->tx_dma.enable = true;
501*4882a593Smuzhiyun 	sp->rx_dma.enable = true;
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun 	sp->tx_dma.chn = dma_request_chan(port->dev, "tx");
504*4882a593Smuzhiyun 	if (IS_ERR(sp->tx_dma.chn)) {
505*4882a593Smuzhiyun 		dev_err(port->dev, "request TX DMA channel failed, ret = %ld\n",
506*4882a593Smuzhiyun 			PTR_ERR(sp->tx_dma.chn));
507*4882a593Smuzhiyun 		sp->tx_dma.enable = false;
508*4882a593Smuzhiyun 	}
509*4882a593Smuzhiyun 
510*4882a593Smuzhiyun 	sp->rx_dma.chn = dma_request_chan(port->dev, "rx");
511*4882a593Smuzhiyun 	if (IS_ERR(sp->rx_dma.chn)) {
512*4882a593Smuzhiyun 		dev_err(port->dev, "request RX DMA channel failed, ret = %ld\n",
513*4882a593Smuzhiyun 			PTR_ERR(sp->rx_dma.chn));
514*4882a593Smuzhiyun 		sp->rx_dma.enable = false;
515*4882a593Smuzhiyun 	}
516*4882a593Smuzhiyun }
517*4882a593Smuzhiyun 
sprd_stop_tx(struct uart_port * port)518*4882a593Smuzhiyun static void sprd_stop_tx(struct uart_port *port)
519*4882a593Smuzhiyun {
520*4882a593Smuzhiyun 	struct sprd_uart_port *sp = container_of(port, struct sprd_uart_port,
521*4882a593Smuzhiyun 						 port);
522*4882a593Smuzhiyun 	unsigned int ien, iclr;
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun 	if (sp->tx_dma.enable) {
525*4882a593Smuzhiyun 		sprd_stop_tx_dma(port);
526*4882a593Smuzhiyun 		return;
527*4882a593Smuzhiyun 	}
528*4882a593Smuzhiyun 
529*4882a593Smuzhiyun 	iclr = serial_in(port, SPRD_ICLR);
530*4882a593Smuzhiyun 	ien = serial_in(port, SPRD_IEN);
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun 	iclr |= SPRD_IEN_TX_EMPTY;
533*4882a593Smuzhiyun 	ien &= ~SPRD_IEN_TX_EMPTY;
534*4882a593Smuzhiyun 
535*4882a593Smuzhiyun 	serial_out(port, SPRD_IEN, ien);
536*4882a593Smuzhiyun 	serial_out(port, SPRD_ICLR, iclr);
537*4882a593Smuzhiyun }
538*4882a593Smuzhiyun 
sprd_start_tx(struct uart_port * port)539*4882a593Smuzhiyun static void sprd_start_tx(struct uart_port *port)
540*4882a593Smuzhiyun {
541*4882a593Smuzhiyun 	struct sprd_uart_port *sp = container_of(port, struct sprd_uart_port,
542*4882a593Smuzhiyun 						 port);
543*4882a593Smuzhiyun 	unsigned int ien;
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun 	if (sp->tx_dma.enable) {
546*4882a593Smuzhiyun 		sprd_start_tx_dma(port);
547*4882a593Smuzhiyun 		return;
548*4882a593Smuzhiyun 	}
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun 	ien = serial_in(port, SPRD_IEN);
551*4882a593Smuzhiyun 	if (!(ien & SPRD_IEN_TX_EMPTY)) {
552*4882a593Smuzhiyun 		ien |= SPRD_IEN_TX_EMPTY;
553*4882a593Smuzhiyun 		serial_out(port, SPRD_IEN, ien);
554*4882a593Smuzhiyun 	}
555*4882a593Smuzhiyun }
556*4882a593Smuzhiyun 
557*4882a593Smuzhiyun /* The Sprd serial does not support this function. */
sprd_break_ctl(struct uart_port * port,int break_state)558*4882a593Smuzhiyun static void sprd_break_ctl(struct uart_port *port, int break_state)
559*4882a593Smuzhiyun {
560*4882a593Smuzhiyun 	/* nothing to do */
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun 
handle_lsr_errors(struct uart_port * port,unsigned int * flag,unsigned int * lsr)563*4882a593Smuzhiyun static int handle_lsr_errors(struct uart_port *port,
564*4882a593Smuzhiyun 			     unsigned int *flag,
565*4882a593Smuzhiyun 			     unsigned int *lsr)
566*4882a593Smuzhiyun {
567*4882a593Smuzhiyun 	int ret = 0;
568*4882a593Smuzhiyun 
569*4882a593Smuzhiyun 	/* statistics */
570*4882a593Smuzhiyun 	if (*lsr & SPRD_LSR_BI) {
571*4882a593Smuzhiyun 		*lsr &= ~(SPRD_LSR_FE | SPRD_LSR_PE);
572*4882a593Smuzhiyun 		port->icount.brk++;
573*4882a593Smuzhiyun 		ret = uart_handle_break(port);
574*4882a593Smuzhiyun 		if (ret)
575*4882a593Smuzhiyun 			return ret;
576*4882a593Smuzhiyun 	} else if (*lsr & SPRD_LSR_PE)
577*4882a593Smuzhiyun 		port->icount.parity++;
578*4882a593Smuzhiyun 	else if (*lsr & SPRD_LSR_FE)
579*4882a593Smuzhiyun 		port->icount.frame++;
580*4882a593Smuzhiyun 	if (*lsr & SPRD_LSR_OE)
581*4882a593Smuzhiyun 		port->icount.overrun++;
582*4882a593Smuzhiyun 
583*4882a593Smuzhiyun 	/* mask off conditions which should be ignored */
584*4882a593Smuzhiyun 	*lsr &= port->read_status_mask;
585*4882a593Smuzhiyun 	if (*lsr & SPRD_LSR_BI)
586*4882a593Smuzhiyun 		*flag = TTY_BREAK;
587*4882a593Smuzhiyun 	else if (*lsr & SPRD_LSR_PE)
588*4882a593Smuzhiyun 		*flag = TTY_PARITY;
589*4882a593Smuzhiyun 	else if (*lsr & SPRD_LSR_FE)
590*4882a593Smuzhiyun 		*flag = TTY_FRAME;
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun 	return ret;
593*4882a593Smuzhiyun }
594*4882a593Smuzhiyun 
sprd_rx(struct uart_port * port)595*4882a593Smuzhiyun static inline void sprd_rx(struct uart_port *port)
596*4882a593Smuzhiyun {
597*4882a593Smuzhiyun 	struct sprd_uart_port *sp = container_of(port, struct sprd_uart_port,
598*4882a593Smuzhiyun 						 port);
599*4882a593Smuzhiyun 	struct tty_port *tty = &port->state->port;
600*4882a593Smuzhiyun 	unsigned int ch, flag, lsr, max_count = SPRD_TIMEOUT;
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun 	if (sp->rx_dma.enable) {
603*4882a593Smuzhiyun 		sprd_uart_dma_irq(port);
604*4882a593Smuzhiyun 		return;
605*4882a593Smuzhiyun 	}
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun 	while ((serial_in(port, SPRD_STS1) & SPRD_RX_FIFO_CNT_MASK) &&
608*4882a593Smuzhiyun 	       max_count--) {
609*4882a593Smuzhiyun 		lsr = serial_in(port, SPRD_LSR);
610*4882a593Smuzhiyun 		ch = serial_in(port, SPRD_RXD);
611*4882a593Smuzhiyun 		flag = TTY_NORMAL;
612*4882a593Smuzhiyun 		port->icount.rx++;
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun 		if (lsr & (SPRD_LSR_BI | SPRD_LSR_PE |
615*4882a593Smuzhiyun 			   SPRD_LSR_FE | SPRD_LSR_OE))
616*4882a593Smuzhiyun 			if (handle_lsr_errors(port, &flag, &lsr))
617*4882a593Smuzhiyun 				continue;
618*4882a593Smuzhiyun 		if (uart_handle_sysrq_char(port, ch))
619*4882a593Smuzhiyun 			continue;
620*4882a593Smuzhiyun 
621*4882a593Smuzhiyun 		uart_insert_char(port, lsr, SPRD_LSR_OE, ch, flag);
622*4882a593Smuzhiyun 	}
623*4882a593Smuzhiyun 
624*4882a593Smuzhiyun 	tty_flip_buffer_push(tty);
625*4882a593Smuzhiyun }
626*4882a593Smuzhiyun 
sprd_tx(struct uart_port * port)627*4882a593Smuzhiyun static inline void sprd_tx(struct uart_port *port)
628*4882a593Smuzhiyun {
629*4882a593Smuzhiyun 	struct circ_buf *xmit = &port->state->xmit;
630*4882a593Smuzhiyun 	int count;
631*4882a593Smuzhiyun 
632*4882a593Smuzhiyun 	if (port->x_char) {
633*4882a593Smuzhiyun 		serial_out(port, SPRD_TXD, port->x_char);
634*4882a593Smuzhiyun 		port->icount.tx++;
635*4882a593Smuzhiyun 		port->x_char = 0;
636*4882a593Smuzhiyun 		return;
637*4882a593Smuzhiyun 	}
638*4882a593Smuzhiyun 
639*4882a593Smuzhiyun 	if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
640*4882a593Smuzhiyun 		sprd_stop_tx(port);
641*4882a593Smuzhiyun 		return;
642*4882a593Smuzhiyun 	}
643*4882a593Smuzhiyun 
644*4882a593Smuzhiyun 	count = THLD_TX_EMPTY;
645*4882a593Smuzhiyun 	do {
646*4882a593Smuzhiyun 		serial_out(port, SPRD_TXD, xmit->buf[xmit->tail]);
647*4882a593Smuzhiyun 		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
648*4882a593Smuzhiyun 		port->icount.tx++;
649*4882a593Smuzhiyun 		if (uart_circ_empty(xmit))
650*4882a593Smuzhiyun 			break;
651*4882a593Smuzhiyun 	} while (--count > 0);
652*4882a593Smuzhiyun 
653*4882a593Smuzhiyun 	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
654*4882a593Smuzhiyun 		uart_write_wakeup(port);
655*4882a593Smuzhiyun 
656*4882a593Smuzhiyun 	if (uart_circ_empty(xmit))
657*4882a593Smuzhiyun 		sprd_stop_tx(port);
658*4882a593Smuzhiyun }
659*4882a593Smuzhiyun 
660*4882a593Smuzhiyun /* this handles the interrupt from one port */
sprd_handle_irq(int irq,void * dev_id)661*4882a593Smuzhiyun static irqreturn_t sprd_handle_irq(int irq, void *dev_id)
662*4882a593Smuzhiyun {
663*4882a593Smuzhiyun 	struct uart_port *port = dev_id;
664*4882a593Smuzhiyun 	unsigned int ims;
665*4882a593Smuzhiyun 
666*4882a593Smuzhiyun 	spin_lock(&port->lock);
667*4882a593Smuzhiyun 
668*4882a593Smuzhiyun 	ims = serial_in(port, SPRD_IMSR);
669*4882a593Smuzhiyun 
670*4882a593Smuzhiyun 	if (!ims) {
671*4882a593Smuzhiyun 		spin_unlock(&port->lock);
672*4882a593Smuzhiyun 		return IRQ_NONE;
673*4882a593Smuzhiyun 	}
674*4882a593Smuzhiyun 
675*4882a593Smuzhiyun 	if (ims & SPRD_IMSR_TIMEOUT)
676*4882a593Smuzhiyun 		serial_out(port, SPRD_ICLR, SPRD_ICLR_TIMEOUT);
677*4882a593Smuzhiyun 
678*4882a593Smuzhiyun 	if (ims & SPRD_IMSR_BREAK_DETECT)
679*4882a593Smuzhiyun 		serial_out(port, SPRD_ICLR, SPRD_IMSR_BREAK_DETECT);
680*4882a593Smuzhiyun 
681*4882a593Smuzhiyun 	if (ims & (SPRD_IMSR_RX_FIFO_FULL | SPRD_IMSR_BREAK_DETECT |
682*4882a593Smuzhiyun 		   SPRD_IMSR_TIMEOUT))
683*4882a593Smuzhiyun 		sprd_rx(port);
684*4882a593Smuzhiyun 
685*4882a593Smuzhiyun 	if (ims & SPRD_IMSR_TX_FIFO_EMPTY)
686*4882a593Smuzhiyun 		sprd_tx(port);
687*4882a593Smuzhiyun 
688*4882a593Smuzhiyun 	spin_unlock(&port->lock);
689*4882a593Smuzhiyun 
690*4882a593Smuzhiyun 	return IRQ_HANDLED;
691*4882a593Smuzhiyun }
692*4882a593Smuzhiyun 
sprd_uart_dma_startup(struct uart_port * port,struct sprd_uart_port * sp)693*4882a593Smuzhiyun static void sprd_uart_dma_startup(struct uart_port *port,
694*4882a593Smuzhiyun 				  struct sprd_uart_port *sp)
695*4882a593Smuzhiyun {
696*4882a593Smuzhiyun 	int ret;
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun 	sprd_request_dma(port);
699*4882a593Smuzhiyun 	if (!(sp->rx_dma.enable || sp->tx_dma.enable))
700*4882a593Smuzhiyun 		return;
701*4882a593Smuzhiyun 
702*4882a593Smuzhiyun 	ret = sprd_start_dma_rx(port);
703*4882a593Smuzhiyun 	if (ret) {
704*4882a593Smuzhiyun 		sp->rx_dma.enable = false;
705*4882a593Smuzhiyun 		dma_release_channel(sp->rx_dma.chn);
706*4882a593Smuzhiyun 		dev_warn(port->dev, "fail to start RX dma mode\n");
707*4882a593Smuzhiyun 	}
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun 	sprd_uart_dma_enable(port, true);
710*4882a593Smuzhiyun }
711*4882a593Smuzhiyun 
sprd_startup(struct uart_port * port)712*4882a593Smuzhiyun static int sprd_startup(struct uart_port *port)
713*4882a593Smuzhiyun {
714*4882a593Smuzhiyun 	int ret = 0;
715*4882a593Smuzhiyun 	unsigned int ien, fc;
716*4882a593Smuzhiyun 	unsigned int timeout;
717*4882a593Smuzhiyun 	struct sprd_uart_port *sp;
718*4882a593Smuzhiyun 	unsigned long flags;
719*4882a593Smuzhiyun 
720*4882a593Smuzhiyun 	serial_out(port, SPRD_CTL2,
721*4882a593Smuzhiyun 		   THLD_TX_EMPTY << THLD_TX_EMPTY_SHIFT | THLD_RX_FULL);
722*4882a593Smuzhiyun 
723*4882a593Smuzhiyun 	/* clear rx fifo */
724*4882a593Smuzhiyun 	timeout = SPRD_TIMEOUT;
725*4882a593Smuzhiyun 	while (timeout-- && serial_in(port, SPRD_STS1) & SPRD_RX_FIFO_CNT_MASK)
726*4882a593Smuzhiyun 		serial_in(port, SPRD_RXD);
727*4882a593Smuzhiyun 
728*4882a593Smuzhiyun 	/* clear tx fifo */
729*4882a593Smuzhiyun 	timeout = SPRD_TIMEOUT;
730*4882a593Smuzhiyun 	while (timeout-- && serial_in(port, SPRD_STS1) & SPRD_TX_FIFO_CNT_MASK)
731*4882a593Smuzhiyun 		cpu_relax();
732*4882a593Smuzhiyun 
733*4882a593Smuzhiyun 	/* clear interrupt */
734*4882a593Smuzhiyun 	serial_out(port, SPRD_IEN, 0);
735*4882a593Smuzhiyun 	serial_out(port, SPRD_ICLR, ~0);
736*4882a593Smuzhiyun 
737*4882a593Smuzhiyun 	/* allocate irq */
738*4882a593Smuzhiyun 	sp = container_of(port, struct sprd_uart_port, port);
739*4882a593Smuzhiyun 	snprintf(sp->name, sizeof(sp->name), "sprd_serial%d", port->line);
740*4882a593Smuzhiyun 
741*4882a593Smuzhiyun 	sprd_uart_dma_startup(port, sp);
742*4882a593Smuzhiyun 
743*4882a593Smuzhiyun 	ret = devm_request_irq(port->dev, port->irq, sprd_handle_irq,
744*4882a593Smuzhiyun 			       IRQF_SHARED, sp->name, port);
745*4882a593Smuzhiyun 	if (ret) {
746*4882a593Smuzhiyun 		dev_err(port->dev, "fail to request serial irq %d, ret=%d\n",
747*4882a593Smuzhiyun 			port->irq, ret);
748*4882a593Smuzhiyun 		return ret;
749*4882a593Smuzhiyun 	}
750*4882a593Smuzhiyun 	fc = serial_in(port, SPRD_CTL1);
751*4882a593Smuzhiyun 	fc |= RX_TOUT_THLD_DEF | RX_HFC_THLD_DEF;
752*4882a593Smuzhiyun 	serial_out(port, SPRD_CTL1, fc);
753*4882a593Smuzhiyun 
754*4882a593Smuzhiyun 	/* enable interrupt */
755*4882a593Smuzhiyun 	spin_lock_irqsave(&port->lock, flags);
756*4882a593Smuzhiyun 	ien = serial_in(port, SPRD_IEN);
757*4882a593Smuzhiyun 	ien |= SPRD_IEN_BREAK_DETECT | SPRD_IEN_TIMEOUT;
758*4882a593Smuzhiyun 	if (!sp->rx_dma.enable)
759*4882a593Smuzhiyun 		ien |= SPRD_IEN_RX_FULL;
760*4882a593Smuzhiyun 	serial_out(port, SPRD_IEN, ien);
761*4882a593Smuzhiyun 	spin_unlock_irqrestore(&port->lock, flags);
762*4882a593Smuzhiyun 
763*4882a593Smuzhiyun 	return 0;
764*4882a593Smuzhiyun }
765*4882a593Smuzhiyun 
sprd_shutdown(struct uart_port * port)766*4882a593Smuzhiyun static void sprd_shutdown(struct uart_port *port)
767*4882a593Smuzhiyun {
768*4882a593Smuzhiyun 	sprd_release_dma(port);
769*4882a593Smuzhiyun 	serial_out(port, SPRD_IEN, 0);
770*4882a593Smuzhiyun 	serial_out(port, SPRD_ICLR, ~0);
771*4882a593Smuzhiyun 	devm_free_irq(port->dev, port->irq, port);
772*4882a593Smuzhiyun }
773*4882a593Smuzhiyun 
sprd_set_termios(struct uart_port * port,struct ktermios * termios,struct ktermios * old)774*4882a593Smuzhiyun static void sprd_set_termios(struct uart_port *port,
775*4882a593Smuzhiyun 			     struct ktermios *termios,
776*4882a593Smuzhiyun 			     struct ktermios *old)
777*4882a593Smuzhiyun {
778*4882a593Smuzhiyun 	unsigned int baud, quot;
779*4882a593Smuzhiyun 	unsigned int lcr = 0, fc;
780*4882a593Smuzhiyun 	unsigned long flags;
781*4882a593Smuzhiyun 
782*4882a593Smuzhiyun 	/* ask the core to calculate the divisor for us */
783*4882a593Smuzhiyun 	baud = uart_get_baud_rate(port, termios, old, 0, SPRD_BAUD_IO_LIMIT);
784*4882a593Smuzhiyun 
785*4882a593Smuzhiyun 	quot = port->uartclk / baud;
786*4882a593Smuzhiyun 
787*4882a593Smuzhiyun 	/* set data length */
788*4882a593Smuzhiyun 	switch (termios->c_cflag & CSIZE) {
789*4882a593Smuzhiyun 	case CS5:
790*4882a593Smuzhiyun 		lcr |= SPRD_LCR_DATA_LEN5;
791*4882a593Smuzhiyun 		break;
792*4882a593Smuzhiyun 	case CS6:
793*4882a593Smuzhiyun 		lcr |= SPRD_LCR_DATA_LEN6;
794*4882a593Smuzhiyun 		break;
795*4882a593Smuzhiyun 	case CS7:
796*4882a593Smuzhiyun 		lcr |= SPRD_LCR_DATA_LEN7;
797*4882a593Smuzhiyun 		break;
798*4882a593Smuzhiyun 	case CS8:
799*4882a593Smuzhiyun 	default:
800*4882a593Smuzhiyun 		lcr |= SPRD_LCR_DATA_LEN8;
801*4882a593Smuzhiyun 		break;
802*4882a593Smuzhiyun 	}
803*4882a593Smuzhiyun 
804*4882a593Smuzhiyun 	/* calculate stop bits */
805*4882a593Smuzhiyun 	lcr &= ~(SPRD_LCR_STOP_1BIT | SPRD_LCR_STOP_2BIT);
806*4882a593Smuzhiyun 	if (termios->c_cflag & CSTOPB)
807*4882a593Smuzhiyun 		lcr |= SPRD_LCR_STOP_2BIT;
808*4882a593Smuzhiyun 	else
809*4882a593Smuzhiyun 		lcr |= SPRD_LCR_STOP_1BIT;
810*4882a593Smuzhiyun 
811*4882a593Smuzhiyun 	/* calculate parity */
812*4882a593Smuzhiyun 	lcr &= ~SPRD_LCR_PARITY;
813*4882a593Smuzhiyun 	termios->c_cflag &= ~CMSPAR;	/* no support mark/space */
814*4882a593Smuzhiyun 	if (termios->c_cflag & PARENB) {
815*4882a593Smuzhiyun 		lcr |= SPRD_LCR_PARITY_EN;
816*4882a593Smuzhiyun 		if (termios->c_cflag & PARODD)
817*4882a593Smuzhiyun 			lcr |= SPRD_LCR_ODD_PAR;
818*4882a593Smuzhiyun 		else
819*4882a593Smuzhiyun 			lcr |= SPRD_LCR_EVEN_PAR;
820*4882a593Smuzhiyun 	}
821*4882a593Smuzhiyun 
822*4882a593Smuzhiyun 	spin_lock_irqsave(&port->lock, flags);
823*4882a593Smuzhiyun 
824*4882a593Smuzhiyun 	/* update the per-port timeout */
825*4882a593Smuzhiyun 	uart_update_timeout(port, termios->c_cflag, baud);
826*4882a593Smuzhiyun 
827*4882a593Smuzhiyun 	port->read_status_mask = SPRD_LSR_OE;
828*4882a593Smuzhiyun 	if (termios->c_iflag & INPCK)
829*4882a593Smuzhiyun 		port->read_status_mask |= SPRD_LSR_FE | SPRD_LSR_PE;
830*4882a593Smuzhiyun 	if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
831*4882a593Smuzhiyun 		port->read_status_mask |= SPRD_LSR_BI;
832*4882a593Smuzhiyun 
833*4882a593Smuzhiyun 	/* characters to ignore */
834*4882a593Smuzhiyun 	port->ignore_status_mask = 0;
835*4882a593Smuzhiyun 	if (termios->c_iflag & IGNPAR)
836*4882a593Smuzhiyun 		port->ignore_status_mask |= SPRD_LSR_PE | SPRD_LSR_FE;
837*4882a593Smuzhiyun 	if (termios->c_iflag & IGNBRK) {
838*4882a593Smuzhiyun 		port->ignore_status_mask |= SPRD_LSR_BI;
839*4882a593Smuzhiyun 		/*
840*4882a593Smuzhiyun 		 * If we're ignoring parity and break indicators,
841*4882a593Smuzhiyun 		 * ignore overruns too (for real raw support).
842*4882a593Smuzhiyun 		 */
843*4882a593Smuzhiyun 		if (termios->c_iflag & IGNPAR)
844*4882a593Smuzhiyun 			port->ignore_status_mask |= SPRD_LSR_OE;
845*4882a593Smuzhiyun 	}
846*4882a593Smuzhiyun 
847*4882a593Smuzhiyun 	/* flow control */
848*4882a593Smuzhiyun 	fc = serial_in(port, SPRD_CTL1);
849*4882a593Smuzhiyun 	fc &= ~(RX_HW_FLOW_CTL_THLD | RX_HW_FLOW_CTL_EN | TX_HW_FLOW_CTL_EN);
850*4882a593Smuzhiyun 	if (termios->c_cflag & CRTSCTS) {
851*4882a593Smuzhiyun 		fc |= RX_HW_FLOW_CTL_THLD;
852*4882a593Smuzhiyun 		fc |= RX_HW_FLOW_CTL_EN;
853*4882a593Smuzhiyun 		fc |= TX_HW_FLOW_CTL_EN;
854*4882a593Smuzhiyun 	}
855*4882a593Smuzhiyun 
856*4882a593Smuzhiyun 	/* clock divider bit0~bit15 */
857*4882a593Smuzhiyun 	serial_out(port, SPRD_CLKD0, quot & SPRD_CLKD0_MASK);
858*4882a593Smuzhiyun 
859*4882a593Smuzhiyun 	/* clock divider bit16~bit20 */
860*4882a593Smuzhiyun 	serial_out(port, SPRD_CLKD1,
861*4882a593Smuzhiyun 		   (quot & SPRD_CLKD1_MASK) >> SPRD_CLKD1_SHIFT);
862*4882a593Smuzhiyun 	serial_out(port, SPRD_LCR, lcr);
863*4882a593Smuzhiyun 	fc |= RX_TOUT_THLD_DEF | RX_HFC_THLD_DEF;
864*4882a593Smuzhiyun 	serial_out(port, SPRD_CTL1, fc);
865*4882a593Smuzhiyun 
866*4882a593Smuzhiyun 	spin_unlock_irqrestore(&port->lock, flags);
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun 	/* Don't rewrite B0 */
869*4882a593Smuzhiyun 	if (tty_termios_baud_rate(termios))
870*4882a593Smuzhiyun 		tty_termios_encode_baud_rate(termios, baud, baud);
871*4882a593Smuzhiyun }
872*4882a593Smuzhiyun 
sprd_type(struct uart_port * port)873*4882a593Smuzhiyun static const char *sprd_type(struct uart_port *port)
874*4882a593Smuzhiyun {
875*4882a593Smuzhiyun 	return "SPX";
876*4882a593Smuzhiyun }
877*4882a593Smuzhiyun 
sprd_release_port(struct uart_port * port)878*4882a593Smuzhiyun static void sprd_release_port(struct uart_port *port)
879*4882a593Smuzhiyun {
880*4882a593Smuzhiyun 	/* nothing to do */
881*4882a593Smuzhiyun }
882*4882a593Smuzhiyun 
sprd_request_port(struct uart_port * port)883*4882a593Smuzhiyun static int sprd_request_port(struct uart_port *port)
884*4882a593Smuzhiyun {
885*4882a593Smuzhiyun 	return 0;
886*4882a593Smuzhiyun }
887*4882a593Smuzhiyun 
sprd_config_port(struct uart_port * port,int flags)888*4882a593Smuzhiyun static void sprd_config_port(struct uart_port *port, int flags)
889*4882a593Smuzhiyun {
890*4882a593Smuzhiyun 	if (flags & UART_CONFIG_TYPE)
891*4882a593Smuzhiyun 		port->type = PORT_SPRD;
892*4882a593Smuzhiyun }
893*4882a593Smuzhiyun 
sprd_verify_port(struct uart_port * port,struct serial_struct * ser)894*4882a593Smuzhiyun static int sprd_verify_port(struct uart_port *port, struct serial_struct *ser)
895*4882a593Smuzhiyun {
896*4882a593Smuzhiyun 	if (ser->type != PORT_SPRD)
897*4882a593Smuzhiyun 		return -EINVAL;
898*4882a593Smuzhiyun 	if (port->irq != ser->irq)
899*4882a593Smuzhiyun 		return -EINVAL;
900*4882a593Smuzhiyun 	if (port->iotype != ser->io_type)
901*4882a593Smuzhiyun 		return -EINVAL;
902*4882a593Smuzhiyun 	return 0;
903*4882a593Smuzhiyun }
904*4882a593Smuzhiyun 
sprd_pm(struct uart_port * port,unsigned int state,unsigned int oldstate)905*4882a593Smuzhiyun static void sprd_pm(struct uart_port *port, unsigned int state,
906*4882a593Smuzhiyun 		unsigned int oldstate)
907*4882a593Smuzhiyun {
908*4882a593Smuzhiyun 	struct sprd_uart_port *sup =
909*4882a593Smuzhiyun 		container_of(port, struct sprd_uart_port, port);
910*4882a593Smuzhiyun 
911*4882a593Smuzhiyun 	switch (state) {
912*4882a593Smuzhiyun 	case UART_PM_STATE_ON:
913*4882a593Smuzhiyun 		clk_prepare_enable(sup->clk);
914*4882a593Smuzhiyun 		break;
915*4882a593Smuzhiyun 	case UART_PM_STATE_OFF:
916*4882a593Smuzhiyun 		clk_disable_unprepare(sup->clk);
917*4882a593Smuzhiyun 		break;
918*4882a593Smuzhiyun 	}
919*4882a593Smuzhiyun }
920*4882a593Smuzhiyun 
921*4882a593Smuzhiyun #ifdef CONFIG_CONSOLE_POLL
sprd_poll_init(struct uart_port * port)922*4882a593Smuzhiyun static int sprd_poll_init(struct uart_port *port)
923*4882a593Smuzhiyun {
924*4882a593Smuzhiyun 	if (port->state->pm_state != UART_PM_STATE_ON) {
925*4882a593Smuzhiyun 		sprd_pm(port, UART_PM_STATE_ON, 0);
926*4882a593Smuzhiyun 		port->state->pm_state = UART_PM_STATE_ON;
927*4882a593Smuzhiyun 	}
928*4882a593Smuzhiyun 
929*4882a593Smuzhiyun 	return 0;
930*4882a593Smuzhiyun }
931*4882a593Smuzhiyun 
sprd_poll_get_char(struct uart_port * port)932*4882a593Smuzhiyun static int sprd_poll_get_char(struct uart_port *port)
933*4882a593Smuzhiyun {
934*4882a593Smuzhiyun 	while (!(serial_in(port, SPRD_STS1) & SPRD_RX_FIFO_CNT_MASK))
935*4882a593Smuzhiyun 		cpu_relax();
936*4882a593Smuzhiyun 
937*4882a593Smuzhiyun 	return serial_in(port, SPRD_RXD);
938*4882a593Smuzhiyun }
939*4882a593Smuzhiyun 
sprd_poll_put_char(struct uart_port * port,unsigned char ch)940*4882a593Smuzhiyun static void sprd_poll_put_char(struct uart_port *port, unsigned char ch)
941*4882a593Smuzhiyun {
942*4882a593Smuzhiyun 	while (serial_in(port, SPRD_STS1) & SPRD_TX_FIFO_CNT_MASK)
943*4882a593Smuzhiyun 		cpu_relax();
944*4882a593Smuzhiyun 
945*4882a593Smuzhiyun 	serial_out(port, SPRD_TXD, ch);
946*4882a593Smuzhiyun }
947*4882a593Smuzhiyun #endif
948*4882a593Smuzhiyun 
949*4882a593Smuzhiyun static const struct uart_ops serial_sprd_ops = {
950*4882a593Smuzhiyun 	.tx_empty = sprd_tx_empty,
951*4882a593Smuzhiyun 	.get_mctrl = sprd_get_mctrl,
952*4882a593Smuzhiyun 	.set_mctrl = sprd_set_mctrl,
953*4882a593Smuzhiyun 	.stop_tx = sprd_stop_tx,
954*4882a593Smuzhiyun 	.start_tx = sprd_start_tx,
955*4882a593Smuzhiyun 	.stop_rx = sprd_stop_rx,
956*4882a593Smuzhiyun 	.break_ctl = sprd_break_ctl,
957*4882a593Smuzhiyun 	.startup = sprd_startup,
958*4882a593Smuzhiyun 	.shutdown = sprd_shutdown,
959*4882a593Smuzhiyun 	.set_termios = sprd_set_termios,
960*4882a593Smuzhiyun 	.type = sprd_type,
961*4882a593Smuzhiyun 	.release_port = sprd_release_port,
962*4882a593Smuzhiyun 	.request_port = sprd_request_port,
963*4882a593Smuzhiyun 	.config_port = sprd_config_port,
964*4882a593Smuzhiyun 	.verify_port = sprd_verify_port,
965*4882a593Smuzhiyun 	.pm = sprd_pm,
966*4882a593Smuzhiyun #ifdef CONFIG_CONSOLE_POLL
967*4882a593Smuzhiyun 	.poll_init	= sprd_poll_init,
968*4882a593Smuzhiyun 	.poll_get_char	= sprd_poll_get_char,
969*4882a593Smuzhiyun 	.poll_put_char	= sprd_poll_put_char,
970*4882a593Smuzhiyun #endif
971*4882a593Smuzhiyun };
972*4882a593Smuzhiyun 
973*4882a593Smuzhiyun #ifdef CONFIG_SERIAL_SPRD_CONSOLE
wait_for_xmitr(struct uart_port * port)974*4882a593Smuzhiyun static void wait_for_xmitr(struct uart_port *port)
975*4882a593Smuzhiyun {
976*4882a593Smuzhiyun 	unsigned int status, tmout = 10000;
977*4882a593Smuzhiyun 
978*4882a593Smuzhiyun 	/* wait up to 10ms for the character(s) to be sent */
979*4882a593Smuzhiyun 	do {
980*4882a593Smuzhiyun 		status = serial_in(port, SPRD_STS1);
981*4882a593Smuzhiyun 		if (--tmout == 0)
982*4882a593Smuzhiyun 			break;
983*4882a593Smuzhiyun 		udelay(1);
984*4882a593Smuzhiyun 	} while (status & SPRD_TX_FIFO_CNT_MASK);
985*4882a593Smuzhiyun }
986*4882a593Smuzhiyun 
sprd_console_putchar(struct uart_port * port,int ch)987*4882a593Smuzhiyun static void sprd_console_putchar(struct uart_port *port, int ch)
988*4882a593Smuzhiyun {
989*4882a593Smuzhiyun 	wait_for_xmitr(port);
990*4882a593Smuzhiyun 	serial_out(port, SPRD_TXD, ch);
991*4882a593Smuzhiyun }
992*4882a593Smuzhiyun 
sprd_console_write(struct console * co,const char * s,unsigned int count)993*4882a593Smuzhiyun static void sprd_console_write(struct console *co, const char *s,
994*4882a593Smuzhiyun 			       unsigned int count)
995*4882a593Smuzhiyun {
996*4882a593Smuzhiyun 	struct uart_port *port = &sprd_port[co->index]->port;
997*4882a593Smuzhiyun 	int locked = 1;
998*4882a593Smuzhiyun 	unsigned long flags;
999*4882a593Smuzhiyun 
1000*4882a593Smuzhiyun 	if (port->sysrq)
1001*4882a593Smuzhiyun 		locked = 0;
1002*4882a593Smuzhiyun 	else if (oops_in_progress)
1003*4882a593Smuzhiyun 		locked = spin_trylock_irqsave(&port->lock, flags);
1004*4882a593Smuzhiyun 	else
1005*4882a593Smuzhiyun 		spin_lock_irqsave(&port->lock, flags);
1006*4882a593Smuzhiyun 
1007*4882a593Smuzhiyun 	uart_console_write(port, s, count, sprd_console_putchar);
1008*4882a593Smuzhiyun 
1009*4882a593Smuzhiyun 	/* wait for transmitter to become empty */
1010*4882a593Smuzhiyun 	wait_for_xmitr(port);
1011*4882a593Smuzhiyun 
1012*4882a593Smuzhiyun 	if (locked)
1013*4882a593Smuzhiyun 		spin_unlock_irqrestore(&port->lock, flags);
1014*4882a593Smuzhiyun }
1015*4882a593Smuzhiyun 
sprd_console_setup(struct console * co,char * options)1016*4882a593Smuzhiyun static int sprd_console_setup(struct console *co, char *options)
1017*4882a593Smuzhiyun {
1018*4882a593Smuzhiyun 	struct sprd_uart_port *sprd_uart_port;
1019*4882a593Smuzhiyun 	int baud = 115200;
1020*4882a593Smuzhiyun 	int bits = 8;
1021*4882a593Smuzhiyun 	int parity = 'n';
1022*4882a593Smuzhiyun 	int flow = 'n';
1023*4882a593Smuzhiyun 
1024*4882a593Smuzhiyun 	if (co->index >= UART_NR_MAX || co->index < 0)
1025*4882a593Smuzhiyun 		co->index = 0;
1026*4882a593Smuzhiyun 
1027*4882a593Smuzhiyun 	sprd_uart_port = sprd_port[co->index];
1028*4882a593Smuzhiyun 	if (!sprd_uart_port || !sprd_uart_port->port.membase) {
1029*4882a593Smuzhiyun 		pr_info("serial port %d not yet initialized\n", co->index);
1030*4882a593Smuzhiyun 		return -ENODEV;
1031*4882a593Smuzhiyun 	}
1032*4882a593Smuzhiyun 
1033*4882a593Smuzhiyun 	if (options)
1034*4882a593Smuzhiyun 		uart_parse_options(options, &baud, &parity, &bits, &flow);
1035*4882a593Smuzhiyun 
1036*4882a593Smuzhiyun 	return uart_set_options(&sprd_uart_port->port, co, baud,
1037*4882a593Smuzhiyun 				parity, bits, flow);
1038*4882a593Smuzhiyun }
1039*4882a593Smuzhiyun 
1040*4882a593Smuzhiyun static struct uart_driver sprd_uart_driver;
1041*4882a593Smuzhiyun static struct console sprd_console = {
1042*4882a593Smuzhiyun 	.name = SPRD_TTY_NAME,
1043*4882a593Smuzhiyun 	.write = sprd_console_write,
1044*4882a593Smuzhiyun 	.device = uart_console_device,
1045*4882a593Smuzhiyun 	.setup = sprd_console_setup,
1046*4882a593Smuzhiyun 	.flags = CON_PRINTBUFFER,
1047*4882a593Smuzhiyun 	.index = -1,
1048*4882a593Smuzhiyun 	.data = &sprd_uart_driver,
1049*4882a593Smuzhiyun };
1050*4882a593Smuzhiyun 
sprd_serial_console_init(void)1051*4882a593Smuzhiyun static int __init sprd_serial_console_init(void)
1052*4882a593Smuzhiyun {
1053*4882a593Smuzhiyun 	register_console(&sprd_console);
1054*4882a593Smuzhiyun 	return 0;
1055*4882a593Smuzhiyun }
1056*4882a593Smuzhiyun console_initcall(sprd_serial_console_init);
1057*4882a593Smuzhiyun 
1058*4882a593Smuzhiyun #define SPRD_CONSOLE	(&sprd_console)
1059*4882a593Smuzhiyun 
1060*4882a593Smuzhiyun /* Support for earlycon */
sprd_putc(struct uart_port * port,int c)1061*4882a593Smuzhiyun static void sprd_putc(struct uart_port *port, int c)
1062*4882a593Smuzhiyun {
1063*4882a593Smuzhiyun 	unsigned int timeout = SPRD_TIMEOUT;
1064*4882a593Smuzhiyun 
1065*4882a593Smuzhiyun 	while (timeout-- &&
1066*4882a593Smuzhiyun 	       !(readl(port->membase + SPRD_LSR) & SPRD_LSR_TX_OVER))
1067*4882a593Smuzhiyun 		cpu_relax();
1068*4882a593Smuzhiyun 
1069*4882a593Smuzhiyun 	writeb(c, port->membase + SPRD_TXD);
1070*4882a593Smuzhiyun }
1071*4882a593Smuzhiyun 
sprd_early_write(struct console * con,const char * s,unsigned int n)1072*4882a593Smuzhiyun static void sprd_early_write(struct console *con, const char *s, unsigned int n)
1073*4882a593Smuzhiyun {
1074*4882a593Smuzhiyun 	struct earlycon_device *dev = con->data;
1075*4882a593Smuzhiyun 
1076*4882a593Smuzhiyun 	uart_console_write(&dev->port, s, n, sprd_putc);
1077*4882a593Smuzhiyun }
1078*4882a593Smuzhiyun 
sprd_early_console_setup(struct earlycon_device * device,const char * opt)1079*4882a593Smuzhiyun static int __init sprd_early_console_setup(struct earlycon_device *device,
1080*4882a593Smuzhiyun 					   const char *opt)
1081*4882a593Smuzhiyun {
1082*4882a593Smuzhiyun 	if (!device->port.membase)
1083*4882a593Smuzhiyun 		return -ENODEV;
1084*4882a593Smuzhiyun 
1085*4882a593Smuzhiyun 	device->con->write = sprd_early_write;
1086*4882a593Smuzhiyun 	return 0;
1087*4882a593Smuzhiyun }
1088*4882a593Smuzhiyun OF_EARLYCON_DECLARE(sprd_serial, "sprd,sc9836-uart",
1089*4882a593Smuzhiyun 		    sprd_early_console_setup);
1090*4882a593Smuzhiyun 
1091*4882a593Smuzhiyun #else /* !CONFIG_SERIAL_SPRD_CONSOLE */
1092*4882a593Smuzhiyun #define SPRD_CONSOLE		NULL
1093*4882a593Smuzhiyun #endif
1094*4882a593Smuzhiyun 
1095*4882a593Smuzhiyun static struct uart_driver sprd_uart_driver = {
1096*4882a593Smuzhiyun 	.owner = THIS_MODULE,
1097*4882a593Smuzhiyun 	.driver_name = "sprd_serial",
1098*4882a593Smuzhiyun 	.dev_name = SPRD_TTY_NAME,
1099*4882a593Smuzhiyun 	.major = 0,
1100*4882a593Smuzhiyun 	.minor = 0,
1101*4882a593Smuzhiyun 	.nr = UART_NR_MAX,
1102*4882a593Smuzhiyun 	.cons = SPRD_CONSOLE,
1103*4882a593Smuzhiyun };
1104*4882a593Smuzhiyun 
sprd_remove(struct platform_device * dev)1105*4882a593Smuzhiyun static int sprd_remove(struct platform_device *dev)
1106*4882a593Smuzhiyun {
1107*4882a593Smuzhiyun 	struct sprd_uart_port *sup = platform_get_drvdata(dev);
1108*4882a593Smuzhiyun 
1109*4882a593Smuzhiyun 	if (sup) {
1110*4882a593Smuzhiyun 		uart_remove_one_port(&sprd_uart_driver, &sup->port);
1111*4882a593Smuzhiyun 		sprd_port[sup->port.line] = NULL;
1112*4882a593Smuzhiyun 		sprd_rx_free_buf(sup);
1113*4882a593Smuzhiyun 		sprd_ports_num--;
1114*4882a593Smuzhiyun 	}
1115*4882a593Smuzhiyun 
1116*4882a593Smuzhiyun 	if (!sprd_ports_num)
1117*4882a593Smuzhiyun 		uart_unregister_driver(&sprd_uart_driver);
1118*4882a593Smuzhiyun 
1119*4882a593Smuzhiyun 	return 0;
1120*4882a593Smuzhiyun }
1121*4882a593Smuzhiyun 
sprd_uart_is_console(struct uart_port * uport)1122*4882a593Smuzhiyun static bool sprd_uart_is_console(struct uart_port *uport)
1123*4882a593Smuzhiyun {
1124*4882a593Smuzhiyun 	struct console *cons = sprd_uart_driver.cons;
1125*4882a593Smuzhiyun 
1126*4882a593Smuzhiyun 	if ((cons && cons->index >= 0 && cons->index == uport->line) ||
1127*4882a593Smuzhiyun 	    of_console_check(uport->dev->of_node, SPRD_TTY_NAME, uport->line))
1128*4882a593Smuzhiyun 		return true;
1129*4882a593Smuzhiyun 
1130*4882a593Smuzhiyun 	return false;
1131*4882a593Smuzhiyun }
1132*4882a593Smuzhiyun 
sprd_clk_init(struct uart_port * uport)1133*4882a593Smuzhiyun static int sprd_clk_init(struct uart_port *uport)
1134*4882a593Smuzhiyun {
1135*4882a593Smuzhiyun 	struct clk *clk_uart, *clk_parent;
1136*4882a593Smuzhiyun 	struct sprd_uart_port *u = sprd_port[uport->line];
1137*4882a593Smuzhiyun 
1138*4882a593Smuzhiyun 	clk_uart = devm_clk_get(uport->dev, "uart");
1139*4882a593Smuzhiyun 	if (IS_ERR(clk_uart)) {
1140*4882a593Smuzhiyun 		dev_warn(uport->dev, "uart%d can't get uart clock\n",
1141*4882a593Smuzhiyun 			 uport->line);
1142*4882a593Smuzhiyun 		clk_uart = NULL;
1143*4882a593Smuzhiyun 	}
1144*4882a593Smuzhiyun 
1145*4882a593Smuzhiyun 	clk_parent = devm_clk_get(uport->dev, "source");
1146*4882a593Smuzhiyun 	if (IS_ERR(clk_parent)) {
1147*4882a593Smuzhiyun 		dev_warn(uport->dev, "uart%d can't get source clock\n",
1148*4882a593Smuzhiyun 			 uport->line);
1149*4882a593Smuzhiyun 		clk_parent = NULL;
1150*4882a593Smuzhiyun 	}
1151*4882a593Smuzhiyun 
1152*4882a593Smuzhiyun 	if (!clk_uart || clk_set_parent(clk_uart, clk_parent))
1153*4882a593Smuzhiyun 		uport->uartclk = SPRD_DEFAULT_SOURCE_CLK;
1154*4882a593Smuzhiyun 	else
1155*4882a593Smuzhiyun 		uport->uartclk = clk_get_rate(clk_uart);
1156*4882a593Smuzhiyun 
1157*4882a593Smuzhiyun 	u->clk = devm_clk_get(uport->dev, "enable");
1158*4882a593Smuzhiyun 	if (IS_ERR(u->clk)) {
1159*4882a593Smuzhiyun 		if (PTR_ERR(u->clk) == -EPROBE_DEFER)
1160*4882a593Smuzhiyun 			return -EPROBE_DEFER;
1161*4882a593Smuzhiyun 
1162*4882a593Smuzhiyun 		dev_warn(uport->dev, "uart%d can't get enable clock\n",
1163*4882a593Smuzhiyun 			uport->line);
1164*4882a593Smuzhiyun 
1165*4882a593Smuzhiyun 		/* To keep console alive even if the error occurred */
1166*4882a593Smuzhiyun 		if (!sprd_uart_is_console(uport))
1167*4882a593Smuzhiyun 			return PTR_ERR(u->clk);
1168*4882a593Smuzhiyun 
1169*4882a593Smuzhiyun 		u->clk = NULL;
1170*4882a593Smuzhiyun 	}
1171*4882a593Smuzhiyun 
1172*4882a593Smuzhiyun 	return 0;
1173*4882a593Smuzhiyun }
1174*4882a593Smuzhiyun 
sprd_probe(struct platform_device * pdev)1175*4882a593Smuzhiyun static int sprd_probe(struct platform_device *pdev)
1176*4882a593Smuzhiyun {
1177*4882a593Smuzhiyun 	struct resource *res;
1178*4882a593Smuzhiyun 	struct uart_port *up;
1179*4882a593Smuzhiyun 	int irq;
1180*4882a593Smuzhiyun 	int index;
1181*4882a593Smuzhiyun 	int ret;
1182*4882a593Smuzhiyun 
1183*4882a593Smuzhiyun 	index = of_alias_get_id(pdev->dev.of_node, "serial");
1184*4882a593Smuzhiyun 	if (index < 0 || index >= ARRAY_SIZE(sprd_port)) {
1185*4882a593Smuzhiyun 		dev_err(&pdev->dev, "got a wrong serial alias id %d\n", index);
1186*4882a593Smuzhiyun 		return -EINVAL;
1187*4882a593Smuzhiyun 	}
1188*4882a593Smuzhiyun 
1189*4882a593Smuzhiyun 	sprd_port[index] = devm_kzalloc(&pdev->dev, sizeof(*sprd_port[index]),
1190*4882a593Smuzhiyun 					GFP_KERNEL);
1191*4882a593Smuzhiyun 	if (!sprd_port[index])
1192*4882a593Smuzhiyun 		return -ENOMEM;
1193*4882a593Smuzhiyun 
1194*4882a593Smuzhiyun 	up = &sprd_port[index]->port;
1195*4882a593Smuzhiyun 	up->dev = &pdev->dev;
1196*4882a593Smuzhiyun 	up->line = index;
1197*4882a593Smuzhiyun 	up->type = PORT_SPRD;
1198*4882a593Smuzhiyun 	up->iotype = UPIO_MEM;
1199*4882a593Smuzhiyun 	up->uartclk = SPRD_DEF_RATE;
1200*4882a593Smuzhiyun 	up->fifosize = SPRD_FIFO_SIZE;
1201*4882a593Smuzhiyun 	up->ops = &serial_sprd_ops;
1202*4882a593Smuzhiyun 	up->flags = UPF_BOOT_AUTOCONF;
1203*4882a593Smuzhiyun 	up->has_sysrq = IS_ENABLED(CONFIG_SERIAL_SPRD_CONSOLE);
1204*4882a593Smuzhiyun 
1205*4882a593Smuzhiyun 	ret = sprd_clk_init(up);
1206*4882a593Smuzhiyun 	if (ret)
1207*4882a593Smuzhiyun 		return ret;
1208*4882a593Smuzhiyun 
1209*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1210*4882a593Smuzhiyun 	up->membase = devm_ioremap_resource(&pdev->dev, res);
1211*4882a593Smuzhiyun 	if (IS_ERR(up->membase))
1212*4882a593Smuzhiyun 		return PTR_ERR(up->membase);
1213*4882a593Smuzhiyun 
1214*4882a593Smuzhiyun 	up->mapbase = res->start;
1215*4882a593Smuzhiyun 
1216*4882a593Smuzhiyun 	irq = platform_get_irq(pdev, 0);
1217*4882a593Smuzhiyun 	if (irq < 0)
1218*4882a593Smuzhiyun 		return irq;
1219*4882a593Smuzhiyun 	up->irq = irq;
1220*4882a593Smuzhiyun 
1221*4882a593Smuzhiyun 	/*
1222*4882a593Smuzhiyun 	 * Allocate one dma buffer to prepare for receive transfer, in case
1223*4882a593Smuzhiyun 	 * memory allocation failure at runtime.
1224*4882a593Smuzhiyun 	 */
1225*4882a593Smuzhiyun 	ret = sprd_rx_alloc_buf(sprd_port[index]);
1226*4882a593Smuzhiyun 	if (ret)
1227*4882a593Smuzhiyun 		return ret;
1228*4882a593Smuzhiyun 
1229*4882a593Smuzhiyun 	if (!sprd_ports_num) {
1230*4882a593Smuzhiyun 		ret = uart_register_driver(&sprd_uart_driver);
1231*4882a593Smuzhiyun 		if (ret < 0) {
1232*4882a593Smuzhiyun 			pr_err("Failed to register SPRD-UART driver\n");
1233*4882a593Smuzhiyun 			return ret;
1234*4882a593Smuzhiyun 		}
1235*4882a593Smuzhiyun 	}
1236*4882a593Smuzhiyun 	sprd_ports_num++;
1237*4882a593Smuzhiyun 
1238*4882a593Smuzhiyun 	ret = uart_add_one_port(&sprd_uart_driver, up);
1239*4882a593Smuzhiyun 	if (ret)
1240*4882a593Smuzhiyun 		sprd_remove(pdev);
1241*4882a593Smuzhiyun 
1242*4882a593Smuzhiyun 	platform_set_drvdata(pdev, up);
1243*4882a593Smuzhiyun 
1244*4882a593Smuzhiyun 	return ret;
1245*4882a593Smuzhiyun }
1246*4882a593Smuzhiyun 
1247*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
sprd_suspend(struct device * dev)1248*4882a593Smuzhiyun static int sprd_suspend(struct device *dev)
1249*4882a593Smuzhiyun {
1250*4882a593Smuzhiyun 	struct sprd_uart_port *sup = dev_get_drvdata(dev);
1251*4882a593Smuzhiyun 
1252*4882a593Smuzhiyun 	uart_suspend_port(&sprd_uart_driver, &sup->port);
1253*4882a593Smuzhiyun 
1254*4882a593Smuzhiyun 	return 0;
1255*4882a593Smuzhiyun }
1256*4882a593Smuzhiyun 
sprd_resume(struct device * dev)1257*4882a593Smuzhiyun static int sprd_resume(struct device *dev)
1258*4882a593Smuzhiyun {
1259*4882a593Smuzhiyun 	struct sprd_uart_port *sup = dev_get_drvdata(dev);
1260*4882a593Smuzhiyun 
1261*4882a593Smuzhiyun 	uart_resume_port(&sprd_uart_driver, &sup->port);
1262*4882a593Smuzhiyun 
1263*4882a593Smuzhiyun 	return 0;
1264*4882a593Smuzhiyun }
1265*4882a593Smuzhiyun #endif
1266*4882a593Smuzhiyun 
1267*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(sprd_pm_ops, sprd_suspend, sprd_resume);
1268*4882a593Smuzhiyun 
1269*4882a593Smuzhiyun static const struct of_device_id serial_ids[] = {
1270*4882a593Smuzhiyun 	{.compatible = "sprd,sc9836-uart",},
1271*4882a593Smuzhiyun 	{}
1272*4882a593Smuzhiyun };
1273*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, serial_ids);
1274*4882a593Smuzhiyun 
1275*4882a593Smuzhiyun static struct platform_driver sprd_platform_driver = {
1276*4882a593Smuzhiyun 	.probe		= sprd_probe,
1277*4882a593Smuzhiyun 	.remove		= sprd_remove,
1278*4882a593Smuzhiyun 	.driver		= {
1279*4882a593Smuzhiyun 		.name	= "sprd_serial",
1280*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(serial_ids),
1281*4882a593Smuzhiyun 		.pm	= &sprd_pm_ops,
1282*4882a593Smuzhiyun 	},
1283*4882a593Smuzhiyun };
1284*4882a593Smuzhiyun 
1285*4882a593Smuzhiyun module_platform_driver(sprd_platform_driver);
1286*4882a593Smuzhiyun 
1287*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
1288*4882a593Smuzhiyun MODULE_DESCRIPTION("Spreadtrum SoC serial driver series");
1289