xref: /OK3568_Linux_fs/kernel/drivers/tty/serial/jsm/jsm_tty.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /************************************************************************
3*4882a593Smuzhiyun  * Copyright 2003 Digi International (www.digi.com)
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2004 IBM Corporation. All rights reserved.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Contact Information:
8*4882a593Smuzhiyun  * Scott H Kilau <Scott_Kilau@digi.com>
9*4882a593Smuzhiyun  * Ananda Venkatarman <mansarov@us.ibm.com>
10*4882a593Smuzhiyun  * Modifications:
11*4882a593Smuzhiyun  * 01/19/06:	changed jsm_input routine to use the dynamically allocated
12*4882a593Smuzhiyun  *		tty_buffer changes. Contributors: Scott Kilau and Ananda V.
13*4882a593Smuzhiyun  ***********************************************************************/
14*4882a593Smuzhiyun #include <linux/tty.h>
15*4882a593Smuzhiyun #include <linux/tty_flip.h>
16*4882a593Smuzhiyun #include <linux/serial_reg.h>
17*4882a593Smuzhiyun #include <linux/delay.h>	/* For udelay */
18*4882a593Smuzhiyun #include <linux/pci.h>
19*4882a593Smuzhiyun #include <linux/slab.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include "jsm.h"
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun static DECLARE_BITMAP(linemap, MAXLINES);
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun static void jsm_carrier(struct jsm_channel *ch);
26*4882a593Smuzhiyun 
jsm_get_mstat(struct jsm_channel * ch)27*4882a593Smuzhiyun static inline int jsm_get_mstat(struct jsm_channel *ch)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun 	unsigned char mstat;
30*4882a593Smuzhiyun 	int result;
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 	jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "start\n");
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun 	mstat = (ch->ch_mostat | ch->ch_mistat);
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun 	result = 0;
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	if (mstat & UART_MCR_DTR)
39*4882a593Smuzhiyun 		result |= TIOCM_DTR;
40*4882a593Smuzhiyun 	if (mstat & UART_MCR_RTS)
41*4882a593Smuzhiyun 		result |= TIOCM_RTS;
42*4882a593Smuzhiyun 	if (mstat & UART_MSR_CTS)
43*4882a593Smuzhiyun 		result |= TIOCM_CTS;
44*4882a593Smuzhiyun 	if (mstat & UART_MSR_DSR)
45*4882a593Smuzhiyun 		result |= TIOCM_DSR;
46*4882a593Smuzhiyun 	if (mstat & UART_MSR_RI)
47*4882a593Smuzhiyun 		result |= TIOCM_RI;
48*4882a593Smuzhiyun 	if (mstat & UART_MSR_DCD)
49*4882a593Smuzhiyun 		result |= TIOCM_CD;
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "finish\n");
52*4882a593Smuzhiyun 	return result;
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun 
jsm_tty_tx_empty(struct uart_port * port)55*4882a593Smuzhiyun static unsigned int jsm_tty_tx_empty(struct uart_port *port)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun 	return TIOCSER_TEMT;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun /*
61*4882a593Smuzhiyun  * Return modem signals to ld.
62*4882a593Smuzhiyun  */
jsm_tty_get_mctrl(struct uart_port * port)63*4882a593Smuzhiyun static unsigned int jsm_tty_get_mctrl(struct uart_port *port)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun 	int result;
66*4882a593Smuzhiyun 	struct jsm_channel *channel =
67*4882a593Smuzhiyun 		container_of(port, struct jsm_channel, uart_port);
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n");
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	result = jsm_get_mstat(channel);
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	if (result < 0)
74*4882a593Smuzhiyun 		return -ENXIO;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n");
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	return result;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun /*
82*4882a593Smuzhiyun  * jsm_set_modem_info()
83*4882a593Smuzhiyun  *
84*4882a593Smuzhiyun  * Set modem signals, called by ld.
85*4882a593Smuzhiyun  */
jsm_tty_set_mctrl(struct uart_port * port,unsigned int mctrl)86*4882a593Smuzhiyun static void jsm_tty_set_mctrl(struct uart_port *port, unsigned int mctrl)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun 	struct jsm_channel *channel =
89*4882a593Smuzhiyun 		container_of(port, struct jsm_channel, uart_port);
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n");
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	if (mctrl & TIOCM_RTS)
94*4882a593Smuzhiyun 		channel->ch_mostat |= UART_MCR_RTS;
95*4882a593Smuzhiyun 	else
96*4882a593Smuzhiyun 		channel->ch_mostat &= ~UART_MCR_RTS;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	if (mctrl & TIOCM_DTR)
99*4882a593Smuzhiyun 		channel->ch_mostat |= UART_MCR_DTR;
100*4882a593Smuzhiyun 	else
101*4882a593Smuzhiyun 		channel->ch_mostat &= ~UART_MCR_DTR;
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	channel->ch_bd->bd_ops->assert_modem_signals(channel);
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n");
106*4882a593Smuzhiyun 	udelay(10);
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun /*
110*4882a593Smuzhiyun  * jsm_tty_write()
111*4882a593Smuzhiyun  *
112*4882a593Smuzhiyun  * Take data from the user or kernel and send it out to the FEP.
113*4882a593Smuzhiyun  * In here exists all the Transparent Print magic as well.
114*4882a593Smuzhiyun  */
jsm_tty_write(struct uart_port * port)115*4882a593Smuzhiyun static void jsm_tty_write(struct uart_port *port)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun 	struct jsm_channel *channel;
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	channel = container_of(port, struct jsm_channel, uart_port);
120*4882a593Smuzhiyun 	channel->ch_bd->bd_ops->copy_data_from_queue_to_uart(channel);
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun 
jsm_tty_start_tx(struct uart_port * port)123*4882a593Smuzhiyun static void jsm_tty_start_tx(struct uart_port *port)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun 	struct jsm_channel *channel =
126*4882a593Smuzhiyun 		container_of(port, struct jsm_channel, uart_port);
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n");
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	channel->ch_flags &= ~(CH_STOP);
131*4882a593Smuzhiyun 	jsm_tty_write(port);
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n");
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun 
jsm_tty_stop_tx(struct uart_port * port)136*4882a593Smuzhiyun static void jsm_tty_stop_tx(struct uart_port *port)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun 	struct jsm_channel *channel =
139*4882a593Smuzhiyun 		container_of(port, struct jsm_channel, uart_port);
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n");
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	channel->ch_flags |= (CH_STOP);
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n");
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun 
jsm_tty_send_xchar(struct uart_port * port,char ch)148*4882a593Smuzhiyun static void jsm_tty_send_xchar(struct uart_port *port, char ch)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun 	unsigned long lock_flags;
151*4882a593Smuzhiyun 	struct jsm_channel *channel =
152*4882a593Smuzhiyun 		container_of(port, struct jsm_channel, uart_port);
153*4882a593Smuzhiyun 	struct ktermios *termios;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	spin_lock_irqsave(&port->lock, lock_flags);
156*4882a593Smuzhiyun 	termios = &port->state->port.tty->termios;
157*4882a593Smuzhiyun 	if (ch == termios->c_cc[VSTART])
158*4882a593Smuzhiyun 		channel->ch_bd->bd_ops->send_start_character(channel);
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	if (ch == termios->c_cc[VSTOP])
161*4882a593Smuzhiyun 		channel->ch_bd->bd_ops->send_stop_character(channel);
162*4882a593Smuzhiyun 	spin_unlock_irqrestore(&port->lock, lock_flags);
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun 
jsm_tty_stop_rx(struct uart_port * port)165*4882a593Smuzhiyun static void jsm_tty_stop_rx(struct uart_port *port)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun 	struct jsm_channel *channel =
168*4882a593Smuzhiyun 		container_of(port, struct jsm_channel, uart_port);
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	channel->ch_bd->bd_ops->disable_receiver(channel);
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun 
jsm_tty_break(struct uart_port * port,int break_state)173*4882a593Smuzhiyun static void jsm_tty_break(struct uart_port *port, int break_state)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun 	unsigned long lock_flags;
176*4882a593Smuzhiyun 	struct jsm_channel *channel =
177*4882a593Smuzhiyun 		container_of(port, struct jsm_channel, uart_port);
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun 	spin_lock_irqsave(&port->lock, lock_flags);
180*4882a593Smuzhiyun 	if (break_state == -1)
181*4882a593Smuzhiyun 		channel->ch_bd->bd_ops->send_break(channel);
182*4882a593Smuzhiyun 	else
183*4882a593Smuzhiyun 		channel->ch_bd->bd_ops->clear_break(channel);
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	spin_unlock_irqrestore(&port->lock, lock_flags);
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun 
jsm_tty_open(struct uart_port * port)188*4882a593Smuzhiyun static int jsm_tty_open(struct uart_port *port)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun 	unsigned long lock_flags;
191*4882a593Smuzhiyun 	struct jsm_board *brd;
192*4882a593Smuzhiyun 	struct jsm_channel *channel =
193*4882a593Smuzhiyun 		container_of(port, struct jsm_channel, uart_port);
194*4882a593Smuzhiyun 	struct ktermios *termios;
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	/* Get board pointer from our array of majors we have allocated */
197*4882a593Smuzhiyun 	brd = channel->ch_bd;
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	/*
200*4882a593Smuzhiyun 	 * Allocate channel buffers for read/write/error.
201*4882a593Smuzhiyun 	 * Set flag, so we don't get trounced on.
202*4882a593Smuzhiyun 	 */
203*4882a593Smuzhiyun 	channel->ch_flags |= (CH_OPENING);
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	/* Drop locks, as malloc with GFP_KERNEL can sleep */
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	if (!channel->ch_rqueue) {
208*4882a593Smuzhiyun 		channel->ch_rqueue = kzalloc(RQUEUESIZE, GFP_KERNEL);
209*4882a593Smuzhiyun 		if (!channel->ch_rqueue) {
210*4882a593Smuzhiyun 			jsm_dbg(INIT, &channel->ch_bd->pci_dev,
211*4882a593Smuzhiyun 				"unable to allocate read queue buf\n");
212*4882a593Smuzhiyun 			return -ENOMEM;
213*4882a593Smuzhiyun 		}
214*4882a593Smuzhiyun 	}
215*4882a593Smuzhiyun 	if (!channel->ch_equeue) {
216*4882a593Smuzhiyun 		channel->ch_equeue = kzalloc(EQUEUESIZE, GFP_KERNEL);
217*4882a593Smuzhiyun 		if (!channel->ch_equeue) {
218*4882a593Smuzhiyun 			jsm_dbg(INIT, &channel->ch_bd->pci_dev,
219*4882a593Smuzhiyun 				"unable to allocate error queue buf\n");
220*4882a593Smuzhiyun 			return -ENOMEM;
221*4882a593Smuzhiyun 		}
222*4882a593Smuzhiyun 	}
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	channel->ch_flags &= ~(CH_OPENING);
225*4882a593Smuzhiyun 	/*
226*4882a593Smuzhiyun 	 * Initialize if neither terminal is open.
227*4882a593Smuzhiyun 	 */
228*4882a593Smuzhiyun 	jsm_dbg(OPEN, &channel->ch_bd->pci_dev,
229*4882a593Smuzhiyun 		"jsm_open: initializing channel in open...\n");
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	/*
232*4882a593Smuzhiyun 	 * Flush input queues.
233*4882a593Smuzhiyun 	 */
234*4882a593Smuzhiyun 	channel->ch_r_head = channel->ch_r_tail = 0;
235*4882a593Smuzhiyun 	channel->ch_e_head = channel->ch_e_tail = 0;
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	brd->bd_ops->flush_uart_write(channel);
238*4882a593Smuzhiyun 	brd->bd_ops->flush_uart_read(channel);
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 	channel->ch_flags = 0;
241*4882a593Smuzhiyun 	channel->ch_cached_lsr = 0;
242*4882a593Smuzhiyun 	channel->ch_stops_sent = 0;
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun 	spin_lock_irqsave(&port->lock, lock_flags);
245*4882a593Smuzhiyun 	termios = &port->state->port.tty->termios;
246*4882a593Smuzhiyun 	channel->ch_c_cflag	= termios->c_cflag;
247*4882a593Smuzhiyun 	channel->ch_c_iflag	= termios->c_iflag;
248*4882a593Smuzhiyun 	channel->ch_c_oflag	= termios->c_oflag;
249*4882a593Smuzhiyun 	channel->ch_c_lflag	= termios->c_lflag;
250*4882a593Smuzhiyun 	channel->ch_startc	= termios->c_cc[VSTART];
251*4882a593Smuzhiyun 	channel->ch_stopc	= termios->c_cc[VSTOP];
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	/* Tell UART to init itself */
254*4882a593Smuzhiyun 	brd->bd_ops->uart_init(channel);
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	/*
257*4882a593Smuzhiyun 	 * Run param in case we changed anything
258*4882a593Smuzhiyun 	 */
259*4882a593Smuzhiyun 	brd->bd_ops->param(channel);
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	jsm_carrier(channel);
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	channel->ch_open_count++;
264*4882a593Smuzhiyun 	spin_unlock_irqrestore(&port->lock, lock_flags);
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	jsm_dbg(OPEN, &channel->ch_bd->pci_dev, "finish\n");
267*4882a593Smuzhiyun 	return 0;
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun 
jsm_tty_close(struct uart_port * port)270*4882a593Smuzhiyun static void jsm_tty_close(struct uart_port *port)
271*4882a593Smuzhiyun {
272*4882a593Smuzhiyun 	struct jsm_board *bd;
273*4882a593Smuzhiyun 	struct jsm_channel *channel =
274*4882a593Smuzhiyun 		container_of(port, struct jsm_channel, uart_port);
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	jsm_dbg(CLOSE, &channel->ch_bd->pci_dev, "start\n");
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	bd = channel->ch_bd;
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	channel->ch_flags &= ~(CH_STOPI);
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	channel->ch_open_count--;
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	/*
285*4882a593Smuzhiyun 	 * If we have HUPCL set, lower DTR and RTS
286*4882a593Smuzhiyun 	 */
287*4882a593Smuzhiyun 	if (channel->ch_c_cflag & HUPCL) {
288*4882a593Smuzhiyun 		jsm_dbg(CLOSE, &channel->ch_bd->pci_dev,
289*4882a593Smuzhiyun 			"Close. HUPCL set, dropping DTR/RTS\n");
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun 		/* Drop RTS/DTR */
292*4882a593Smuzhiyun 		channel->ch_mostat &= ~(UART_MCR_DTR | UART_MCR_RTS);
293*4882a593Smuzhiyun 		bd->bd_ops->assert_modem_signals(channel);
294*4882a593Smuzhiyun 	}
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	/* Turn off UART interrupts for this port */
297*4882a593Smuzhiyun 	channel->ch_bd->bd_ops->uart_off(channel);
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun 	jsm_dbg(CLOSE, &channel->ch_bd->pci_dev, "finish\n");
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun 
jsm_tty_set_termios(struct uart_port * port,struct ktermios * termios,struct ktermios * old_termios)302*4882a593Smuzhiyun static void jsm_tty_set_termios(struct uart_port *port,
303*4882a593Smuzhiyun 				 struct ktermios *termios,
304*4882a593Smuzhiyun 				 struct ktermios *old_termios)
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun 	unsigned long lock_flags;
307*4882a593Smuzhiyun 	struct jsm_channel *channel =
308*4882a593Smuzhiyun 		container_of(port, struct jsm_channel, uart_port);
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	spin_lock_irqsave(&port->lock, lock_flags);
311*4882a593Smuzhiyun 	channel->ch_c_cflag	= termios->c_cflag;
312*4882a593Smuzhiyun 	channel->ch_c_iflag	= termios->c_iflag;
313*4882a593Smuzhiyun 	channel->ch_c_oflag	= termios->c_oflag;
314*4882a593Smuzhiyun 	channel->ch_c_lflag	= termios->c_lflag;
315*4882a593Smuzhiyun 	channel->ch_startc	= termios->c_cc[VSTART];
316*4882a593Smuzhiyun 	channel->ch_stopc	= termios->c_cc[VSTOP];
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	channel->ch_bd->bd_ops->param(channel);
319*4882a593Smuzhiyun 	jsm_carrier(channel);
320*4882a593Smuzhiyun 	spin_unlock_irqrestore(&port->lock, lock_flags);
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun 
jsm_tty_type(struct uart_port * port)323*4882a593Smuzhiyun static const char *jsm_tty_type(struct uart_port *port)
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun 	return "jsm";
326*4882a593Smuzhiyun }
327*4882a593Smuzhiyun 
jsm_tty_release_port(struct uart_port * port)328*4882a593Smuzhiyun static void jsm_tty_release_port(struct uart_port *port)
329*4882a593Smuzhiyun {
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun 
jsm_tty_request_port(struct uart_port * port)332*4882a593Smuzhiyun static int jsm_tty_request_port(struct uart_port *port)
333*4882a593Smuzhiyun {
334*4882a593Smuzhiyun 	return 0;
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun 
jsm_config_port(struct uart_port * port,int flags)337*4882a593Smuzhiyun static void jsm_config_port(struct uart_port *port, int flags)
338*4882a593Smuzhiyun {
339*4882a593Smuzhiyun 	port->type = PORT_JSM;
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun static const struct uart_ops jsm_ops = {
343*4882a593Smuzhiyun 	.tx_empty	= jsm_tty_tx_empty,
344*4882a593Smuzhiyun 	.set_mctrl	= jsm_tty_set_mctrl,
345*4882a593Smuzhiyun 	.get_mctrl	= jsm_tty_get_mctrl,
346*4882a593Smuzhiyun 	.stop_tx	= jsm_tty_stop_tx,
347*4882a593Smuzhiyun 	.start_tx	= jsm_tty_start_tx,
348*4882a593Smuzhiyun 	.send_xchar	= jsm_tty_send_xchar,
349*4882a593Smuzhiyun 	.stop_rx	= jsm_tty_stop_rx,
350*4882a593Smuzhiyun 	.break_ctl	= jsm_tty_break,
351*4882a593Smuzhiyun 	.startup	= jsm_tty_open,
352*4882a593Smuzhiyun 	.shutdown	= jsm_tty_close,
353*4882a593Smuzhiyun 	.set_termios	= jsm_tty_set_termios,
354*4882a593Smuzhiyun 	.type		= jsm_tty_type,
355*4882a593Smuzhiyun 	.release_port	= jsm_tty_release_port,
356*4882a593Smuzhiyun 	.request_port	= jsm_tty_request_port,
357*4882a593Smuzhiyun 	.config_port	= jsm_config_port,
358*4882a593Smuzhiyun };
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun /*
361*4882a593Smuzhiyun  * jsm_tty_init()
362*4882a593Smuzhiyun  *
363*4882a593Smuzhiyun  * Init the tty subsystem.  Called once per board after board has been
364*4882a593Smuzhiyun  * downloaded and init'ed.
365*4882a593Smuzhiyun  */
jsm_tty_init(struct jsm_board * brd)366*4882a593Smuzhiyun int jsm_tty_init(struct jsm_board *brd)
367*4882a593Smuzhiyun {
368*4882a593Smuzhiyun 	int i;
369*4882a593Smuzhiyun 	void __iomem *vaddr;
370*4882a593Smuzhiyun 	struct jsm_channel *ch;
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun 	if (!brd)
373*4882a593Smuzhiyun 		return -ENXIO;
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun 	jsm_dbg(INIT, &brd->pci_dev, "start\n");
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun 	/*
378*4882a593Smuzhiyun 	 * Initialize board structure elements.
379*4882a593Smuzhiyun 	 */
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	brd->nasync = brd->maxports;
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun 	/*
384*4882a593Smuzhiyun 	 * Allocate channel memory that might not have been allocated
385*4882a593Smuzhiyun 	 * when the driver was first loaded.
386*4882a593Smuzhiyun 	 */
387*4882a593Smuzhiyun 	for (i = 0; i < brd->nasync; i++) {
388*4882a593Smuzhiyun 		if (!brd->channels[i]) {
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 			/*
391*4882a593Smuzhiyun 			 * Okay to malloc with GFP_KERNEL, we are not at
392*4882a593Smuzhiyun 			 * interrupt context, and there are no locks held.
393*4882a593Smuzhiyun 			 */
394*4882a593Smuzhiyun 			brd->channels[i] = kzalloc(sizeof(struct jsm_channel), GFP_KERNEL);
395*4882a593Smuzhiyun 			if (!brd->channels[i]) {
396*4882a593Smuzhiyun 				jsm_dbg(CORE, &brd->pci_dev,
397*4882a593Smuzhiyun 					"%s:%d Unable to allocate memory for channel struct\n",
398*4882a593Smuzhiyun 					__FILE__, __LINE__);
399*4882a593Smuzhiyun 			}
400*4882a593Smuzhiyun 		}
401*4882a593Smuzhiyun 	}
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 	ch = brd->channels[0];
404*4882a593Smuzhiyun 	vaddr = brd->re_map_membase;
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	/* Set up channel variables */
407*4882a593Smuzhiyun 	for (i = 0; i < brd->nasync; i++, ch = brd->channels[i]) {
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun 		if (!brd->channels[i])
410*4882a593Smuzhiyun 			continue;
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 		spin_lock_init(&ch->ch_lock);
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 		if (brd->bd_uart_offset == 0x200)
415*4882a593Smuzhiyun 			ch->ch_neo_uart =  vaddr + (brd->bd_uart_offset * i);
416*4882a593Smuzhiyun 		else
417*4882a593Smuzhiyun 			ch->ch_cls_uart =  vaddr + (brd->bd_uart_offset * i);
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 		ch->ch_bd = brd;
420*4882a593Smuzhiyun 		ch->ch_portnum = i;
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun 		/* .25 second delay */
423*4882a593Smuzhiyun 		ch->ch_close_delay = 250;
424*4882a593Smuzhiyun 
425*4882a593Smuzhiyun 		init_waitqueue_head(&ch->ch_flags_wait);
426*4882a593Smuzhiyun 	}
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun 	jsm_dbg(INIT, &brd->pci_dev, "finish\n");
429*4882a593Smuzhiyun 	return 0;
430*4882a593Smuzhiyun }
431*4882a593Smuzhiyun 
jsm_uart_port_init(struct jsm_board * brd)432*4882a593Smuzhiyun int jsm_uart_port_init(struct jsm_board *brd)
433*4882a593Smuzhiyun {
434*4882a593Smuzhiyun 	int i, rc;
435*4882a593Smuzhiyun 	unsigned int line;
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun 	if (!brd)
438*4882a593Smuzhiyun 		return -ENXIO;
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun 	jsm_dbg(INIT, &brd->pci_dev, "start\n");
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 	/*
443*4882a593Smuzhiyun 	 * Initialize board structure elements.
444*4882a593Smuzhiyun 	 */
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun 	brd->nasync = brd->maxports;
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun 	/* Set up channel variables */
449*4882a593Smuzhiyun 	for (i = 0; i < brd->nasync; i++) {
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun 		if (!brd->channels[i])
452*4882a593Smuzhiyun 			continue;
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun 		brd->channels[i]->uart_port.irq = brd->irq;
455*4882a593Smuzhiyun 		brd->channels[i]->uart_port.uartclk = 14745600;
456*4882a593Smuzhiyun 		brd->channels[i]->uart_port.type = PORT_JSM;
457*4882a593Smuzhiyun 		brd->channels[i]->uart_port.iotype = UPIO_MEM;
458*4882a593Smuzhiyun 		brd->channels[i]->uart_port.membase = brd->re_map_membase;
459*4882a593Smuzhiyun 		brd->channels[i]->uart_port.fifosize = 16;
460*4882a593Smuzhiyun 		brd->channels[i]->uart_port.ops = &jsm_ops;
461*4882a593Smuzhiyun 		line = find_first_zero_bit(linemap, MAXLINES);
462*4882a593Smuzhiyun 		if (line >= MAXLINES) {
463*4882a593Smuzhiyun 			printk(KERN_INFO "jsm: linemap is full, added device failed\n");
464*4882a593Smuzhiyun 			continue;
465*4882a593Smuzhiyun 		} else
466*4882a593Smuzhiyun 			set_bit(line, linemap);
467*4882a593Smuzhiyun 		brd->channels[i]->uart_port.line = line;
468*4882a593Smuzhiyun 		rc = uart_add_one_port(&jsm_uart_driver, &brd->channels[i]->uart_port);
469*4882a593Smuzhiyun 		if (rc) {
470*4882a593Smuzhiyun 			printk(KERN_INFO "jsm: Port %d failed. Aborting...\n", i);
471*4882a593Smuzhiyun 			return rc;
472*4882a593Smuzhiyun 		} else
473*4882a593Smuzhiyun 			printk(KERN_INFO "jsm: Port %d added\n", i);
474*4882a593Smuzhiyun 	}
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun 	jsm_dbg(INIT, &brd->pci_dev, "finish\n");
477*4882a593Smuzhiyun 	return 0;
478*4882a593Smuzhiyun }
479*4882a593Smuzhiyun 
jsm_remove_uart_port(struct jsm_board * brd)480*4882a593Smuzhiyun int jsm_remove_uart_port(struct jsm_board *brd)
481*4882a593Smuzhiyun {
482*4882a593Smuzhiyun 	int i;
483*4882a593Smuzhiyun 	struct jsm_channel *ch;
484*4882a593Smuzhiyun 
485*4882a593Smuzhiyun 	if (!brd)
486*4882a593Smuzhiyun 		return -ENXIO;
487*4882a593Smuzhiyun 
488*4882a593Smuzhiyun 	jsm_dbg(INIT, &brd->pci_dev, "start\n");
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun 	/*
491*4882a593Smuzhiyun 	 * Initialize board structure elements.
492*4882a593Smuzhiyun 	 */
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun 	brd->nasync = brd->maxports;
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun 	/* Set up channel variables */
497*4882a593Smuzhiyun 	for (i = 0; i < brd->nasync; i++) {
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 		if (!brd->channels[i])
500*4882a593Smuzhiyun 			continue;
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun 		ch = brd->channels[i];
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun 		clear_bit(ch->uart_port.line, linemap);
505*4882a593Smuzhiyun 		uart_remove_one_port(&jsm_uart_driver, &brd->channels[i]->uart_port);
506*4882a593Smuzhiyun 	}
507*4882a593Smuzhiyun 
508*4882a593Smuzhiyun 	jsm_dbg(INIT, &brd->pci_dev, "finish\n");
509*4882a593Smuzhiyun 	return 0;
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun 
jsm_input(struct jsm_channel * ch)512*4882a593Smuzhiyun void jsm_input(struct jsm_channel *ch)
513*4882a593Smuzhiyun {
514*4882a593Smuzhiyun 	struct jsm_board *bd;
515*4882a593Smuzhiyun 	struct tty_struct *tp;
516*4882a593Smuzhiyun 	struct tty_port *port;
517*4882a593Smuzhiyun 	u32 rmask;
518*4882a593Smuzhiyun 	u16 head;
519*4882a593Smuzhiyun 	u16 tail;
520*4882a593Smuzhiyun 	int data_len;
521*4882a593Smuzhiyun 	unsigned long lock_flags;
522*4882a593Smuzhiyun 	int len = 0;
523*4882a593Smuzhiyun 	int s = 0;
524*4882a593Smuzhiyun 	int i = 0;
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun 	jsm_dbg(READ, &ch->ch_bd->pci_dev, "start\n");
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun 	port = &ch->uart_port.state->port;
529*4882a593Smuzhiyun 	tp = port->tty;
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	bd = ch->ch_bd;
532*4882a593Smuzhiyun 	if (!bd)
533*4882a593Smuzhiyun 		return;
534*4882a593Smuzhiyun 
535*4882a593Smuzhiyun 	spin_lock_irqsave(&ch->ch_lock, lock_flags);
536*4882a593Smuzhiyun 
537*4882a593Smuzhiyun 	/*
538*4882a593Smuzhiyun 	 *Figure the number of characters in the buffer.
539*4882a593Smuzhiyun 	 *Exit immediately if none.
540*4882a593Smuzhiyun 	 */
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun 	rmask = RQUEUEMASK;
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun 	head = ch->ch_r_head & rmask;
545*4882a593Smuzhiyun 	tail = ch->ch_r_tail & rmask;
546*4882a593Smuzhiyun 
547*4882a593Smuzhiyun 	data_len = (head - tail) & rmask;
548*4882a593Smuzhiyun 	if (data_len == 0) {
549*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
550*4882a593Smuzhiyun 		return;
551*4882a593Smuzhiyun 	}
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun 	jsm_dbg(READ, &ch->ch_bd->pci_dev, "start\n");
554*4882a593Smuzhiyun 
555*4882a593Smuzhiyun 	/*
556*4882a593Smuzhiyun 	 *If the device is not open, or CREAD is off, flush
557*4882a593Smuzhiyun 	 *input data and return immediately.
558*4882a593Smuzhiyun 	 */
559*4882a593Smuzhiyun 	if (!tp || !C_CREAD(tp)) {
560*4882a593Smuzhiyun 
561*4882a593Smuzhiyun 		jsm_dbg(READ, &ch->ch_bd->pci_dev,
562*4882a593Smuzhiyun 			"input. dropping %d bytes on port %d...\n",
563*4882a593Smuzhiyun 			data_len, ch->ch_portnum);
564*4882a593Smuzhiyun 		ch->ch_r_head = tail;
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun 		/* Force queue flow control to be released, if needed */
567*4882a593Smuzhiyun 		jsm_check_queue_flow_control(ch);
568*4882a593Smuzhiyun 
569*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
570*4882a593Smuzhiyun 		return;
571*4882a593Smuzhiyun 	}
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun 	/*
574*4882a593Smuzhiyun 	 * If we are throttled, simply don't read any data.
575*4882a593Smuzhiyun 	 */
576*4882a593Smuzhiyun 	if (ch->ch_flags & CH_STOPI) {
577*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
578*4882a593Smuzhiyun 		jsm_dbg(READ, &ch->ch_bd->pci_dev,
579*4882a593Smuzhiyun 			"Port %d throttled, not reading any data. head: %x tail: %x\n",
580*4882a593Smuzhiyun 			ch->ch_portnum, head, tail);
581*4882a593Smuzhiyun 		return;
582*4882a593Smuzhiyun 	}
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 	jsm_dbg(READ, &ch->ch_bd->pci_dev, "start 2\n");
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	len = tty_buffer_request_room(port, data_len);
587*4882a593Smuzhiyun 
588*4882a593Smuzhiyun 	/*
589*4882a593Smuzhiyun 	 * len now contains the most amount of data we can copy,
590*4882a593Smuzhiyun 	 * bounded either by the flip buffer size or the amount
591*4882a593Smuzhiyun 	 * of data the card actually has pending...
592*4882a593Smuzhiyun 	 */
593*4882a593Smuzhiyun 	while (len) {
594*4882a593Smuzhiyun 		s = ((head >= tail) ? head : RQUEUESIZE) - tail;
595*4882a593Smuzhiyun 		s = min(s, len);
596*4882a593Smuzhiyun 
597*4882a593Smuzhiyun 		if (s <= 0)
598*4882a593Smuzhiyun 			break;
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun 			/*
601*4882a593Smuzhiyun 			 * If conditions are such that ld needs to see all
602*4882a593Smuzhiyun 			 * UART errors, we will have to walk each character
603*4882a593Smuzhiyun 			 * and error byte and send them to the buffer one at
604*4882a593Smuzhiyun 			 * a time.
605*4882a593Smuzhiyun 			 */
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun 		if (I_PARMRK(tp) || I_BRKINT(tp) || I_INPCK(tp)) {
608*4882a593Smuzhiyun 			for (i = 0; i < s; i++) {
609*4882a593Smuzhiyun 				/*
610*4882a593Smuzhiyun 				 * Give the Linux ld the flags in the
611*4882a593Smuzhiyun 				 * format it likes.
612*4882a593Smuzhiyun 				 */
613*4882a593Smuzhiyun 				if (*(ch->ch_equeue +tail +i) & UART_LSR_BI)
614*4882a593Smuzhiyun 					tty_insert_flip_char(port, *(ch->ch_rqueue +tail +i),  TTY_BREAK);
615*4882a593Smuzhiyun 				else if (*(ch->ch_equeue +tail +i) & UART_LSR_PE)
616*4882a593Smuzhiyun 					tty_insert_flip_char(port, *(ch->ch_rqueue +tail +i), TTY_PARITY);
617*4882a593Smuzhiyun 				else if (*(ch->ch_equeue +tail +i) & UART_LSR_FE)
618*4882a593Smuzhiyun 					tty_insert_flip_char(port, *(ch->ch_rqueue +tail +i), TTY_FRAME);
619*4882a593Smuzhiyun 				else
620*4882a593Smuzhiyun 					tty_insert_flip_char(port, *(ch->ch_rqueue +tail +i), TTY_NORMAL);
621*4882a593Smuzhiyun 			}
622*4882a593Smuzhiyun 		} else {
623*4882a593Smuzhiyun 			tty_insert_flip_string(port, ch->ch_rqueue + tail, s);
624*4882a593Smuzhiyun 		}
625*4882a593Smuzhiyun 		tail += s;
626*4882a593Smuzhiyun 		len -= s;
627*4882a593Smuzhiyun 		/* Flip queue if needed */
628*4882a593Smuzhiyun 		tail &= rmask;
629*4882a593Smuzhiyun 	}
630*4882a593Smuzhiyun 
631*4882a593Smuzhiyun 	ch->ch_r_tail = tail & rmask;
632*4882a593Smuzhiyun 	ch->ch_e_tail = tail & rmask;
633*4882a593Smuzhiyun 	jsm_check_queue_flow_control(ch);
634*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
635*4882a593Smuzhiyun 
636*4882a593Smuzhiyun 	/* Tell the tty layer its okay to "eat" the data now */
637*4882a593Smuzhiyun 	tty_flip_buffer_push(port);
638*4882a593Smuzhiyun 
639*4882a593Smuzhiyun 	jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "finish\n");
640*4882a593Smuzhiyun }
641*4882a593Smuzhiyun 
jsm_carrier(struct jsm_channel * ch)642*4882a593Smuzhiyun static void jsm_carrier(struct jsm_channel *ch)
643*4882a593Smuzhiyun {
644*4882a593Smuzhiyun 	struct jsm_board *bd;
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun 	int virt_carrier = 0;
647*4882a593Smuzhiyun 	int phys_carrier = 0;
648*4882a593Smuzhiyun 
649*4882a593Smuzhiyun 	jsm_dbg(CARR, &ch->ch_bd->pci_dev, "start\n");
650*4882a593Smuzhiyun 
651*4882a593Smuzhiyun 	bd = ch->ch_bd;
652*4882a593Smuzhiyun 	if (!bd)
653*4882a593Smuzhiyun 		return;
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun 	if (ch->ch_mistat & UART_MSR_DCD) {
656*4882a593Smuzhiyun 		jsm_dbg(CARR, &ch->ch_bd->pci_dev, "mistat: %x D_CD: %x\n",
657*4882a593Smuzhiyun 			ch->ch_mistat, ch->ch_mistat & UART_MSR_DCD);
658*4882a593Smuzhiyun 		phys_carrier = 1;
659*4882a593Smuzhiyun 	}
660*4882a593Smuzhiyun 
661*4882a593Smuzhiyun 	if (ch->ch_c_cflag & CLOCAL)
662*4882a593Smuzhiyun 		virt_carrier = 1;
663*4882a593Smuzhiyun 
664*4882a593Smuzhiyun 	jsm_dbg(CARR, &ch->ch_bd->pci_dev, "DCD: physical: %d virt: %d\n",
665*4882a593Smuzhiyun 		phys_carrier, virt_carrier);
666*4882a593Smuzhiyun 
667*4882a593Smuzhiyun 	/*
668*4882a593Smuzhiyun 	 * Test for a VIRTUAL carrier transition to HIGH.
669*4882a593Smuzhiyun 	 */
670*4882a593Smuzhiyun 	if (((ch->ch_flags & CH_FCAR) == 0) && (virt_carrier == 1)) {
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun 		/*
673*4882a593Smuzhiyun 		 * When carrier rises, wake any threads waiting
674*4882a593Smuzhiyun 		 * for carrier in the open routine.
675*4882a593Smuzhiyun 		 */
676*4882a593Smuzhiyun 
677*4882a593Smuzhiyun 		jsm_dbg(CARR, &ch->ch_bd->pci_dev, "carrier: virt DCD rose\n");
678*4882a593Smuzhiyun 
679*4882a593Smuzhiyun 		if (waitqueue_active(&(ch->ch_flags_wait)))
680*4882a593Smuzhiyun 			wake_up_interruptible(&ch->ch_flags_wait);
681*4882a593Smuzhiyun 	}
682*4882a593Smuzhiyun 
683*4882a593Smuzhiyun 	/*
684*4882a593Smuzhiyun 	 * Test for a PHYSICAL carrier transition to HIGH.
685*4882a593Smuzhiyun 	 */
686*4882a593Smuzhiyun 	if (((ch->ch_flags & CH_CD) == 0) && (phys_carrier == 1)) {
687*4882a593Smuzhiyun 
688*4882a593Smuzhiyun 		/*
689*4882a593Smuzhiyun 		 * When carrier rises, wake any threads waiting
690*4882a593Smuzhiyun 		 * for carrier in the open routine.
691*4882a593Smuzhiyun 		 */
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun 		jsm_dbg(CARR, &ch->ch_bd->pci_dev,
694*4882a593Smuzhiyun 			"carrier: physical DCD rose\n");
695*4882a593Smuzhiyun 
696*4882a593Smuzhiyun 		if (waitqueue_active(&(ch->ch_flags_wait)))
697*4882a593Smuzhiyun 			wake_up_interruptible(&ch->ch_flags_wait);
698*4882a593Smuzhiyun 	}
699*4882a593Smuzhiyun 
700*4882a593Smuzhiyun 	/*
701*4882a593Smuzhiyun 	 *  Test for a PHYSICAL transition to low, so long as we aren't
702*4882a593Smuzhiyun 	 *  currently ignoring physical transitions (which is what "virtual
703*4882a593Smuzhiyun 	 *  carrier" indicates).
704*4882a593Smuzhiyun 	 *
705*4882a593Smuzhiyun 	 *  The transition of the virtual carrier to low really doesn't
706*4882a593Smuzhiyun 	 *  matter... it really only means "ignore carrier state", not
707*4882a593Smuzhiyun 	 *  "make pretend that carrier is there".
708*4882a593Smuzhiyun 	 */
709*4882a593Smuzhiyun 	if ((virt_carrier == 0) && ((ch->ch_flags & CH_CD) != 0)
710*4882a593Smuzhiyun 			&& (phys_carrier == 0)) {
711*4882a593Smuzhiyun 		/*
712*4882a593Smuzhiyun 		 *	When carrier drops:
713*4882a593Smuzhiyun 		 *
714*4882a593Smuzhiyun 		 *	Drop carrier on all open units.
715*4882a593Smuzhiyun 		 *
716*4882a593Smuzhiyun 		 *	Flush queues, waking up any task waiting in the
717*4882a593Smuzhiyun 		 *	line discipline.
718*4882a593Smuzhiyun 		 *
719*4882a593Smuzhiyun 		 *	Send a hangup to the control terminal.
720*4882a593Smuzhiyun 		 *
721*4882a593Smuzhiyun 		 *	Enable all select calls.
722*4882a593Smuzhiyun 		 */
723*4882a593Smuzhiyun 		if (waitqueue_active(&(ch->ch_flags_wait)))
724*4882a593Smuzhiyun 			wake_up_interruptible(&ch->ch_flags_wait);
725*4882a593Smuzhiyun 	}
726*4882a593Smuzhiyun 
727*4882a593Smuzhiyun 	/*
728*4882a593Smuzhiyun 	 *  Make sure that our cached values reflect the current reality.
729*4882a593Smuzhiyun 	 */
730*4882a593Smuzhiyun 	if (virt_carrier == 1)
731*4882a593Smuzhiyun 		ch->ch_flags |= CH_FCAR;
732*4882a593Smuzhiyun 	else
733*4882a593Smuzhiyun 		ch->ch_flags &= ~CH_FCAR;
734*4882a593Smuzhiyun 
735*4882a593Smuzhiyun 	if (phys_carrier == 1)
736*4882a593Smuzhiyun 		ch->ch_flags |= CH_CD;
737*4882a593Smuzhiyun 	else
738*4882a593Smuzhiyun 		ch->ch_flags &= ~CH_CD;
739*4882a593Smuzhiyun }
740*4882a593Smuzhiyun 
741*4882a593Smuzhiyun 
jsm_check_queue_flow_control(struct jsm_channel * ch)742*4882a593Smuzhiyun void jsm_check_queue_flow_control(struct jsm_channel *ch)
743*4882a593Smuzhiyun {
744*4882a593Smuzhiyun 	struct board_ops *bd_ops = ch->ch_bd->bd_ops;
745*4882a593Smuzhiyun 	int qleft;
746*4882a593Smuzhiyun 
747*4882a593Smuzhiyun 	/* Store how much space we have left in the queue */
748*4882a593Smuzhiyun 	if ((qleft = ch->ch_r_tail - ch->ch_r_head - 1) < 0)
749*4882a593Smuzhiyun 		qleft += RQUEUEMASK + 1;
750*4882a593Smuzhiyun 
751*4882a593Smuzhiyun 	/*
752*4882a593Smuzhiyun 	 * Check to see if we should enforce flow control on our queue because
753*4882a593Smuzhiyun 	 * the ld (or user) isn't reading data out of our queue fast enuf.
754*4882a593Smuzhiyun 	 *
755*4882a593Smuzhiyun 	 * NOTE: This is done based on what the current flow control of the
756*4882a593Smuzhiyun 	 * port is set for.
757*4882a593Smuzhiyun 	 *
758*4882a593Smuzhiyun 	 * 1) HWFLOW (RTS) - Turn off the UART's Receive interrupt.
759*4882a593Smuzhiyun 	 *	This will cause the UART's FIFO to back up, and force
760*4882a593Smuzhiyun 	 *	the RTS signal to be dropped.
761*4882a593Smuzhiyun 	 * 2) SWFLOW (IXOFF) - Keep trying to send a stop character to
762*4882a593Smuzhiyun 	 *	the other side, in hopes it will stop sending data to us.
763*4882a593Smuzhiyun 	 * 3) NONE - Nothing we can do.  We will simply drop any extra data
764*4882a593Smuzhiyun 	 *	that gets sent into us when the queue fills up.
765*4882a593Smuzhiyun 	 */
766*4882a593Smuzhiyun 	if (qleft < 256) {
767*4882a593Smuzhiyun 		/* HWFLOW */
768*4882a593Smuzhiyun 		if (ch->ch_c_cflag & CRTSCTS) {
769*4882a593Smuzhiyun 			if (!(ch->ch_flags & CH_RECEIVER_OFF)) {
770*4882a593Smuzhiyun 				bd_ops->disable_receiver(ch);
771*4882a593Smuzhiyun 				ch->ch_flags |= (CH_RECEIVER_OFF);
772*4882a593Smuzhiyun 				jsm_dbg(READ, &ch->ch_bd->pci_dev,
773*4882a593Smuzhiyun 					"Internal queue hit hilevel mark (%d)! Turning off interrupts\n",
774*4882a593Smuzhiyun 					qleft);
775*4882a593Smuzhiyun 			}
776*4882a593Smuzhiyun 		}
777*4882a593Smuzhiyun 		/* SWFLOW */
778*4882a593Smuzhiyun 		else if (ch->ch_c_iflag & IXOFF) {
779*4882a593Smuzhiyun 			if (ch->ch_stops_sent <= MAX_STOPS_SENT) {
780*4882a593Smuzhiyun 				bd_ops->send_stop_character(ch);
781*4882a593Smuzhiyun 				ch->ch_stops_sent++;
782*4882a593Smuzhiyun 				jsm_dbg(READ, &ch->ch_bd->pci_dev,
783*4882a593Smuzhiyun 					"Sending stop char! Times sent: %x\n",
784*4882a593Smuzhiyun 					ch->ch_stops_sent);
785*4882a593Smuzhiyun 			}
786*4882a593Smuzhiyun 		}
787*4882a593Smuzhiyun 	}
788*4882a593Smuzhiyun 
789*4882a593Smuzhiyun 	/*
790*4882a593Smuzhiyun 	 * Check to see if we should unenforce flow control because
791*4882a593Smuzhiyun 	 * ld (or user) finally read enuf data out of our queue.
792*4882a593Smuzhiyun 	 *
793*4882a593Smuzhiyun 	 * NOTE: This is done based on what the current flow control of the
794*4882a593Smuzhiyun 	 * port is set for.
795*4882a593Smuzhiyun 	 *
796*4882a593Smuzhiyun 	 * 1) HWFLOW (RTS) - Turn back on the UART's Receive interrupt.
797*4882a593Smuzhiyun 	 *	This will cause the UART's FIFO to raise RTS back up,
798*4882a593Smuzhiyun 	 *	which will allow the other side to start sending data again.
799*4882a593Smuzhiyun 	 * 2) SWFLOW (IXOFF) - Send a start character to
800*4882a593Smuzhiyun 	 *	the other side, so it will start sending data to us again.
801*4882a593Smuzhiyun 	 * 3) NONE - Do nothing. Since we didn't do anything to turn off the
802*4882a593Smuzhiyun 	 *	other side, we don't need to do anything now.
803*4882a593Smuzhiyun 	 */
804*4882a593Smuzhiyun 	if (qleft > (RQUEUESIZE / 2)) {
805*4882a593Smuzhiyun 		/* HWFLOW */
806*4882a593Smuzhiyun 		if (ch->ch_c_cflag & CRTSCTS) {
807*4882a593Smuzhiyun 			if (ch->ch_flags & CH_RECEIVER_OFF) {
808*4882a593Smuzhiyun 				bd_ops->enable_receiver(ch);
809*4882a593Smuzhiyun 				ch->ch_flags &= ~(CH_RECEIVER_OFF);
810*4882a593Smuzhiyun 				jsm_dbg(READ, &ch->ch_bd->pci_dev,
811*4882a593Smuzhiyun 					"Internal queue hit lowlevel mark (%d)! Turning on interrupts\n",
812*4882a593Smuzhiyun 					qleft);
813*4882a593Smuzhiyun 			}
814*4882a593Smuzhiyun 		}
815*4882a593Smuzhiyun 		/* SWFLOW */
816*4882a593Smuzhiyun 		else if (ch->ch_c_iflag & IXOFF && ch->ch_stops_sent) {
817*4882a593Smuzhiyun 			ch->ch_stops_sent = 0;
818*4882a593Smuzhiyun 			bd_ops->send_start_character(ch);
819*4882a593Smuzhiyun 			jsm_dbg(READ, &ch->ch_bd->pci_dev,
820*4882a593Smuzhiyun 				"Sending start char!\n");
821*4882a593Smuzhiyun 		}
822*4882a593Smuzhiyun 	}
823*4882a593Smuzhiyun }
824