1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2012 ARM Ltd.
4*4882a593Smuzhiyun * Author: Marc Zyngier <marc.zyngier@arm.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Adapted for ARM and earlycon:
7*4882a593Smuzhiyun * Copyright (C) 2014 Linaro Ltd.
8*4882a593Smuzhiyun * Author: Rob Herring <robh@kernel.org>
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/console.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/serial_core.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #ifdef CONFIG_THUMB2_KERNEL
16*4882a593Smuzhiyun #define SEMIHOST_SWI "0xab"
17*4882a593Smuzhiyun #else
18*4882a593Smuzhiyun #define SEMIHOST_SWI "0x123456"
19*4882a593Smuzhiyun #endif
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun /*
22*4882a593Smuzhiyun * Semihosting-based debug console
23*4882a593Smuzhiyun */
smh_putc(struct uart_port * port,int c)24*4882a593Smuzhiyun static void smh_putc(struct uart_port *port, int c)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun #ifdef CONFIG_ARM64
27*4882a593Smuzhiyun asm volatile("mov x1, %0\n"
28*4882a593Smuzhiyun "mov x0, #3\n"
29*4882a593Smuzhiyun "hlt 0xf000\n"
30*4882a593Smuzhiyun : : "r" (&c) : "x0", "x1", "memory");
31*4882a593Smuzhiyun #else
32*4882a593Smuzhiyun asm volatile("mov r1, %0\n"
33*4882a593Smuzhiyun "mov r0, #3\n"
34*4882a593Smuzhiyun "svc " SEMIHOST_SWI "\n"
35*4882a593Smuzhiyun : : "r" (&c) : "r0", "r1", "memory");
36*4882a593Smuzhiyun #endif
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
smh_write(struct console * con,const char * s,unsigned n)39*4882a593Smuzhiyun static void smh_write(struct console *con, const char *s, unsigned n)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun struct earlycon_device *dev = con->data;
42*4882a593Smuzhiyun uart_console_write(&dev->port, s, n, smh_putc);
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun static int
early_smh_setup(struct earlycon_device * device,const char * opt)46*4882a593Smuzhiyun __init early_smh_setup(struct earlycon_device *device, const char *opt)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun device->con->write = smh_write;
49*4882a593Smuzhiyun return 0;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun EARLYCON_DECLARE(smh, early_smh_setup);
52