1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for GRLIB serial ports (APBUART)
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Based on linux/drivers/serial/amba.c
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (C) 2000 Deep Blue Solutions Ltd.
8*4882a593Smuzhiyun * Copyright (C) 2003 Konrad Eisele <eiselekd@web.de>
9*4882a593Smuzhiyun * Copyright (C) 2006 Daniel Hellstrom <daniel@gaisler.com>, Aeroflex Gaisler AB
10*4882a593Smuzhiyun * Copyright (C) 2008 Gilead Kutnick <kutnickg@zin-tech.com>
11*4882a593Smuzhiyun * Copyright (C) 2009 Kristoffer Glembo <kristoffer@gaisler.com>, Aeroflex Gaisler AB
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/tty.h>
16*4882a593Smuzhiyun #include <linux/tty_flip.h>
17*4882a593Smuzhiyun #include <linux/ioport.h>
18*4882a593Smuzhiyun #include <linux/init.h>
19*4882a593Smuzhiyun #include <linux/serial.h>
20*4882a593Smuzhiyun #include <linux/console.h>
21*4882a593Smuzhiyun #include <linux/sysrq.h>
22*4882a593Smuzhiyun #include <linux/kthread.h>
23*4882a593Smuzhiyun #include <linux/device.h>
24*4882a593Smuzhiyun #include <linux/of.h>
25*4882a593Smuzhiyun #include <linux/of_device.h>
26*4882a593Smuzhiyun #include <linux/of_platform.h>
27*4882a593Smuzhiyun #include <linux/of_irq.h>
28*4882a593Smuzhiyun #include <linux/platform_device.h>
29*4882a593Smuzhiyun #include <linux/io.h>
30*4882a593Smuzhiyun #include <linux/serial_core.h>
31*4882a593Smuzhiyun #include <asm/irq.h>
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #include "apbuart.h"
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define SERIAL_APBUART_MAJOR TTY_MAJOR
36*4882a593Smuzhiyun #define SERIAL_APBUART_MINOR 64
37*4882a593Smuzhiyun #define UART_DUMMY_RSR_RX 0x8000 /* for ignore all read */
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun static void apbuart_tx_chars(struct uart_port *port);
40*4882a593Smuzhiyun
apbuart_stop_tx(struct uart_port * port)41*4882a593Smuzhiyun static void apbuart_stop_tx(struct uart_port *port)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun unsigned int cr;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun cr = UART_GET_CTRL(port);
46*4882a593Smuzhiyun cr &= ~UART_CTRL_TI;
47*4882a593Smuzhiyun UART_PUT_CTRL(port, cr);
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
apbuart_start_tx(struct uart_port * port)50*4882a593Smuzhiyun static void apbuart_start_tx(struct uart_port *port)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun unsigned int cr;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun cr = UART_GET_CTRL(port);
55*4882a593Smuzhiyun cr |= UART_CTRL_TI;
56*4882a593Smuzhiyun UART_PUT_CTRL(port, cr);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun if (UART_GET_STATUS(port) & UART_STATUS_THE)
59*4882a593Smuzhiyun apbuart_tx_chars(port);
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
apbuart_stop_rx(struct uart_port * port)62*4882a593Smuzhiyun static void apbuart_stop_rx(struct uart_port *port)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun unsigned int cr;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun cr = UART_GET_CTRL(port);
67*4882a593Smuzhiyun cr &= ~(UART_CTRL_RI);
68*4882a593Smuzhiyun UART_PUT_CTRL(port, cr);
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
apbuart_rx_chars(struct uart_port * port)71*4882a593Smuzhiyun static void apbuart_rx_chars(struct uart_port *port)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun unsigned int status, ch, rsr, flag;
74*4882a593Smuzhiyun unsigned int max_chars = port->fifosize;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun status = UART_GET_STATUS(port);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun while (UART_RX_DATA(status) && (max_chars--)) {
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun ch = UART_GET_CHAR(port);
81*4882a593Smuzhiyun flag = TTY_NORMAL;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun port->icount.rx++;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun rsr = UART_GET_STATUS(port) | UART_DUMMY_RSR_RX;
86*4882a593Smuzhiyun UART_PUT_STATUS(port, 0);
87*4882a593Smuzhiyun if (rsr & UART_STATUS_ERR) {
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun if (rsr & UART_STATUS_BR) {
90*4882a593Smuzhiyun rsr &= ~(UART_STATUS_FE | UART_STATUS_PE);
91*4882a593Smuzhiyun port->icount.brk++;
92*4882a593Smuzhiyun if (uart_handle_break(port))
93*4882a593Smuzhiyun goto ignore_char;
94*4882a593Smuzhiyun } else if (rsr & UART_STATUS_PE) {
95*4882a593Smuzhiyun port->icount.parity++;
96*4882a593Smuzhiyun } else if (rsr & UART_STATUS_FE) {
97*4882a593Smuzhiyun port->icount.frame++;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun if (rsr & UART_STATUS_OE)
100*4882a593Smuzhiyun port->icount.overrun++;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun rsr &= port->read_status_mask;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun if (rsr & UART_STATUS_PE)
105*4882a593Smuzhiyun flag = TTY_PARITY;
106*4882a593Smuzhiyun else if (rsr & UART_STATUS_FE)
107*4882a593Smuzhiyun flag = TTY_FRAME;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun if (uart_handle_sysrq_char(port, ch))
111*4882a593Smuzhiyun goto ignore_char;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun uart_insert_char(port, rsr, UART_STATUS_OE, ch, flag);
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun ignore_char:
117*4882a593Smuzhiyun status = UART_GET_STATUS(port);
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun spin_unlock(&port->lock);
121*4882a593Smuzhiyun tty_flip_buffer_push(&port->state->port);
122*4882a593Smuzhiyun spin_lock(&port->lock);
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
apbuart_tx_chars(struct uart_port * port)125*4882a593Smuzhiyun static void apbuart_tx_chars(struct uart_port *port)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun struct circ_buf *xmit = &port->state->xmit;
128*4882a593Smuzhiyun int count;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun if (port->x_char) {
131*4882a593Smuzhiyun UART_PUT_CHAR(port, port->x_char);
132*4882a593Smuzhiyun port->icount.tx++;
133*4882a593Smuzhiyun port->x_char = 0;
134*4882a593Smuzhiyun return;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
138*4882a593Smuzhiyun apbuart_stop_tx(port);
139*4882a593Smuzhiyun return;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun /* amba: fill FIFO */
143*4882a593Smuzhiyun count = port->fifosize >> 1;
144*4882a593Smuzhiyun do {
145*4882a593Smuzhiyun UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
146*4882a593Smuzhiyun xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
147*4882a593Smuzhiyun port->icount.tx++;
148*4882a593Smuzhiyun if (uart_circ_empty(xmit))
149*4882a593Smuzhiyun break;
150*4882a593Smuzhiyun } while (--count > 0);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
153*4882a593Smuzhiyun uart_write_wakeup(port);
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun if (uart_circ_empty(xmit))
156*4882a593Smuzhiyun apbuart_stop_tx(port);
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun
apbuart_int(int irq,void * dev_id)159*4882a593Smuzhiyun static irqreturn_t apbuart_int(int irq, void *dev_id)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun struct uart_port *port = dev_id;
162*4882a593Smuzhiyun unsigned int status;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun spin_lock(&port->lock);
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun status = UART_GET_STATUS(port);
167*4882a593Smuzhiyun if (status & UART_STATUS_DR)
168*4882a593Smuzhiyun apbuart_rx_chars(port);
169*4882a593Smuzhiyun if (status & UART_STATUS_THE)
170*4882a593Smuzhiyun apbuart_tx_chars(port);
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun spin_unlock(&port->lock);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun return IRQ_HANDLED;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
apbuart_tx_empty(struct uart_port * port)177*4882a593Smuzhiyun static unsigned int apbuart_tx_empty(struct uart_port *port)
178*4882a593Smuzhiyun {
179*4882a593Smuzhiyun unsigned int status = UART_GET_STATUS(port);
180*4882a593Smuzhiyun return status & UART_STATUS_THE ? TIOCSER_TEMT : 0;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun
apbuart_get_mctrl(struct uart_port * port)183*4882a593Smuzhiyun static unsigned int apbuart_get_mctrl(struct uart_port *port)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun /* The GRLIB APBUART handles flow control in hardware */
186*4882a593Smuzhiyun return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun
apbuart_set_mctrl(struct uart_port * port,unsigned int mctrl)189*4882a593Smuzhiyun static void apbuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun /* The GRLIB APBUART handles flow control in hardware */
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
apbuart_break_ctl(struct uart_port * port,int break_state)194*4882a593Smuzhiyun static void apbuart_break_ctl(struct uart_port *port, int break_state)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun /* We don't support sending break */
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun
apbuart_startup(struct uart_port * port)199*4882a593Smuzhiyun static int apbuart_startup(struct uart_port *port)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun int retval;
202*4882a593Smuzhiyun unsigned int cr;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun /* Allocate the IRQ */
205*4882a593Smuzhiyun retval = request_irq(port->irq, apbuart_int, 0, "apbuart", port);
206*4882a593Smuzhiyun if (retval)
207*4882a593Smuzhiyun return retval;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun /* Finally, enable interrupts */
210*4882a593Smuzhiyun cr = UART_GET_CTRL(port);
211*4882a593Smuzhiyun UART_PUT_CTRL(port,
212*4882a593Smuzhiyun cr | UART_CTRL_RE | UART_CTRL_TE |
213*4882a593Smuzhiyun UART_CTRL_RI | UART_CTRL_TI);
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun return 0;
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun
apbuart_shutdown(struct uart_port * port)218*4882a593Smuzhiyun static void apbuart_shutdown(struct uart_port *port)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun unsigned int cr;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun /* disable all interrupts, disable the port */
223*4882a593Smuzhiyun cr = UART_GET_CTRL(port);
224*4882a593Smuzhiyun UART_PUT_CTRL(port,
225*4882a593Smuzhiyun cr & ~(UART_CTRL_RE | UART_CTRL_TE |
226*4882a593Smuzhiyun UART_CTRL_RI | UART_CTRL_TI));
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun /* Free the interrupt */
229*4882a593Smuzhiyun free_irq(port->irq, port);
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun
apbuart_set_termios(struct uart_port * port,struct ktermios * termios,struct ktermios * old)232*4882a593Smuzhiyun static void apbuart_set_termios(struct uart_port *port,
233*4882a593Smuzhiyun struct ktermios *termios, struct ktermios *old)
234*4882a593Smuzhiyun {
235*4882a593Smuzhiyun unsigned int cr;
236*4882a593Smuzhiyun unsigned long flags;
237*4882a593Smuzhiyun unsigned int baud, quot;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun /* Ask the core to calculate the divisor for us. */
240*4882a593Smuzhiyun baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
241*4882a593Smuzhiyun if (baud == 0)
242*4882a593Smuzhiyun panic("invalid baudrate %i\n", port->uartclk / 16);
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun /* uart_get_divisor calc a *16 uart freq, apbuart is *8 */
245*4882a593Smuzhiyun quot = (uart_get_divisor(port, baud)) * 2;
246*4882a593Smuzhiyun cr = UART_GET_CTRL(port);
247*4882a593Smuzhiyun cr &= ~(UART_CTRL_PE | UART_CTRL_PS);
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun if (termios->c_cflag & PARENB) {
250*4882a593Smuzhiyun cr |= UART_CTRL_PE;
251*4882a593Smuzhiyun if ((termios->c_cflag & PARODD))
252*4882a593Smuzhiyun cr |= UART_CTRL_PS;
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun /* Enable flow control. */
256*4882a593Smuzhiyun if (termios->c_cflag & CRTSCTS)
257*4882a593Smuzhiyun cr |= UART_CTRL_FL;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun spin_lock_irqsave(&port->lock, flags);
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun /* Update the per-port timeout. */
262*4882a593Smuzhiyun uart_update_timeout(port, termios->c_cflag, baud);
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun port->read_status_mask = UART_STATUS_OE;
265*4882a593Smuzhiyun if (termios->c_iflag & INPCK)
266*4882a593Smuzhiyun port->read_status_mask |= UART_STATUS_FE | UART_STATUS_PE;
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun /* Characters to ignore */
269*4882a593Smuzhiyun port->ignore_status_mask = 0;
270*4882a593Smuzhiyun if (termios->c_iflag & IGNPAR)
271*4882a593Smuzhiyun port->ignore_status_mask |= UART_STATUS_FE | UART_STATUS_PE;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun /* Ignore all characters if CREAD is not set. */
274*4882a593Smuzhiyun if ((termios->c_cflag & CREAD) == 0)
275*4882a593Smuzhiyun port->ignore_status_mask |= UART_DUMMY_RSR_RX;
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun /* Set baud rate */
278*4882a593Smuzhiyun quot -= 1;
279*4882a593Smuzhiyun UART_PUT_SCAL(port, quot);
280*4882a593Smuzhiyun UART_PUT_CTRL(port, cr);
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun spin_unlock_irqrestore(&port->lock, flags);
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun
apbuart_type(struct uart_port * port)285*4882a593Smuzhiyun static const char *apbuart_type(struct uart_port *port)
286*4882a593Smuzhiyun {
287*4882a593Smuzhiyun return port->type == PORT_APBUART ? "GRLIB/APBUART" : NULL;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun
apbuart_release_port(struct uart_port * port)290*4882a593Smuzhiyun static void apbuart_release_port(struct uart_port *port)
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun release_mem_region(port->mapbase, 0x100);
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun
apbuart_request_port(struct uart_port * port)295*4882a593Smuzhiyun static int apbuart_request_port(struct uart_port *port)
296*4882a593Smuzhiyun {
297*4882a593Smuzhiyun return request_mem_region(port->mapbase, 0x100, "grlib-apbuart")
298*4882a593Smuzhiyun != NULL ? 0 : -EBUSY;
299*4882a593Smuzhiyun return 0;
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun /* Configure/autoconfigure the port */
apbuart_config_port(struct uart_port * port,int flags)303*4882a593Smuzhiyun static void apbuart_config_port(struct uart_port *port, int flags)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun if (flags & UART_CONFIG_TYPE) {
306*4882a593Smuzhiyun port->type = PORT_APBUART;
307*4882a593Smuzhiyun apbuart_request_port(port);
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun /* Verify the new serial_struct (for TIOCSSERIAL) */
apbuart_verify_port(struct uart_port * port,struct serial_struct * ser)312*4882a593Smuzhiyun static int apbuart_verify_port(struct uart_port *port,
313*4882a593Smuzhiyun struct serial_struct *ser)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun int ret = 0;
316*4882a593Smuzhiyun if (ser->type != PORT_UNKNOWN && ser->type != PORT_APBUART)
317*4882a593Smuzhiyun ret = -EINVAL;
318*4882a593Smuzhiyun if (ser->irq < 0 || ser->irq >= NR_IRQS)
319*4882a593Smuzhiyun ret = -EINVAL;
320*4882a593Smuzhiyun if (ser->baud_base < 9600)
321*4882a593Smuzhiyun ret = -EINVAL;
322*4882a593Smuzhiyun return ret;
323*4882a593Smuzhiyun }
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun static const struct uart_ops grlib_apbuart_ops = {
326*4882a593Smuzhiyun .tx_empty = apbuart_tx_empty,
327*4882a593Smuzhiyun .set_mctrl = apbuart_set_mctrl,
328*4882a593Smuzhiyun .get_mctrl = apbuart_get_mctrl,
329*4882a593Smuzhiyun .stop_tx = apbuart_stop_tx,
330*4882a593Smuzhiyun .start_tx = apbuart_start_tx,
331*4882a593Smuzhiyun .stop_rx = apbuart_stop_rx,
332*4882a593Smuzhiyun .break_ctl = apbuart_break_ctl,
333*4882a593Smuzhiyun .startup = apbuart_startup,
334*4882a593Smuzhiyun .shutdown = apbuart_shutdown,
335*4882a593Smuzhiyun .set_termios = apbuart_set_termios,
336*4882a593Smuzhiyun .type = apbuart_type,
337*4882a593Smuzhiyun .release_port = apbuart_release_port,
338*4882a593Smuzhiyun .request_port = apbuart_request_port,
339*4882a593Smuzhiyun .config_port = apbuart_config_port,
340*4882a593Smuzhiyun .verify_port = apbuart_verify_port,
341*4882a593Smuzhiyun };
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun static struct uart_port grlib_apbuart_ports[UART_NR];
344*4882a593Smuzhiyun static struct device_node *grlib_apbuart_nodes[UART_NR];
345*4882a593Smuzhiyun
apbuart_scan_fifo_size(struct uart_port * port,int portnumber)346*4882a593Smuzhiyun static int apbuart_scan_fifo_size(struct uart_port *port, int portnumber)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun int ctrl, loop = 0;
349*4882a593Smuzhiyun int status;
350*4882a593Smuzhiyun int fifosize;
351*4882a593Smuzhiyun unsigned long flags;
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun ctrl = UART_GET_CTRL(port);
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun /*
356*4882a593Smuzhiyun * Enable the transceiver and wait for it to be ready to send data.
357*4882a593Smuzhiyun * Clear interrupts so that this process will not be externally
358*4882a593Smuzhiyun * interrupted in the middle (which can cause the transceiver to
359*4882a593Smuzhiyun * drain prematurely).
360*4882a593Smuzhiyun */
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun local_irq_save(flags);
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun UART_PUT_CTRL(port, ctrl | UART_CTRL_TE);
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun while (!UART_TX_READY(UART_GET_STATUS(port)))
367*4882a593Smuzhiyun loop++;
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun /*
370*4882a593Smuzhiyun * Disable the transceiver so data isn't actually sent during the
371*4882a593Smuzhiyun * actual test.
372*4882a593Smuzhiyun */
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun UART_PUT_CTRL(port, ctrl & ~(UART_CTRL_TE));
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun fifosize = 1;
377*4882a593Smuzhiyun UART_PUT_CHAR(port, 0);
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun /*
380*4882a593Smuzhiyun * So long as transmitting a character increments the tranceivier FIFO
381*4882a593Smuzhiyun * length the FIFO must be at least that big. These bytes will
382*4882a593Smuzhiyun * automatically drain off of the FIFO.
383*4882a593Smuzhiyun */
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun status = UART_GET_STATUS(port);
386*4882a593Smuzhiyun while (((status >> 20) & 0x3F) == fifosize) {
387*4882a593Smuzhiyun fifosize++;
388*4882a593Smuzhiyun UART_PUT_CHAR(port, 0);
389*4882a593Smuzhiyun status = UART_GET_STATUS(port);
390*4882a593Smuzhiyun }
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun fifosize--;
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun UART_PUT_CTRL(port, ctrl);
395*4882a593Smuzhiyun local_irq_restore(flags);
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun if (fifosize == 0)
398*4882a593Smuzhiyun fifosize = 1;
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun return fifosize;
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun
apbuart_flush_fifo(struct uart_port * port)403*4882a593Smuzhiyun static void apbuart_flush_fifo(struct uart_port *port)
404*4882a593Smuzhiyun {
405*4882a593Smuzhiyun int i;
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun for (i = 0; i < port->fifosize; i++)
408*4882a593Smuzhiyun UART_GET_CHAR(port);
409*4882a593Smuzhiyun }
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun /* ======================================================================== */
413*4882a593Smuzhiyun /* Console driver, if enabled */
414*4882a593Smuzhiyun /* ======================================================================== */
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun #ifdef CONFIG_SERIAL_GRLIB_GAISLER_APBUART_CONSOLE
417*4882a593Smuzhiyun
apbuart_console_putchar(struct uart_port * port,int ch)418*4882a593Smuzhiyun static void apbuart_console_putchar(struct uart_port *port, int ch)
419*4882a593Smuzhiyun {
420*4882a593Smuzhiyun unsigned int status;
421*4882a593Smuzhiyun do {
422*4882a593Smuzhiyun status = UART_GET_STATUS(port);
423*4882a593Smuzhiyun } while (!UART_TX_READY(status));
424*4882a593Smuzhiyun UART_PUT_CHAR(port, ch);
425*4882a593Smuzhiyun }
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun static void
apbuart_console_write(struct console * co,const char * s,unsigned int count)428*4882a593Smuzhiyun apbuart_console_write(struct console *co, const char *s, unsigned int count)
429*4882a593Smuzhiyun {
430*4882a593Smuzhiyun struct uart_port *port = &grlib_apbuart_ports[co->index];
431*4882a593Smuzhiyun unsigned int status, old_cr, new_cr;
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun /* First save the CR then disable the interrupts */
434*4882a593Smuzhiyun old_cr = UART_GET_CTRL(port);
435*4882a593Smuzhiyun new_cr = old_cr & ~(UART_CTRL_RI | UART_CTRL_TI);
436*4882a593Smuzhiyun UART_PUT_CTRL(port, new_cr);
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun uart_console_write(port, s, count, apbuart_console_putchar);
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun /*
441*4882a593Smuzhiyun * Finally, wait for transmitter to become empty
442*4882a593Smuzhiyun * and restore the TCR
443*4882a593Smuzhiyun */
444*4882a593Smuzhiyun do {
445*4882a593Smuzhiyun status = UART_GET_STATUS(port);
446*4882a593Smuzhiyun } while (!UART_TX_READY(status));
447*4882a593Smuzhiyun UART_PUT_CTRL(port, old_cr);
448*4882a593Smuzhiyun }
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun static void __init
apbuart_console_get_options(struct uart_port * port,int * baud,int * parity,int * bits)451*4882a593Smuzhiyun apbuart_console_get_options(struct uart_port *port, int *baud,
452*4882a593Smuzhiyun int *parity, int *bits)
453*4882a593Smuzhiyun {
454*4882a593Smuzhiyun if (UART_GET_CTRL(port) & (UART_CTRL_RE | UART_CTRL_TE)) {
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun unsigned int quot, status;
457*4882a593Smuzhiyun status = UART_GET_STATUS(port);
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun *parity = 'n';
460*4882a593Smuzhiyun if (status & UART_CTRL_PE) {
461*4882a593Smuzhiyun if ((status & UART_CTRL_PS) == 0)
462*4882a593Smuzhiyun *parity = 'e';
463*4882a593Smuzhiyun else
464*4882a593Smuzhiyun *parity = 'o';
465*4882a593Smuzhiyun }
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun *bits = 8;
468*4882a593Smuzhiyun quot = UART_GET_SCAL(port) / 8;
469*4882a593Smuzhiyun *baud = port->uartclk / (16 * (quot + 1));
470*4882a593Smuzhiyun }
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun
apbuart_console_setup(struct console * co,char * options)473*4882a593Smuzhiyun static int __init apbuart_console_setup(struct console *co, char *options)
474*4882a593Smuzhiyun {
475*4882a593Smuzhiyun struct uart_port *port;
476*4882a593Smuzhiyun int baud = 38400;
477*4882a593Smuzhiyun int bits = 8;
478*4882a593Smuzhiyun int parity = 'n';
479*4882a593Smuzhiyun int flow = 'n';
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun pr_debug("apbuart_console_setup co=%p, co->index=%i, options=%s\n",
482*4882a593Smuzhiyun co, co->index, options);
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun /*
485*4882a593Smuzhiyun * Check whether an invalid uart number has been specified, and
486*4882a593Smuzhiyun * if so, search for the first available port that does have
487*4882a593Smuzhiyun * console support.
488*4882a593Smuzhiyun */
489*4882a593Smuzhiyun if (co->index >= grlib_apbuart_port_nr)
490*4882a593Smuzhiyun co->index = 0;
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun port = &grlib_apbuart_ports[co->index];
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun spin_lock_init(&port->lock);
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun if (options)
497*4882a593Smuzhiyun uart_parse_options(options, &baud, &parity, &bits, &flow);
498*4882a593Smuzhiyun else
499*4882a593Smuzhiyun apbuart_console_get_options(port, &baud, &parity, &bits);
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun return uart_set_options(port, co, baud, parity, bits, flow);
502*4882a593Smuzhiyun }
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun static struct uart_driver grlib_apbuart_driver;
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun static struct console grlib_apbuart_console = {
507*4882a593Smuzhiyun .name = "ttyS",
508*4882a593Smuzhiyun .write = apbuart_console_write,
509*4882a593Smuzhiyun .device = uart_console_device,
510*4882a593Smuzhiyun .setup = apbuart_console_setup,
511*4882a593Smuzhiyun .flags = CON_PRINTBUFFER,
512*4882a593Smuzhiyun .index = -1,
513*4882a593Smuzhiyun .data = &grlib_apbuart_driver,
514*4882a593Smuzhiyun };
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun static int grlib_apbuart_configure(void);
518*4882a593Smuzhiyun
apbuart_console_init(void)519*4882a593Smuzhiyun static int __init apbuart_console_init(void)
520*4882a593Smuzhiyun {
521*4882a593Smuzhiyun if (grlib_apbuart_configure())
522*4882a593Smuzhiyun return -ENODEV;
523*4882a593Smuzhiyun register_console(&grlib_apbuart_console);
524*4882a593Smuzhiyun return 0;
525*4882a593Smuzhiyun }
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun console_initcall(apbuart_console_init);
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun #define APBUART_CONSOLE (&grlib_apbuart_console)
530*4882a593Smuzhiyun #else
531*4882a593Smuzhiyun #define APBUART_CONSOLE NULL
532*4882a593Smuzhiyun #endif
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun static struct uart_driver grlib_apbuart_driver = {
535*4882a593Smuzhiyun .owner = THIS_MODULE,
536*4882a593Smuzhiyun .driver_name = "serial",
537*4882a593Smuzhiyun .dev_name = "ttyS",
538*4882a593Smuzhiyun .major = SERIAL_APBUART_MAJOR,
539*4882a593Smuzhiyun .minor = SERIAL_APBUART_MINOR,
540*4882a593Smuzhiyun .nr = UART_NR,
541*4882a593Smuzhiyun .cons = APBUART_CONSOLE,
542*4882a593Smuzhiyun };
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun /* ======================================================================== */
546*4882a593Smuzhiyun /* OF Platform Driver */
547*4882a593Smuzhiyun /* ======================================================================== */
548*4882a593Smuzhiyun
apbuart_probe(struct platform_device * op)549*4882a593Smuzhiyun static int apbuart_probe(struct platform_device *op)
550*4882a593Smuzhiyun {
551*4882a593Smuzhiyun int i;
552*4882a593Smuzhiyun struct uart_port *port = NULL;
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun for (i = 0; i < grlib_apbuart_port_nr; i++) {
555*4882a593Smuzhiyun if (op->dev.of_node == grlib_apbuart_nodes[i])
556*4882a593Smuzhiyun break;
557*4882a593Smuzhiyun }
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun port = &grlib_apbuart_ports[i];
560*4882a593Smuzhiyun port->dev = &op->dev;
561*4882a593Smuzhiyun port->irq = op->archdata.irqs[0];
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun uart_add_one_port(&grlib_apbuart_driver, (struct uart_port *) port);
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun apbuart_flush_fifo((struct uart_port *) port);
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun printk(KERN_INFO "grlib-apbuart at 0x%llx, irq %d\n",
568*4882a593Smuzhiyun (unsigned long long) port->mapbase, port->irq);
569*4882a593Smuzhiyun return 0;
570*4882a593Smuzhiyun }
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun static const struct of_device_id apbuart_match[] = {
573*4882a593Smuzhiyun {
574*4882a593Smuzhiyun .name = "GAISLER_APBUART",
575*4882a593Smuzhiyun },
576*4882a593Smuzhiyun {
577*4882a593Smuzhiyun .name = "01_00c",
578*4882a593Smuzhiyun },
579*4882a593Smuzhiyun {},
580*4882a593Smuzhiyun };
581*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, apbuart_match);
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun static struct platform_driver grlib_apbuart_of_driver = {
584*4882a593Smuzhiyun .probe = apbuart_probe,
585*4882a593Smuzhiyun .driver = {
586*4882a593Smuzhiyun .name = "grlib-apbuart",
587*4882a593Smuzhiyun .of_match_table = apbuart_match,
588*4882a593Smuzhiyun },
589*4882a593Smuzhiyun };
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun
grlib_apbuart_configure(void)592*4882a593Smuzhiyun static int __init grlib_apbuart_configure(void)
593*4882a593Smuzhiyun {
594*4882a593Smuzhiyun struct device_node *np;
595*4882a593Smuzhiyun int line = 0;
596*4882a593Smuzhiyun
597*4882a593Smuzhiyun for_each_matching_node(np, apbuart_match) {
598*4882a593Smuzhiyun const int *ampopts;
599*4882a593Smuzhiyun const u32 *freq_hz;
600*4882a593Smuzhiyun const struct amba_prom_registers *regs;
601*4882a593Smuzhiyun struct uart_port *port;
602*4882a593Smuzhiyun unsigned long addr;
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun ampopts = of_get_property(np, "ampopts", NULL);
605*4882a593Smuzhiyun if (ampopts && (*ampopts == 0))
606*4882a593Smuzhiyun continue; /* Ignore if used by another OS instance */
607*4882a593Smuzhiyun regs = of_get_property(np, "reg", NULL);
608*4882a593Smuzhiyun /* Frequency of APB Bus is frequency of UART */
609*4882a593Smuzhiyun freq_hz = of_get_property(np, "freq", NULL);
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun if (!regs || !freq_hz || (*freq_hz == 0))
612*4882a593Smuzhiyun continue;
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun grlib_apbuart_nodes[line] = np;
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun addr = regs->phys_addr;
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun port = &grlib_apbuart_ports[line];
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun port->mapbase = addr;
621*4882a593Smuzhiyun port->membase = ioremap(addr, sizeof(struct grlib_apbuart_regs_map));
622*4882a593Smuzhiyun port->irq = 0;
623*4882a593Smuzhiyun port->iotype = UPIO_MEM;
624*4882a593Smuzhiyun port->ops = &grlib_apbuart_ops;
625*4882a593Smuzhiyun port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_GRLIB_GAISLER_APBUART_CONSOLE);
626*4882a593Smuzhiyun port->flags = UPF_BOOT_AUTOCONF;
627*4882a593Smuzhiyun port->line = line;
628*4882a593Smuzhiyun port->uartclk = *freq_hz;
629*4882a593Smuzhiyun port->fifosize = apbuart_scan_fifo_size((struct uart_port *) port, line);
630*4882a593Smuzhiyun line++;
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun /* We support maximum UART_NR uarts ... */
633*4882a593Smuzhiyun if (line == UART_NR)
634*4882a593Smuzhiyun break;
635*4882a593Smuzhiyun }
636*4882a593Smuzhiyun
637*4882a593Smuzhiyun grlib_apbuart_driver.nr = grlib_apbuart_port_nr = line;
638*4882a593Smuzhiyun return line ? 0 : -ENODEV;
639*4882a593Smuzhiyun }
640*4882a593Smuzhiyun
grlib_apbuart_init(void)641*4882a593Smuzhiyun static int __init grlib_apbuart_init(void)
642*4882a593Smuzhiyun {
643*4882a593Smuzhiyun int ret;
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun /* Find all APBUARTS in device the tree and initialize their ports */
646*4882a593Smuzhiyun ret = grlib_apbuart_configure();
647*4882a593Smuzhiyun if (ret)
648*4882a593Smuzhiyun return ret;
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun printk(KERN_INFO "Serial: GRLIB APBUART driver\n");
651*4882a593Smuzhiyun
652*4882a593Smuzhiyun ret = uart_register_driver(&grlib_apbuart_driver);
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun if (ret) {
655*4882a593Smuzhiyun printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
656*4882a593Smuzhiyun __FILE__, ret);
657*4882a593Smuzhiyun return ret;
658*4882a593Smuzhiyun }
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun ret = platform_driver_register(&grlib_apbuart_of_driver);
661*4882a593Smuzhiyun if (ret) {
662*4882a593Smuzhiyun printk(KERN_ERR
663*4882a593Smuzhiyun "%s: platform_driver_register failed (%i)\n",
664*4882a593Smuzhiyun __FILE__, ret);
665*4882a593Smuzhiyun uart_unregister_driver(&grlib_apbuart_driver);
666*4882a593Smuzhiyun return ret;
667*4882a593Smuzhiyun }
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun return ret;
670*4882a593Smuzhiyun }
671*4882a593Smuzhiyun
grlib_apbuart_exit(void)672*4882a593Smuzhiyun static void __exit grlib_apbuart_exit(void)
673*4882a593Smuzhiyun {
674*4882a593Smuzhiyun int i;
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun for (i = 0; i < grlib_apbuart_port_nr; i++)
677*4882a593Smuzhiyun uart_remove_one_port(&grlib_apbuart_driver,
678*4882a593Smuzhiyun &grlib_apbuart_ports[i]);
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun uart_unregister_driver(&grlib_apbuart_driver);
681*4882a593Smuzhiyun platform_driver_unregister(&grlib_apbuart_of_driver);
682*4882a593Smuzhiyun }
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun module_init(grlib_apbuart_init);
685*4882a593Smuzhiyun module_exit(grlib_apbuart_exit);
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun MODULE_AUTHOR("Aeroflex Gaisler AB");
688*4882a593Smuzhiyun MODULE_DESCRIPTION("GRLIB APBUART serial driver");
689*4882a593Smuzhiyun MODULE_VERSION("2.1");
690*4882a593Smuzhiyun MODULE_LICENSE("GPL");
691