xref: /OK3568_Linux_fs/kernel/drivers/tty/serial/8250/8250_em.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Renesas Emma Mobile 8250 driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *  Copyright (C) 2012 Magnus Damm
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/device.h>
9*4882a593Smuzhiyun #include <linux/io.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
12*4882a593Smuzhiyun #include <linux/serial_8250.h>
13*4882a593Smuzhiyun #include <linux/serial_reg.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/clk.h>
16*4882a593Smuzhiyun #include <linux/slab.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #include "8250.h"
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #define UART_DLL_EM 9
21*4882a593Smuzhiyun #define UART_DLM_EM 10
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun struct serial8250_em_priv {
24*4882a593Smuzhiyun 	struct clk *sclk;
25*4882a593Smuzhiyun 	int line;
26*4882a593Smuzhiyun };
27*4882a593Smuzhiyun 
serial8250_em_serial_out(struct uart_port * p,int offset,int value)28*4882a593Smuzhiyun static void serial8250_em_serial_out(struct uart_port *p, int offset, int value)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun 	switch (offset) {
31*4882a593Smuzhiyun 	case UART_TX: /* TX @ 0x00 */
32*4882a593Smuzhiyun 		writeb(value, p->membase);
33*4882a593Smuzhiyun 		break;
34*4882a593Smuzhiyun 	case UART_FCR: /* FCR @ 0x0c (+1) */
35*4882a593Smuzhiyun 	case UART_LCR: /* LCR @ 0x10 (+1) */
36*4882a593Smuzhiyun 	case UART_MCR: /* MCR @ 0x14 (+1) */
37*4882a593Smuzhiyun 	case UART_SCR: /* SCR @ 0x20 (+1) */
38*4882a593Smuzhiyun 		writel(value, p->membase + ((offset + 1) << 2));
39*4882a593Smuzhiyun 		break;
40*4882a593Smuzhiyun 	case UART_IER: /* IER @ 0x04 */
41*4882a593Smuzhiyun 		value &= 0x0f; /* only 4 valid bits - not Xscale */
42*4882a593Smuzhiyun 		fallthrough;
43*4882a593Smuzhiyun 	case UART_DLL_EM: /* DLL @ 0x24 (+9) */
44*4882a593Smuzhiyun 	case UART_DLM_EM: /* DLM @ 0x28 (+9) */
45*4882a593Smuzhiyun 		writel(value, p->membase + (offset << 2));
46*4882a593Smuzhiyun 	}
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun 
serial8250_em_serial_in(struct uart_port * p,int offset)49*4882a593Smuzhiyun static unsigned int serial8250_em_serial_in(struct uart_port *p, int offset)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun 	switch (offset) {
52*4882a593Smuzhiyun 	case UART_RX: /* RX @ 0x00 */
53*4882a593Smuzhiyun 		return readb(p->membase);
54*4882a593Smuzhiyun 	case UART_MCR: /* MCR @ 0x14 (+1) */
55*4882a593Smuzhiyun 	case UART_LSR: /* LSR @ 0x18 (+1) */
56*4882a593Smuzhiyun 	case UART_MSR: /* MSR @ 0x1c (+1) */
57*4882a593Smuzhiyun 	case UART_SCR: /* SCR @ 0x20 (+1) */
58*4882a593Smuzhiyun 		return readl(p->membase + ((offset + 1) << 2));
59*4882a593Smuzhiyun 	case UART_IER: /* IER @ 0x04 */
60*4882a593Smuzhiyun 	case UART_IIR: /* IIR @ 0x08 */
61*4882a593Smuzhiyun 	case UART_DLL_EM: /* DLL @ 0x24 (+9) */
62*4882a593Smuzhiyun 	case UART_DLM_EM: /* DLM @ 0x28 (+9) */
63*4882a593Smuzhiyun 		return readl(p->membase + (offset << 2));
64*4882a593Smuzhiyun 	}
65*4882a593Smuzhiyun 	return 0;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun 
serial8250_em_serial_dl_read(struct uart_8250_port * up)68*4882a593Smuzhiyun static int serial8250_em_serial_dl_read(struct uart_8250_port *up)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	return serial_in(up, UART_DLL_EM) | serial_in(up, UART_DLM_EM) << 8;
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun 
serial8250_em_serial_dl_write(struct uart_8250_port * up,int value)73*4882a593Smuzhiyun static void serial8250_em_serial_dl_write(struct uart_8250_port *up, int value)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun 	serial_out(up, UART_DLL_EM, value & 0xff);
76*4882a593Smuzhiyun 	serial_out(up, UART_DLM_EM, value >> 8 & 0xff);
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun 
serial8250_em_probe(struct platform_device * pdev)79*4882a593Smuzhiyun static int serial8250_em_probe(struct platform_device *pdev)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun 	struct serial8250_em_priv *priv;
82*4882a593Smuzhiyun 	struct uart_8250_port up;
83*4882a593Smuzhiyun 	struct resource *regs;
84*4882a593Smuzhiyun 	int irq, ret;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	irq = platform_get_irq(pdev, 0);
87*4882a593Smuzhiyun 	if (irq < 0)
88*4882a593Smuzhiyun 		return irq;
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
91*4882a593Smuzhiyun 	if (!regs) {
92*4882a593Smuzhiyun 		dev_err(&pdev->dev, "missing registers\n");
93*4882a593Smuzhiyun 		return -EINVAL;
94*4882a593Smuzhiyun 	}
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
97*4882a593Smuzhiyun 	if (!priv)
98*4882a593Smuzhiyun 		return -ENOMEM;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	priv->sclk = devm_clk_get(&pdev->dev, "sclk");
101*4882a593Smuzhiyun 	if (IS_ERR(priv->sclk)) {
102*4882a593Smuzhiyun 		dev_err(&pdev->dev, "unable to get clock\n");
103*4882a593Smuzhiyun 		return PTR_ERR(priv->sclk);
104*4882a593Smuzhiyun 	}
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	memset(&up, 0, sizeof(up));
107*4882a593Smuzhiyun 	up.port.mapbase = regs->start;
108*4882a593Smuzhiyun 	up.port.irq = irq;
109*4882a593Smuzhiyun 	up.port.type = PORT_UNKNOWN;
110*4882a593Smuzhiyun 	up.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | UPF_IOREMAP;
111*4882a593Smuzhiyun 	up.port.dev = &pdev->dev;
112*4882a593Smuzhiyun 	up.port.private_data = priv;
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	clk_prepare_enable(priv->sclk);
115*4882a593Smuzhiyun 	up.port.uartclk = clk_get_rate(priv->sclk);
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	up.port.iotype = UPIO_MEM32;
118*4882a593Smuzhiyun 	up.port.serial_in = serial8250_em_serial_in;
119*4882a593Smuzhiyun 	up.port.serial_out = serial8250_em_serial_out;
120*4882a593Smuzhiyun 	up.dl_read = serial8250_em_serial_dl_read;
121*4882a593Smuzhiyun 	up.dl_write = serial8250_em_serial_dl_write;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	ret = serial8250_register_8250_port(&up);
124*4882a593Smuzhiyun 	if (ret < 0) {
125*4882a593Smuzhiyun 		dev_err(&pdev->dev, "unable to register 8250 port\n");
126*4882a593Smuzhiyun 		clk_disable_unprepare(priv->sclk);
127*4882a593Smuzhiyun 		return ret;
128*4882a593Smuzhiyun 	}
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	priv->line = ret;
131*4882a593Smuzhiyun 	platform_set_drvdata(pdev, priv);
132*4882a593Smuzhiyun 	return 0;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun 
serial8250_em_remove(struct platform_device * pdev)135*4882a593Smuzhiyun static int serial8250_em_remove(struct platform_device *pdev)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun 	struct serial8250_em_priv *priv = platform_get_drvdata(pdev);
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	serial8250_unregister_port(priv->line);
140*4882a593Smuzhiyun 	clk_disable_unprepare(priv->sclk);
141*4882a593Smuzhiyun 	return 0;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun static const struct of_device_id serial8250_em_dt_ids[] = {
145*4882a593Smuzhiyun 	{ .compatible = "renesas,em-uart", },
146*4882a593Smuzhiyun 	{},
147*4882a593Smuzhiyun };
148*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, serial8250_em_dt_ids);
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun static struct platform_driver serial8250_em_platform_driver = {
151*4882a593Smuzhiyun 	.driver = {
152*4882a593Smuzhiyun 		.name		= "serial8250-em",
153*4882a593Smuzhiyun 		.of_match_table = serial8250_em_dt_ids,
154*4882a593Smuzhiyun 	},
155*4882a593Smuzhiyun 	.probe			= serial8250_em_probe,
156*4882a593Smuzhiyun 	.remove			= serial8250_em_remove,
157*4882a593Smuzhiyun };
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun module_platform_driver(serial8250_em_platform_driver);
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun MODULE_AUTHOR("Magnus Damm");
162*4882a593Smuzhiyun MODULE_DESCRIPTION("Renesas Emma Mobile 8250 Driver");
163*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
164